GDB (xrefs)
Loading...
Searching...
No Matches
riscv-tdep.c File Reference
#include "defs.h"
#include "frame.h"
#include "inferior.h"
#include "symtab.h"
#include "value.h"
#include "gdbcmd.h"
#include "language.h"
#include "gdbcore.h"
#include "symfile.h"
#include "objfiles.h"
#include "gdbtypes.h"
#include "target.h"
#include "arch-utils.h"
#include "regcache.h"
#include "osabi.h"
#include "riscv-tdep.h"
#include "reggroups.h"
#include "opcode/riscv.h"
#include "elf/riscv.h"
#include "elf-bfd.h"
#include "symcat.h"
#include "dis-asm.h"
#include "frame-unwind.h"
#include "frame-base.h"
#include "trad-frame.h"
#include "infcall.h"
#include "floatformat.h"
#include "remote.h"
#include "target-descriptions.h"
#include "dwarf2/frame.h"
#include "user-regs.h"
#include "valprint.h"
#include "gdbsupport/common-defs.h"
#include "opcode/riscv-opc.h"
#include "cli/cli-decode.h"
#include "observable.h"
#include "prologue-value.h"
#include "arch/riscv.h"
#include "riscv-ravenscar-thread.h"
#include "gdbsupport/gdb-safe-ctype.h"

Go to the source code of this file.

Classes

struct  riscv_unwind_cache
 
class  riscv_pending_register_alias
 
struct  riscv_register_feature
 
struct  riscv_register_feature::register_info
 
struct  riscv_xreg_feature
 
struct  riscv_freg_feature
 
struct  riscv_virtual_feature
 
struct  riscv_csr_feature
 
struct  riscv_vector_feature
 
class  riscv_insn
 
union  riscv_insn::riscv_insn_immediate
 
struct  riscv_arg_info
 
struct  riscv_arg_info::location
 
struct  riscv_arg_reg
 
struct  riscv_memory_offsets
 
struct  riscv_call_info
 
class  riscv_struct_info
 

Macros

#define SP_ALIGNMENT   16
 
#define BIGGEST_ALIGNMENT   16
 
#define DECLARE_INSN(INSN_NAME, INSN_MATCH, INSN_MASK)
 
#define riscv_breakpoints_debug_printf(fmt, ...)
 
#define riscv_infcall_debug_printf(fmt, ...)
 
#define RISCV_INFCALL_SCOPED_DEBUG_START_END(fmt, ...)
 
#define riscv_unwinder_debug_printf(fmt, ...)
 
#define riscv_gdbarch_debug_printf(fmt, ...)
 
#define DECLARE_CSR(NAME, VALUE, CLASS, DEFINE_VER, ABORT_VER)
 
#define RISCV_ENCODING_H
 
#define MATCH_SLLI_RV32   0x1013
 
#define MASK_SLLI_RV32   0xfe00707f
 
#define MATCH_SRLI_RV32   0x5013
 
#define MASK_SRLI_RV32   0xfe00707f
 
#define MATCH_SRAI_RV32   0x40005013
 
#define MASK_SRAI_RV32   0xfe00707f
 
#define MATCH_FRFLAGS   0x102073
 
#define MASK_FRFLAGS   0xfffff07f
 
#define MATCH_FSFLAGS   0x101073
 
#define MASK_FSFLAGS   0xfff0707f
 
#define MATCH_FSFLAGSI   0x105073
 
#define MASK_FSFLAGSI   0xfff0707f
 
#define MATCH_FRRM   0x202073
 
#define MASK_FRRM   0xfffff07f
 
#define MATCH_FSRM   0x201073
 
#define MASK_FSRM   0xfff0707f
 
#define MATCH_FSRMI   0x205073
 
#define MASK_FSRMI   0xfff0707f
 
#define MATCH_FSCSR   0x301073
 
#define MASK_FSCSR   0xfff0707f
 
#define MATCH_FRCSR   0x302073
 
#define MASK_FRCSR   0xfffff07f
 
#define MATCH_RDCYCLE   0xc0002073
 
#define MASK_RDCYCLE   0xfffff07f
 
#define MATCH_RDTIME   0xc0102073
 
#define MASK_RDTIME   0xfffff07f
 
#define MATCH_RDINSTRET   0xc0202073
 
#define MASK_RDINSTRET   0xfffff07f
 
#define MATCH_RDCYCLEH   0xc8002073
 
#define MASK_RDCYCLEH   0xfffff07f
 
#define MATCH_RDTIMEH   0xc8102073
 
#define MASK_RDTIMEH   0xfffff07f
 
#define MATCH_RDINSTRETH   0xc8202073
 
#define MASK_RDINSTRETH   0xfffff07f
 
#define MATCH_SCALL   0x73
 
#define MASK_SCALL   0xffffffff
 
#define MATCH_SBREAK   0x100073
 
#define MASK_SBREAK   0xffffffff
 
#define MATCH_BEQ   0x63
 
#define MASK_BEQ   0x707f
 
#define MATCH_BNE   0x1063
 
#define MASK_BNE   0x707f
 
#define MATCH_BLT   0x4063
 
#define MASK_BLT   0x707f
 
#define MATCH_BGE   0x5063
 
#define MASK_BGE   0x707f
 
#define MATCH_BLTU   0x6063
 
#define MASK_BLTU   0x707f
 
#define MATCH_BGEU   0x7063
 
#define MASK_BGEU   0x707f
 
#define MATCH_JALR   0x67
 
#define MASK_JALR   0x707f
 
#define MATCH_JAL   0x6f
 
#define MASK_JAL   0x7f
 
#define MATCH_LUI   0x37
 
#define MASK_LUI   0x7f
 
#define MATCH_AUIPC   0x17
 
#define MASK_AUIPC   0x7f
 
#define MATCH_ADDI   0x13
 
#define MASK_ADDI   0x707f
 
#define MATCH_SLLI   0x1013
 
#define MASK_SLLI   0xfc00707f
 
#define MATCH_SLTI   0x2013
 
#define MASK_SLTI   0x707f
 
#define MATCH_SLTIU   0x3013
 
#define MASK_SLTIU   0x707f
 
#define MATCH_XORI   0x4013
 
#define MASK_XORI   0x707f
 
#define MATCH_SRLI   0x5013
 
#define MASK_SRLI   0xfc00707f
 
#define MATCH_SRAI   0x40005013
 
#define MASK_SRAI   0xfc00707f
 
#define MATCH_ORI   0x6013
 
#define MASK_ORI   0x707f
 
#define MATCH_ANDI   0x7013
 
#define MASK_ANDI   0x707f
 
#define MATCH_ADD   0x33
 
#define MASK_ADD   0xfe00707f
 
#define MATCH_SUB   0x40000033
 
#define MASK_SUB   0xfe00707f
 
#define MATCH_SLL   0x1033
 
#define MASK_SLL   0xfe00707f
 
#define MATCH_SLT   0x2033
 
#define MASK_SLT   0xfe00707f
 
#define MATCH_SLTU   0x3033
 
#define MASK_SLTU   0xfe00707f
 
#define MATCH_XOR   0x4033
 
#define MASK_XOR   0xfe00707f
 
#define MATCH_SRL   0x5033
 
#define MASK_SRL   0xfe00707f
 
#define MATCH_SRA   0x40005033
 
#define MASK_SRA   0xfe00707f
 
#define MATCH_OR   0x6033
 
#define MASK_OR   0xfe00707f
 
#define MATCH_AND   0x7033
 
#define MASK_AND   0xfe00707f
 
#define MATCH_ADDIW   0x1b
 
#define MASK_ADDIW   0x707f
 
#define MATCH_SLLIW   0x101b
 
#define MASK_SLLIW   0xfe00707f
 
#define MATCH_SRLIW   0x501b
 
#define MASK_SRLIW   0xfe00707f
 
#define MATCH_SRAIW   0x4000501b
 
#define MASK_SRAIW   0xfe00707f
 
#define MATCH_ADDW   0x3b
 
#define MASK_ADDW   0xfe00707f
 
#define MATCH_SUBW   0x4000003b
 
#define MASK_SUBW   0xfe00707f
 
#define MATCH_SLLW   0x103b
 
#define MASK_SLLW   0xfe00707f
 
#define MATCH_SRLW   0x503b
 
#define MASK_SRLW   0xfe00707f
 
#define MATCH_SRAW   0x4000503b
 
#define MASK_SRAW   0xfe00707f
 
#define MATCH_LB   0x3
 
#define MASK_LB   0x707f
 
#define MATCH_LH   0x1003
 
#define MASK_LH   0x707f
 
#define MATCH_LW   0x2003
 
#define MASK_LW   0x707f
 
#define MATCH_LD   0x3003
 
#define MASK_LD   0x707f
 
#define MATCH_LBU   0x4003
 
#define MASK_LBU   0x707f
 
#define MATCH_LHU   0x5003
 
#define MASK_LHU   0x707f
 
#define MATCH_LWU   0x6003
 
#define MASK_LWU   0x707f
 
#define MATCH_SB   0x23
 
#define MASK_SB   0x707f
 
#define MATCH_SH   0x1023
 
#define MASK_SH   0x707f
 
#define MATCH_SW   0x2023
 
#define MASK_SW   0x707f
 
#define MATCH_SD   0x3023
 
#define MASK_SD   0x707f
 
#define MATCH_PAUSE   0x0100000f
 
#define MASK_PAUSE   0xffffffff
 
#define MATCH_FENCE   0xf
 
#define MASK_FENCE   0x707f
 
#define MATCH_FENCE_I   0x100f
 
#define MASK_FENCE_I   0x707f
 
#define MATCH_FENCE_TSO   0x8330000f
 
#define MASK_FENCE_TSO   0xfff0707f
 
#define MATCH_MUL   0x2000033
 
#define MASK_MUL   0xfe00707f
 
#define MATCH_MULH   0x2001033
 
#define MASK_MULH   0xfe00707f
 
#define MATCH_MULHSU   0x2002033
 
#define MASK_MULHSU   0xfe00707f
 
#define MATCH_MULHU   0x2003033
 
#define MASK_MULHU   0xfe00707f
 
#define MATCH_DIV   0x2004033
 
#define MASK_DIV   0xfe00707f
 
#define MATCH_DIVU   0x2005033
 
#define MASK_DIVU   0xfe00707f
 
#define MATCH_REM   0x2006033
 
#define MASK_REM   0xfe00707f
 
#define MATCH_REMU   0x2007033
 
#define MASK_REMU   0xfe00707f
 
#define MATCH_MULW   0x200003b
 
#define MASK_MULW   0xfe00707f
 
#define MATCH_DIVW   0x200403b
 
#define MASK_DIVW   0xfe00707f
 
#define MATCH_DIVUW   0x200503b
 
#define MASK_DIVUW   0xfe00707f
 
#define MATCH_REMW   0x200603b
 
#define MASK_REMW   0xfe00707f
 
#define MATCH_REMUW   0x200703b
 
#define MASK_REMUW   0xfe00707f
 
#define MATCH_AMOADD_W   0x202f
 
#define MASK_AMOADD_W   0xf800707f
 
#define MATCH_AMOXOR_W   0x2000202f
 
#define MASK_AMOXOR_W   0xf800707f
 
#define MATCH_AMOOR_W   0x4000202f
 
#define MASK_AMOOR_W   0xf800707f
 
#define MATCH_AMOAND_W   0x6000202f
 
#define MASK_AMOAND_W   0xf800707f
 
#define MATCH_AMOMIN_W   0x8000202f
 
#define MASK_AMOMIN_W   0xf800707f
 
#define MATCH_AMOMAX_W   0xa000202f
 
#define MASK_AMOMAX_W   0xf800707f
 
#define MATCH_AMOMINU_W   0xc000202f
 
#define MASK_AMOMINU_W   0xf800707f
 
#define MATCH_AMOMAXU_W   0xe000202f
 
#define MASK_AMOMAXU_W   0xf800707f
 
#define MATCH_AMOSWAP_W   0x800202f
 
#define MASK_AMOSWAP_W   0xf800707f
 
#define MATCH_LR_W   0x1000202f
 
#define MASK_LR_W   0xf9f0707f
 
#define MATCH_SC_W   0x1800202f
 
#define MASK_SC_W   0xf800707f
 
#define MATCH_AMOADD_D   0x302f
 
#define MASK_AMOADD_D   0xf800707f
 
#define MATCH_AMOXOR_D   0x2000302f
 
#define MASK_AMOXOR_D   0xf800707f
 
#define MATCH_AMOOR_D   0x4000302f
 
#define MASK_AMOOR_D   0xf800707f
 
#define MATCH_AMOAND_D   0x6000302f
 
#define MASK_AMOAND_D   0xf800707f
 
#define MATCH_AMOMIN_D   0x8000302f
 
#define MASK_AMOMIN_D   0xf800707f
 
#define MATCH_AMOMAX_D   0xa000302f
 
#define MASK_AMOMAX_D   0xf800707f
 
#define MATCH_AMOMINU_D   0xc000302f
 
#define MASK_AMOMINU_D   0xf800707f
 
#define MATCH_AMOMAXU_D   0xe000302f
 
#define MASK_AMOMAXU_D   0xf800707f
 
#define MATCH_AMOSWAP_D   0x800302f
 
#define MASK_AMOSWAP_D   0xf800707f
 
#define MATCH_LR_D   0x1000302f
 
#define MASK_LR_D   0xf9f0707f
 
#define MATCH_SC_D   0x1800302f
 
#define MASK_SC_D   0xf800707f
 
#define MATCH_ECALL   0x73
 
#define MASK_ECALL   0xffffffff
 
#define MATCH_EBREAK   0x100073
 
#define MASK_EBREAK   0xffffffff
 
#define MATCH_URET   0x200073
 
#define MASK_URET   0xffffffff
 
#define MATCH_SRET   0x10200073
 
#define MASK_SRET   0xffffffff
 
#define MATCH_HRET   0x20200073
 
#define MASK_HRET   0xffffffff
 
#define MATCH_MRET   0x30200073
 
#define MASK_MRET   0xffffffff
 
#define MATCH_DRET   0x7b200073
 
#define MASK_DRET   0xffffffff
 
#define MATCH_SFENCE_VM   0x10400073
 
#define MASK_SFENCE_VM   0xfff07fff
 
#define MATCH_SFENCE_VMA   0x12000073
 
#define MASK_SFENCE_VMA   0xfe007fff
 
#define MATCH_WFI   0x10500073
 
#define MASK_WFI   0xffffffff
 
#define MATCH_CSRRW   0x1073
 
#define MASK_CSRRW   0x707f
 
#define MATCH_CSRRS   0x2073
 
#define MASK_CSRRS   0x707f
 
#define MATCH_CSRRC   0x3073
 
#define MASK_CSRRC   0x707f
 
#define MATCH_CSRRWI   0x5073
 
#define MASK_CSRRWI   0x707f
 
#define MATCH_CSRRSI   0x6073
 
#define MASK_CSRRSI   0x707f
 
#define MATCH_CSRRCI   0x7073
 
#define MASK_CSRRCI   0x707f
 
#define MATCH_FADD_S   0x53
 
#define MASK_FADD_S   0xfe00007f
 
#define MATCH_FSUB_S   0x8000053
 
#define MASK_FSUB_S   0xfe00007f
 
#define MATCH_FMUL_S   0x10000053
 
#define MASK_FMUL_S   0xfe00007f
 
#define MATCH_FDIV_S   0x18000053
 
#define MASK_FDIV_S   0xfe00007f
 
#define MATCH_FSGNJ_S   0x20000053
 
#define MASK_FSGNJ_S   0xfe00707f
 
#define MATCH_FSGNJN_S   0x20001053
 
#define MASK_FSGNJN_S   0xfe00707f
 
#define MATCH_FSGNJX_S   0x20002053
 
#define MASK_FSGNJX_S   0xfe00707f
 
#define MATCH_FMIN_S   0x28000053
 
#define MASK_FMIN_S   0xfe00707f
 
#define MATCH_FMAX_S   0x28001053
 
#define MASK_FMAX_S   0xfe00707f
 
#define MATCH_FSQRT_S   0x58000053
 
#define MASK_FSQRT_S   0xfff0007f
 
#define MATCH_FADD_D   0x2000053
 
#define MASK_FADD_D   0xfe00007f
 
#define MATCH_FSUB_D   0xa000053
 
#define MASK_FSUB_D   0xfe00007f
 
#define MATCH_FMUL_D   0x12000053
 
#define MASK_FMUL_D   0xfe00007f
 
#define MATCH_FDIV_D   0x1a000053
 
#define MASK_FDIV_D   0xfe00007f
 
#define MATCH_FSGNJ_D   0x22000053
 
#define MASK_FSGNJ_D   0xfe00707f
 
#define MATCH_FSGNJN_D   0x22001053
 
#define MASK_FSGNJN_D   0xfe00707f
 
#define MATCH_FSGNJX_D   0x22002053
 
#define MASK_FSGNJX_D   0xfe00707f
 
#define MATCH_FMIN_D   0x2a000053
 
#define MASK_FMIN_D   0xfe00707f
 
#define MATCH_FMAX_D   0x2a001053
 
#define MASK_FMAX_D   0xfe00707f
 
#define MATCH_FCVT_S_D   0x40100053
 
#define MASK_FCVT_S_D   0xfff0007f
 
#define MATCH_FCVT_D_S   0x42000053
 
#define MASK_FCVT_D_S   0xfff0007f
 
#define MATCH_FSQRT_D   0x5a000053
 
#define MASK_FSQRT_D   0xfff0007f
 
#define MATCH_FADD_Q   0x6000053
 
#define MASK_FADD_Q   0xfe00007f
 
#define MATCH_FSUB_Q   0xe000053
 
#define MASK_FSUB_Q   0xfe00007f
 
#define MATCH_FMUL_Q   0x16000053
 
#define MASK_FMUL_Q   0xfe00007f
 
#define MATCH_FDIV_Q   0x1e000053
 
#define MASK_FDIV_Q   0xfe00007f
 
#define MATCH_FSGNJ_Q   0x26000053
 
#define MASK_FSGNJ_Q   0xfe00707f
 
#define MATCH_FSGNJN_Q   0x26001053
 
#define MASK_FSGNJN_Q   0xfe00707f
 
#define MATCH_FSGNJX_Q   0x26002053
 
#define MASK_FSGNJX_Q   0xfe00707f
 
#define MATCH_FMIN_Q   0x2e000053
 
#define MASK_FMIN_Q   0xfe00707f
 
#define MATCH_FMAX_Q   0x2e001053
 
#define MASK_FMAX_Q   0xfe00707f
 
#define MATCH_FCVT_S_Q   0x40300053
 
#define MASK_FCVT_S_Q   0xfff0007f
 
#define MATCH_FCVT_Q_S   0x46000053
 
#define MASK_FCVT_Q_S   0xfff0007f
 
#define MATCH_FCVT_D_Q   0x42300053
 
#define MASK_FCVT_D_Q   0xfff0007f
 
#define MATCH_FCVT_Q_D   0x46100053
 
#define MASK_FCVT_Q_D   0xfff0007f
 
#define MATCH_FSQRT_Q   0x5e000053
 
#define MASK_FSQRT_Q   0xfff0007f
 
#define MATCH_FLE_S   0xa0000053
 
#define MASK_FLE_S   0xfe00707f
 
#define MATCH_FLT_S   0xa0001053
 
#define MASK_FLT_S   0xfe00707f
 
#define MATCH_FEQ_S   0xa0002053
 
#define MASK_FEQ_S   0xfe00707f
 
#define MATCH_FLE_D   0xa2000053
 
#define MASK_FLE_D   0xfe00707f
 
#define MATCH_FLT_D   0xa2001053
 
#define MASK_FLT_D   0xfe00707f
 
#define MATCH_FEQ_D   0xa2002053
 
#define MASK_FEQ_D   0xfe00707f
 
#define MATCH_FLE_Q   0xa6000053
 
#define MASK_FLE_Q   0xfe00707f
 
#define MATCH_FLT_Q   0xa6001053
 
#define MASK_FLT_Q   0xfe00707f
 
#define MATCH_FEQ_Q   0xa6002053
 
#define MASK_FEQ_Q   0xfe00707f
 
#define MATCH_FCVT_W_S   0xc0000053
 
#define MASK_FCVT_W_S   0xfff0007f
 
#define MATCH_FCVT_WU_S   0xc0100053
 
#define MASK_FCVT_WU_S   0xfff0007f
 
#define MATCH_FCVT_L_S   0xc0200053
 
#define MASK_FCVT_L_S   0xfff0007f
 
#define MATCH_FCVT_LU_S   0xc0300053
 
#define MASK_FCVT_LU_S   0xfff0007f
 
#define MATCH_FMV_X_S   0xe0000053
 
#define MASK_FMV_X_S   0xfff0707f
 
#define MATCH_FCLASS_S   0xe0001053
 
#define MASK_FCLASS_S   0xfff0707f
 
#define MATCH_FCVT_W_D   0xc2000053
 
#define MASK_FCVT_W_D   0xfff0007f
 
#define MATCH_FCVT_WU_D   0xc2100053
 
#define MASK_FCVT_WU_D   0xfff0007f
 
#define MATCH_FCVT_L_D   0xc2200053
 
#define MASK_FCVT_L_D   0xfff0007f
 
#define MATCH_FCVT_LU_D   0xc2300053
 
#define MASK_FCVT_LU_D   0xfff0007f
 
#define MATCH_FMV_X_D   0xe2000053
 
#define MASK_FMV_X_D   0xfff0707f
 
#define MATCH_FCLASS_D   0xe2001053
 
#define MASK_FCLASS_D   0xfff0707f
 
#define MATCH_FCVT_W_Q   0xc6000053
 
#define MASK_FCVT_W_Q   0xfff0007f
 
#define MATCH_FCVT_WU_Q   0xc6100053
 
#define MASK_FCVT_WU_Q   0xfff0007f
 
#define MATCH_FCVT_L_Q   0xc6200053
 
#define MASK_FCVT_L_Q   0xfff0007f
 
#define MATCH_FCVT_LU_Q   0xc6300053
 
#define MASK_FCVT_LU_Q   0xfff0007f
 
#define MATCH_FCLASS_Q   0xe6001053
 
#define MASK_FCLASS_Q   0xfff0707f
 
#define MATCH_FCVT_S_W   0xd0000053
 
#define MASK_FCVT_S_W   0xfff0007f
 
#define MATCH_FCVT_S_WU   0xd0100053
 
#define MASK_FCVT_S_WU   0xfff0007f
 
#define MATCH_FCVT_S_L   0xd0200053
 
#define MASK_FCVT_S_L   0xfff0007f
 
#define MATCH_FCVT_S_LU   0xd0300053
 
#define MASK_FCVT_S_LU   0xfff0007f
 
#define MATCH_FMV_S_X   0xf0000053
 
#define MASK_FMV_S_X   0xfff0707f
 
#define MATCH_FCVT_D_W   0xd2000053
 
#define MASK_FCVT_D_W   0xfff0007f
 
#define MATCH_FCVT_D_WU   0xd2100053
 
#define MASK_FCVT_D_WU   0xfff0007f
 
#define MATCH_FCVT_D_L   0xd2200053
 
#define MASK_FCVT_D_L   0xfff0007f
 
#define MATCH_FCVT_D_LU   0xd2300053
 
#define MASK_FCVT_D_LU   0xfff0007f
 
#define MATCH_FMV_D_X   0xf2000053
 
#define MASK_FMV_D_X   0xfff0707f
 
#define MATCH_FCVT_Q_W   0xd6000053
 
#define MASK_FCVT_Q_W   0xfff0007f
 
#define MATCH_FCVT_Q_WU   0xd6100053
 
#define MASK_FCVT_Q_WU   0xfff0007f
 
#define MATCH_FCVT_Q_L   0xd6200053
 
#define MASK_FCVT_Q_L   0xfff0007f
 
#define MATCH_FCVT_Q_LU   0xd6300053
 
#define MASK_FCVT_Q_LU   0xfff0007f
 
#define MATCH_FLI_H   0xf4100053
 
#define MASK_FLI_H   0xfff0707f
 
#define MATCH_FMINM_H   0x2c002053
 
#define MASK_FMINM_H   0xfe00707f
 
#define MATCH_FMAXM_H   0x2c003053
 
#define MASK_FMAXM_H   0xfe00707f
 
#define MATCH_FROUND_H   0x44400053
 
#define MASK_FROUND_H   0xfff0007f
 
#define MATCH_FROUNDNX_H   0x44500053
 
#define MASK_FROUNDNX_H   0xfff0007f
 
#define MATCH_FLTQ_H   0xa4005053
 
#define MASK_FLTQ_H   0xfe00707f
 
#define MATCH_FLEQ_H   0xa4004053
 
#define MASK_FLEQ_H   0xfe00707f
 
#define MATCH_FLI_S   0xf0100053
 
#define MASK_FLI_S   0xfff0707f
 
#define MATCH_FMINM_S   0x28002053
 
#define MASK_FMINM_S   0xfe00707f
 
#define MATCH_FMAXM_S   0x28003053
 
#define MASK_FMAXM_S   0xfe00707f
 
#define MATCH_FROUND_S   0x40400053
 
#define MASK_FROUND_S   0xfff0007f
 
#define MATCH_FROUNDNX_S   0x40500053
 
#define MASK_FROUNDNX_S   0xfff0007f
 
#define MATCH_FLTQ_S   0xa0005053
 
#define MASK_FLTQ_S   0xfe00707f
 
#define MATCH_FLEQ_S   0xa0004053
 
#define MASK_FLEQ_S   0xfe00707f
 
#define MATCH_FLI_D   0xf2100053
 
#define MASK_FLI_D   0xfff0707f
 
#define MATCH_FMINM_D   0x2a002053
 
#define MASK_FMINM_D   0xfe00707f
 
#define MATCH_FMAXM_D   0x2a003053
 
#define MASK_FMAXM_D   0xfe00707f
 
#define MATCH_FROUND_D   0x42400053
 
#define MASK_FROUND_D   0xfff0007f
 
#define MATCH_FROUNDNX_D   0x42500053
 
#define MASK_FROUNDNX_D   0xfff0007f
 
#define MATCH_FLTQ_D   0xa2005053
 
#define MASK_FLTQ_D   0xfe00707f
 
#define MATCH_FLEQ_D   0xa2004053
 
#define MASK_FLEQ_D   0xfe00707f
 
#define MATCH_FLI_Q   0xf6100053
 
#define MASK_FLI_Q   0xfff0707f
 
#define MATCH_FMINM_Q   0x2e002053
 
#define MASK_FMINM_Q   0xfe00707f
 
#define MATCH_FMAXM_Q   0x2e003053
 
#define MASK_FMAXM_Q   0xfe00707f
 
#define MATCH_FROUND_Q   0x46400053
 
#define MASK_FROUND_Q   0xfff0007f
 
#define MATCH_FROUNDNX_Q   0x46500053
 
#define MASK_FROUNDNX_Q   0xfff0007f
 
#define MATCH_FLTQ_Q   0xa6005053
 
#define MASK_FLTQ_Q   0xfe00707f
 
#define MATCH_FLEQ_Q   0xa6004053
 
#define MASK_FLEQ_Q   0xfe00707f
 
#define MATCH_FCVTMOD_W_D   0xc2801053
 
#define MASK_FCVTMOD_W_D   0xfff0707f
 
#define MATCH_FMVH_X_D   0xe2100053
 
#define MASK_FMVH_X_D   0xfff0707f
 
#define MATCH_FMVH_X_Q   0xe6100053
 
#define MASK_FMVH_X_Q   0xfff0707f
 
#define MATCH_FMVP_D_X   0xb2000053
 
#define MASK_FMVP_D_X   0xfe00707f
 
#define MATCH_FMVP_Q_X   0xb6000053
 
#define MASK_FMVP_Q_X   0xfe00707f
 
#define MATCH_CLZ   0x60001013
 
#define MASK_CLZ   0xfff0707f
 
#define MATCH_CTZ   0x60101013
 
#define MASK_CTZ   0xfff0707f
 
#define MATCH_CPOP   0x60201013
 
#define MASK_CPOP   0xfff0707f
 
#define MATCH_MIN   0xa004033
 
#define MASK_MIN   0xfe00707f
 
#define MATCH_MINU   0xa005033
 
#define MASK_MINU   0xfe00707f
 
#define MATCH_MAX   0xa006033
 
#define MASK_MAX   0xfe00707f
 
#define MATCH_MAXU   0xa007033
 
#define MASK_MAXU   0xfe00707f
 
#define MATCH_SEXT_B   0x60401013
 
#define MASK_SEXT_B   0xfff0707f
 
#define MATCH_SEXT_H   0x60501013
 
#define MASK_SEXT_H   0xfff0707f
 
#define MATCH_PACK   0x8004033
 
#define MASK_PACK   0xfe00707f
 
#define MATCH_PACKH   0x8007033
 
#define MASK_PACKH   0xfe00707f
 
#define MATCH_PACKW   0x800403b
 
#define MASK_PACKW   0xfe00707f
 
#define MATCH_ANDN   0x40007033
 
#define MASK_ANDN   0xfe00707f
 
#define MATCH_ORN   0x40006033
 
#define MASK_ORN   0xfe00707f
 
#define MATCH_XNOR   0x40004033
 
#define MASK_XNOR   0xfe00707f
 
#define MATCH_ROL   0x60001033
 
#define MASK_ROL   0xfe00707f
 
#define MATCH_ROR   0x60005033
 
#define MASK_ROR   0xfe00707f
 
#define MATCH_RORI   0x60005013
 
#define MASK_RORI   0xfc00707f
 
#define MATCH_GREVI   0x68005013
 
#define MASK_GREVI   0xfc00707f
 
#define MATCH_GORCI   0x28005013
 
#define MASK_GORCI   0xfc00707f
 
#define MATCH_SHFLI   0x8001013
 
#define MASK_SHFLI   0xfe00707f
 
#define MATCH_UNSHFLI   0x8005013
 
#define MASK_UNSHFLI   0xfe00707f
 
#define MATCH_CLZW   0x6000101b
 
#define MASK_CLZW   0xfff0707f
 
#define MATCH_CTZW   0x6010101b
 
#define MASK_CTZW   0xfff0707f
 
#define MATCH_CPOPW   0x6020101b
 
#define MASK_CPOPW   0xfff0707f
 
#define MATCH_ROLW   0x6000103b
 
#define MASK_ROLW   0xfe00707f
 
#define MATCH_RORW   0x6000503b
 
#define MASK_RORW   0xfe00707f
 
#define MATCH_RORIW   0x6000501b
 
#define MASK_RORIW   0xfe00707f
 
#define MATCH_SH1ADD   0x20002033
 
#define MASK_SH1ADD   0xfe00707f
 
#define MATCH_SH2ADD   0x20004033
 
#define MASK_SH2ADD   0xfe00707f
 
#define MATCH_SH3ADD   0x20006033
 
#define MASK_SH3ADD   0xfe00707f
 
#define MATCH_SH1ADD_UW   0x2000203b
 
#define MASK_SH1ADD_UW   0xfe00707f
 
#define MATCH_SH2ADD_UW   0x2000403b
 
#define MASK_SH2ADD_UW   0xfe00707f
 
#define MATCH_SH3ADD_UW   0x2000603b
 
#define MASK_SH3ADD_UW   0xfe00707f
 
#define MATCH_ADD_UW   0x800003b
 
#define MASK_ADD_UW   0xfe00707f
 
#define MATCH_SLLI_UW   0x800101b
 
#define MASK_SLLI_UW   0xfc00707f
 
#define MATCH_CLMUL   0xa001033
 
#define MASK_CLMUL   0xfe00707f
 
#define MATCH_CLMULH   0xa003033
 
#define MASK_CLMULH   0xfe00707f
 
#define MATCH_CLMULR   0xa002033
 
#define MASK_CLMULR   0xfe00707f
 
#define MATCH_XPERM4   0x28002033
 
#define MASK_XPERM4   0xfe00707f
 
#define MATCH_XPERM8   0x28004033
 
#define MASK_XPERM8   0xfe00707f
 
#define MATCH_BCLRI   0x48001013
 
#define MASK_BCLRI   0xfc00707f
 
#define MATCH_BSETI   0x28001013
 
#define MASK_BSETI   0xfc00707f
 
#define MATCH_BINVI   0x68001013
 
#define MASK_BINVI   0xfc00707f
 
#define MATCH_BEXTI   0x48005013
 
#define MASK_BEXTI   0xfc00707f
 
#define MATCH_BCLR   0x48001033
 
#define MASK_BCLR   0xfe00707f
 
#define MATCH_BSET   0x28001033
 
#define MASK_BSET   0xfe00707f
 
#define MATCH_BINV   0x68001033
 
#define MASK_BINV   0xfe00707f
 
#define MATCH_BEXT   0x48005033
 
#define MASK_BEXT   0xfe00707f
 
#define MATCH_FLW   0x2007
 
#define MASK_FLW   0x707f
 
#define MATCH_FLD   0x3007
 
#define MASK_FLD   0x707f
 
#define MATCH_FLQ   0x4007
 
#define MASK_FLQ   0x707f
 
#define MATCH_FSW   0x2027
 
#define MASK_FSW   0x707f
 
#define MATCH_FSD   0x3027
 
#define MASK_FSD   0x707f
 
#define MATCH_FSQ   0x4027
 
#define MASK_FSQ   0x707f
 
#define MATCH_FMADD_S   0x43
 
#define MASK_FMADD_S   0x600007f
 
#define MATCH_FMSUB_S   0x47
 
#define MASK_FMSUB_S   0x600007f
 
#define MATCH_FNMSUB_S   0x4b
 
#define MASK_FNMSUB_S   0x600007f
 
#define MATCH_FNMADD_S   0x4f
 
#define MASK_FNMADD_S   0x600007f
 
#define MATCH_FMADD_D   0x2000043
 
#define MASK_FMADD_D   0x600007f
 
#define MATCH_FMSUB_D   0x2000047
 
#define MASK_FMSUB_D   0x600007f
 
#define MATCH_FNMSUB_D   0x200004b
 
#define MASK_FNMSUB_D   0x600007f
 
#define MATCH_FNMADD_D   0x200004f
 
#define MASK_FNMADD_D   0x600007f
 
#define MATCH_FMADD_Q   0x6000043
 
#define MASK_FMADD_Q   0x600007f
 
#define MATCH_FMSUB_Q   0x6000047
 
#define MASK_FMSUB_Q   0x600007f
 
#define MATCH_FNMSUB_Q   0x600004b
 
#define MASK_FNMSUB_Q   0x600007f
 
#define MATCH_FNMADD_Q   0x600004f
 
#define MASK_FNMADD_Q   0x600007f
 
#define MATCH_C_ADDI4SPN   0x0
 
#define MASK_C_ADDI4SPN   0xe003
 
#define MATCH_C_FLD   0x2000
 
#define MASK_C_FLD   0xe003
 
#define MATCH_C_LW   0x4000
 
#define MASK_C_LW   0xe003
 
#define MATCH_C_FLW   0x6000
 
#define MASK_C_FLW   0xe003
 
#define MATCH_C_FSD   0xa000
 
#define MASK_C_FSD   0xe003
 
#define MATCH_C_SW   0xc000
 
#define MASK_C_SW   0xe003
 
#define MATCH_C_FSW   0xe000
 
#define MASK_C_FSW   0xe003
 
#define MATCH_C_ADDI   0x1
 
#define MASK_C_ADDI   0xe003
 
#define MATCH_C_JAL   0x2001
 
#define MASK_C_JAL   0xe003
 
#define MATCH_C_LI   0x4001
 
#define MASK_C_LI   0xe003
 
#define MATCH_C_LUI   0x6001
 
#define MASK_C_LUI   0xe003
 
#define MATCH_C_SRLI   0x8001
 
#define MASK_C_SRLI   0xec03
 
#define MATCH_C_SRLI64   0x8001
 
#define MASK_C_SRLI64   0xfc7f
 
#define MATCH_C_SRAI   0x8401
 
#define MASK_C_SRAI   0xec03
 
#define MATCH_C_SRAI64   0x8401
 
#define MASK_C_SRAI64   0xfc7f
 
#define MATCH_C_ANDI   0x8801
 
#define MASK_C_ANDI   0xec03
 
#define MATCH_C_SUB   0x8c01
 
#define MASK_C_SUB   0xfc63
 
#define MATCH_C_XOR   0x8c21
 
#define MASK_C_XOR   0xfc63
 
#define MATCH_C_OR   0x8c41
 
#define MASK_C_OR   0xfc63
 
#define MATCH_C_AND   0x8c61
 
#define MASK_C_AND   0xfc63
 
#define MATCH_C_SUBW   0x9c01
 
#define MASK_C_SUBW   0xfc63
 
#define MATCH_C_ADDW   0x9c21
 
#define MASK_C_ADDW   0xfc63
 
#define MATCH_C_J   0xa001
 
#define MASK_C_J   0xe003
 
#define MATCH_C_BEQZ   0xc001
 
#define MASK_C_BEQZ   0xe003
 
#define MATCH_C_BNEZ   0xe001
 
#define MASK_C_BNEZ   0xe003
 
#define MATCH_C_SLLI   0x2
 
#define MASK_C_SLLI   0xe003
 
#define MATCH_C_SLLI64   0x2
 
#define MASK_C_SLLI64   0xf07f
 
#define MATCH_C_FLDSP   0x2002
 
#define MASK_C_FLDSP   0xe003
 
#define MATCH_C_LWSP   0x4002
 
#define MASK_C_LWSP   0xe003
 
#define MATCH_C_FLWSP   0x6002
 
#define MASK_C_FLWSP   0xe003
 
#define MATCH_C_MV   0x8002
 
#define MASK_C_MV   0xf003
 
#define MATCH_C_ADD   0x9002
 
#define MASK_C_ADD   0xf003
 
#define MATCH_C_FSDSP   0xa002
 
#define MASK_C_FSDSP   0xe003
 
#define MATCH_C_SWSP   0xc002
 
#define MASK_C_SWSP   0xe003
 
#define MATCH_C_FSWSP   0xe002
 
#define MASK_C_FSWSP   0xe003
 
#define MATCH_C_NOP   0x1
 
#define MASK_C_NOP   0xffff
 
#define MATCH_C_ADDI16SP   0x6101
 
#define MASK_C_ADDI16SP   0xef83
 
#define MATCH_C_JR   0x8002
 
#define MASK_C_JR   0xf07f
 
#define MATCH_C_JALR   0x9002
 
#define MASK_C_JALR   0xf07f
 
#define MATCH_C_EBREAK   0x9002
 
#define MASK_C_EBREAK   0xffff
 
#define MATCH_C_LD   0x6000
 
#define MASK_C_LD   0xe003
 
#define MATCH_C_SD   0xe000
 
#define MASK_C_SD   0xe003
 
#define MATCH_C_ADDIW   0x2001
 
#define MASK_C_ADDIW   0xe003
 
#define MATCH_C_LDSP   0x6002
 
#define MASK_C_LDSP   0xe003
 
#define MATCH_C_SDSP   0xe002
 
#define MASK_C_SDSP   0xe003
 
#define MATCH_SM3P0   0x10801013
 
#define MASK_SM3P0   0xfff0707f
 
#define MATCH_SM3P1   0x10901013
 
#define MASK_SM3P1   0xfff0707f
 
#define MATCH_SHA256SUM0   0x10001013
 
#define MASK_SHA256SUM0   0xfff0707f
 
#define MATCH_SHA256SUM1   0x10101013
 
#define MASK_SHA256SUM1   0xfff0707f
 
#define MATCH_SHA256SIG0   0x10201013
 
#define MASK_SHA256SIG0   0xfff0707f
 
#define MATCH_SHA256SIG1   0x10301013
 
#define MASK_SHA256SIG1   0xfff0707f
 
#define MATCH_SHA512SUM0R   0x50000033
 
#define MASK_SHA512SUM0R   0xfe00707f
 
#define MATCH_SHA512SUM1R   0x52000033
 
#define MASK_SHA512SUM1R   0xfe00707f
 
#define MATCH_SHA512SIG0L   0x54000033
 
#define MASK_SHA512SIG0L   0xfe00707f
 
#define MATCH_SHA512SIG0H   0x5c000033
 
#define MASK_SHA512SIG0H   0xfe00707f
 
#define MATCH_SHA512SIG1L   0x56000033
 
#define MASK_SHA512SIG1L   0xfe00707f
 
#define MATCH_SHA512SIG1H   0x5e000033
 
#define MASK_SHA512SIG1H   0xfe00707f
 
#define MATCH_SM4ED   0x30000033
 
#define MASK_SM4ED   0x3e00707f
 
#define MATCH_SM4KS   0x34000033
 
#define MASK_SM4KS   0x3e00707f
 
#define MATCH_AES32ESMI   0x26000033
 
#define MASK_AES32ESMI   0x3e00707f
 
#define MATCH_AES32ESI   0x22000033
 
#define MASK_AES32ESI   0x3e00707f
 
#define MATCH_AES32DSMI   0x2e000033
 
#define MASK_AES32DSMI   0x3e00707f
 
#define MATCH_AES32DSI   0x2a000033
 
#define MASK_AES32DSI   0x3e00707f
 
#define MATCH_SHA512SUM0   0x10401013
 
#define MASK_SHA512SUM0   0xfff0707f
 
#define MATCH_SHA512SUM1   0x10501013
 
#define MASK_SHA512SUM1   0xfff0707f
 
#define MATCH_SHA512SIG0   0x10601013
 
#define MASK_SHA512SIG0   0xfff0707f
 
#define MATCH_SHA512SIG1   0x10701013
 
#define MASK_SHA512SIG1   0xfff0707f
 
#define MATCH_AES64KS1I   0x31001013
 
#define MASK_AES64KS1I   0xff00707f
 
#define MATCH_AES64IM   0x30001013
 
#define MASK_AES64IM   0xfff0707f
 
#define MATCH_AES64KS2   0x7e000033
 
#define MASK_AES64KS2   0xfe00707f
 
#define MATCH_AES64ESM   0x36000033
 
#define MASK_AES64ESM   0xfe00707f
 
#define MATCH_AES64ES   0x32000033
 
#define MASK_AES64ES   0xfe00707f
 
#define MATCH_AES64DSM   0x3e000033
 
#define MASK_AES64DSM   0xfe00707f
 
#define MATCH_AES64DS   0x3a000033
 
#define MASK_AES64DS   0xfe00707f
 
#define MATCH_FADD_H   0x4000053
 
#define MASK_FADD_H   0xfe00007f
 
#define MATCH_FSUB_H   0xc000053
 
#define MASK_FSUB_H   0xfe00007f
 
#define MATCH_FMUL_H   0x14000053
 
#define MASK_FMUL_H   0xfe00007f
 
#define MATCH_FDIV_H   0x1c000053
 
#define MASK_FDIV_H   0xfe00007f
 
#define MATCH_FSGNJ_H   0x24000053
 
#define MASK_FSGNJ_H   0xfe00707f
 
#define MATCH_FSGNJN_H   0x24001053
 
#define MASK_FSGNJN_H   0xfe00707f
 
#define MATCH_FSGNJX_H   0x24002053
 
#define MASK_FSGNJX_H   0xfe00707f
 
#define MATCH_FMIN_H   0x2c000053
 
#define MASK_FMIN_H   0xfe00707f
 
#define MATCH_FMAX_H   0x2c001053
 
#define MASK_FMAX_H   0xfe00707f
 
#define MATCH_FCVT_H_S   0x44000053
 
#define MASK_FCVT_H_S   0xfff0007f
 
#define MATCH_FCVT_S_H   0x40200053
 
#define MASK_FCVT_S_H   0xfff0007f
 
#define MATCH_FSQRT_H   0x5c000053
 
#define MASK_FSQRT_H   0xfff0007f
 
#define MATCH_FLE_H   0xa4000053
 
#define MASK_FLE_H   0xfe00707f
 
#define MATCH_FLT_H   0xa4001053
 
#define MASK_FLT_H   0xfe00707f
 
#define MATCH_FEQ_H   0xa4002053
 
#define MASK_FEQ_H   0xfe00707f
 
#define MATCH_FCVT_W_H   0xc4000053
 
#define MASK_FCVT_W_H   0xfff0007f
 
#define MATCH_FCVT_WU_H   0xc4100053
 
#define MASK_FCVT_WU_H   0xfff0007f
 
#define MATCH_FMV_X_H   0xe4000053
 
#define MASK_FMV_X_H   0xfff0707f
 
#define MATCH_FCLASS_H   0xe4001053
 
#define MASK_FCLASS_H   0xfff0707f
 
#define MATCH_FCVT_H_W   0xd4000053
 
#define MASK_FCVT_H_W   0xfff0007f
 
#define MATCH_FCVT_H_WU   0xd4100053
 
#define MASK_FCVT_H_WU   0xfff0007f
 
#define MATCH_FMV_H_X   0xf4000053
 
#define MASK_FMV_H_X   0xfff0707f
 
#define MATCH_FLH   0x1007
 
#define MASK_FLH   0x707f
 
#define MATCH_FSH   0x1027
 
#define MASK_FSH   0x707f
 
#define MATCH_FMADD_H   0x4000043
 
#define MASK_FMADD_H   0x600007f
 
#define MATCH_FMSUB_H   0x4000047
 
#define MASK_FMSUB_H   0x600007f
 
#define MATCH_FNMSUB_H   0x400004b
 
#define MASK_FNMSUB_H   0x600007f
 
#define MATCH_FNMADD_H   0x400004f
 
#define MASK_FNMADD_H   0x600007f
 
#define MATCH_FCVT_H_D   0x44100053
 
#define MASK_FCVT_H_D   0xfff0007f
 
#define MATCH_FCVT_D_H   0x42200053
 
#define MASK_FCVT_D_H   0xfff0007f
 
#define MATCH_FCVT_H_Q   0x44300053
 
#define MASK_FCVT_H_Q   0xfff0007f
 
#define MATCH_FCVT_Q_H   0x46200053
 
#define MASK_FCVT_Q_H   0xfff0007f
 
#define MATCH_FCVT_L_H   0xc4200053
 
#define MASK_FCVT_L_H   0xfff0007f
 
#define MATCH_FCVT_LU_H   0xc4300053
 
#define MASK_FCVT_LU_H   0xfff0007f
 
#define MATCH_FCVT_H_L   0xd4200053
 
#define MASK_FCVT_H_L   0xfff0007f
 
#define MATCH_FCVT_H_LU   0xd4300053
 
#define MASK_FCVT_H_LU   0xfff0007f
 
#define MATCH_VSETVL   0x80007057
 
#define MASK_VSETVL   0xfe00707f
 
#define MATCH_VSETIVLI   0xc0007057
 
#define MASK_VSETIVLI   0xc000707f
 
#define MATCH_VSETVLI   0x00007057
 
#define MASK_VSETVLI   0x8000707f
 
#define MATCH_VLMV   0x02b00007
 
#define MASK_VLMV   0xfff0707f
 
#define MATCH_VSMV   0x02b00027
 
#define MASK_VSMV   0xfff0707f
 
#define MATCH_VLE8V   0x00000007
 
#define MASK_VLE8V   0xfdf0707f
 
#define MATCH_VLE16V   0x00005007
 
#define MASK_VLE16V   0xfdf0707f
 
#define MATCH_VLE32V   0x00006007
 
#define MASK_VLE32V   0xfdf0707f
 
#define MATCH_VLE64V   0x00007007
 
#define MASK_VLE64V   0xfdf0707f
 
#define MATCH_VSE8V   0x00000027
 
#define MASK_VSE8V   0xfdf0707f
 
#define MATCH_VSE16V   0x00005027
 
#define MASK_VSE16V   0xfdf0707f
 
#define MATCH_VSE32V   0x00006027
 
#define MASK_VSE32V   0xfdf0707f
 
#define MATCH_VSE64V   0x00007027
 
#define MASK_VSE64V   0xfdf0707f
 
#define MATCH_VLSE8V   0x08000007
 
#define MASK_VLSE8V   0xfc00707f
 
#define MATCH_VLSE16V   0x08005007
 
#define MASK_VLSE16V   0xfc00707f
 
#define MATCH_VLSE32V   0x08006007
 
#define MASK_VLSE32V   0xfc00707f
 
#define MATCH_VLSE64V   0x08007007
 
#define MASK_VLSE64V   0xfc00707f
 
#define MATCH_VSSE8V   0x08000027
 
#define MASK_VSSE8V   0xfc00707f
 
#define MATCH_VSSE16V   0x08005027
 
#define MASK_VSSE16V   0xfc00707f
 
#define MATCH_VSSE32V   0x08006027
 
#define MASK_VSSE32V   0xfc00707f
 
#define MATCH_VSSE64V   0x08007027
 
#define MASK_VSSE64V   0xfc00707f
 
#define MATCH_VLOXEI8V   0x0c000007
 
#define MASK_VLOXEI8V   0xfc00707f
 
#define MATCH_VLOXEI16V   0x0c005007
 
#define MASK_VLOXEI16V   0xfc00707f
 
#define MATCH_VLOXEI32V   0x0c006007
 
#define MASK_VLOXEI32V   0xfc00707f
 
#define MATCH_VLOXEI64V   0x0c007007
 
#define MASK_VLOXEI64V   0xfc00707f
 
#define MATCH_VSOXEI8V   0x0c000027
 
#define MASK_VSOXEI8V   0xfc00707f
 
#define MATCH_VSOXEI16V   0x0c005027
 
#define MASK_VSOXEI16V   0xfc00707f
 
#define MATCH_VSOXEI32V   0x0c006027
 
#define MASK_VSOXEI32V   0xfc00707f
 
#define MATCH_VSOXEI64V   0x0c007027
 
#define MASK_VSOXEI64V   0xfc00707f
 
#define MATCH_VLUXEI8V   0x04000007
 
#define MASK_VLUXEI8V   0xfc00707f
 
#define MATCH_VLUXEI16V   0x04005007
 
#define MASK_VLUXEI16V   0xfc00707f
 
#define MATCH_VLUXEI32V   0x04006007
 
#define MASK_VLUXEI32V   0xfc00707f
 
#define MATCH_VLUXEI64V   0x04007007
 
#define MASK_VLUXEI64V   0xfc00707f
 
#define MATCH_VSUXEI8V   0x04000027
 
#define MASK_VSUXEI8V   0xfc00707f
 
#define MATCH_VSUXEI16V   0x04005027
 
#define MASK_VSUXEI16V   0xfc00707f
 
#define MATCH_VSUXEI32V   0x04006027
 
#define MASK_VSUXEI32V   0xfc00707f
 
#define MATCH_VSUXEI64V   0x04007027
 
#define MASK_VSUXEI64V   0xfc00707f
 
#define MATCH_VLE8FFV   0x01000007
 
#define MASK_VLE8FFV   0xfdf0707f
 
#define MATCH_VLE16FFV   0x01005007
 
#define MASK_VLE16FFV   0xfdf0707f
 
#define MATCH_VLE32FFV   0x01006007
 
#define MASK_VLE32FFV   0xfdf0707f
 
#define MATCH_VLE64FFV   0x01007007
 
#define MASK_VLE64FFV   0xfdf0707f
 
#define MATCH_VLSEG2E8V   0x20000007
 
#define MASK_VLSEG2E8V   0xfdf0707f
 
#define MATCH_VSSEG2E8V   0x20000027
 
#define MASK_VSSEG2E8V   0xfdf0707f
 
#define MATCH_VLSEG3E8V   0x40000007
 
#define MASK_VLSEG3E8V   0xfdf0707f
 
#define MATCH_VSSEG3E8V   0x40000027
 
#define MASK_VSSEG3E8V   0xfdf0707f
 
#define MATCH_VLSEG4E8V   0x60000007
 
#define MASK_VLSEG4E8V   0xfdf0707f
 
#define MATCH_VSSEG4E8V   0x60000027
 
#define MASK_VSSEG4E8V   0xfdf0707f
 
#define MATCH_VLSEG5E8V   0x80000007
 
#define MASK_VLSEG5E8V   0xfdf0707f
 
#define MATCH_VSSEG5E8V   0x80000027
 
#define MASK_VSSEG5E8V   0xfdf0707f
 
#define MATCH_VLSEG6E8V   0xa0000007
 
#define MASK_VLSEG6E8V   0xfdf0707f
 
#define MATCH_VSSEG6E8V   0xa0000027
 
#define MASK_VSSEG6E8V   0xfdf0707f
 
#define MATCH_VLSEG7E8V   0xc0000007
 
#define MASK_VLSEG7E8V   0xfdf0707f
 
#define MATCH_VSSEG7E8V   0xc0000027
 
#define MASK_VSSEG7E8V   0xfdf0707f
 
#define MATCH_VLSEG8E8V   0xe0000007
 
#define MASK_VLSEG8E8V   0xfdf0707f
 
#define MATCH_VSSEG8E8V   0xe0000027
 
#define MASK_VSSEG8E8V   0xfdf0707f
 
#define MATCH_VLSEG2E16V   0x20005007
 
#define MASK_VLSEG2E16V   0xfdf0707f
 
#define MATCH_VSSEG2E16V   0x20005027
 
#define MASK_VSSEG2E16V   0xfdf0707f
 
#define MATCH_VLSEG3E16V   0x40005007
 
#define MASK_VLSEG3E16V   0xfdf0707f
 
#define MATCH_VSSEG3E16V   0x40005027
 
#define MASK_VSSEG3E16V   0xfdf0707f
 
#define MATCH_VLSEG4E16V   0x60005007
 
#define MASK_VLSEG4E16V   0xfdf0707f
 
#define MATCH_VSSEG4E16V   0x60005027
 
#define MASK_VSSEG4E16V   0xfdf0707f
 
#define MATCH_VLSEG5E16V   0x80005007
 
#define MASK_VLSEG5E16V   0xfdf0707f
 
#define MATCH_VSSEG5E16V   0x80005027
 
#define MASK_VSSEG5E16V   0xfdf0707f
 
#define MATCH_VLSEG6E16V   0xa0005007
 
#define MASK_VLSEG6E16V   0xfdf0707f
 
#define MATCH_VSSEG6E16V   0xa0005027
 
#define MASK_VSSEG6E16V   0xfdf0707f
 
#define MATCH_VLSEG7E16V   0xc0005007
 
#define MASK_VLSEG7E16V   0xfdf0707f
 
#define MATCH_VSSEG7E16V   0xc0005027
 
#define MASK_VSSEG7E16V   0xfdf0707f
 
#define MATCH_VLSEG8E16V   0xe0005007
 
#define MASK_VLSEG8E16V   0xfdf0707f
 
#define MATCH_VSSEG8E16V   0xe0005027
 
#define MASK_VSSEG8E16V   0xfdf0707f
 
#define MATCH_VLSEG2E32V   0x20006007
 
#define MASK_VLSEG2E32V   0xfdf0707f
 
#define MATCH_VSSEG2E32V   0x20006027
 
#define MASK_VSSEG2E32V   0xfdf0707f
 
#define MATCH_VLSEG3E32V   0x40006007
 
#define MASK_VLSEG3E32V   0xfdf0707f
 
#define MATCH_VSSEG3E32V   0x40006027
 
#define MASK_VSSEG3E32V   0xfdf0707f
 
#define MATCH_VLSEG4E32V   0x60006007
 
#define MASK_VLSEG4E32V   0xfdf0707f
 
#define MATCH_VSSEG4E32V   0x60006027
 
#define MASK_VSSEG4E32V   0xfdf0707f
 
#define MATCH_VLSEG5E32V   0x80006007
 
#define MASK_VLSEG5E32V   0xfdf0707f
 
#define MATCH_VSSEG5E32V   0x80006027
 
#define MASK_VSSEG5E32V   0xfdf0707f
 
#define MATCH_VLSEG6E32V   0xa0006007
 
#define MASK_VLSEG6E32V   0xfdf0707f
 
#define MATCH_VSSEG6E32V   0xa0006027
 
#define MASK_VSSEG6E32V   0xfdf0707f
 
#define MATCH_VLSEG7E32V   0xc0006007
 
#define MASK_VLSEG7E32V   0xfdf0707f
 
#define MATCH_VSSEG7E32V   0xc0006027
 
#define MASK_VSSEG7E32V   0xfdf0707f
 
#define MATCH_VLSEG8E32V   0xe0006007
 
#define MASK_VLSEG8E32V   0xfdf0707f
 
#define MATCH_VSSEG8E32V   0xe0006027
 
#define MASK_VSSEG8E32V   0xfdf0707f
 
#define MATCH_VLSEG2E64V   0x20007007
 
#define MASK_VLSEG2E64V   0xfdf0707f
 
#define MATCH_VSSEG2E64V   0x20007027
 
#define MASK_VSSEG2E64V   0xfdf0707f
 
#define MATCH_VLSEG3E64V   0x40007007
 
#define MASK_VLSEG3E64V   0xfdf0707f
 
#define MATCH_VSSEG3E64V   0x40007027
 
#define MASK_VSSEG3E64V   0xfdf0707f
 
#define MATCH_VLSEG4E64V   0x60007007
 
#define MASK_VLSEG4E64V   0xfdf0707f
 
#define MATCH_VSSEG4E64V   0x60007027
 
#define MASK_VSSEG4E64V   0xfdf0707f
 
#define MATCH_VLSEG5E64V   0x80007007
 
#define MASK_VLSEG5E64V   0xfdf0707f
 
#define MATCH_VSSEG5E64V   0x80007027
 
#define MASK_VSSEG5E64V   0xfdf0707f
 
#define MATCH_VLSEG6E64V   0xa0007007
 
#define MASK_VLSEG6E64V   0xfdf0707f
 
#define MATCH_VSSEG6E64V   0xa0007027
 
#define MASK_VSSEG6E64V   0xfdf0707f
 
#define MATCH_VLSEG7E64V   0xc0007007
 
#define MASK_VLSEG7E64V   0xfdf0707f
 
#define MATCH_VSSEG7E64V   0xc0007027
 
#define MASK_VSSEG7E64V   0xfdf0707f
 
#define MATCH_VLSEG8E64V   0xe0007007
 
#define MASK_VLSEG8E64V   0xfdf0707f
 
#define MATCH_VSSEG8E64V   0xe0007027
 
#define MASK_VSSEG8E64V   0xfdf0707f
 
#define MATCH_VLSSEG2E8V   0x28000007
 
#define MASK_VLSSEG2E8V   0xfc00707f
 
#define MATCH_VSSSEG2E8V   0x28000027
 
#define MASK_VSSSEG2E8V   0xfc00707f
 
#define MATCH_VLSSEG3E8V   0x48000007
 
#define MASK_VLSSEG3E8V   0xfc00707f
 
#define MATCH_VSSSEG3E8V   0x48000027
 
#define MASK_VSSSEG3E8V   0xfc00707f
 
#define MATCH_VLSSEG4E8V   0x68000007
 
#define MASK_VLSSEG4E8V   0xfc00707f
 
#define MATCH_VSSSEG4E8V   0x68000027
 
#define MASK_VSSSEG4E8V   0xfc00707f
 
#define MATCH_VLSSEG5E8V   0x88000007
 
#define MASK_VLSSEG5E8V   0xfc00707f
 
#define MATCH_VSSSEG5E8V   0x88000027
 
#define MASK_VSSSEG5E8V   0xfc00707f
 
#define MATCH_VLSSEG6E8V   0xa8000007
 
#define MASK_VLSSEG6E8V   0xfc00707f
 
#define MATCH_VSSSEG6E8V   0xa8000027
 
#define MASK_VSSSEG6E8V   0xfc00707f
 
#define MATCH_VLSSEG7E8V   0xc8000007
 
#define MASK_VLSSEG7E8V   0xfc00707f
 
#define MATCH_VSSSEG7E8V   0xc8000027
 
#define MASK_VSSSEG7E8V   0xfc00707f
 
#define MATCH_VLSSEG8E8V   0xe8000007
 
#define MASK_VLSSEG8E8V   0xfc00707f
 
#define MATCH_VSSSEG8E8V   0xe8000027
 
#define MASK_VSSSEG8E8V   0xfc00707f
 
#define MATCH_VLSSEG2E16V   0x28005007
 
#define MASK_VLSSEG2E16V   0xfc00707f
 
#define MATCH_VSSSEG2E16V   0x28005027
 
#define MASK_VSSSEG2E16V   0xfc00707f
 
#define MATCH_VLSSEG3E16V   0x48005007
 
#define MASK_VLSSEG3E16V   0xfc00707f
 
#define MATCH_VSSSEG3E16V   0x48005027
 
#define MASK_VSSSEG3E16V   0xfc00707f
 
#define MATCH_VLSSEG4E16V   0x68005007
 
#define MASK_VLSSEG4E16V   0xfc00707f
 
#define MATCH_VSSSEG4E16V   0x68005027
 
#define MASK_VSSSEG4E16V   0xfc00707f
 
#define MATCH_VLSSEG5E16V   0x88005007
 
#define MASK_VLSSEG5E16V   0xfc00707f
 
#define MATCH_VSSSEG5E16V   0x88005027
 
#define MASK_VSSSEG5E16V   0xfc00707f
 
#define MATCH_VLSSEG6E16V   0xa8005007
 
#define MASK_VLSSEG6E16V   0xfc00707f
 
#define MATCH_VSSSEG6E16V   0xa8005027
 
#define MASK_VSSSEG6E16V   0xfc00707f
 
#define MATCH_VLSSEG7E16V   0xc8005007
 
#define MASK_VLSSEG7E16V   0xfc00707f
 
#define MATCH_VSSSEG7E16V   0xc8005027
 
#define MASK_VSSSEG7E16V   0xfc00707f
 
#define MATCH_VLSSEG8E16V   0xe8005007
 
#define MASK_VLSSEG8E16V   0xfc00707f
 
#define MATCH_VSSSEG8E16V   0xe8005027
 
#define MASK_VSSSEG8E16V   0xfc00707f
 
#define MATCH_VLSSEG2E32V   0x28006007
 
#define MASK_VLSSEG2E32V   0xfc00707f
 
#define MATCH_VSSSEG2E32V   0x28006027
 
#define MASK_VSSSEG2E32V   0xfc00707f
 
#define MATCH_VLSSEG3E32V   0x48006007
 
#define MASK_VLSSEG3E32V   0xfc00707f
 
#define MATCH_VSSSEG3E32V   0x48006027
 
#define MASK_VSSSEG3E32V   0xfc00707f
 
#define MATCH_VLSSEG4E32V   0x68006007
 
#define MASK_VLSSEG4E32V   0xfc00707f
 
#define MATCH_VSSSEG4E32V   0x68006027
 
#define MASK_VSSSEG4E32V   0xfc00707f
 
#define MATCH_VLSSEG5E32V   0x88006007
 
#define MASK_VLSSEG5E32V   0xfc00707f
 
#define MATCH_VSSSEG5E32V   0x88006027
 
#define MASK_VSSSEG5E32V   0xfc00707f
 
#define MATCH_VLSSEG6E32V   0xa8006007
 
#define MASK_VLSSEG6E32V   0xfc00707f
 
#define MATCH_VSSSEG6E32V   0xa8006027
 
#define MASK_VSSSEG6E32V   0xfc00707f
 
#define MATCH_VLSSEG7E32V   0xc8006007
 
#define MASK_VLSSEG7E32V   0xfc00707f
 
#define MATCH_VSSSEG7E32V   0xc8006027
 
#define MASK_VSSSEG7E32V   0xfc00707f
 
#define MATCH_VLSSEG8E32V   0xe8006007
 
#define MASK_VLSSEG8E32V   0xfc00707f
 
#define MATCH_VSSSEG8E32V   0xe8006027
 
#define MASK_VSSSEG8E32V   0xfc00707f
 
#define MATCH_VLSSEG2E64V   0x28007007
 
#define MASK_VLSSEG2E64V   0xfc00707f
 
#define MATCH_VSSSEG2E64V   0x28007027
 
#define MASK_VSSSEG2E64V   0xfc00707f
 
#define MATCH_VLSSEG3E64V   0x48007007
 
#define MASK_VLSSEG3E64V   0xfc00707f
 
#define MATCH_VSSSEG3E64V   0x48007027
 
#define MASK_VSSSEG3E64V   0xfc00707f
 
#define MATCH_VLSSEG4E64V   0x68007007
 
#define MASK_VLSSEG4E64V   0xfc00707f
 
#define MATCH_VSSSEG4E64V   0x68007027
 
#define MASK_VSSSEG4E64V   0xfc00707f
 
#define MATCH_VLSSEG5E64V   0x88007007
 
#define MASK_VLSSEG5E64V   0xfc00707f
 
#define MATCH_VSSSEG5E64V   0x88007027
 
#define MASK_VSSSEG5E64V   0xfc00707f
 
#define MATCH_VLSSEG6E64V   0xa8007007
 
#define MASK_VLSSEG6E64V   0xfc00707f
 
#define MATCH_VSSSEG6E64V   0xa8007027
 
#define MASK_VSSSEG6E64V   0xfc00707f
 
#define MATCH_VLSSEG7E64V   0xc8007007
 
#define MASK_VLSSEG7E64V   0xfc00707f
 
#define MATCH_VSSSEG7E64V   0xc8007027
 
#define MASK_VSSSEG7E64V   0xfc00707f
 
#define MATCH_VLSSEG8E64V   0xe8007007
 
#define MASK_VLSSEG8E64V   0xfc00707f
 
#define MATCH_VSSSEG8E64V   0xe8007027
 
#define MASK_VSSSEG8E64V   0xfc00707f
 
#define MATCH_VLOXSEG2EI8V   0x2c000007
 
#define MASK_VLOXSEG2EI8V   0xfc00707f
 
#define MATCH_VSOXSEG2EI8V   0x2c000027
 
#define MASK_VSOXSEG2EI8V   0xfc00707f
 
#define MATCH_VLOXSEG3EI8V   0x4c000007
 
#define MASK_VLOXSEG3EI8V   0xfc00707f
 
#define MATCH_VSOXSEG3EI8V   0x4c000027
 
#define MASK_VSOXSEG3EI8V   0xfc00707f
 
#define MATCH_VLOXSEG4EI8V   0x6c000007
 
#define MASK_VLOXSEG4EI8V   0xfc00707f
 
#define MATCH_VSOXSEG4EI8V   0x6c000027
 
#define MASK_VSOXSEG4EI8V   0xfc00707f
 
#define MATCH_VLOXSEG5EI8V   0x8c000007
 
#define MASK_VLOXSEG5EI8V   0xfc00707f
 
#define MATCH_VSOXSEG5EI8V   0x8c000027
 
#define MASK_VSOXSEG5EI8V   0xfc00707f
 
#define MATCH_VLOXSEG6EI8V   0xac000007
 
#define MASK_VLOXSEG6EI8V   0xfc00707f
 
#define MATCH_VSOXSEG6EI8V   0xac000027
 
#define MASK_VSOXSEG6EI8V   0xfc00707f
 
#define MATCH_VLOXSEG7EI8V   0xcc000007
 
#define MASK_VLOXSEG7EI8V   0xfc00707f
 
#define MATCH_VSOXSEG7EI8V   0xcc000027
 
#define MASK_VSOXSEG7EI8V   0xfc00707f
 
#define MATCH_VLOXSEG8EI8V   0xec000007
 
#define MASK_VLOXSEG8EI8V   0xfc00707f
 
#define MATCH_VSOXSEG8EI8V   0xec000027
 
#define MASK_VSOXSEG8EI8V   0xfc00707f
 
#define MATCH_VLUXSEG2EI8V   0x24000007
 
#define MASK_VLUXSEG2EI8V   0xfc00707f
 
#define MATCH_VSUXSEG2EI8V   0x24000027
 
#define MASK_VSUXSEG2EI8V   0xfc00707f
 
#define MATCH_VLUXSEG3EI8V   0x44000007
 
#define MASK_VLUXSEG3EI8V   0xfc00707f
 
#define MATCH_VSUXSEG3EI8V   0x44000027
 
#define MASK_VSUXSEG3EI8V   0xfc00707f
 
#define MATCH_VLUXSEG4EI8V   0x64000007
 
#define MASK_VLUXSEG4EI8V   0xfc00707f
 
#define MATCH_VSUXSEG4EI8V   0x64000027
 
#define MASK_VSUXSEG4EI8V   0xfc00707f
 
#define MATCH_VLUXSEG5EI8V   0x84000007
 
#define MASK_VLUXSEG5EI8V   0xfc00707f
 
#define MATCH_VSUXSEG5EI8V   0x84000027
 
#define MASK_VSUXSEG5EI8V   0xfc00707f
 
#define MATCH_VLUXSEG6EI8V   0xa4000007
 
#define MASK_VLUXSEG6EI8V   0xfc00707f
 
#define MATCH_VSUXSEG6EI8V   0xa4000027
 
#define MASK_VSUXSEG6EI8V   0xfc00707f
 
#define MATCH_VLUXSEG7EI8V   0xc4000007
 
#define MASK_VLUXSEG7EI8V   0xfc00707f
 
#define MATCH_VSUXSEG7EI8V   0xc4000027
 
#define MASK_VSUXSEG7EI8V   0xfc00707f
 
#define MATCH_VLUXSEG8EI8V   0xe4000007
 
#define MASK_VLUXSEG8EI8V   0xfc00707f
 
#define MATCH_VSUXSEG8EI8V   0xe4000027
 
#define MASK_VSUXSEG8EI8V   0xfc00707f
 
#define MATCH_VLOXSEG2EI16V   0x2c005007
 
#define MASK_VLOXSEG2EI16V   0xfc00707f
 
#define MATCH_VSOXSEG2EI16V   0x2c005027
 
#define MASK_VSOXSEG2EI16V   0xfc00707f
 
#define MATCH_VLOXSEG3EI16V   0x4c005007
 
#define MASK_VLOXSEG3EI16V   0xfc00707f
 
#define MATCH_VSOXSEG3EI16V   0x4c005027
 
#define MASK_VSOXSEG3EI16V   0xfc00707f
 
#define MATCH_VLOXSEG4EI16V   0x6c005007
 
#define MASK_VLOXSEG4EI16V   0xfc00707f
 
#define MATCH_VSOXSEG4EI16V   0x6c005027
 
#define MASK_VSOXSEG4EI16V   0xfc00707f
 
#define MATCH_VLOXSEG5EI16V   0x8c005007
 
#define MASK_VLOXSEG5EI16V   0xfc00707f
 
#define MATCH_VSOXSEG5EI16V   0x8c005027
 
#define MASK_VSOXSEG5EI16V   0xfc00707f
 
#define MATCH_VLOXSEG6EI16V   0xac005007
 
#define MASK_VLOXSEG6EI16V   0xfc00707f
 
#define MATCH_VSOXSEG6EI16V   0xac005027
 
#define MASK_VSOXSEG6EI16V   0xfc00707f
 
#define MATCH_VLOXSEG7EI16V   0xcc005007
 
#define MASK_VLOXSEG7EI16V   0xfc00707f
 
#define MATCH_VSOXSEG7EI16V   0xcc005027
 
#define MASK_VSOXSEG7EI16V   0xfc00707f
 
#define MATCH_VLOXSEG8EI16V   0xec005007
 
#define MASK_VLOXSEG8EI16V   0xfc00707f
 
#define MATCH_VSOXSEG8EI16V   0xec005027
 
#define MASK_VSOXSEG8EI16V   0xfc00707f
 
#define MATCH_VLUXSEG2EI16V   0x24005007
 
#define MASK_VLUXSEG2EI16V   0xfc00707f
 
#define MATCH_VSUXSEG2EI16V   0x24005027
 
#define MASK_VSUXSEG2EI16V   0xfc00707f
 
#define MATCH_VLUXSEG3EI16V   0x44005007
 
#define MASK_VLUXSEG3EI16V   0xfc00707f
 
#define MATCH_VSUXSEG3EI16V   0x44005027
 
#define MASK_VSUXSEG3EI16V   0xfc00707f
 
#define MATCH_VLUXSEG4EI16V   0x64005007
 
#define MASK_VLUXSEG4EI16V   0xfc00707f
 
#define MATCH_VSUXSEG4EI16V   0x64005027
 
#define MASK_VSUXSEG4EI16V   0xfc00707f
 
#define MATCH_VLUXSEG5EI16V   0x84005007
 
#define MASK_VLUXSEG5EI16V   0xfc00707f
 
#define MATCH_VSUXSEG5EI16V   0x84005027
 
#define MASK_VSUXSEG5EI16V   0xfc00707f
 
#define MATCH_VLUXSEG6EI16V   0xa4005007
 
#define MASK_VLUXSEG6EI16V   0xfc00707f
 
#define MATCH_VSUXSEG6EI16V   0xa4005027
 
#define MASK_VSUXSEG6EI16V   0xfc00707f
 
#define MATCH_VLUXSEG7EI16V   0xc4005007
 
#define MASK_VLUXSEG7EI16V   0xfc00707f
 
#define MATCH_VSUXSEG7EI16V   0xc4005027
 
#define MASK_VSUXSEG7EI16V   0xfc00707f
 
#define MATCH_VLUXSEG8EI16V   0xe4005007
 
#define MASK_VLUXSEG8EI16V   0xfc00707f
 
#define MATCH_VSUXSEG8EI16V   0xe4005027
 
#define MASK_VSUXSEG8EI16V   0xfc00707f
 
#define MATCH_VLOXSEG2EI32V   0x2c006007
 
#define MASK_VLOXSEG2EI32V   0xfc00707f
 
#define MATCH_VSOXSEG2EI32V   0x2c006027
 
#define MASK_VSOXSEG2EI32V   0xfc00707f
 
#define MATCH_VLOXSEG3EI32V   0x4c006007
 
#define MASK_VLOXSEG3EI32V   0xfc00707f
 
#define MATCH_VSOXSEG3EI32V   0x4c006027
 
#define MASK_VSOXSEG3EI32V   0xfc00707f
 
#define MATCH_VLOXSEG4EI32V   0x6c006007
 
#define MASK_VLOXSEG4EI32V   0xfc00707f
 
#define MATCH_VSOXSEG4EI32V   0x6c006027
 
#define MASK_VSOXSEG4EI32V   0xfc00707f
 
#define MATCH_VLOXSEG5EI32V   0x8c006007
 
#define MASK_VLOXSEG5EI32V   0xfc00707f
 
#define MATCH_VSOXSEG5EI32V   0x8c006027
 
#define MASK_VSOXSEG5EI32V   0xfc00707f
 
#define MATCH_VLOXSEG6EI32V   0xac006007
 
#define MASK_VLOXSEG6EI32V   0xfc00707f
 
#define MATCH_VSOXSEG6EI32V   0xac006027
 
#define MASK_VSOXSEG6EI32V   0xfc00707f
 
#define MATCH_VLOXSEG7EI32V   0xcc006007
 
#define MASK_VLOXSEG7EI32V   0xfc00707f
 
#define MATCH_VSOXSEG7EI32V   0xcc006027
 
#define MASK_VSOXSEG7EI32V   0xfc00707f
 
#define MATCH_VLOXSEG8EI32V   0xec006007
 
#define MASK_VLOXSEG8EI32V   0xfc00707f
 
#define MATCH_VSOXSEG8EI32V   0xec006027
 
#define MASK_VSOXSEG8EI32V   0xfc00707f
 
#define MATCH_VLUXSEG2EI32V   0x24006007
 
#define MASK_VLUXSEG2EI32V   0xfc00707f
 
#define MATCH_VSUXSEG2EI32V   0x24006027
 
#define MASK_VSUXSEG2EI32V   0xfc00707f
 
#define MATCH_VLUXSEG3EI32V   0x44006007
 
#define MASK_VLUXSEG3EI32V   0xfc00707f
 
#define MATCH_VSUXSEG3EI32V   0x44006027
 
#define MASK_VSUXSEG3EI32V   0xfc00707f
 
#define MATCH_VLUXSEG4EI32V   0x64006007
 
#define MASK_VLUXSEG4EI32V   0xfc00707f
 
#define MATCH_VSUXSEG4EI32V   0x64006027
 
#define MASK_VSUXSEG4EI32V   0xfc00707f
 
#define MATCH_VLUXSEG5EI32V   0x84006007
 
#define MASK_VLUXSEG5EI32V   0xfc00707f
 
#define MATCH_VSUXSEG5EI32V   0x84006027
 
#define MASK_VSUXSEG5EI32V   0xfc00707f
 
#define MATCH_VLUXSEG6EI32V   0xa4006007
 
#define MASK_VLUXSEG6EI32V   0xfc00707f
 
#define MATCH_VSUXSEG6EI32V   0xa4006027
 
#define MASK_VSUXSEG6EI32V   0xfc00707f
 
#define MATCH_VLUXSEG7EI32V   0xc4006007
 
#define MASK_VLUXSEG7EI32V   0xfc00707f
 
#define MATCH_VSUXSEG7EI32V   0xc4006027
 
#define MASK_VSUXSEG7EI32V   0xfc00707f
 
#define MATCH_VLUXSEG8EI32V   0xe4006007
 
#define MASK_VLUXSEG8EI32V   0xfc00707f
 
#define MATCH_VSUXSEG8EI32V   0xe4006027
 
#define MASK_VSUXSEG8EI32V   0xfc00707f
 
#define MATCH_VLOXSEG2EI64V   0x2c007007
 
#define MASK_VLOXSEG2EI64V   0xfc00707f
 
#define MATCH_VSOXSEG2EI64V   0x2c007027
 
#define MASK_VSOXSEG2EI64V   0xfc00707f
 
#define MATCH_VLOXSEG3EI64V   0x4c007007
 
#define MASK_VLOXSEG3EI64V   0xfc00707f
 
#define MATCH_VSOXSEG3EI64V   0x4c007027
 
#define MASK_VSOXSEG3EI64V   0xfc00707f
 
#define MATCH_VLOXSEG4EI64V   0x6c007007
 
#define MASK_VLOXSEG4EI64V   0xfc00707f
 
#define MATCH_VSOXSEG4EI64V   0x6c007027
 
#define MASK_VSOXSEG4EI64V   0xfc00707f
 
#define MATCH_VLOXSEG5EI64V   0x8c007007
 
#define MASK_VLOXSEG5EI64V   0xfc00707f
 
#define MATCH_VSOXSEG5EI64V   0x8c007027
 
#define MASK_VSOXSEG5EI64V   0xfc00707f
 
#define MATCH_VLOXSEG6EI64V   0xac007007
 
#define MASK_VLOXSEG6EI64V   0xfc00707f
 
#define MATCH_VSOXSEG6EI64V   0xac007027
 
#define MASK_VSOXSEG6EI64V   0xfc00707f
 
#define MATCH_VLOXSEG7EI64V   0xcc007007
 
#define MASK_VLOXSEG7EI64V   0xfc00707f
 
#define MATCH_VSOXSEG7EI64V   0xcc007027
 
#define MASK_VSOXSEG7EI64V   0xfc00707f
 
#define MATCH_VLOXSEG8EI64V   0xec007007
 
#define MASK_VLOXSEG8EI64V   0xfc00707f
 
#define MATCH_VSOXSEG8EI64V   0xec007027
 
#define MASK_VSOXSEG8EI64V   0xfc00707f
 
#define MATCH_VLUXSEG2EI64V   0x24007007
 
#define MASK_VLUXSEG2EI64V   0xfc00707f
 
#define MATCH_VSUXSEG2EI64V   0x24007027
 
#define MASK_VSUXSEG2EI64V   0xfc00707f
 
#define MATCH_VLUXSEG3EI64V   0x44007007
 
#define MASK_VLUXSEG3EI64V   0xfc00707f
 
#define MATCH_VSUXSEG3EI64V   0x44007027
 
#define MASK_VSUXSEG3EI64V   0xfc00707f
 
#define MATCH_VLUXSEG4EI64V   0x64007007
 
#define MASK_VLUXSEG4EI64V   0xfc00707f
 
#define MATCH_VSUXSEG4EI64V   0x64007027
 
#define MASK_VSUXSEG4EI64V   0xfc00707f
 
#define MATCH_VLUXSEG5EI64V   0x84007007
 
#define MASK_VLUXSEG5EI64V   0xfc00707f
 
#define MATCH_VSUXSEG5EI64V   0x84007027
 
#define MASK_VSUXSEG5EI64V   0xfc00707f
 
#define MATCH_VLUXSEG6EI64V   0xa4007007
 
#define MASK_VLUXSEG6EI64V   0xfc00707f
 
#define MATCH_VSUXSEG6EI64V   0xa4007027
 
#define MASK_VSUXSEG6EI64V   0xfc00707f
 
#define MATCH_VLUXSEG7EI64V   0xc4007007
 
#define MASK_VLUXSEG7EI64V   0xfc00707f
 
#define MATCH_VSUXSEG7EI64V   0xc4007027
 
#define MASK_VSUXSEG7EI64V   0xfc00707f
 
#define MATCH_VLUXSEG8EI64V   0xe4007007
 
#define MASK_VLUXSEG8EI64V   0xfc00707f
 
#define MATCH_VSUXSEG8EI64V   0xe4007027
 
#define MASK_VSUXSEG8EI64V   0xfc00707f
 
#define MATCH_VLSEG2E8FFV   0x21000007
 
#define MASK_VLSEG2E8FFV   0xfdf0707f
 
#define MATCH_VLSEG3E8FFV   0x41000007
 
#define MASK_VLSEG3E8FFV   0xfdf0707f
 
#define MATCH_VLSEG4E8FFV   0x61000007
 
#define MASK_VLSEG4E8FFV   0xfdf0707f
 
#define MATCH_VLSEG5E8FFV   0x81000007
 
#define MASK_VLSEG5E8FFV   0xfdf0707f
 
#define MATCH_VLSEG6E8FFV   0xa1000007
 
#define MASK_VLSEG6E8FFV   0xfdf0707f
 
#define MATCH_VLSEG7E8FFV   0xc1000007
 
#define MASK_VLSEG7E8FFV   0xfdf0707f
 
#define MATCH_VLSEG8E8FFV   0xe1000007
 
#define MASK_VLSEG8E8FFV   0xfdf0707f
 
#define MATCH_VLSEG2E16FFV   0x21005007
 
#define MASK_VLSEG2E16FFV   0xfdf0707f
 
#define MATCH_VLSEG3E16FFV   0x41005007
 
#define MASK_VLSEG3E16FFV   0xfdf0707f
 
#define MATCH_VLSEG4E16FFV   0x61005007
 
#define MASK_VLSEG4E16FFV   0xfdf0707f
 
#define MATCH_VLSEG5E16FFV   0x81005007
 
#define MASK_VLSEG5E16FFV   0xfdf0707f
 
#define MATCH_VLSEG6E16FFV   0xa1005007
 
#define MASK_VLSEG6E16FFV   0xfdf0707f
 
#define MATCH_VLSEG7E16FFV   0xc1005007
 
#define MASK_VLSEG7E16FFV   0xfdf0707f
 
#define MATCH_VLSEG8E16FFV   0xe1005007
 
#define MASK_VLSEG8E16FFV   0xfdf0707f
 
#define MATCH_VLSEG2E32FFV   0x21006007
 
#define MASK_VLSEG2E32FFV   0xfdf0707f
 
#define MATCH_VLSEG3E32FFV   0x41006007
 
#define MASK_VLSEG3E32FFV   0xfdf0707f
 
#define MATCH_VLSEG4E32FFV   0x61006007
 
#define MASK_VLSEG4E32FFV   0xfdf0707f
 
#define MATCH_VLSEG5E32FFV   0x81006007
 
#define MASK_VLSEG5E32FFV   0xfdf0707f
 
#define MATCH_VLSEG6E32FFV   0xa1006007
 
#define MASK_VLSEG6E32FFV   0xfdf0707f
 
#define MATCH_VLSEG7E32FFV   0xc1006007
 
#define MASK_VLSEG7E32FFV   0xfdf0707f
 
#define MATCH_VLSEG8E32FFV   0xe1006007
 
#define MASK_VLSEG8E32FFV   0xfdf0707f
 
#define MATCH_VLSEG2E64FFV   0x21007007
 
#define MASK_VLSEG2E64FFV   0xfdf0707f
 
#define MATCH_VLSEG3E64FFV   0x41007007
 
#define MASK_VLSEG3E64FFV   0xfdf0707f
 
#define MATCH_VLSEG4E64FFV   0x61007007
 
#define MASK_VLSEG4E64FFV   0xfdf0707f
 
#define MATCH_VLSEG5E64FFV   0x81007007
 
#define MASK_VLSEG5E64FFV   0xfdf0707f
 
#define MATCH_VLSEG6E64FFV   0xa1007007
 
#define MASK_VLSEG6E64FFV   0xfdf0707f
 
#define MATCH_VLSEG7E64FFV   0xc1007007
 
#define MASK_VLSEG7E64FFV   0xfdf0707f
 
#define MATCH_VLSEG8E64FFV   0xe1007007
 
#define MASK_VLSEG8E64FFV   0xfdf0707f
 
#define MATCH_VL1RE8V   0x02800007
 
#define MASK_VL1RE8V   0xfff0707f
 
#define MATCH_VL1RE16V   0x02805007
 
#define MASK_VL1RE16V   0xfff0707f
 
#define MATCH_VL1RE32V   0x02806007
 
#define MASK_VL1RE32V   0xfff0707f
 
#define MATCH_VL1RE64V   0x02807007
 
#define MASK_VL1RE64V   0xfff0707f
 
#define MATCH_VL2RE8V   0x22800007
 
#define MASK_VL2RE8V   0xfff0707f
 
#define MATCH_VL2RE16V   0x22805007
 
#define MASK_VL2RE16V   0xfff0707f
 
#define MATCH_VL2RE32V   0x22806007
 
#define MASK_VL2RE32V   0xfff0707f
 
#define MATCH_VL2RE64V   0x22807007
 
#define MASK_VL2RE64V   0xfff0707f
 
#define MATCH_VL4RE8V   0x62800007
 
#define MASK_VL4RE8V   0xfff0707f
 
#define MATCH_VL4RE16V   0x62805007
 
#define MASK_VL4RE16V   0xfff0707f
 
#define MATCH_VL4RE32V   0x62806007
 
#define MASK_VL4RE32V   0xfff0707f
 
#define MATCH_VL4RE64V   0x62807007
 
#define MASK_VL4RE64V   0xfff0707f
 
#define MATCH_VL8RE8V   0xe2800007
 
#define MASK_VL8RE8V   0xfff0707f
 
#define MATCH_VL8RE16V   0xe2805007
 
#define MASK_VL8RE16V   0xfff0707f
 
#define MATCH_VL8RE32V   0xe2806007
 
#define MASK_VL8RE32V   0xfff0707f
 
#define MATCH_VL8RE64V   0xe2807007
 
#define MASK_VL8RE64V   0xfff0707f
 
#define MATCH_VS1RV   0x02800027
 
#define MASK_VS1RV   0xfff0707f
 
#define MATCH_VS2RV   0x22800027
 
#define MASK_VS2RV   0xfff0707f
 
#define MATCH_VS4RV   0x62800027
 
#define MASK_VS4RV   0xfff0707f
 
#define MATCH_VS8RV   0xe2800027
 
#define MASK_VS8RV   0xfff0707f
 
#define MATCH_VADDVV   0x00000057
 
#define MASK_VADDVV   0xfc00707f
 
#define MATCH_VADDVX   0x00004057
 
#define MASK_VADDVX   0xfc00707f
 
#define MATCH_VADDVI   0x00003057
 
#define MASK_VADDVI   0xfc00707f
 
#define MATCH_VSUBVV   0x08000057
 
#define MASK_VSUBVV   0xfc00707f
 
#define MATCH_VSUBVX   0x08004057
 
#define MASK_VSUBVX   0xfc00707f
 
#define MATCH_VRSUBVX   0x0c004057
 
#define MASK_VRSUBVX   0xfc00707f
 
#define MATCH_VRSUBVI   0x0c003057
 
#define MASK_VRSUBVI   0xfc00707f
 
#define MATCH_VWCVTXXV   0xc4006057
 
#define MASK_VWCVTXXV   0xfc0ff07f
 
#define MATCH_VWCVTUXXV   0xc0006057
 
#define MASK_VWCVTUXXV   0xfc0ff07f
 
#define MATCH_VWADDVV   0xc4002057
 
#define MASK_VWADDVV   0xfc00707f
 
#define MATCH_VWADDVX   0xc4006057
 
#define MASK_VWADDVX   0xfc00707f
 
#define MATCH_VWSUBVV   0xcc002057
 
#define MASK_VWSUBVV   0xfc00707f
 
#define MATCH_VWSUBVX   0xcc006057
 
#define MASK_VWSUBVX   0xfc00707f
 
#define MATCH_VWADDWV   0xd4002057
 
#define MASK_VWADDWV   0xfc00707f
 
#define MATCH_VWADDWX   0xd4006057
 
#define MASK_VWADDWX   0xfc00707f
 
#define MATCH_VWSUBWV   0xdc002057
 
#define MASK_VWSUBWV   0xfc00707f
 
#define MATCH_VWSUBWX   0xdc006057
 
#define MASK_VWSUBWX   0xfc00707f
 
#define MATCH_VWADDUVV   0xc0002057
 
#define MASK_VWADDUVV   0xfc00707f
 
#define MATCH_VWADDUVX   0xc0006057
 
#define MASK_VWADDUVX   0xfc00707f
 
#define MATCH_VWSUBUVV   0xc8002057
 
#define MASK_VWSUBUVV   0xfc00707f
 
#define MATCH_VWSUBUVX   0xc8006057
 
#define MASK_VWSUBUVX   0xfc00707f
 
#define MATCH_VWADDUWV   0xd0002057
 
#define MASK_VWADDUWV   0xfc00707f
 
#define MATCH_VWADDUWX   0xd0006057
 
#define MASK_VWADDUWX   0xfc00707f
 
#define MATCH_VWSUBUWV   0xd8002057
 
#define MASK_VWSUBUWV   0xfc00707f
 
#define MATCH_VWSUBUWX   0xd8006057
 
#define MASK_VWSUBUWX   0xfc00707f
 
#define MATCH_VZEXT_VF8   0x48012057
 
#define MASK_VZEXT_VF8   0xfc0ff07f
 
#define MATCH_VSEXT_VF8   0x4801a057
 
#define MASK_VSEXT_VF8   0xfc0ff07f
 
#define MATCH_VZEXT_VF4   0x48022057
 
#define MASK_VZEXT_VF4   0xfc0ff07f
 
#define MATCH_VSEXT_VF4   0x4802a057
 
#define MASK_VSEXT_VF4   0xfc0ff07f
 
#define MATCH_VZEXT_VF2   0x48032057
 
#define MASK_VZEXT_VF2   0xfc0ff07f
 
#define MATCH_VSEXT_VF2   0x4803a057
 
#define MASK_VSEXT_VF2   0xfc0ff07f
 
#define MATCH_VADCVVM   0x40000057
 
#define MASK_VADCVVM   0xfe00707f
 
#define MATCH_VADCVXM   0x40004057
 
#define MASK_VADCVXM   0xfe00707f
 
#define MATCH_VADCVIM   0x40003057
 
#define MASK_VADCVIM   0xfe00707f
 
#define MATCH_VMADCVVM   0x44000057
 
#define MASK_VMADCVVM   0xfe00707f
 
#define MATCH_VMADCVXM   0x44004057
 
#define MASK_VMADCVXM   0xfe00707f
 
#define MATCH_VMADCVIM   0x44003057
 
#define MASK_VMADCVIM   0xfe00707f
 
#define MATCH_VMADCVV   0x46000057
 
#define MASK_VMADCVV   0xfe00707f
 
#define MATCH_VMADCVX   0x46004057
 
#define MASK_VMADCVX   0xfe00707f
 
#define MATCH_VMADCVI   0x46003057
 
#define MASK_VMADCVI   0xfe00707f
 
#define MATCH_VSBCVVM   0x48000057
 
#define MASK_VSBCVVM   0xfe00707f
 
#define MATCH_VSBCVXM   0x48004057
 
#define MASK_VSBCVXM   0xfe00707f
 
#define MATCH_VMSBCVVM   0x4c000057
 
#define MASK_VMSBCVVM   0xfe00707f
 
#define MATCH_VMSBCVXM   0x4c004057
 
#define MASK_VMSBCVXM   0xfe00707f
 
#define MATCH_VMSBCVV   0x4e000057
 
#define MASK_VMSBCVV   0xfe00707f
 
#define MATCH_VMSBCVX   0x4e004057
 
#define MASK_VMSBCVX   0xfe00707f
 
#define MATCH_VNOTV   0x2c0fb057
 
#define MASK_VNOTV   0xfc0ff07f
 
#define MATCH_VANDVV   0x24000057
 
#define MASK_VANDVV   0xfc00707f
 
#define MATCH_VANDVX   0x24004057
 
#define MASK_VANDVX   0xfc00707f
 
#define MATCH_VANDVI   0x24003057
 
#define MASK_VANDVI   0xfc00707f
 
#define MATCH_VORVV   0x28000057
 
#define MASK_VORVV   0xfc00707f
 
#define MATCH_VORVX   0x28004057
 
#define MASK_VORVX   0xfc00707f
 
#define MATCH_VORVI   0x28003057
 
#define MASK_VORVI   0xfc00707f
 
#define MATCH_VXORVV   0x2c000057
 
#define MASK_VXORVV   0xfc00707f
 
#define MATCH_VXORVX   0x2c004057
 
#define MASK_VXORVX   0xfc00707f
 
#define MATCH_VXORVI   0x2c003057
 
#define MASK_VXORVI   0xfc00707f
 
#define MATCH_VSLLVV   0x94000057
 
#define MASK_VSLLVV   0xfc00707f
 
#define MATCH_VSLLVX   0x94004057
 
#define MASK_VSLLVX   0xfc00707f
 
#define MATCH_VSLLVI   0x94003057
 
#define MASK_VSLLVI   0xfc00707f
 
#define MATCH_VSRLVV   0xa0000057
 
#define MASK_VSRLVV   0xfc00707f
 
#define MATCH_VSRLVX   0xa0004057
 
#define MASK_VSRLVX   0xfc00707f
 
#define MATCH_VSRLVI   0xa0003057
 
#define MASK_VSRLVI   0xfc00707f
 
#define MATCH_VSRAVV   0xa4000057
 
#define MASK_VSRAVV   0xfc00707f
 
#define MATCH_VSRAVX   0xa4004057
 
#define MASK_VSRAVX   0xfc00707f
 
#define MATCH_VSRAVI   0xa4003057
 
#define MASK_VSRAVI   0xfc00707f
 
#define MATCH_VNCVTXXW   0xb0004057
 
#define MASK_VNCVTXXW   0xfc0ff07f
 
#define MATCH_VNSRLWV   0xb0000057
 
#define MASK_VNSRLWV   0xfc00707f
 
#define MATCH_VNSRLWX   0xb0004057
 
#define MASK_VNSRLWX   0xfc00707f
 
#define MATCH_VNSRLWI   0xb0003057
 
#define MASK_VNSRLWI   0xfc00707f
 
#define MATCH_VNSRAWV   0xb4000057
 
#define MASK_VNSRAWV   0xfc00707f
 
#define MATCH_VNSRAWX   0xb4004057
 
#define MASK_VNSRAWX   0xfc00707f
 
#define MATCH_VNSRAWI   0xb4003057
 
#define MASK_VNSRAWI   0xfc00707f
 
#define MATCH_VMSEQVV   0x60000057
 
#define MASK_VMSEQVV   0xfc00707f
 
#define MATCH_VMSEQVX   0x60004057
 
#define MASK_VMSEQVX   0xfc00707f
 
#define MATCH_VMSEQVI   0x60003057
 
#define MASK_VMSEQVI   0xfc00707f
 
#define MATCH_VMSNEVV   0x64000057
 
#define MASK_VMSNEVV   0xfc00707f
 
#define MATCH_VMSNEVX   0x64004057
 
#define MASK_VMSNEVX   0xfc00707f
 
#define MATCH_VMSNEVI   0x64003057
 
#define MASK_VMSNEVI   0xfc00707f
 
#define MATCH_VMSLTVV   0x6c000057
 
#define MASK_VMSLTVV   0xfc00707f
 
#define MATCH_VMSLTVX   0x6c004057
 
#define MASK_VMSLTVX   0xfc00707f
 
#define MATCH_VMSLTUVV   0x68000057
 
#define MASK_VMSLTUVV   0xfc00707f
 
#define MATCH_VMSLTUVX   0x68004057
 
#define MASK_VMSLTUVX   0xfc00707f
 
#define MATCH_VMSLEVV   0x74000057
 
#define MASK_VMSLEVV   0xfc00707f
 
#define MATCH_VMSLEVX   0x74004057
 
#define MASK_VMSLEVX   0xfc00707f
 
#define MATCH_VMSLEVI   0x74003057
 
#define MASK_VMSLEVI   0xfc00707f
 
#define MATCH_VMSLEUVV   0x70000057
 
#define MASK_VMSLEUVV   0xfc00707f
 
#define MATCH_VMSLEUVX   0x70004057
 
#define MASK_VMSLEUVX   0xfc00707f
 
#define MATCH_VMSLEUVI   0x70003057
 
#define MASK_VMSLEUVI   0xfc00707f
 
#define MATCH_VMSGTVX   0x7c004057
 
#define MASK_VMSGTVX   0xfc00707f
 
#define MATCH_VMSGTVI   0x7c003057
 
#define MASK_VMSGTVI   0xfc00707f
 
#define MATCH_VMSGTUVX   0x78004057
 
#define MASK_VMSGTUVX   0xfc00707f
 
#define MATCH_VMSGTUVI   0x78003057
 
#define MASK_VMSGTUVI   0xfc00707f
 
#define MATCH_VMINVV   0x14000057
 
#define MASK_VMINVV   0xfc00707f
 
#define MATCH_VMINVX   0x14004057
 
#define MASK_VMINVX   0xfc00707f
 
#define MATCH_VMAXVV   0x1c000057
 
#define MASK_VMAXVV   0xfc00707f
 
#define MATCH_VMAXVX   0x1c004057
 
#define MASK_VMAXVX   0xfc00707f
 
#define MATCH_VMINUVV   0x10000057
 
#define MASK_VMINUVV   0xfc00707f
 
#define MATCH_VMINUVX   0x10004057
 
#define MASK_VMINUVX   0xfc00707f
 
#define MATCH_VMAXUVV   0x18000057
 
#define MASK_VMAXUVV   0xfc00707f
 
#define MATCH_VMAXUVX   0x18004057
 
#define MASK_VMAXUVX   0xfc00707f
 
#define MATCH_VMULVV   0x94002057
 
#define MASK_VMULVV   0xfc00707f
 
#define MATCH_VMULVX   0x94006057
 
#define MASK_VMULVX   0xfc00707f
 
#define MATCH_VMULHVV   0x9c002057
 
#define MASK_VMULHVV   0xfc00707f
 
#define MATCH_VMULHVX   0x9c006057
 
#define MASK_VMULHVX   0xfc00707f
 
#define MATCH_VMULHUVV   0x90002057
 
#define MASK_VMULHUVV   0xfc00707f
 
#define MATCH_VMULHUVX   0x90006057
 
#define MASK_VMULHUVX   0xfc00707f
 
#define MATCH_VMULHSUVV   0x98002057
 
#define MASK_VMULHSUVV   0xfc00707f
 
#define MATCH_VMULHSUVX   0x98006057
 
#define MASK_VMULHSUVX   0xfc00707f
 
#define MATCH_VWMULVV   0xec002057
 
#define MASK_VWMULVV   0xfc00707f
 
#define MATCH_VWMULVX   0xec006057
 
#define MASK_VWMULVX   0xfc00707f
 
#define MATCH_VWMULUVV   0xe0002057
 
#define MASK_VWMULUVV   0xfc00707f
 
#define MATCH_VWMULUVX   0xe0006057
 
#define MASK_VWMULUVX   0xfc00707f
 
#define MATCH_VWMULSUVV   0xe8002057
 
#define MASK_VWMULSUVV   0xfc00707f
 
#define MATCH_VWMULSUVX   0xe8006057
 
#define MASK_VWMULSUVX   0xfc00707f
 
#define MATCH_VMACCVV   0xb4002057
 
#define MASK_VMACCVV   0xfc00707f
 
#define MATCH_VMACCVX   0xb4006057
 
#define MASK_VMACCVX   0xfc00707f
 
#define MATCH_VNMSACVV   0xbc002057
 
#define MASK_VNMSACVV   0xfc00707f
 
#define MATCH_VNMSACVX   0xbc006057
 
#define MASK_VNMSACVX   0xfc00707f
 
#define MATCH_VMADDVV   0xa4002057
 
#define MASK_VMADDVV   0xfc00707f
 
#define MATCH_VMADDVX   0xa4006057
 
#define MASK_VMADDVX   0xfc00707f
 
#define MATCH_VNMSUBVV   0xac002057
 
#define MASK_VNMSUBVV   0xfc00707f
 
#define MATCH_VNMSUBVX   0xac006057
 
#define MASK_VNMSUBVX   0xfc00707f
 
#define MATCH_VWMACCUVV   0xf0002057
 
#define MASK_VWMACCUVV   0xfc00707f
 
#define MATCH_VWMACCUVX   0xf0006057
 
#define MASK_VWMACCUVX   0xfc00707f
 
#define MATCH_VWMACCVV   0xf4002057
 
#define MASK_VWMACCVV   0xfc00707f
 
#define MATCH_VWMACCVX   0xf4006057
 
#define MASK_VWMACCVX   0xfc00707f
 
#define MATCH_VWMACCSUVV   0xfc002057
 
#define MASK_VWMACCSUVV   0xfc00707f
 
#define MATCH_VWMACCSUVX   0xfc006057
 
#define MASK_VWMACCSUVX   0xfc00707f
 
#define MATCH_VWMACCUSVX   0xf8006057
 
#define MASK_VWMACCUSVX   0xfc00707f
 
#define MATCH_VQMACCUVV   0xf0000057
 
#define MASK_VQMACCUVV   0xfc00707f
 
#define MATCH_VQMACCUVX   0xf0004057
 
#define MASK_VQMACCUVX   0xfc00707f
 
#define MATCH_VQMACCVV   0xf4000057
 
#define MASK_VQMACCVV   0xfc00707f
 
#define MATCH_VQMACCVX   0xf4004057
 
#define MASK_VQMACCVX   0xfc00707f
 
#define MATCH_VQMACCSUVV   0xfc000057
 
#define MASK_VQMACCSUVV   0xfc00707f
 
#define MATCH_VQMACCSUVX   0xfc004057
 
#define MASK_VQMACCSUVX   0xfc00707f
 
#define MATCH_VQMACCUSVX   0xf8004057
 
#define MASK_VQMACCUSVX   0xfc00707f
 
#define MATCH_VDIVVV   0x84002057
 
#define MASK_VDIVVV   0xfc00707f
 
#define MATCH_VDIVVX   0x84006057
 
#define MASK_VDIVVX   0xfc00707f
 
#define MATCH_VDIVUVV   0x80002057
 
#define MASK_VDIVUVV   0xfc00707f
 
#define MATCH_VDIVUVX   0x80006057
 
#define MASK_VDIVUVX   0xfc00707f
 
#define MATCH_VREMVV   0x8c002057
 
#define MASK_VREMVV   0xfc00707f
 
#define MATCH_VREMVX   0x8c006057
 
#define MASK_VREMVX   0xfc00707f
 
#define MATCH_VREMUVV   0x88002057
 
#define MASK_VREMUVV   0xfc00707f
 
#define MATCH_VREMUVX   0x88006057
 
#define MASK_VREMUVX   0xfc00707f
 
#define MATCH_VMERGEVVM   0x5c000057
 
#define MASK_VMERGEVVM   0xfe00707f
 
#define MATCH_VMERGEVXM   0x5c004057
 
#define MASK_VMERGEVXM   0xfe00707f
 
#define MATCH_VMERGEVIM   0x5c003057
 
#define MASK_VMERGEVIM   0xfe00707f
 
#define MATCH_VMVVV   0x5e000057
 
#define MASK_VMVVV   0xfff0707f
 
#define MATCH_VMVVX   0x5e004057
 
#define MASK_VMVVX   0xfff0707f
 
#define MATCH_VMVVI   0x5e003057
 
#define MASK_VMVVI   0xfff0707f
 
#define MATCH_VSADDUVV   0x80000057
 
#define MASK_VSADDUVV   0xfc00707f
 
#define MATCH_VSADDUVX   0x80004057
 
#define MASK_VSADDUVX   0xfc00707f
 
#define MATCH_VSADDUVI   0x80003057
 
#define MASK_VSADDUVI   0xfc00707f
 
#define MATCH_VSADDVV   0x84000057
 
#define MASK_VSADDVV   0xfc00707f
 
#define MATCH_VSADDVX   0x84004057
 
#define MASK_VSADDVX   0xfc00707f
 
#define MATCH_VSADDVI   0x84003057
 
#define MASK_VSADDVI   0xfc00707f
 
#define MATCH_VSSUBUVV   0x88000057
 
#define MASK_VSSUBUVV   0xfc00707f
 
#define MATCH_VSSUBUVX   0x88004057
 
#define MASK_VSSUBUVX   0xfc00707f
 
#define MATCH_VSSUBVV   0x8c000057
 
#define MASK_VSSUBVV   0xfc00707f
 
#define MATCH_VSSUBVX   0x8c004057
 
#define MASK_VSSUBVX   0xfc00707f
 
#define MATCH_VAADDUVV   0x20002057
 
#define MASK_VAADDUVV   0xfc00707f
 
#define MATCH_VAADDUVX   0x20006057
 
#define MASK_VAADDUVX   0xfc00707f
 
#define MATCH_VAADDVV   0x24002057
 
#define MASK_VAADDVV   0xfc00707f
 
#define MATCH_VAADDVX   0x24006057
 
#define MASK_VAADDVX   0xfc00707f
 
#define MATCH_VASUBUVV   0x28002057
 
#define MASK_VASUBUVV   0xfc00707f
 
#define MATCH_VASUBUVX   0x28006057
 
#define MASK_VASUBUVX   0xfc00707f
 
#define MATCH_VASUBVV   0x2c002057
 
#define MASK_VASUBVV   0xfc00707f
 
#define MATCH_VASUBVX   0x2c006057
 
#define MASK_VASUBVX   0xfc00707f
 
#define MATCH_VSMULVV   0x9c000057
 
#define MASK_VSMULVV   0xfc00707f
 
#define MATCH_VSMULVX   0x9c004057
 
#define MASK_VSMULVX   0xfc00707f
 
#define MATCH_VSSRLVV   0xa8000057
 
#define MASK_VSSRLVV   0xfc00707f
 
#define MATCH_VSSRLVX   0xa8004057
 
#define MASK_VSSRLVX   0xfc00707f
 
#define MATCH_VSSRLVI   0xa8003057
 
#define MASK_VSSRLVI   0xfc00707f
 
#define MATCH_VSSRAVV   0xac000057
 
#define MASK_VSSRAVV   0xfc00707f
 
#define MATCH_VSSRAVX   0xac004057
 
#define MASK_VSSRAVX   0xfc00707f
 
#define MATCH_VSSRAVI   0xac003057
 
#define MASK_VSSRAVI   0xfc00707f
 
#define MATCH_VNCLIPUWV   0xb8000057
 
#define MASK_VNCLIPUWV   0xfc00707f
 
#define MATCH_VNCLIPUWX   0xb8004057
 
#define MASK_VNCLIPUWX   0xfc00707f
 
#define MATCH_VNCLIPUWI   0xb8003057
 
#define MASK_VNCLIPUWI   0xfc00707f
 
#define MATCH_VNCLIPWV   0xbc000057
 
#define MASK_VNCLIPWV   0xfc00707f
 
#define MATCH_VNCLIPWX   0xbc004057
 
#define MASK_VNCLIPWX   0xfc00707f
 
#define MATCH_VNCLIPWI   0xbc003057
 
#define MASK_VNCLIPWI   0xfc00707f
 
#define MATCH_VFADDVV   0x00001057
 
#define MASK_VFADDVV   0xfc00707f
 
#define MATCH_VFADDVF   0x00005057
 
#define MASK_VFADDVF   0xfc00707f
 
#define MATCH_VFSUBVV   0x08001057
 
#define MASK_VFSUBVV   0xfc00707f
 
#define MATCH_VFSUBVF   0x08005057
 
#define MASK_VFSUBVF   0xfc00707f
 
#define MATCH_VFRSUBVF   0x9c005057
 
#define MASK_VFRSUBVF   0xfc00707f
 
#define MATCH_VFWADDVV   0xc0001057
 
#define MASK_VFWADDVV   0xfc00707f
 
#define MATCH_VFWADDVF   0xc0005057
 
#define MASK_VFWADDVF   0xfc00707f
 
#define MATCH_VFWSUBVV   0xc8001057
 
#define MASK_VFWSUBVV   0xfc00707f
 
#define MATCH_VFWSUBVF   0xc8005057
 
#define MASK_VFWSUBVF   0xfc00707f
 
#define MATCH_VFWADDWV   0xd0001057
 
#define MASK_VFWADDWV   0xfc00707f
 
#define MATCH_VFWADDWF   0xd0005057
 
#define MASK_VFWADDWF   0xfc00707f
 
#define MATCH_VFWSUBWV   0xd8001057
 
#define MASK_VFWSUBWV   0xfc00707f
 
#define MATCH_VFWSUBWF   0xd8005057
 
#define MASK_VFWSUBWF   0xfc00707f
 
#define MATCH_VFMULVV   0x90001057
 
#define MASK_VFMULVV   0xfc00707f
 
#define MATCH_VFMULVF   0x90005057
 
#define MASK_VFMULVF   0xfc00707f
 
#define MATCH_VFDIVVV   0x80001057
 
#define MASK_VFDIVVV   0xfc00707f
 
#define MATCH_VFDIVVF   0x80005057
 
#define MASK_VFDIVVF   0xfc00707f
 
#define MATCH_VFRDIVVF   0x84005057
 
#define MASK_VFRDIVVF   0xfc00707f
 
#define MATCH_VFWMULVV   0xe0001057
 
#define MASK_VFWMULVV   0xfc00707f
 
#define MATCH_VFWMULVF   0xe0005057
 
#define MASK_VFWMULVF   0xfc00707f
 
#define MATCH_VFMADDVV   0xa0001057
 
#define MASK_VFMADDVV   0xfc00707f
 
#define MATCH_VFMADDVF   0xa0005057
 
#define MASK_VFMADDVF   0xfc00707f
 
#define MATCH_VFNMADDVV   0xa4001057
 
#define MASK_VFNMADDVV   0xfc00707f
 
#define MATCH_VFNMADDVF   0xa4005057
 
#define MASK_VFNMADDVF   0xfc00707f
 
#define MATCH_VFMSUBVV   0xa8001057
 
#define MASK_VFMSUBVV   0xfc00707f
 
#define MATCH_VFMSUBVF   0xa8005057
 
#define MASK_VFMSUBVF   0xfc00707f
 
#define MATCH_VFNMSUBVV   0xac001057
 
#define MASK_VFNMSUBVV   0xfc00707f
 
#define MATCH_VFNMSUBVF   0xac005057
 
#define MASK_VFNMSUBVF   0xfc00707f
 
#define MATCH_VFMACCVV   0xb0001057
 
#define MASK_VFMACCVV   0xfc00707f
 
#define MATCH_VFMACCVF   0xb0005057
 
#define MASK_VFMACCVF   0xfc00707f
 
#define MATCH_VFNMACCVV   0xb4001057
 
#define MASK_VFNMACCVV   0xfc00707f
 
#define MATCH_VFNMACCVF   0xb4005057
 
#define MASK_VFNMACCVF   0xfc00707f
 
#define MATCH_VFMSACVV   0xb8001057
 
#define MASK_VFMSACVV   0xfc00707f
 
#define MATCH_VFMSACVF   0xb8005057
 
#define MASK_VFMSACVF   0xfc00707f
 
#define MATCH_VFNMSACVV   0xbc001057
 
#define MASK_VFNMSACVV   0xfc00707f
 
#define MATCH_VFNMSACVF   0xbc005057
 
#define MASK_VFNMSACVF   0xfc00707f
 
#define MATCH_VFWMACCVV   0xf0001057
 
#define MASK_VFWMACCVV   0xfc00707f
 
#define MATCH_VFWMACCVF   0xf0005057
 
#define MASK_VFWMACCVF   0xfc00707f
 
#define MATCH_VFWNMACCVV   0xf4001057
 
#define MASK_VFWNMACCVV   0xfc00707f
 
#define MATCH_VFWNMACCVF   0xf4005057
 
#define MASK_VFWNMACCVF   0xfc00707f
 
#define MATCH_VFWMSACVV   0xf8001057
 
#define MASK_VFWMSACVV   0xfc00707f
 
#define MATCH_VFWMSACVF   0xf8005057
 
#define MASK_VFWMSACVF   0xfc00707f
 
#define MATCH_VFWNMSACVV   0xfc001057
 
#define MASK_VFWNMSACVV   0xfc00707f
 
#define MATCH_VFWNMSACVF   0xfc005057
 
#define MASK_VFWNMSACVF   0xfc00707f
 
#define MATCH_VFSQRTV   0x4c001057
 
#define MASK_VFSQRTV   0xfc0ff07f
 
#define MATCH_VFRSQRT7V   0x4c021057
 
#define MASK_VFRSQRT7V   0xfc0ff07f
 
#define MATCH_VFREC7V   0x4c029057
 
#define MASK_VFREC7V   0xfc0ff07f
 
#define MATCH_VFCLASSV   0x4c081057
 
#define MASK_VFCLASSV   0xfc0ff07f
 
#define MATCH_VFMINVV   0x10001057
 
#define MASK_VFMINVV   0xfc00707f
 
#define MATCH_VFMINVF   0x10005057
 
#define MASK_VFMINVF   0xfc00707f
 
#define MATCH_VFMAXVV   0x18001057
 
#define MASK_VFMAXVV   0xfc00707f
 
#define MATCH_VFMAXVF   0x18005057
 
#define MASK_VFMAXVF   0xfc00707f
 
#define MATCH_VFSGNJVV   0x20001057
 
#define MASK_VFSGNJVV   0xfc00707f
 
#define MATCH_VFSGNJVF   0x20005057
 
#define MASK_VFSGNJVF   0xfc00707f
 
#define MATCH_VFSGNJNVV   0x24001057
 
#define MASK_VFSGNJNVV   0xfc00707f
 
#define MATCH_VFSGNJNVF   0x24005057
 
#define MASK_VFSGNJNVF   0xfc00707f
 
#define MATCH_VFSGNJXVV   0x28001057
 
#define MASK_VFSGNJXVV   0xfc00707f
 
#define MATCH_VFSGNJXVF   0x28005057
 
#define MASK_VFSGNJXVF   0xfc00707f
 
#define MATCH_VMFEQVV   0x60001057
 
#define MASK_VMFEQVV   0xfc00707f
 
#define MATCH_VMFEQVF   0x60005057
 
#define MASK_VMFEQVF   0xfc00707f
 
#define MATCH_VMFNEVV   0x70001057
 
#define MASK_VMFNEVV   0xfc00707f
 
#define MATCH_VMFNEVF   0x70005057
 
#define MASK_VMFNEVF   0xfc00707f
 
#define MATCH_VMFLTVV   0x6c001057
 
#define MASK_VMFLTVV   0xfc00707f
 
#define MATCH_VMFLTVF   0x6c005057
 
#define MASK_VMFLTVF   0xfc00707f
 
#define MATCH_VMFLEVV   0x64001057
 
#define MASK_VMFLEVV   0xfc00707f
 
#define MATCH_VMFLEVF   0x64005057
 
#define MASK_VMFLEVF   0xfc00707f
 
#define MATCH_VMFGTVF   0x74005057
 
#define MASK_VMFGTVF   0xfc00707f
 
#define MATCH_VMFGEVF   0x7c005057
 
#define MASK_VMFGEVF   0xfc00707f
 
#define MATCH_VFMERGEVFM   0x5c005057
 
#define MASK_VFMERGEVFM   0xfe00707f
 
#define MATCH_VFMVVF   0x5e005057
 
#define MASK_VFMVVF   0xfff0707f
 
#define MATCH_VFCVTXUFV   0x48001057
 
#define MASK_VFCVTXUFV   0xfc0ff07f
 
#define MATCH_VFCVTXFV   0x48009057
 
#define MASK_VFCVTXFV   0xfc0ff07f
 
#define MATCH_VFCVTFXUV   0x48011057
 
#define MASK_VFCVTFXUV   0xfc0ff07f
 
#define MATCH_VFCVTFXV   0x48019057
 
#define MASK_VFCVTFXV   0xfc0ff07f
 
#define MATCH_VFCVTRTZXUFV   0x48031057
 
#define MASK_VFCVTRTZXUFV   0xfc0ff07f
 
#define MATCH_VFCVTRTZXFV   0x48039057
 
#define MASK_VFCVTRTZXFV   0xfc0ff07f
 
#define MATCH_VFWCVTXUFV   0x48041057
 
#define MASK_VFWCVTXUFV   0xfc0ff07f
 
#define MATCH_VFWCVTXFV   0x48049057
 
#define MASK_VFWCVTXFV   0xfc0ff07f
 
#define MATCH_VFWCVTFXUV   0x48051057
 
#define MASK_VFWCVTFXUV   0xfc0ff07f
 
#define MATCH_VFWCVTFXV   0x48059057
 
#define MASK_VFWCVTFXV   0xfc0ff07f
 
#define MATCH_VFWCVTFFV   0x48061057
 
#define MASK_VFWCVTFFV   0xfc0ff07f
 
#define MATCH_VFWCVTRTZXUFV   0x48071057
 
#define MASK_VFWCVTRTZXUFV   0xfc0ff07f
 
#define MATCH_VFWCVTRTZXFV   0x48079057
 
#define MASK_VFWCVTRTZXFV   0xfc0ff07f
 
#define MATCH_VFNCVTXUFW   0x48081057
 
#define MASK_VFNCVTXUFW   0xfc0ff07f
 
#define MATCH_VFNCVTXFW   0x48089057
 
#define MASK_VFNCVTXFW   0xfc0ff07f
 
#define MATCH_VFNCVTFXUW   0x48091057
 
#define MASK_VFNCVTFXUW   0xfc0ff07f
 
#define MATCH_VFNCVTFXW   0x48099057
 
#define MASK_VFNCVTFXW   0xfc0ff07f
 
#define MATCH_VFNCVTFFW   0x480a1057
 
#define MASK_VFNCVTFFW   0xfc0ff07f
 
#define MATCH_VFNCVTRODFFW   0x480a9057
 
#define MASK_VFNCVTRODFFW   0xfc0ff07f
 
#define MATCH_VFNCVTRTZXUFW   0x480b1057
 
#define MASK_VFNCVTRTZXUFW   0xfc0ff07f
 
#define MATCH_VFNCVTRTZXFW   0x480b9057
 
#define MASK_VFNCVTRTZXFW   0xfc0ff07f
 
#define MATCH_VREDSUMVS   0x00002057
 
#define MASK_VREDSUMVS   0xfc00707f
 
#define MATCH_VREDMAXVS   0x1c002057
 
#define MASK_VREDMAXVS   0xfc00707f
 
#define MATCH_VREDMAXUVS   0x18002057
 
#define MASK_VREDMAXUVS   0xfc00707f
 
#define MATCH_VREDMINVS   0x14002057
 
#define MASK_VREDMINVS   0xfc00707f
 
#define MATCH_VREDMINUVS   0x10002057
 
#define MASK_VREDMINUVS   0xfc00707f
 
#define MATCH_VREDANDVS   0x04002057
 
#define MASK_VREDANDVS   0xfc00707f
 
#define MATCH_VREDORVS   0x08002057
 
#define MASK_VREDORVS   0xfc00707f
 
#define MATCH_VREDXORVS   0x0c002057
 
#define MASK_VREDXORVS   0xfc00707f
 
#define MATCH_VWREDSUMUVS   0xc0000057
 
#define MASK_VWREDSUMUVS   0xfc00707f
 
#define MATCH_VWREDSUMVS   0xc4000057
 
#define MASK_VWREDSUMVS   0xfc00707f
 
#define MATCH_VFREDOSUMVS   0x0c001057
 
#define MASK_VFREDOSUMVS   0xfc00707f
 
#define MATCH_VFREDUSUMVS   0x04001057
 
#define MASK_VFREDUSUMVS   0xfc00707f
 
#define MATCH_VFREDMAXVS   0x1c001057
 
#define MASK_VFREDMAXVS   0xfc00707f
 
#define MATCH_VFREDMINVS   0x14001057
 
#define MASK_VFREDMINVS   0xfc00707f
 
#define MATCH_VFWREDOSUMVS   0xcc001057
 
#define MASK_VFWREDOSUMVS   0xfc00707f
 
#define MATCH_VFWREDUSUMVS   0xc4001057
 
#define MASK_VFWREDUSUMVS   0xfc00707f
 
#define MATCH_VMANDMM   0x66002057
 
#define MASK_VMANDMM   0xfe00707f
 
#define MATCH_VMNANDMM   0x76002057
 
#define MASK_VMNANDMM   0xfe00707f
 
#define MATCH_VMANDNMM   0x62002057
 
#define MASK_VMANDNMM   0xfe00707f
 
#define MATCH_VMXORMM   0x6e002057
 
#define MASK_VMXORMM   0xfe00707f
 
#define MATCH_VMORMM   0x6a002057
 
#define MASK_VMORMM   0xfe00707f
 
#define MATCH_VMNORMM   0x7a002057
 
#define MASK_VMNORMM   0xfe00707f
 
#define MATCH_VMORNMM   0x72002057
 
#define MASK_VMORNMM   0xfe00707f
 
#define MATCH_VMXNORMM   0x7e002057
 
#define MASK_VMXNORMM   0xfe00707f
 
#define MATCH_VCPOPM   0x40082057
 
#define MASK_VCPOPM   0xfc0ff07f
 
#define MATCH_VFIRSTM   0x4008a057
 
#define MASK_VFIRSTM   0xfc0ff07f
 
#define MATCH_VMSBFM   0x5000a057
 
#define MASK_VMSBFM   0xfc0ff07f
 
#define MATCH_VMSIFM   0x5001a057
 
#define MASK_VMSIFM   0xfc0ff07f
 
#define MATCH_VMSOFM   0x50012057
 
#define MASK_VMSOFM   0xfc0ff07f
 
#define MATCH_VIOTAM   0x50082057
 
#define MASK_VIOTAM   0xfc0ff07f
 
#define MATCH_VIDV   0x5008a057
 
#define MASK_VIDV   0xfdfff07f
 
#define MATCH_VMVXS   0x42002057
 
#define MASK_VMVXS   0xfe0ff07f
 
#define MATCH_VMVSX   0x42006057
 
#define MASK_VMVSX   0xfff0707f
 
#define MATCH_VFMVFS   0x42001057
 
#define MASK_VFMVFS   0xfe0ff07f
 
#define MATCH_VFMVSF   0x42005057
 
#define MASK_VFMVSF   0xfff0707f
 
#define MATCH_VSLIDEUPVX   0x38004057
 
#define MASK_VSLIDEUPVX   0xfc00707f
 
#define MATCH_VSLIDEUPVI   0x38003057
 
#define MASK_VSLIDEUPVI   0xfc00707f
 
#define MATCH_VSLIDEDOWNVX   0x3c004057
 
#define MASK_VSLIDEDOWNVX   0xfc00707f
 
#define MATCH_VSLIDEDOWNVI   0x3c003057
 
#define MASK_VSLIDEDOWNVI   0xfc00707f
 
#define MATCH_VSLIDE1UPVX   0x38006057
 
#define MASK_VSLIDE1UPVX   0xfc00707f
 
#define MATCH_VSLIDE1DOWNVX   0x3c006057
 
#define MASK_VSLIDE1DOWNVX   0xfc00707f
 
#define MATCH_VFSLIDE1UPVF   0x38005057
 
#define MASK_VFSLIDE1UPVF   0xfc00707f
 
#define MATCH_VFSLIDE1DOWNVF   0x3c005057
 
#define MASK_VFSLIDE1DOWNVF   0xfc00707f
 
#define MATCH_VRGATHERVV   0x30000057
 
#define MASK_VRGATHERVV   0xfc00707f
 
#define MATCH_VRGATHERVX   0x30004057
 
#define MASK_VRGATHERVX   0xfc00707f
 
#define MATCH_VRGATHERVI   0x30003057
 
#define MASK_VRGATHERVI   0xfc00707f
 
#define MATCH_VRGATHEREI16VV   0x38000057
 
#define MASK_VRGATHEREI16VV   0xfc00707f
 
#define MATCH_VCOMPRESSVM   0x5e002057
 
#define MASK_VCOMPRESSVM   0xfe00707f
 
#define MATCH_VMV1RV   0x9e003057
 
#define MASK_VMV1RV   0xfe0ff07f
 
#define MATCH_VMV2RV   0x9e00b057
 
#define MASK_VMV2RV   0xfe0ff07f
 
#define MATCH_VMV4RV   0x9e01b057
 
#define MASK_VMV4RV   0xfe0ff07f
 
#define MATCH_VMV8RV   0x9e03b057
 
#define MASK_VMV8RV   0xfe0ff07f
 
#define MATCH_VDOTVV   0xe4000057
 
#define MASK_VDOTVV   0xfc00707f
 
#define MATCH_VDOTUVV   0xe0000057
 
#define MASK_VDOTUVV   0xfc00707f
 
#define MATCH_VFDOTVV   0xe4001057
 
#define MASK_VFDOTVV   0xfc00707f
 
#define MATCH_VANDN_VV   0x4000057
 
#define MASK_VANDN_VV   0xfc00707f
 
#define MATCH_VANDN_VX   0x4004057
 
#define MASK_VANDN_VX   0xfc00707f
 
#define MATCH_VBREV8_V   0x48042057
 
#define MASK_VBREV8_V   0xfc0ff07f
 
#define MATCH_VBREV_V   0x48052057
 
#define MASK_VBREV_V   0xfc0ff07f
 
#define MATCH_VCLZ_V   0x48062057
 
#define MASK_VCLZ_V   0xfc0ff07f
 
#define MATCH_VCPOP_V   0x48072057
 
#define MASK_VCPOP_V   0xfc0ff07f
 
#define MATCH_VCTZ_V   0x4806a057
 
#define MASK_VCTZ_V   0xfc0ff07f
 
#define MATCH_VREV8_V   0x4804a057
 
#define MASK_VREV8_V   0xfc0ff07f
 
#define MATCH_VROL_VV   0x54000057
 
#define MASK_VROL_VV   0xfc00707f
 
#define MATCH_VROL_VX   0x54004057
 
#define MASK_VROL_VX   0xfc00707f
 
#define MATCH_VROR_VI   0x50003057
 
#define MASK_VROR_VI   0xf800707f
 
#define MATCH_VROR_VV   0x50000057
 
#define MASK_VROR_VV   0xfc00707f
 
#define MATCH_VROR_VX   0x50004057
 
#define MASK_VROR_VX   0xfc00707f
 
#define MATCH_VWSLL_VI   0xd4003057
 
#define MASK_VWSLL_VI   0xfc00707f
 
#define MATCH_VWSLL_VV   0xd4000057
 
#define MASK_VWSLL_VV   0xfc00707f
 
#define MATCH_VWSLL_VX   0xd4004057
 
#define MASK_VWSLL_VX   0xfc00707f
 
#define MATCH_VCLMUL_VV   0x30002057
 
#define MASK_VCLMUL_VV   0xfc00707f
 
#define MATCH_VCLMUL_VX   0x30006057
 
#define MASK_VCLMUL_VX   0xfc00707f
 
#define MATCH_VCLMULH_VV   0x34002057
 
#define MASK_VCLMULH_VV   0xfc00707f
 
#define MATCH_VCLMULH_VX   0x34006057
 
#define MASK_VCLMULH_VX   0xfc00707f
 
#define MATCH_VGHSH_VV   0xb2002077
 
#define MASK_VGHSH_VV   0xfe00707f
 
#define MATCH_VGMUL_VV   0xa208a077
 
#define MASK_VGMUL_VV   0xfe0ff07f
 
#define MATCH_VAESDF_VS   0xa600a077
 
#define MASK_VAESDF_VS   0xfe0ff07f
 
#define MATCH_VAESDF_VV   0xa200a077
 
#define MASK_VAESDF_VV   0xfe0ff07f
 
#define MATCH_VAESDM_VS   0xa6002077
 
#define MASK_VAESDM_VS   0xfe0ff07f
 
#define MATCH_VAESDM_VV   0xa2002077
 
#define MASK_VAESDM_VV   0xfe0ff07f
 
#define MATCH_VAESEF_VS   0xa601a077
 
#define MASK_VAESEF_VS   0xfe0ff07f
 
#define MATCH_VAESEF_VV   0xa201a077
 
#define MASK_VAESEF_VV   0xfe0ff07f
 
#define MATCH_VAESEM_VS   0xa6012077
 
#define MASK_VAESEM_VS   0xfe0ff07f
 
#define MATCH_VAESEM_VV   0xa2012077
 
#define MASK_VAESEM_VV   0xfe0ff07f
 
#define MATCH_VAESKF1_VI   0x8a002077
 
#define MASK_VAESKF1_VI   0xfe00707f
 
#define MATCH_VAESKF2_VI   0xaa002077
 
#define MASK_VAESKF2_VI   0xfe00707f
 
#define MATCH_VAESZ_VS   0xa603a077
 
#define MASK_VAESZ_VS   0xfe0ff07f
 
#define MATCH_VSHA2CH_VV   0xba002077
 
#define MASK_VSHA2CH_VV   0xfe00707f
 
#define MATCH_VSHA2CL_VV   0xbe002077
 
#define MASK_VSHA2CL_VV   0xfe00707f
 
#define MATCH_VSHA2MS_VV   0xb6002077
 
#define MASK_VSHA2MS_VV   0xfe00707f
 
#define MATCH_VSM4K_VI   0x86002077
 
#define MASK_VSM4K_VI   0xfe00707f
 
#define MATCH_VSM4R_VS   0xa6082077
 
#define MASK_VSM4R_VS   0xfe0ff07f
 
#define MATCH_VSM4R_VV   0xa2082077
 
#define MASK_VSM4R_VV   0xfe0ff07f
 
#define MATCH_VSM3C_VI   0xae002077
 
#define MASK_VSM3C_VI   0xfe00707f
 
#define MATCH_VSM3ME_VV   0x82002077
 
#define MASK_VSM3ME_VV   0xfe00707f
 
#define MATCH_C_LBU   0x8000
 
#define MASK_C_LBU   0xfc03
 
#define MATCH_C_LHU   0x8400
 
#define MASK_C_LHU   0xfc43
 
#define MATCH_C_LH   0x8440
 
#define MASK_C_LH   0xfc43
 
#define MATCH_C_SB   0x8800
 
#define MASK_C_SB   0xfc03
 
#define MATCH_C_SH   0x8c00
 
#define MASK_C_SH   0xfc43
 
#define MATCH_C_ZEXT_B   0x9c61
 
#define MASK_C_ZEXT_B   0xfc7f
 
#define MATCH_C_SEXT_B   0x9c65
 
#define MASK_C_SEXT_B   0xfc7f
 
#define MATCH_C_ZEXT_H   0x9c69
 
#define MASK_C_ZEXT_H   0xfc7f
 
#define MATCH_C_SEXT_H   0x9c6d
 
#define MASK_C_SEXT_H   0xfc7f
 
#define MATCH_C_ZEXT_W   0x9c71
 
#define MASK_C_ZEXT_W   0xfc7f
 
#define MATCH_C_NOT   0x9c75
 
#define MASK_C_NOT   0xfc7f
 
#define MATCH_C_MUL   0x9c41
 
#define MASK_C_MUL   0xfc63
 
#define MATCH_SINVAL_VMA   0x16000073
 
#define MASK_SINVAL_VMA   0xfe007fff
 
#define MATCH_SFENCE_W_INVAL   0x18000073
 
#define MASK_SFENCE_W_INVAL   0xffffffff
 
#define MATCH_SFENCE_INVAL_IR   0x18100073
 
#define MASK_SFENCE_INVAL_IR   0xffffffff
 
#define MATCH_HINVAL_VVMA   0x26000073
 
#define MASK_HINVAL_VVMA   0xfe007fff
 
#define MATCH_HINVAL_GVMA   0x66000073
 
#define MASK_HINVAL_GVMA   0xfe007fff
 
#define MATCH_HFENCE_VVMA   0x22000073
 
#define MASK_HFENCE_VVMA   0xfe007fff
 
#define MATCH_HFENCE_GVMA   0x62000073
 
#define MASK_HFENCE_GVMA   0xfe007fff
 
#define MATCH_HLV_B   0x60004073
 
#define MASK_HLV_B   0xfff0707f
 
#define MATCH_HLV_H   0x64004073
 
#define MASK_HLV_H   0xfff0707f
 
#define MATCH_HLV_W   0x68004073
 
#define MASK_HLV_W   0xfff0707f
 
#define MATCH_HLV_D   0x6c004073
 
#define MASK_HLV_D   0xfff0707f
 
#define MATCH_HLV_BU   0x60104073
 
#define MASK_HLV_BU   0xfff0707f
 
#define MATCH_HLV_HU   0x64104073
 
#define MASK_HLV_HU   0xfff0707f
 
#define MATCH_HLV_WU   0x68104073
 
#define MASK_HLV_WU   0xfff0707f
 
#define MATCH_HLVX_HU   0x64304073
 
#define MASK_HLVX_HU   0xfff0707f
 
#define MATCH_HLVX_WU   0x68304073
 
#define MASK_HLVX_WU   0xfff0707f
 
#define MATCH_HSV_B   0x62004073
 
#define MASK_HSV_B   0xfe007fff
 
#define MATCH_HSV_H   0x66004073
 
#define MASK_HSV_H   0xfe007fff
 
#define MATCH_HSV_W   0x6a004073
 
#define MASK_HSV_W   0xfe007fff
 
#define MATCH_HSV_D   0x6e004073
 
#define MASK_HSV_D   0xfe007fff
 
#define MATCH_PREFETCH_I   0x6013
 
#define MASK_PREFETCH_I   0x1f07fff
 
#define MATCH_PREFETCH_R   0x106013
 
#define MASK_PREFETCH_R   0x1f07fff
 
#define MATCH_PREFETCH_W   0x306013
 
#define MASK_PREFETCH_W   0x1f07fff
 
#define MATCH_CBO_CLEAN   0x10200f
 
#define MASK_CBO_CLEAN   0xfff07fff
 
#define MATCH_CBO_FLUSH   0x20200f
 
#define MASK_CBO_FLUSH   0xfff07fff
 
#define MATCH_CBO_INVAL   0x200f
 
#define MASK_CBO_INVAL   0xfff07fff
 
#define MATCH_CBO_ZERO   0x40200f
 
#define MASK_CBO_ZERO   0xfff07fff
 
#define MATCH_CZERO_EQZ   0xe005033
 
#define MASK_CZERO_EQZ   0xfe00707f
 
#define MATCH_CZERO_NEZ   0xe007033
 
#define MASK_CZERO_NEZ   0xfe00707f
 
#define MATCH_NTL_P1   0x200033
 
#define MASK_NTL_P1   0xffffffff
 
#define MATCH_NTL_PALL   0x300033
 
#define MASK_NTL_PALL   0xffffffff
 
#define MATCH_NTL_S1   0x400033
 
#define MASK_NTL_S1   0xffffffff
 
#define MATCH_NTL_ALL   0x500033
 
#define MASK_NTL_ALL   0xffffffff
 
#define MATCH_C_NTL_P1   0x900a
 
#define MASK_C_NTL_P1   0xffff
 
#define MATCH_C_NTL_PALL   0x900e
 
#define MASK_C_NTL_PALL   0xffff
 
#define MATCH_C_NTL_S1   0x9012
 
#define MASK_C_NTL_S1   0xffff
 
#define MATCH_C_NTL_ALL   0x9016
 
#define MASK_C_NTL_ALL   0xffff
 
#define MATCH_WRS_NTO   0x00d00073
 
#define MASK_WRS_NTO   0xffffffff
 
#define MATCH_WRS_STO   0x01d00073
 
#define MASK_WRS_STO   0xffffffff
 
#define MATCH_TH_ADDSL   0x0000100b
 
#define MASK_TH_ADDSL   0xf800707f
 
#define MATCH_TH_SRRI   0x1000100b
 
#define MASK_TH_SRRI   0xfc00707f
 
#define MATCH_TH_SRRIW   0x1400100b
 
#define MASK_TH_SRRIW   0xfe00707f
 
#define MATCH_TH_EXT   0x0000200b
 
#define MASK_TH_EXT   0x0000707f
 
#define MATCH_TH_EXTU   0x0000300b
 
#define MASK_TH_EXTU   0x0000707f
 
#define MATCH_TH_FF0   0x8400100b
 
#define MASK_TH_FF0   0xfff0707f
 
#define MATCH_TH_FF1   0x8600100b
 
#define MASK_TH_FF1   0xfff0707f
 
#define MATCH_TH_REV   0x8200100b
 
#define MASK_TH_REV   0xfff0707f
 
#define MATCH_TH_REVW   0x9000100b
 
#define MASK_TH_REVW   0xfff0707f
 
#define MATCH_TH_TSTNBZ   0x8000100b
 
#define MASK_TH_TSTNBZ   0xfff0707f
 
#define MATCH_TH_TST   0x8800100b
 
#define MASK_TH_TST   0xfc00707f
 
#define MATCH_TH_DCACHE_CALL   0x0010000b
 
#define MASK_TH_DCACHE_CALL   0xffffffff
 
#define MATCH_TH_DCACHE_CIALL   0x0030000b
 
#define MASK_TH_DCACHE_CIALL   0xffffffff
 
#define MATCH_TH_DCACHE_IALL   0x0020000b
 
#define MASK_TH_DCACHE_IALL   0xffffffff
 
#define MATCH_TH_DCACHE_CPA   0x0290000b
 
#define MASK_TH_DCACHE_CPA   0xfff07fff
 
#define MATCH_TH_DCACHE_CIPA   0x02b0000b
 
#define MASK_TH_DCACHE_CIPA   0xfff07fff
 
#define MATCH_TH_DCACHE_IPA   0x02a0000b
 
#define MASK_TH_DCACHE_IPA   0xfff07fff
 
#define MATCH_TH_DCACHE_CVA   0x0250000b
 
#define MASK_TH_DCACHE_CVA   0xfff07fff
 
#define MATCH_TH_DCACHE_CIVA   0x0270000b
 
#define MASK_TH_DCACHE_CIVA   0xfff07fff
 
#define MATCH_TH_DCACHE_IVA   0x0260000b
 
#define MASK_TH_DCACHE_IVA   0xfff07fff
 
#define MATCH_TH_DCACHE_CSW   0x0210000b
 
#define MASK_TH_DCACHE_CSW   0xfff07fff
 
#define MATCH_TH_DCACHE_CISW   0x0230000b
 
#define MASK_TH_DCACHE_CISW   0xfff07fff
 
#define MATCH_TH_DCACHE_ISW   0x0220000b
 
#define MASK_TH_DCACHE_ISW   0xfff07fff
 
#define MATCH_TH_DCACHE_CPAL1   0x0280000b
 
#define MASK_TH_DCACHE_CPAL1   0xfff07fff
 
#define MATCH_TH_DCACHE_CVAL1   0x0240000b
 
#define MASK_TH_DCACHE_CVAL1   0xfff07fff
 
#define MATCH_TH_ICACHE_IALL   0x0100000b
 
#define MASK_TH_ICACHE_IALL   0xffffffff
 
#define MATCH_TH_ICACHE_IALLS   0x0110000b
 
#define MASK_TH_ICACHE_IALLS   0xffffffff
 
#define MATCH_TH_ICACHE_IPA   0x0380000b
 
#define MASK_TH_ICACHE_IPA   0xfff07fff
 
#define MATCH_TH_ICACHE_IVA   0x0300000b
 
#define MASK_TH_ICACHE_IVA   0xfff07fff
 
#define MATCH_TH_L2CACHE_CALL   0x0150000b
 
#define MASK_TH_L2CACHE_CALL   0xffffffff
 
#define MATCH_TH_L2CACHE_CIALL   0x0170000b
 
#define MASK_TH_L2CACHE_CIALL   0xffffffff
 
#define MATCH_TH_L2CACHE_IALL   0x0160000b
 
#define MASK_TH_L2CACHE_IALL   0xffffffff
 
#define MATCH_TH_MVEQZ   0x4000100b
 
#define MASK_TH_MVEQZ   0xfe00707f
 
#define MATCH_TH_MVNEZ   0x4200100b
 
#define MASK_TH_MVNEZ   0xfe00707f
 
#define MATCH_TH_FLRD   0x6000600b
 
#define MASK_TH_FLRD   0xf800707f
 
#define MATCH_TH_FLRW   0x4000600b
 
#define MASK_TH_FLRW   0xf800707f
 
#define MATCH_TH_FLURD   0x7000600b
 
#define MASK_TH_FLURD   0xf800707f
 
#define MATCH_TH_FLURW   0x5000600b
 
#define MASK_TH_FLURW   0xf800707f
 
#define MATCH_TH_FSRD   0x6000700b
 
#define MASK_TH_FSRD   0xf800707f
 
#define MATCH_TH_FSRW   0x4000700b
 
#define MASK_TH_FSRW   0xf800707f
 
#define MATCH_TH_FSURD   0x7000700b
 
#define MASK_TH_FSURD   0xf800707f
 
#define MATCH_TH_FSURW   0x5000700b
 
#define MASK_TH_FSURW   0xf800707f
 
#define MATCH_TH_FMV_HW_X   0x5000100b
 
#define MASK_TH_FMV_HW_X   0xfff0707f
 
#define MATCH_TH_FMV_X_HW   0x6000100b
 
#define MASK_TH_FMV_X_HW   0xfff0707f
 
#define MATCH_TH_IPOP   0x0050000b
 
#define MASK_TH_IPOP   0xffffffff
 
#define MATCH_TH_IPUSH   0x0040000b
 
#define MASK_TH_IPUSH   0xffffffff
 
#define MATCH_TH_MULA   0x2000100b
 
#define MASK_TH_MULA   0xfe00707f
 
#define MATCH_TH_MULAH   0x2800100b
 
#define MASK_TH_MULAH   0xfe00707f
 
#define MATCH_TH_MULAW   0x2400100b
 
#define MASK_TH_MULAW   0xfe00707f
 
#define MATCH_TH_MULS   0x2200100b
 
#define MASK_TH_MULS   0xfe00707f
 
#define MATCH_TH_MULSH   0x2a00100b
 
#define MASK_TH_MULSH   0xfe00707f
 
#define MATCH_TH_MULSW   0x2600100b
 
#define MASK_TH_MULSW   0xfe00707f
 
#define MATCH_TH_LDD   0xf800400b
 
#define MASK_TH_LDD   0xf800707f
 
#define MATCH_TH_LWD   0xe000400b
 
#define MASK_TH_LWD   0xf800707f
 
#define MATCH_TH_LWUD   0xf000400b
 
#define MASK_TH_LWUD   0xf800707f
 
#define MATCH_TH_SDD   0xf800500b
 
#define MASK_TH_SDD   0xf800707f
 
#define MATCH_TH_SWD   0xe000500b
 
#define MASK_TH_SWD   0xf800707f
 
#define MATCH_TH_LDIA   0x7800400b
 
#define MASK_TH_LDIA   0xf800707f
 
#define MATCH_TH_LDIB   0x6800400b
 
#define MASK_TH_LDIB   0xf800707f
 
#define MATCH_TH_LWIA   0x5800400b
 
#define MASK_TH_LWIA   0xf800707f
 
#define MATCH_TH_LWIB   0x4800400b
 
#define MASK_TH_LWIB   0xf800707f
 
#define MATCH_TH_LWUIA   0xd800400b
 
#define MASK_TH_LWUIA   0xf800707f
 
#define MATCH_TH_LWUIB   0xc800400b
 
#define MASK_TH_LWUIB   0xf800707f
 
#define MATCH_TH_LHIA   0x3800400b
 
#define MASK_TH_LHIA   0xf800707f
 
#define MATCH_TH_LHIB   0x2800400b
 
#define MASK_TH_LHIB   0xf800707f
 
#define MATCH_TH_LHUIA   0xb800400b
 
#define MASK_TH_LHUIA   0xf800707f
 
#define MATCH_TH_LHUIB   0xa800400b
 
#define MASK_TH_LHUIB   0xf800707f
 
#define MATCH_TH_LBIA   0x1800400b
 
#define MASK_TH_LBIA   0xf800707f
 
#define MATCH_TH_LBIB   0x0800400b
 
#define MASK_TH_LBIB   0xf800707f
 
#define MATCH_TH_LBUIA   0x9800400b
 
#define MASK_TH_LBUIA   0xf800707f
 
#define MATCH_TH_LBUIB   0x8800400b
 
#define MASK_TH_LBUIB   0xf800707f
 
#define MATCH_TH_SDIA   0x7800500b
 
#define MASK_TH_SDIA   0xf800707f
 
#define MATCH_TH_SDIB   0x6800500b
 
#define MASK_TH_SDIB   0xf800707f
 
#define MATCH_TH_SWIA   0x5800500b
 
#define MASK_TH_SWIA   0xf800707f
 
#define MATCH_TH_SWIB   0x4800500b
 
#define MASK_TH_SWIB   0xf800707f
 
#define MATCH_TH_SHIA   0x3800500b
 
#define MASK_TH_SHIA   0xf800707f
 
#define MATCH_TH_SHIB   0x2800500b
 
#define MASK_TH_SHIB   0xf800707f
 
#define MATCH_TH_SBIA   0x1800500b
 
#define MASK_TH_SBIA   0xf800707f
 
#define MATCH_TH_SBIB   0x0800500b
 
#define MASK_TH_SBIB   0xf800707f
 
#define MATCH_TH_LRD   0x6000400b
 
#define MASK_TH_LRD   0xf800707f
 
#define MATCH_TH_LRW   0x4000400b
 
#define MASK_TH_LRW   0xf800707f
 
#define MATCH_TH_LRWU   0xc000400b
 
#define MASK_TH_LRWU   0xf800707f
 
#define MATCH_TH_LRH   0x2000400b
 
#define MASK_TH_LRH   0xf800707f
 
#define MATCH_TH_LRHU   0xa000400b
 
#define MASK_TH_LRHU   0xf800707f
 
#define MATCH_TH_LRB   0x0000400b
 
#define MASK_TH_LRB   0xf800707f
 
#define MATCH_TH_LRBU   0x8000400b
 
#define MASK_TH_LRBU   0xf800707f
 
#define MATCH_TH_SRD   0x6000500b
 
#define MASK_TH_SRD   0xf800707f
 
#define MATCH_TH_SRW   0x4000500b
 
#define MASK_TH_SRW   0xf800707f
 
#define MATCH_TH_SRH   0x2000500b
 
#define MASK_TH_SRH   0xf800707f
 
#define MATCH_TH_SRB   0x0000500b
 
#define MASK_TH_SRB   0xf800707f
 
#define MATCH_TH_LURD   0x7000400b
 
#define MASK_TH_LURD   0xf800707f
 
#define MATCH_TH_LURW   0x5000400b
 
#define MASK_TH_LURW   0xf800707f
 
#define MATCH_TH_LURWU   0xd000400b
 
#define MASK_TH_LURWU   0xf800707f
 
#define MATCH_TH_LURH   0x3000400b
 
#define MASK_TH_LURH   0xf800707f
 
#define MATCH_TH_LURHU   0xb000400b
 
#define MASK_TH_LURHU   0xf800707f
 
#define MATCH_TH_LURB   0x1000400b
 
#define MASK_TH_LURB   0xf800707f
 
#define MATCH_TH_LURBU   0x9000400b
 
#define MASK_TH_LURBU   0xf800707f
 
#define MATCH_TH_SURD   0x7000500b
 
#define MASK_TH_SURD   0xf800707f
 
#define MATCH_TH_SURW   0x5000500b
 
#define MASK_TH_SURW   0xf800707f
 
#define MATCH_TH_SURH   0x3000500b
 
#define MASK_TH_SURH   0xf800707f
 
#define MATCH_TH_SURB   0x1000500b
 
#define MASK_TH_SURB   0xf800707f
 
#define MATCH_TH_SFENCE_VMAS   0x0400000b
 
#define MASK_TH_SFENCE_VMAS   0xfe007fff
 
#define MATCH_TH_SYNC   0x0180000b
 
#define MASK_TH_SYNC   0xffffffff
 
#define MATCH_TH_SYNC_I   0x01a0000b
 
#define MASK_TH_SYNC_I   0xffffffff
 
#define MATCH_TH_SYNC_IS   0x01b0000b
 
#define MASK_TH_SYNC_IS   0xffffffff
 
#define MATCH_TH_SYNC_S   0x0190000b
 
#define MASK_TH_SYNC_S   0xffffffff
 
#define MATCH_VT_MASKC   0x607b
 
#define MASK_VT_MASKC   0xfe00707f
 
#define MATCH_VT_MASKCN   0x707b
 
#define MASK_VT_MASKCN   0xfe00707f
 
#define CSR_CYCLE   0xc00
 
#define CSR_TIME   0xc01
 
#define CSR_INSTRET   0xc02
 
#define CSR_HPMCOUNTER3   0xc03
 
#define CSR_HPMCOUNTER4   0xc04
 
#define CSR_HPMCOUNTER5   0xc05
 
#define CSR_HPMCOUNTER6   0xc06
 
#define CSR_HPMCOUNTER7   0xc07
 
#define CSR_HPMCOUNTER8   0xc08
 
#define CSR_HPMCOUNTER9   0xc09
 
#define CSR_HPMCOUNTER10   0xc0a
 
#define CSR_HPMCOUNTER11   0xc0b
 
#define CSR_HPMCOUNTER12   0xc0c
 
#define CSR_HPMCOUNTER13   0xc0d
 
#define CSR_HPMCOUNTER14   0xc0e
 
#define CSR_HPMCOUNTER15   0xc0f
 
#define CSR_HPMCOUNTER16   0xc10
 
#define CSR_HPMCOUNTER17   0xc11
 
#define CSR_HPMCOUNTER18   0xc12
 
#define CSR_HPMCOUNTER19   0xc13
 
#define CSR_HPMCOUNTER20   0xc14
 
#define CSR_HPMCOUNTER21   0xc15
 
#define CSR_HPMCOUNTER22   0xc16
 
#define CSR_HPMCOUNTER23   0xc17
 
#define CSR_HPMCOUNTER24   0xc18
 
#define CSR_HPMCOUNTER25   0xc19
 
#define CSR_HPMCOUNTER26   0xc1a
 
#define CSR_HPMCOUNTER27   0xc1b
 
#define CSR_HPMCOUNTER28   0xc1c
 
#define CSR_HPMCOUNTER29   0xc1d
 
#define CSR_HPMCOUNTER30   0xc1e
 
#define CSR_HPMCOUNTER31   0xc1f
 
#define CSR_CYCLEH   0xc80
 
#define CSR_TIMEH   0xc81
 
#define CSR_INSTRETH   0xc82
 
#define CSR_HPMCOUNTER3H   0xc83
 
#define CSR_HPMCOUNTER4H   0xc84
 
#define CSR_HPMCOUNTER5H   0xc85
 
#define CSR_HPMCOUNTER6H   0xc86
 
#define CSR_HPMCOUNTER7H   0xc87
 
#define CSR_HPMCOUNTER8H   0xc88
 
#define CSR_HPMCOUNTER9H   0xc89
 
#define CSR_HPMCOUNTER10H   0xc8a
 
#define CSR_HPMCOUNTER11H   0xc8b
 
#define CSR_HPMCOUNTER12H   0xc8c
 
#define CSR_HPMCOUNTER13H   0xc8d
 
#define CSR_HPMCOUNTER14H   0xc8e
 
#define CSR_HPMCOUNTER15H   0xc8f
 
#define CSR_HPMCOUNTER16H   0xc90
 
#define CSR_HPMCOUNTER17H   0xc91
 
#define CSR_HPMCOUNTER18H   0xc92
 
#define CSR_HPMCOUNTER19H   0xc93
 
#define CSR_HPMCOUNTER20H   0xc94
 
#define CSR_HPMCOUNTER21H   0xc95
 
#define CSR_HPMCOUNTER22H   0xc96
 
#define CSR_HPMCOUNTER23H   0xc97
 
#define CSR_HPMCOUNTER24H   0xc98
 
#define CSR_HPMCOUNTER25H   0xc99
 
#define CSR_HPMCOUNTER26H   0xc9a
 
#define CSR_HPMCOUNTER27H   0xc9b
 
#define CSR_HPMCOUNTER28H   0xc9c
 
#define CSR_HPMCOUNTER29H   0xc9d
 
#define CSR_HPMCOUNTER30H   0xc9e
 
#define CSR_HPMCOUNTER31H   0xc9f
 
#define CSR_SSTATUS   0x100
 
#define CSR_SIE   0x104
 
#define CSR_STVEC   0x105
 
#define CSR_SCOUNTEREN   0x106
 
#define CSR_SENVCFG   0x10a
 
#define CSR_SSCRATCH   0x140
 
#define CSR_SEPC   0x141
 
#define CSR_SCAUSE   0x142
 
#define CSR_STVAL   0x143
 
#define CSR_SIP   0x144
 
#define CSR_SATP   0x180
 
#define CSR_MVENDORID   0xf11
 
#define CSR_MARCHID   0xf12
 
#define CSR_MIMPID   0xf13
 
#define CSR_MHARTID   0xf14
 
#define CSR_MCONFIGPTR   0xf15
 
#define CSR_MSTATUS   0x300
 
#define CSR_MISA   0x301
 
#define CSR_MEDELEG   0x302
 
#define CSR_MIDELEG   0x303
 
#define CSR_MIE   0x304
 
#define CSR_MTVEC   0x305
 
#define CSR_MCOUNTEREN   0x306
 
#define CSR_MSTATUSH   0x310
 
#define CSR_MSCRATCH   0x340
 
#define CSR_MEPC   0x341
 
#define CSR_MCAUSE   0x342
 
#define CSR_MTVAL   0x343
 
#define CSR_MIP   0x344
 
#define CSR_MTINST   0x34a
 
#define CSR_MTVAL2   0x34b
 
#define CSR_MENVCFG   0x30a
 
#define CSR_MENVCFGH   0x31a
 
#define CSR_MSECCFG   0x747
 
#define CSR_MSECCFGH   0x757
 
#define CSR_PMPCFG0   0x3a0
 
#define CSR_PMPCFG1   0x3a1
 
#define CSR_PMPCFG2   0x3a2
 
#define CSR_PMPCFG3   0x3a3
 
#define CSR_PMPCFG4   0x3a4
 
#define CSR_PMPCFG5   0x3a5
 
#define CSR_PMPCFG6   0x3a6
 
#define CSR_PMPCFG7   0x3a7
 
#define CSR_PMPCFG8   0x3a8
 
#define CSR_PMPCFG9   0x3a9
 
#define CSR_PMPCFG10   0x3aa
 
#define CSR_PMPCFG11   0x3ab
 
#define CSR_PMPCFG12   0x3ac
 
#define CSR_PMPCFG13   0x3ad
 
#define CSR_PMPCFG14   0x3ae
 
#define CSR_PMPCFG15   0x3af
 
#define CSR_PMPADDR0   0x3b0
 
#define CSR_PMPADDR1   0x3b1
 
#define CSR_PMPADDR2   0x3b2
 
#define CSR_PMPADDR3   0x3b3
 
#define CSR_PMPADDR4   0x3b4
 
#define CSR_PMPADDR5   0x3b5
 
#define CSR_PMPADDR6   0x3b6
 
#define CSR_PMPADDR7   0x3b7
 
#define CSR_PMPADDR8   0x3b8
 
#define CSR_PMPADDR9   0x3b9
 
#define CSR_PMPADDR10   0x3ba
 
#define CSR_PMPADDR11   0x3bb
 
#define CSR_PMPADDR12   0x3bc
 
#define CSR_PMPADDR13   0x3bd
 
#define CSR_PMPADDR14   0x3be
 
#define CSR_PMPADDR15   0x3bf
 
#define CSR_PMPADDR16   0x3c0
 
#define CSR_PMPADDR17   0x3c1
 
#define CSR_PMPADDR18   0x3c2
 
#define CSR_PMPADDR19   0x3c3
 
#define CSR_PMPADDR20   0x3c4
 
#define CSR_PMPADDR21   0x3c5
 
#define CSR_PMPADDR22   0x3c6
 
#define CSR_PMPADDR23   0x3c7
 
#define CSR_PMPADDR24   0x3c8
 
#define CSR_PMPADDR25   0x3c9
 
#define CSR_PMPADDR26   0x3ca
 
#define CSR_PMPADDR27   0x3cb
 
#define CSR_PMPADDR28   0x3cc
 
#define CSR_PMPADDR29   0x3cd
 
#define CSR_PMPADDR30   0x3ce
 
#define CSR_PMPADDR31   0x3cf
 
#define CSR_PMPADDR32   0x3d0
 
#define CSR_PMPADDR33   0x3d1
 
#define CSR_PMPADDR34   0x3d2
 
#define CSR_PMPADDR35   0x3d3
 
#define CSR_PMPADDR36   0x3d4
 
#define CSR_PMPADDR37   0x3d5
 
#define CSR_PMPADDR38   0x3d6
 
#define CSR_PMPADDR39   0x3d7
 
#define CSR_PMPADDR40   0x3d8
 
#define CSR_PMPADDR41   0x3d9
 
#define CSR_PMPADDR42   0x3da
 
#define CSR_PMPADDR43   0x3db
 
#define CSR_PMPADDR44   0x3dc
 
#define CSR_PMPADDR45   0x3dd
 
#define CSR_PMPADDR46   0x3de
 
#define CSR_PMPADDR47   0x3df
 
#define CSR_PMPADDR48   0x3e0
 
#define CSR_PMPADDR49   0x3e1
 
#define CSR_PMPADDR50   0x3e2
 
#define CSR_PMPADDR51   0x3e3
 
#define CSR_PMPADDR52   0x3e4
 
#define CSR_PMPADDR53   0x3e5
 
#define CSR_PMPADDR54   0x3e6
 
#define CSR_PMPADDR55   0x3e7
 
#define CSR_PMPADDR56   0x3e8
 
#define CSR_PMPADDR57   0x3e9
 
#define CSR_PMPADDR58   0x3ea
 
#define CSR_PMPADDR59   0x3eb
 
#define CSR_PMPADDR60   0x3ec
 
#define CSR_PMPADDR61   0x3ed
 
#define CSR_PMPADDR62   0x3ee
 
#define CSR_PMPADDR63   0x3ef
 
#define CSR_MCYCLE   0xb00
 
#define CSR_MINSTRET   0xb02
 
#define CSR_MHPMCOUNTER3   0xb03
 
#define CSR_MHPMCOUNTER4   0xb04
 
#define CSR_MHPMCOUNTER5   0xb05
 
#define CSR_MHPMCOUNTER6   0xb06
 
#define CSR_MHPMCOUNTER7   0xb07
 
#define CSR_MHPMCOUNTER8   0xb08
 
#define CSR_MHPMCOUNTER9   0xb09
 
#define CSR_MHPMCOUNTER10   0xb0a
 
#define CSR_MHPMCOUNTER11   0xb0b
 
#define CSR_MHPMCOUNTER12   0xb0c
 
#define CSR_MHPMCOUNTER13   0xb0d
 
#define CSR_MHPMCOUNTER14   0xb0e
 
#define CSR_MHPMCOUNTER15   0xb0f
 
#define CSR_MHPMCOUNTER16   0xb10
 
#define CSR_MHPMCOUNTER17   0xb11
 
#define CSR_MHPMCOUNTER18   0xb12
 
#define CSR_MHPMCOUNTER19   0xb13
 
#define CSR_MHPMCOUNTER20   0xb14
 
#define CSR_MHPMCOUNTER21   0xb15
 
#define CSR_MHPMCOUNTER22   0xb16
 
#define CSR_MHPMCOUNTER23   0xb17
 
#define CSR_MHPMCOUNTER24   0xb18
 
#define CSR_MHPMCOUNTER25   0xb19
 
#define CSR_MHPMCOUNTER26   0xb1a
 
#define CSR_MHPMCOUNTER27   0xb1b
 
#define CSR_MHPMCOUNTER28   0xb1c
 
#define CSR_MHPMCOUNTER29   0xb1d
 
#define CSR_MHPMCOUNTER30   0xb1e
 
#define CSR_MHPMCOUNTER31   0xb1f
 
#define CSR_MCYCLEH   0xb80
 
#define CSR_MINSTRETH   0xb82
 
#define CSR_MHPMCOUNTER3H   0xb83
 
#define CSR_MHPMCOUNTER4H   0xb84
 
#define CSR_MHPMCOUNTER5H   0xb85
 
#define CSR_MHPMCOUNTER6H   0xb86
 
#define CSR_MHPMCOUNTER7H   0xb87
 
#define CSR_MHPMCOUNTER8H   0xb88
 
#define CSR_MHPMCOUNTER9H   0xb89
 
#define CSR_MHPMCOUNTER10H   0xb8a
 
#define CSR_MHPMCOUNTER11H   0xb8b
 
#define CSR_MHPMCOUNTER12H   0xb8c
 
#define CSR_MHPMCOUNTER13H   0xb8d
 
#define CSR_MHPMCOUNTER14H   0xb8e
 
#define CSR_MHPMCOUNTER15H   0xb8f
 
#define CSR_MHPMCOUNTER16H   0xb90
 
#define CSR_MHPMCOUNTER17H   0xb91
 
#define CSR_MHPMCOUNTER18H   0xb92
 
#define CSR_MHPMCOUNTER19H   0xb93
 
#define CSR_MHPMCOUNTER20H   0xb94
 
#define CSR_MHPMCOUNTER21H   0xb95
 
#define CSR_MHPMCOUNTER22H   0xb96
 
#define CSR_MHPMCOUNTER23H   0xb97
 
#define CSR_MHPMCOUNTER24H   0xb98
 
#define CSR_MHPMCOUNTER25H   0xb99
 
#define CSR_MHPMCOUNTER26H   0xb9a
 
#define CSR_MHPMCOUNTER27H   0xb9b
 
#define CSR_MHPMCOUNTER28H   0xb9c
 
#define CSR_MHPMCOUNTER29H   0xb9d
 
#define CSR_MHPMCOUNTER30H   0xb9e
 
#define CSR_MHPMCOUNTER31H   0xb9f
 
#define CSR_MCOUNTINHIBIT   0x320
 
#define CSR_MHPMEVENT3   0x323
 
#define CSR_MHPMEVENT4   0x324
 
#define CSR_MHPMEVENT5   0x325
 
#define CSR_MHPMEVENT6   0x326
 
#define CSR_MHPMEVENT7   0x327
 
#define CSR_MHPMEVENT8   0x328
 
#define CSR_MHPMEVENT9   0x329
 
#define CSR_MHPMEVENT10   0x32a
 
#define CSR_MHPMEVENT11   0x32b
 
#define CSR_MHPMEVENT12   0x32c
 
#define CSR_MHPMEVENT13   0x32d
 
#define CSR_MHPMEVENT14   0x32e
 
#define CSR_MHPMEVENT15   0x32f
 
#define CSR_MHPMEVENT16   0x330
 
#define CSR_MHPMEVENT17   0x331
 
#define CSR_MHPMEVENT18   0x332
 
#define CSR_MHPMEVENT19   0x333
 
#define CSR_MHPMEVENT20   0x334
 
#define CSR_MHPMEVENT21   0x335
 
#define CSR_MHPMEVENT22   0x336
 
#define CSR_MHPMEVENT23   0x337
 
#define CSR_MHPMEVENT24   0x338
 
#define CSR_MHPMEVENT25   0x339
 
#define CSR_MHPMEVENT26   0x33a
 
#define CSR_MHPMEVENT27   0x33b
 
#define CSR_MHPMEVENT28   0x33c
 
#define CSR_MHPMEVENT29   0x33d
 
#define CSR_MHPMEVENT30   0x33e
 
#define CSR_MHPMEVENT31   0x33f
 
#define CSR_HSTATUS   0x600
 
#define CSR_HEDELEG   0x602
 
#define CSR_HIDELEG   0x603
 
#define CSR_HIE   0x604
 
#define CSR_HCOUNTEREN   0x606
 
#define CSR_HGEIE   0x607
 
#define CSR_HTVAL   0x643
 
#define CSR_HIP   0x644
 
#define CSR_HVIP   0x645
 
#define CSR_HTINST   0x64a
 
#define CSR_HGEIP   0xe12
 
#define CSR_HENVCFG   0x60a
 
#define CSR_HENVCFGH   0x61a
 
#define CSR_HGATP   0x680
 
#define CSR_HTIMEDELTA   0x605
 
#define CSR_HTIMEDELTAH   0x615
 
#define CSR_VSSTATUS   0x200
 
#define CSR_VSIE   0x204
 
#define CSR_VSTVEC   0x205
 
#define CSR_VSSCRATCH   0x240
 
#define CSR_VSEPC   0x241
 
#define CSR_VSCAUSE   0x242
 
#define CSR_VSTVAL   0x243
 
#define CSR_VSIP   0x244
 
#define CSR_VSATP   0x280
 
#define CSR_MBASE   0x380
 
#define CSR_MBOUND   0x381
 
#define CSR_MIBASE   0x382
 
#define CSR_MIBOUND   0x383
 
#define CSR_MDBASE   0x384
 
#define CSR_MDBOUND   0x385
 
#define CSR_USTATUS   0x0
 
#define CSR_UIE   0x4
 
#define CSR_UTVEC   0x5
 
#define CSR_USCRATCH   0x40
 
#define CSR_UEPC   0x41
 
#define CSR_UCAUSE   0x42
 
#define CSR_UTVAL   0x43
 
#define CSR_UIP   0x44
 
#define CSR_SEDELEG   0x102
 
#define CSR_SIDELEG   0x103
 
#define CSR_MISELECT   0x350
 
#define CSR_MIREG   0x351
 
#define CSR_MTOPEI   0x35c
 
#define CSR_MTOPI   0xfb0
 
#define CSR_MVIEN   0x308
 
#define CSR_MVIP   0x309
 
#define CSR_MIDELEGH   0x313
 
#define CSR_MIEH   0x314
 
#define CSR_MVIENH   0x318
 
#define CSR_MVIPH   0x319
 
#define CSR_MIPH   0x354
 
#define CSR_MCYCLECFG   0x321
 
#define CSR_MINSTRETCFG   0x322
 
#define CSR_MCYCLECFGH   0x721
 
#define CSR_MINSTRETCFGH   0x722
 
#define CSR_MSTATEEN0   0x30c
 
#define CSR_MSTATEEN1   0x30d
 
#define CSR_MSTATEEN2   0x30e
 
#define CSR_MSTATEEN3   0x30f
 
#define CSR_SSTATEEN0   0x10c
 
#define CSR_SSTATEEN1   0x10d
 
#define CSR_SSTATEEN2   0x10e
 
#define CSR_SSTATEEN3   0x10f
 
#define CSR_HSTATEEN0   0x60c
 
#define CSR_HSTATEEN1   0x60d
 
#define CSR_HSTATEEN2   0x60e
 
#define CSR_HSTATEEN3   0x60f
 
#define CSR_MSTATEEN0H   0x31c
 
#define CSR_MSTATEEN1H   0x31d
 
#define CSR_MSTATEEN2H   0x31e
 
#define CSR_MSTATEEN3H   0x31f
 
#define CSR_HSTATEEN0H   0x61c
 
#define CSR_HSTATEEN1H   0x61d
 
#define CSR_HSTATEEN2H   0x61e
 
#define CSR_HSTATEEN3H   0x61f
 
#define CSR_SISELECT   0x150
 
#define CSR_SIREG   0x151
 
#define CSR_STOPEI   0x15c
 
#define CSR_STOPI   0xdb0
 
#define CSR_SIEH   0x114
 
#define CSR_SIPH   0x154
 
#define CSR_HVIEN   0x608
 
#define CSR_HVICTL   0x609
 
#define CSR_HVIPRIO1   0x646
 
#define CSR_HVIPRIO2   0x647
 
#define CSR_VSISELECT   0x250
 
#define CSR_VSIREG   0x251
 
#define CSR_VSTOPEI   0x25c
 
#define CSR_VSTOPI   0xeb0
 
#define CSR_HIDELEGH   0x613
 
#define CSR_HVIENH   0x618
 
#define CSR_HVIPH   0x655
 
#define CSR_HVIPRIO1H   0x656
 
#define CSR_HVIPRIO2H   0x657
 
#define CSR_VSIEH   0x214
 
#define CSR_VSIPH   0x254
 
#define CSR_SCOUNTOVF   0xda0
 
#define CSR_MHPMEVENT3H   0x723
 
#define CSR_MHPMEVENT4H   0x724
 
#define CSR_MHPMEVENT5H   0x725
 
#define CSR_MHPMEVENT6H   0x726
 
#define CSR_MHPMEVENT7H   0x727
 
#define CSR_MHPMEVENT8H   0x728
 
#define CSR_MHPMEVENT9H   0x729
 
#define CSR_MHPMEVENT10H   0x72a
 
#define CSR_MHPMEVENT11H   0x72b
 
#define CSR_MHPMEVENT12H   0x72c
 
#define CSR_MHPMEVENT13H   0x72d
 
#define CSR_MHPMEVENT14H   0x72e
 
#define CSR_MHPMEVENT15H   0x72f
 
#define CSR_MHPMEVENT16H   0x730
 
#define CSR_MHPMEVENT17H   0x731
 
#define CSR_MHPMEVENT18H   0x732
 
#define CSR_MHPMEVENT19H   0x733
 
#define CSR_MHPMEVENT20H   0x734
 
#define CSR_MHPMEVENT21H   0x735
 
#define CSR_MHPMEVENT22H   0x736
 
#define CSR_MHPMEVENT23H   0x737
 
#define CSR_MHPMEVENT24H   0x738
 
#define CSR_MHPMEVENT25H   0x739
 
#define CSR_MHPMEVENT26H   0x73a
 
#define CSR_MHPMEVENT27H   0x73b
 
#define CSR_MHPMEVENT28H   0x73c
 
#define CSR_MHPMEVENT29H   0x73d
 
#define CSR_MHPMEVENT30H   0x73e
 
#define CSR_MHPMEVENT31H   0x73f
 
#define CSR_STIMECMP   0x14d
 
#define CSR_STIMECMPH   0x15d
 
#define CSR_VSTIMECMP   0x24d
 
#define CSR_VSTIMECMPH   0x25d
 
#define CSR_FFLAGS   0x1
 
#define CSR_FRM   0x2
 
#define CSR_FCSR   0x3
 
#define CSR_DCSR   0x7b0
 
#define CSR_DPC   0x7b1
 
#define CSR_DSCRATCH0   0x7b2
 
#define CSR_DSCRATCH1   0x7b3
 
#define CSR_TSELECT   0x7a0
 
#define CSR_TDATA1   0x7a1
 
#define CSR_TDATA2   0x7a2
 
#define CSR_TDATA3   0x7a3
 
#define CSR_TINFO   0x7a4
 
#define CSR_TCONTROL   0x7a5
 
#define CSR_HCONTEXT   0x6a8
 
#define CSR_SCONTEXT   0x5a8
 
#define CSR_MCONTEXT   0x7a8
 
#define CSR_MSCONTEXT   0x7aa
 
#define CSR_SEED   0x015
 
#define CSR_VSTART   0x008
 
#define CSR_VXSAT   0x009
 
#define CSR_VXRM   0x00a
 
#define CSR_VCSR   0x00f
 
#define CSR_VL   0xc20
 
#define CSR_VTYPE   0xc21
 
#define CSR_VLENB   0xc22
 
#define DECLARE_CSR(name, num, class, define_ver, abort_ver)
 

Functions

static struct valuevalue_of_riscv_user_reg (frame_info_ptr frame, const void *baton)
 
static void show_use_compressed_breakpoints (struct ui_file *file, int from_tty, struct cmd_list_element *c, const char *value)
 
static void show_riscv_debug_variable (struct ui_file *file, int from_tty, struct cmd_list_element *c, const char *value)
 
int riscv_isa_xlen (struct gdbarch *gdbarch)
 
int riscv_abi_xlen (struct gdbarch *gdbarch)
 
int riscv_isa_flen (struct gdbarch *gdbarch)
 
int riscv_abi_flen (struct gdbarch *gdbarch)
 
bool riscv_abi_embedded (struct gdbarch *gdbarch)
 
static bool riscv_has_fp_regs (struct gdbarch *gdbarch)
 
static bool riscv_has_fp_abi (struct gdbarch *gdbarch)
 
static bool riscv_is_fp_regno_p (int regno)
 
static int riscv_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
 
static const gdb_byte * riscv_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size)
 
static const char * riscv_register_name (struct gdbarch *gdbarch, int regnum)
 
static enum register_status riscv_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache, int regnum, gdb_byte *buf)
 
static void riscv_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, int regnum, const gdb_byte *buf)
 
static int riscv_cannot_store_register (struct gdbarch *gdbarch, int regnum)
 
static struct typeriscv_fpreg_d_type (struct gdbarch *gdbarch)
 
static struct typeriscv_register_type (struct gdbarch *gdbarch, int regnum)
 
static void riscv_print_one_register_info (struct gdbarch *gdbarch, struct ui_file *file, frame_info_ptr frame, int regnum)
 
static bool riscv_is_regnum_a_named_csr (int regnum)
 
static bool riscv_is_unknown_csr (struct gdbarch *gdbarch, int regnum)
 
static int riscv_register_reggroup_p (struct gdbarch *gdbarch, int regnum, const struct reggroup *reggroup)
 
static const char * riscv_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
 
static struct typeriscv_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
 
static int riscv_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum, const struct reggroup *reggroup)
 
static void riscv_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file, frame_info_ptr frame, int regnum, int print_all)
 
static bool is_insn_load_of_fp_from_sp (const struct riscv_insn &insn)
 
static bool is_insn_addi_of_sp_to_sp (const struct riscv_insn &insn)
 
static bool previous_insn_is_load_fp_from_stack (struct gdbarch *gdbarch, CORE_ADDR pc)
 
static bool previous_insn_is_add_imm_to_sp (struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR *prev_pc)
 
static bool riscv_detect_end_of_function (struct gdbarch *gdbarch, CORE_ADDR pc, int *offset)
 
static CORE_ADDR riscv_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc, CORE_ADDR end_pc, struct riscv_unwind_cache *cache)
 
static CORE_ADDR riscv_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
 
static CORE_ADDR riscv_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp, CORE_ADDR funaddr, struct value **args, int nargs, struct type *value_type, CORE_ADDR *real_pc, CORE_ADDR *bp_addr, struct regcache *regcache)
 
static ULONGEST riscv_type_align (gdbarch *gdbarch, type *type)
 
static int riscv_arg_regs_available (struct riscv_arg_reg *reg)
 
static bool riscv_assign_reg_location (struct riscv_arg_info::location *loc, struct riscv_arg_reg *reg, int length, int offset)
 
static void riscv_assign_stack_location (struct riscv_arg_info::location *loc, struct riscv_memory_offsets *memory, int length, int align)
 
static void riscv_call_arg_scalar_int (struct riscv_arg_info *ainfo, struct riscv_call_info *cinfo)
 
static void riscv_call_arg_scalar_float (struct riscv_arg_info *ainfo, struct riscv_call_info *cinfo)
 
static void riscv_call_arg_complex_float (struct riscv_arg_info *ainfo, struct riscv_call_info *cinfo)
 
static void riscv_call_arg_struct (struct riscv_arg_info *ainfo, struct riscv_call_info *cinfo)
 
static void riscv_arg_location (struct gdbarch *gdbarch, struct riscv_arg_info *ainfo, struct riscv_call_info *cinfo, struct type *type, bool is_unnamed)
 
static void riscv_print_arg_location (ui_file *stream, struct gdbarch *gdbarch, struct riscv_arg_info *info, CORE_ADDR sp_refs, CORE_ADDR sp_args)
 
static void riscv_regcache_cooked_write (int regnum, const gdb_byte *data, int len, struct regcache *regcache, int flen)
 
static CORE_ADDR riscv_push_dummy_call (struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
 
static enum return_value_convention riscv_return_value (struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, struct value **read_value, const gdb_byte *writebuf)
 
static CORE_ADDR riscv_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
 
static struct riscv_unwind_cacheriscv_frame_cache (frame_info_ptr this_frame, void **this_cache)
 
static void riscv_frame_this_id (frame_info_ptr this_frame, void **prologue_cache, struct frame_id *this_id)
 
static struct valueriscv_frame_prev_register (frame_info_ptr this_frame, void **prologue_cache, int regnum)
 
static struct riscv_gdbarch_features riscv_features_from_bfd (const bfd *abfd)
 
static const struct target_descriscv_find_default_target_description (const struct gdbarch_info info)
 
static void riscv_add_reggroups (struct gdbarch *gdbarch)
 
static int riscv_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
 
static std::string riscv_gcc_target_options (struct gdbarch *gdbarch)
 
static int riscv_tdesc_unknown_reg (struct gdbarch *gdbarch, tdesc_feature *feature, const char *reg_name, int possible_regnum)
 
static const char * riscv_gnu_triplet_regexp (struct gdbarch *gdbarch)
 
static int riscv_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
 
static struct gdbarchriscv_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 
static CORE_ADDR riscv_next_pc (struct regcache *regcache, CORE_ADDR pc)
 
static bool riscv_next_pc_atomic_sequence (struct regcache *regcache, CORE_ADDR pc, CORE_ADDR *next_pc)
 
std::vector< CORE_ADDR > riscv_software_single_step (struct regcache *regcache)
 
static void riscv_init_reggroups ()
 
void riscv_supply_regset (const struct regset *regset, struct regcache *regcache, int regnum, const void *regs, size_t len)
 
void _initialize_riscv_tdep ()
 

Variables

static bool riscv_debug_breakpoints = false
 
static bool riscv_debug_infcall = false
 
static bool riscv_debug_unwinder = false
 
static bool riscv_debug_gdbarch = false
 
const char * riscv_feature_name_csr = "org.gnu.gdb.riscv.csr"
 
static const char * riscv_feature_name_cpu = "org.gnu.gdb.riscv.cpu"
 
static const char * riscv_feature_name_fpu = "org.gnu.gdb.riscv.fpu"
 
static const char * riscv_feature_name_virtual = "org.gnu.gdb.riscv.virtual"
 
static const char * riscv_feature_name_vector = "org.gnu.gdb.riscv.vector"
 
static char * riscv_disassembler_options
 
static const reggroupcsr_reggroup = nullptr
 
static const struct riscv_xreg_feature riscv_xreg_feature
 
static const struct riscv_freg_feature riscv_freg_feature
 
static const struct riscv_virtual_feature riscv_virtual_feature
 
static const struct riscv_csr_feature riscv_csr_feature
 
static const struct riscv_vector_feature riscv_vector_feature
 
static enum auto_boolean use_compressed_breakpoints
 
static struct cmd_list_elementsetriscvcmdlist = NULL
 
static struct cmd_list_elementshowriscvcmdlist = NULL
 
static struct cmd_list_elementsetdebugriscvcmdlist = NULL
 
static struct cmd_list_elementshowdebugriscvcmdlist = NULL
 
static const struct frame_unwind riscv_frame_unwind
 
static const char *const stap_register_indirection_prefixes []
 
static const char *const stap_register_indirection_suffixes []
 

Macro Definition Documentation

◆ BIGGEST_ALIGNMENT

#define BIGGEST_ALIGNMENT   16

Definition at line 65 of file riscv-tdep.c.

Referenced by riscv_type_align().

◆ CSR_CYCLE

#define CSR_CYCLE   0xc00

◆ CSR_CYCLEH

#define CSR_CYCLEH   0xc80

◆ CSR_DCSR

#define CSR_DCSR   0x7b0

◆ CSR_DPC

#define CSR_DPC   0x7b1

◆ CSR_DSCRATCH0

#define CSR_DSCRATCH0   0x7b2

◆ CSR_DSCRATCH1

#define CSR_DSCRATCH1   0x7b3

◆ CSR_FCSR

#define CSR_FCSR   0x3

◆ CSR_FFLAGS

#define CSR_FFLAGS   0x1

◆ CSR_FRM

#define CSR_FRM   0x2

◆ CSR_HCONTEXT

#define CSR_HCONTEXT   0x6a8

◆ CSR_HCOUNTEREN

#define CSR_HCOUNTEREN   0x606

◆ CSR_HEDELEG

#define CSR_HEDELEG   0x602

◆ CSR_HENVCFG

#define CSR_HENVCFG   0x60a

◆ CSR_HENVCFGH

#define CSR_HENVCFGH   0x61a

◆ CSR_HGATP

#define CSR_HGATP   0x680

◆ CSR_HGEIE

#define CSR_HGEIE   0x607

◆ CSR_HGEIP

#define CSR_HGEIP   0xe12

◆ CSR_HIDELEG

#define CSR_HIDELEG   0x603

◆ CSR_HIDELEGH

#define CSR_HIDELEGH   0x613

◆ CSR_HIE

#define CSR_HIE   0x604

◆ CSR_HIP

#define CSR_HIP   0x644

◆ CSR_HPMCOUNTER10

#define CSR_HPMCOUNTER10   0xc0a

◆ CSR_HPMCOUNTER10H

#define CSR_HPMCOUNTER10H   0xc8a

◆ CSR_HPMCOUNTER11

#define CSR_HPMCOUNTER11   0xc0b

◆ CSR_HPMCOUNTER11H

#define CSR_HPMCOUNTER11H   0xc8b

◆ CSR_HPMCOUNTER12

#define CSR_HPMCOUNTER12   0xc0c

◆ CSR_HPMCOUNTER12H

#define CSR_HPMCOUNTER12H   0xc8c

◆ CSR_HPMCOUNTER13

#define CSR_HPMCOUNTER13   0xc0d

◆ CSR_HPMCOUNTER13H

#define CSR_HPMCOUNTER13H   0xc8d

◆ CSR_HPMCOUNTER14

#define CSR_HPMCOUNTER14   0xc0e

◆ CSR_HPMCOUNTER14H

#define CSR_HPMCOUNTER14H   0xc8e

◆ CSR_HPMCOUNTER15

#define CSR_HPMCOUNTER15   0xc0f

◆ CSR_HPMCOUNTER15H

#define CSR_HPMCOUNTER15H   0xc8f

◆ CSR_HPMCOUNTER16

#define CSR_HPMCOUNTER16   0xc10

◆ CSR_HPMCOUNTER16H

#define CSR_HPMCOUNTER16H   0xc90

◆ CSR_HPMCOUNTER17

#define CSR_HPMCOUNTER17   0xc11

◆ CSR_HPMCOUNTER17H

#define CSR_HPMCOUNTER17H   0xc91

◆ CSR_HPMCOUNTER18

#define CSR_HPMCOUNTER18   0xc12

◆ CSR_HPMCOUNTER18H

#define CSR_HPMCOUNTER18H   0xc92

◆ CSR_HPMCOUNTER19

#define CSR_HPMCOUNTER19   0xc13

◆ CSR_HPMCOUNTER19H

#define CSR_HPMCOUNTER19H   0xc93

◆ CSR_HPMCOUNTER20

#define CSR_HPMCOUNTER20   0xc14

◆ CSR_HPMCOUNTER20H

#define CSR_HPMCOUNTER20H   0xc94

◆ CSR_HPMCOUNTER21

#define CSR_HPMCOUNTER21   0xc15

◆ CSR_HPMCOUNTER21H

#define CSR_HPMCOUNTER21H   0xc95

◆ CSR_HPMCOUNTER22

#define CSR_HPMCOUNTER22   0xc16

◆ CSR_HPMCOUNTER22H

#define CSR_HPMCOUNTER22H   0xc96

◆ CSR_HPMCOUNTER23

#define CSR_HPMCOUNTER23   0xc17

◆ CSR_HPMCOUNTER23H

#define CSR_HPMCOUNTER23H   0xc97

◆ CSR_HPMCOUNTER24

#define CSR_HPMCOUNTER24   0xc18

◆ CSR_HPMCOUNTER24H

#define CSR_HPMCOUNTER24H   0xc98

◆ CSR_HPMCOUNTER25

#define CSR_HPMCOUNTER25   0xc19

◆ CSR_HPMCOUNTER25H

#define CSR_HPMCOUNTER25H   0xc99

◆ CSR_HPMCOUNTER26

#define CSR_HPMCOUNTER26   0xc1a

◆ CSR_HPMCOUNTER26H

#define CSR_HPMCOUNTER26H   0xc9a

◆ CSR_HPMCOUNTER27

#define CSR_HPMCOUNTER27   0xc1b

◆ CSR_HPMCOUNTER27H

#define CSR_HPMCOUNTER27H   0xc9b

◆ CSR_HPMCOUNTER28

#define CSR_HPMCOUNTER28   0xc1c

◆ CSR_HPMCOUNTER28H

#define CSR_HPMCOUNTER28H   0xc9c

◆ CSR_HPMCOUNTER29

#define CSR_HPMCOUNTER29   0xc1d

◆ CSR_HPMCOUNTER29H

#define CSR_HPMCOUNTER29H   0xc9d

◆ CSR_HPMCOUNTER3

#define CSR_HPMCOUNTER3   0xc03

◆ CSR_HPMCOUNTER30

#define CSR_HPMCOUNTER30   0xc1e

◆ CSR_HPMCOUNTER30H

#define CSR_HPMCOUNTER30H   0xc9e

◆ CSR_HPMCOUNTER31

#define CSR_HPMCOUNTER31   0xc1f

◆ CSR_HPMCOUNTER31H

#define CSR_HPMCOUNTER31H   0xc9f

◆ CSR_HPMCOUNTER3H

#define CSR_HPMCOUNTER3H   0xc83

◆ CSR_HPMCOUNTER4

#define CSR_HPMCOUNTER4   0xc04

◆ CSR_HPMCOUNTER4H

#define CSR_HPMCOUNTER4H   0xc84

◆ CSR_HPMCOUNTER5

#define CSR_HPMCOUNTER5   0xc05

◆ CSR_HPMCOUNTER5H

#define CSR_HPMCOUNTER5H   0xc85

◆ CSR_HPMCOUNTER6

#define CSR_HPMCOUNTER6   0xc06

◆ CSR_HPMCOUNTER6H

#define CSR_HPMCOUNTER6H   0xc86

◆ CSR_HPMCOUNTER7

#define CSR_HPMCOUNTER7   0xc07

◆ CSR_HPMCOUNTER7H

#define CSR_HPMCOUNTER7H   0xc87

◆ CSR_HPMCOUNTER8

#define CSR_HPMCOUNTER8   0xc08

◆ CSR_HPMCOUNTER8H

#define CSR_HPMCOUNTER8H   0xc88

◆ CSR_HPMCOUNTER9

#define CSR_HPMCOUNTER9   0xc09

◆ CSR_HPMCOUNTER9H

#define CSR_HPMCOUNTER9H   0xc89

◆ CSR_HSTATEEN0

#define CSR_HSTATEEN0   0x60c

◆ CSR_HSTATEEN0H

#define CSR_HSTATEEN0H   0x61c

◆ CSR_HSTATEEN1

#define CSR_HSTATEEN1   0x60d

◆ CSR_HSTATEEN1H

#define CSR_HSTATEEN1H   0x61d

◆ CSR_HSTATEEN2

#define CSR_HSTATEEN2   0x60e

◆ CSR_HSTATEEN2H

#define CSR_HSTATEEN2H   0x61e

◆ CSR_HSTATEEN3

#define CSR_HSTATEEN3   0x60f

◆ CSR_HSTATEEN3H

#define CSR_HSTATEEN3H   0x61f

◆ CSR_HSTATUS

#define CSR_HSTATUS   0x600

◆ CSR_HTIMEDELTA

#define CSR_HTIMEDELTA   0x605

◆ CSR_HTIMEDELTAH

#define CSR_HTIMEDELTAH   0x615

◆ CSR_HTINST

#define CSR_HTINST   0x64a

◆ CSR_HTVAL

#define CSR_HTVAL   0x643

◆ CSR_HVICTL

#define CSR_HVICTL   0x609

◆ CSR_HVIEN

#define CSR_HVIEN   0x608

◆ CSR_HVIENH

#define CSR_HVIENH   0x618

◆ CSR_HVIP

#define CSR_HVIP   0x645

◆ CSR_HVIPH

#define CSR_HVIPH   0x655

◆ CSR_HVIPRIO1

#define CSR_HVIPRIO1   0x646

◆ CSR_HVIPRIO1H

#define CSR_HVIPRIO1H   0x656

◆ CSR_HVIPRIO2

#define CSR_HVIPRIO2   0x647

◆ CSR_HVIPRIO2H

#define CSR_HVIPRIO2H   0x657

◆ CSR_INSTRET

#define CSR_INSTRET   0xc02

◆ CSR_INSTRETH

#define CSR_INSTRETH   0xc82

◆ CSR_MARCHID

#define CSR_MARCHID   0xf12

◆ CSR_MBASE

#define CSR_MBASE   0x380

◆ CSR_MBOUND

#define CSR_MBOUND   0x381

◆ CSR_MCAUSE

#define CSR_MCAUSE   0x342

◆ CSR_MCONFIGPTR

#define CSR_MCONFIGPTR   0xf15

◆ CSR_MCONTEXT

#define CSR_MCONTEXT   0x7a8

◆ CSR_MCOUNTEREN

#define CSR_MCOUNTEREN   0x306

◆ CSR_MCOUNTINHIBIT

#define CSR_MCOUNTINHIBIT   0x320

◆ CSR_MCYCLE

#define CSR_MCYCLE   0xb00

◆ CSR_MCYCLECFG

#define CSR_MCYCLECFG   0x321

◆ CSR_MCYCLECFGH

#define CSR_MCYCLECFGH   0x721

◆ CSR_MCYCLEH

#define CSR_MCYCLEH   0xb80

◆ CSR_MDBASE

#define CSR_MDBASE   0x384

◆ CSR_MDBOUND

#define CSR_MDBOUND   0x385

◆ CSR_MEDELEG

#define CSR_MEDELEG   0x302

◆ CSR_MENVCFG

#define CSR_MENVCFG   0x30a

◆ CSR_MENVCFGH

#define CSR_MENVCFGH   0x31a

◆ CSR_MEPC

#define CSR_MEPC   0x341

◆ CSR_MHARTID

#define CSR_MHARTID   0xf14

◆ CSR_MHPMCOUNTER10

#define CSR_MHPMCOUNTER10   0xb0a

◆ CSR_MHPMCOUNTER10H

#define CSR_MHPMCOUNTER10H   0xb8a

◆ CSR_MHPMCOUNTER11

#define CSR_MHPMCOUNTER11   0xb0b

◆ CSR_MHPMCOUNTER11H

#define CSR_MHPMCOUNTER11H   0xb8b

◆ CSR_MHPMCOUNTER12

#define CSR_MHPMCOUNTER12   0xb0c

◆ CSR_MHPMCOUNTER12H

#define CSR_MHPMCOUNTER12H   0xb8c

◆ CSR_MHPMCOUNTER13

#define CSR_MHPMCOUNTER13   0xb0d

◆ CSR_MHPMCOUNTER13H

#define CSR_MHPMCOUNTER13H   0xb8d

◆ CSR_MHPMCOUNTER14

#define CSR_MHPMCOUNTER14   0xb0e

◆ CSR_MHPMCOUNTER14H

#define CSR_MHPMCOUNTER14H   0xb8e

◆ CSR_MHPMCOUNTER15

#define CSR_MHPMCOUNTER15   0xb0f

◆ CSR_MHPMCOUNTER15H

#define CSR_MHPMCOUNTER15H   0xb8f

◆ CSR_MHPMCOUNTER16

#define CSR_MHPMCOUNTER16   0xb10

◆ CSR_MHPMCOUNTER16H

#define CSR_MHPMCOUNTER16H   0xb90

◆ CSR_MHPMCOUNTER17

#define CSR_MHPMCOUNTER17   0xb11

◆ CSR_MHPMCOUNTER17H

#define CSR_MHPMCOUNTER17H   0xb91

◆ CSR_MHPMCOUNTER18

#define CSR_MHPMCOUNTER18   0xb12

◆ CSR_MHPMCOUNTER18H

#define CSR_MHPMCOUNTER18H   0xb92

◆ CSR_MHPMCOUNTER19

#define CSR_MHPMCOUNTER19   0xb13

◆ CSR_MHPMCOUNTER19H

#define CSR_MHPMCOUNTER19H   0xb93

◆ CSR_MHPMCOUNTER20

#define CSR_MHPMCOUNTER20   0xb14

◆ CSR_MHPMCOUNTER20H

#define CSR_MHPMCOUNTER20H   0xb94

◆ CSR_MHPMCOUNTER21

#define CSR_MHPMCOUNTER21   0xb15

◆ CSR_MHPMCOUNTER21H

#define CSR_MHPMCOUNTER21H   0xb95

◆ CSR_MHPMCOUNTER22

#define CSR_MHPMCOUNTER22   0xb16

◆ CSR_MHPMCOUNTER22H

#define CSR_MHPMCOUNTER22H   0xb96

◆ CSR_MHPMCOUNTER23

#define CSR_MHPMCOUNTER23   0xb17

◆ CSR_MHPMCOUNTER23H

#define CSR_MHPMCOUNTER23H   0xb97

◆ CSR_MHPMCOUNTER24

#define CSR_MHPMCOUNTER24   0xb18

◆ CSR_MHPMCOUNTER24H

#define CSR_MHPMCOUNTER24H   0xb98

◆ CSR_MHPMCOUNTER25

#define CSR_MHPMCOUNTER25   0xb19

◆ CSR_MHPMCOUNTER25H

#define CSR_MHPMCOUNTER25H   0xb99

◆ CSR_MHPMCOUNTER26

#define CSR_MHPMCOUNTER26   0xb1a

◆ CSR_MHPMCOUNTER26H

#define CSR_MHPMCOUNTER26H   0xb9a

◆ CSR_MHPMCOUNTER27

#define CSR_MHPMCOUNTER27   0xb1b

◆ CSR_MHPMCOUNTER27H

#define CSR_MHPMCOUNTER27H   0xb9b

◆ CSR_MHPMCOUNTER28

#define CSR_MHPMCOUNTER28   0xb1c

◆ CSR_MHPMCOUNTER28H

#define CSR_MHPMCOUNTER28H   0xb9c

◆ CSR_MHPMCOUNTER29

#define CSR_MHPMCOUNTER29   0xb1d

◆ CSR_MHPMCOUNTER29H

#define CSR_MHPMCOUNTER29H   0xb9d

◆ CSR_MHPMCOUNTER3

#define CSR_MHPMCOUNTER3   0xb03

◆ CSR_MHPMCOUNTER30

#define CSR_MHPMCOUNTER30   0xb1e

◆ CSR_MHPMCOUNTER30H

#define CSR_MHPMCOUNTER30H   0xb9e

◆ CSR_MHPMCOUNTER31

#define CSR_MHPMCOUNTER31   0xb1f

◆ CSR_MHPMCOUNTER31H

#define CSR_MHPMCOUNTER31H   0xb9f

◆ CSR_MHPMCOUNTER3H

#define CSR_MHPMCOUNTER3H   0xb83

◆ CSR_MHPMCOUNTER4

#define CSR_MHPMCOUNTER4   0xb04

◆ CSR_MHPMCOUNTER4H

#define CSR_MHPMCOUNTER4H   0xb84

◆ CSR_MHPMCOUNTER5

#define CSR_MHPMCOUNTER5   0xb05

◆ CSR_MHPMCOUNTER5H

#define CSR_MHPMCOUNTER5H   0xb85

◆ CSR_MHPMCOUNTER6

#define CSR_MHPMCOUNTER6   0xb06

◆ CSR_MHPMCOUNTER6H

#define CSR_MHPMCOUNTER6H   0xb86

◆ CSR_MHPMCOUNTER7

#define CSR_MHPMCOUNTER7   0xb07

◆ CSR_MHPMCOUNTER7H

#define CSR_MHPMCOUNTER7H   0xb87

◆ CSR_MHPMCOUNTER8

#define CSR_MHPMCOUNTER8   0xb08

◆ CSR_MHPMCOUNTER8H

#define CSR_MHPMCOUNTER8H   0xb88

◆ CSR_MHPMCOUNTER9

#define CSR_MHPMCOUNTER9   0xb09

◆ CSR_MHPMCOUNTER9H

#define CSR_MHPMCOUNTER9H   0xb89

◆ CSR_MHPMEVENT10

#define CSR_MHPMEVENT10   0x32a

◆ CSR_MHPMEVENT10H

#define CSR_MHPMEVENT10H   0x72a

◆ CSR_MHPMEVENT11

#define CSR_MHPMEVENT11   0x32b

◆ CSR_MHPMEVENT11H

#define CSR_MHPMEVENT11H   0x72b

◆ CSR_MHPMEVENT12

#define CSR_MHPMEVENT12   0x32c

◆ CSR_MHPMEVENT12H

#define CSR_MHPMEVENT12H   0x72c

◆ CSR_MHPMEVENT13

#define CSR_MHPMEVENT13   0x32d

◆ CSR_MHPMEVENT13H

#define CSR_MHPMEVENT13H   0x72d

◆ CSR_MHPMEVENT14

#define CSR_MHPMEVENT14   0x32e

◆ CSR_MHPMEVENT14H

#define CSR_MHPMEVENT14H   0x72e

◆ CSR_MHPMEVENT15

#define CSR_MHPMEVENT15   0x32f

◆ CSR_MHPMEVENT15H

#define CSR_MHPMEVENT15H   0x72f

◆ CSR_MHPMEVENT16

#define CSR_MHPMEVENT16   0x330

◆ CSR_MHPMEVENT16H

#define CSR_MHPMEVENT16H   0x730

◆ CSR_MHPMEVENT17

#define CSR_MHPMEVENT17   0x331

◆ CSR_MHPMEVENT17H

#define CSR_MHPMEVENT17H   0x731

◆ CSR_MHPMEVENT18

#define CSR_MHPMEVENT18   0x332

◆ CSR_MHPMEVENT18H

#define CSR_MHPMEVENT18H   0x732

◆ CSR_MHPMEVENT19

#define CSR_MHPMEVENT19   0x333

◆ CSR_MHPMEVENT19H

#define CSR_MHPMEVENT19H   0x733

◆ CSR_MHPMEVENT20

#define CSR_MHPMEVENT20   0x334

◆ CSR_MHPMEVENT20H

#define CSR_MHPMEVENT20H   0x734

◆ CSR_MHPMEVENT21

#define CSR_MHPMEVENT21   0x335

◆ CSR_MHPMEVENT21H

#define CSR_MHPMEVENT21H   0x735

◆ CSR_MHPMEVENT22

#define CSR_MHPMEVENT22   0x336

◆ CSR_MHPMEVENT22H

#define CSR_MHPMEVENT22H   0x736

◆ CSR_MHPMEVENT23

#define CSR_MHPMEVENT23   0x337

◆ CSR_MHPMEVENT23H

#define CSR_MHPMEVENT23H   0x737

◆ CSR_MHPMEVENT24

#define CSR_MHPMEVENT24   0x338

◆ CSR_MHPMEVENT24H

#define CSR_MHPMEVENT24H   0x738

◆ CSR_MHPMEVENT25

#define CSR_MHPMEVENT25   0x339

◆ CSR_MHPMEVENT25H

#define CSR_MHPMEVENT25H   0x739

◆ CSR_MHPMEVENT26

#define CSR_MHPMEVENT26   0x33a

◆ CSR_MHPMEVENT26H

#define CSR_MHPMEVENT26H   0x73a

◆ CSR_MHPMEVENT27

#define CSR_MHPMEVENT27   0x33b

◆ CSR_MHPMEVENT27H

#define CSR_MHPMEVENT27H   0x73b

◆ CSR_MHPMEVENT28

#define CSR_MHPMEVENT28   0x33c

◆ CSR_MHPMEVENT28H

#define CSR_MHPMEVENT28H   0x73c

◆ CSR_MHPMEVENT29

#define CSR_MHPMEVENT29   0x33d

◆ CSR_MHPMEVENT29H

#define CSR_MHPMEVENT29H   0x73d

◆ CSR_MHPMEVENT3

#define CSR_MHPMEVENT3   0x323

◆ CSR_MHPMEVENT30

#define CSR_MHPMEVENT30   0x33e

◆ CSR_MHPMEVENT30H

#define CSR_MHPMEVENT30H   0x73e

◆ CSR_MHPMEVENT31

#define CSR_MHPMEVENT31   0x33f

◆ CSR_MHPMEVENT31H

#define CSR_MHPMEVENT31H   0x73f

◆ CSR_MHPMEVENT3H

#define CSR_MHPMEVENT3H   0x723

◆ CSR_MHPMEVENT4

#define CSR_MHPMEVENT4   0x324

◆ CSR_MHPMEVENT4H

#define CSR_MHPMEVENT4H   0x724

◆ CSR_MHPMEVENT5

#define CSR_MHPMEVENT5   0x325

◆ CSR_MHPMEVENT5H

#define CSR_MHPMEVENT5H   0x725

◆ CSR_MHPMEVENT6

#define CSR_MHPMEVENT6   0x326

◆ CSR_MHPMEVENT6H

#define CSR_MHPMEVENT6H   0x726

◆ CSR_MHPMEVENT7

#define CSR_MHPMEVENT7   0x327

◆ CSR_MHPMEVENT7H

#define CSR_MHPMEVENT7H   0x727

◆ CSR_MHPMEVENT8

#define CSR_MHPMEVENT8   0x328

◆ CSR_MHPMEVENT8H

#define CSR_MHPMEVENT8H   0x728

◆ CSR_MHPMEVENT9

#define CSR_MHPMEVENT9   0x329

◆ CSR_MHPMEVENT9H

#define CSR_MHPMEVENT9H   0x729

◆ CSR_MIBASE

#define CSR_MIBASE   0x382

◆ CSR_MIBOUND

#define CSR_MIBOUND   0x383

◆ CSR_MIDELEG

#define CSR_MIDELEG   0x303

◆ CSR_MIDELEGH

#define CSR_MIDELEGH   0x313

◆ CSR_MIE

#define CSR_MIE   0x304

◆ CSR_MIEH

#define CSR_MIEH   0x314

◆ CSR_MIMPID

#define CSR_MIMPID   0xf13

◆ CSR_MINSTRET

#define CSR_MINSTRET   0xb02

◆ CSR_MINSTRETCFG

#define CSR_MINSTRETCFG   0x322

◆ CSR_MINSTRETCFGH

#define CSR_MINSTRETCFGH   0x722

◆ CSR_MINSTRETH

#define CSR_MINSTRETH   0xb82

◆ CSR_MIP

#define CSR_MIP   0x344

◆ CSR_MIPH

#define CSR_MIPH   0x354

◆ CSR_MIREG

#define CSR_MIREG   0x351

◆ CSR_MISA

#define CSR_MISA   0x301

◆ CSR_MISELECT

#define CSR_MISELECT   0x350

◆ CSR_MSCONTEXT

#define CSR_MSCONTEXT   0x7aa

◆ CSR_MSCRATCH

#define CSR_MSCRATCH   0x340

◆ CSR_MSECCFG

#define CSR_MSECCFG   0x747

◆ CSR_MSECCFGH

#define CSR_MSECCFGH   0x757

◆ CSR_MSTATEEN0

#define CSR_MSTATEEN0   0x30c

◆ CSR_MSTATEEN0H

#define CSR_MSTATEEN0H   0x31c

◆ CSR_MSTATEEN1

#define CSR_MSTATEEN1   0x30d

◆ CSR_MSTATEEN1H

#define CSR_MSTATEEN1H   0x31d

◆ CSR_MSTATEEN2

#define CSR_MSTATEEN2   0x30e

◆ CSR_MSTATEEN2H

#define CSR_MSTATEEN2H   0x31e

◆ CSR_MSTATEEN3

#define CSR_MSTATEEN3   0x30f

◆ CSR_MSTATEEN3H

#define CSR_MSTATEEN3H   0x31f

◆ CSR_MSTATUS

#define CSR_MSTATUS   0x300

◆ CSR_MSTATUSH

#define CSR_MSTATUSH   0x310

◆ CSR_MTINST

#define CSR_MTINST   0x34a

◆ CSR_MTOPEI

#define CSR_MTOPEI   0x35c

◆ CSR_MTOPI

#define CSR_MTOPI   0xfb0

◆ CSR_MTVAL

#define CSR_MTVAL   0x343

◆ CSR_MTVAL2

#define CSR_MTVAL2   0x34b

◆ CSR_MTVEC

#define CSR_MTVEC   0x305

◆ CSR_MVENDORID

#define CSR_MVENDORID   0xf11

◆ CSR_MVIEN

#define CSR_MVIEN   0x308

◆ CSR_MVIENH

#define CSR_MVIENH   0x318

◆ CSR_MVIP

#define CSR_MVIP   0x309

◆ CSR_MVIPH

#define CSR_MVIPH   0x319

◆ CSR_PMPADDR0

#define CSR_PMPADDR0   0x3b0

◆ CSR_PMPADDR1

#define CSR_PMPADDR1   0x3b1

◆ CSR_PMPADDR10

#define CSR_PMPADDR10   0x3ba

◆ CSR_PMPADDR11

#define CSR_PMPADDR11   0x3bb

◆ CSR_PMPADDR12

#define CSR_PMPADDR12   0x3bc

◆ CSR_PMPADDR13

#define CSR_PMPADDR13   0x3bd

◆ CSR_PMPADDR14

#define CSR_PMPADDR14   0x3be

◆ CSR_PMPADDR15

#define CSR_PMPADDR15   0x3bf

◆ CSR_PMPADDR16

#define CSR_PMPADDR16   0x3c0

◆ CSR_PMPADDR17

#define CSR_PMPADDR17   0x3c1

◆ CSR_PMPADDR18

#define CSR_PMPADDR18   0x3c2

◆ CSR_PMPADDR19

#define CSR_PMPADDR19   0x3c3

◆ CSR_PMPADDR2

#define CSR_PMPADDR2   0x3b2

◆ CSR_PMPADDR20

#define CSR_PMPADDR20   0x3c4

◆ CSR_PMPADDR21

#define CSR_PMPADDR21   0x3c5

◆ CSR_PMPADDR22

#define CSR_PMPADDR22   0x3c6

◆ CSR_PMPADDR23

#define CSR_PMPADDR23   0x3c7

◆ CSR_PMPADDR24

#define CSR_PMPADDR24   0x3c8

◆ CSR_PMPADDR25

#define CSR_PMPADDR25   0x3c9

◆ CSR_PMPADDR26

#define CSR_PMPADDR26   0x3ca

◆ CSR_PMPADDR27

#define CSR_PMPADDR27   0x3cb

◆ CSR_PMPADDR28

#define CSR_PMPADDR28   0x3cc

◆ CSR_PMPADDR29

#define CSR_PMPADDR29   0x3cd

◆ CSR_PMPADDR3

#define CSR_PMPADDR3   0x3b3

◆ CSR_PMPADDR30

#define CSR_PMPADDR30   0x3ce

◆ CSR_PMPADDR31

#define CSR_PMPADDR31   0x3cf

◆ CSR_PMPADDR32

#define CSR_PMPADDR32   0x3d0

◆ CSR_PMPADDR33

#define CSR_PMPADDR33   0x3d1

◆ CSR_PMPADDR34

#define CSR_PMPADDR34   0x3d2

◆ CSR_PMPADDR35

#define CSR_PMPADDR35   0x3d3

◆ CSR_PMPADDR36

#define CSR_PMPADDR36   0x3d4

◆ CSR_PMPADDR37

#define CSR_PMPADDR37   0x3d5

◆ CSR_PMPADDR38

#define CSR_PMPADDR38   0x3d6

◆ CSR_PMPADDR39

#define CSR_PMPADDR39   0x3d7

◆ CSR_PMPADDR4

#define CSR_PMPADDR4   0x3b4

◆ CSR_PMPADDR40

#define CSR_PMPADDR40   0x3d8

◆ CSR_PMPADDR41

#define CSR_PMPADDR41   0x3d9

◆ CSR_PMPADDR42

#define CSR_PMPADDR42   0x3da

◆ CSR_PMPADDR43

#define CSR_PMPADDR43   0x3db

◆ CSR_PMPADDR44

#define CSR_PMPADDR44   0x3dc

◆ CSR_PMPADDR45

#define CSR_PMPADDR45   0x3dd

◆ CSR_PMPADDR46

#define CSR_PMPADDR46   0x3de

◆ CSR_PMPADDR47

#define CSR_PMPADDR47   0x3df

◆ CSR_PMPADDR48

#define CSR_PMPADDR48   0x3e0

◆ CSR_PMPADDR49

#define CSR_PMPADDR49   0x3e1

◆ CSR_PMPADDR5

#define CSR_PMPADDR5   0x3b5

◆ CSR_PMPADDR50

#define CSR_PMPADDR50   0x3e2

◆ CSR_PMPADDR51

#define CSR_PMPADDR51   0x3e3

◆ CSR_PMPADDR52

#define CSR_PMPADDR52   0x3e4

◆ CSR_PMPADDR53

#define CSR_PMPADDR53   0x3e5

◆ CSR_PMPADDR54

#define CSR_PMPADDR54   0x3e6

◆ CSR_PMPADDR55

#define CSR_PMPADDR55   0x3e7

◆ CSR_PMPADDR56

#define CSR_PMPADDR56   0x3e8

◆ CSR_PMPADDR57

#define CSR_PMPADDR57   0x3e9

◆ CSR_PMPADDR58

#define CSR_PMPADDR58   0x3ea

◆ CSR_PMPADDR59

#define CSR_PMPADDR59   0x3eb

◆ CSR_PMPADDR6

#define CSR_PMPADDR6   0x3b6

◆ CSR_PMPADDR60

#define CSR_PMPADDR60   0x3ec

◆ CSR_PMPADDR61

#define CSR_PMPADDR61   0x3ed

◆ CSR_PMPADDR62

#define CSR_PMPADDR62   0x3ee

◆ CSR_PMPADDR63

#define CSR_PMPADDR63   0x3ef

◆ CSR_PMPADDR7

#define CSR_PMPADDR7   0x3b7

◆ CSR_PMPADDR8

#define CSR_PMPADDR8   0x3b8

◆ CSR_PMPADDR9

#define CSR_PMPADDR9   0x3b9

◆ CSR_PMPCFG0

#define CSR_PMPCFG0   0x3a0

◆ CSR_PMPCFG1

#define CSR_PMPCFG1   0x3a1

◆ CSR_PMPCFG10

#define CSR_PMPCFG10   0x3aa

◆ CSR_PMPCFG11

#define CSR_PMPCFG11   0x3ab

◆ CSR_PMPCFG12

#define CSR_PMPCFG12   0x3ac

◆ CSR_PMPCFG13

#define CSR_PMPCFG13   0x3ad

◆ CSR_PMPCFG14

#define CSR_PMPCFG14   0x3ae

◆ CSR_PMPCFG15

#define CSR_PMPCFG15   0x3af

◆ CSR_PMPCFG2

#define CSR_PMPCFG2   0x3a2

◆ CSR_PMPCFG3

#define CSR_PMPCFG3   0x3a3

◆ CSR_PMPCFG4

#define CSR_PMPCFG4   0x3a4

◆ CSR_PMPCFG5

#define CSR_PMPCFG5   0x3a5

◆ CSR_PMPCFG6

#define CSR_PMPCFG6   0x3a6

◆ CSR_PMPCFG7

#define CSR_PMPCFG7   0x3a7

◆ CSR_PMPCFG8

#define CSR_PMPCFG8   0x3a8

◆ CSR_PMPCFG9

#define CSR_PMPCFG9   0x3a9

◆ CSR_SATP

#define CSR_SATP   0x180

◆ CSR_SCAUSE

#define CSR_SCAUSE   0x142

◆ CSR_SCONTEXT

#define CSR_SCONTEXT   0x5a8

◆ CSR_SCOUNTEREN

#define CSR_SCOUNTEREN   0x106

◆ CSR_SCOUNTOVF

#define CSR_SCOUNTOVF   0xda0

◆ CSR_SEDELEG

#define CSR_SEDELEG   0x102

◆ CSR_SEED

#define CSR_SEED   0x015

◆ CSR_SENVCFG

#define CSR_SENVCFG   0x10a

◆ CSR_SEPC

#define CSR_SEPC   0x141

◆ CSR_SIDELEG

#define CSR_SIDELEG   0x103

◆ CSR_SIE

#define CSR_SIE   0x104

◆ CSR_SIEH

#define CSR_SIEH   0x114

◆ CSR_SIP

#define CSR_SIP   0x144

◆ CSR_SIPH

#define CSR_SIPH   0x154

◆ CSR_SIREG

#define CSR_SIREG   0x151

◆ CSR_SISELECT

#define CSR_SISELECT   0x150

◆ CSR_SSCRATCH

#define CSR_SSCRATCH   0x140

◆ CSR_SSTATEEN0

#define CSR_SSTATEEN0   0x10c

◆ CSR_SSTATEEN1

#define CSR_SSTATEEN1   0x10d

◆ CSR_SSTATEEN2

#define CSR_SSTATEEN2   0x10e

◆ CSR_SSTATEEN3

#define CSR_SSTATEEN3   0x10f

◆ CSR_SSTATUS

#define CSR_SSTATUS   0x100

◆ CSR_STIMECMP

#define CSR_STIMECMP   0x14d

◆ CSR_STIMECMPH

#define CSR_STIMECMPH   0x15d

◆ CSR_STOPEI

#define CSR_STOPEI   0x15c

◆ CSR_STOPI

#define CSR_STOPI   0xdb0

◆ CSR_STVAL

#define CSR_STVAL   0x143

◆ CSR_STVEC

#define CSR_STVEC   0x105

◆ CSR_TCONTROL

#define CSR_TCONTROL   0x7a5

◆ CSR_TDATA1

#define CSR_TDATA1   0x7a1

◆ CSR_TDATA2

#define CSR_TDATA2   0x7a2

◆ CSR_TDATA3

#define CSR_TDATA3   0x7a3

◆ CSR_TIME

#define CSR_TIME   0xc01

◆ CSR_TIMEH

#define CSR_TIMEH   0xc81

◆ CSR_TINFO

#define CSR_TINFO   0x7a4

◆ CSR_TSELECT

#define CSR_TSELECT   0x7a0

◆ CSR_UCAUSE

#define CSR_UCAUSE   0x42

◆ CSR_UEPC

#define CSR_UEPC   0x41

◆ CSR_UIE

#define CSR_UIE   0x4

◆ CSR_UIP

#define CSR_UIP   0x44

◆ CSR_USCRATCH

#define CSR_USCRATCH   0x40

◆ CSR_USTATUS

#define CSR_USTATUS   0x0

◆ CSR_UTVAL

#define CSR_UTVAL   0x43

◆ CSR_UTVEC

#define CSR_UTVEC   0x5

◆ CSR_VCSR

#define CSR_VCSR   0x00f

◆ CSR_VL

#define CSR_VL   0xc20

◆ CSR_VLENB

#define CSR_VLENB   0xc22

◆ CSR_VSATP

#define CSR_VSATP   0x280

◆ CSR_VSCAUSE

#define CSR_VSCAUSE   0x242

◆ CSR_VSEPC

#define CSR_VSEPC   0x241

◆ CSR_VSIE

#define CSR_VSIE   0x204

◆ CSR_VSIEH

#define CSR_VSIEH   0x214

◆ CSR_VSIP

#define CSR_VSIP   0x244

◆ CSR_VSIPH

#define CSR_VSIPH   0x254

◆ CSR_VSIREG

#define CSR_VSIREG   0x251

◆ CSR_VSISELECT

#define CSR_VSISELECT   0x250

◆ CSR_VSSCRATCH

#define CSR_VSSCRATCH   0x240

◆ CSR_VSSTATUS

#define CSR_VSSTATUS   0x200

◆ CSR_VSTART

#define CSR_VSTART   0x008

◆ CSR_VSTIMECMP

#define CSR_VSTIMECMP   0x24d

◆ CSR_VSTIMECMPH

#define CSR_VSTIMECMPH   0x25d

◆ CSR_VSTOPEI

#define CSR_VSTOPEI   0x25c

◆ CSR_VSTOPI

#define CSR_VSTOPI   0xeb0

◆ CSR_VSTVAL

#define CSR_VSTVAL   0x243

◆ CSR_VSTVEC

#define CSR_VSTVEC   0x205

◆ CSR_VTYPE

#define CSR_VTYPE   0xc21

◆ CSR_VXRM

#define CSR_VXRM   0x00a

◆ CSR_VXSAT

#define CSR_VXSAT   0x009

◆ DECLARE_CSR [1/2]

#define DECLARE_CSR ( name,
num,
class,
define_ver,
abort_ver )
Value:
case RISCV_ ## num ## _REGNUM:

◆ DECLARE_CSR [2/2]

#define DECLARE_CSR ( NAME,
VALUE,
CLASS,
DEFINE_VER,
ABORT_VER )
Value:
{ RISCV_ ## VALUE ## _REGNUM, { # NAME } },
#define NAME
Definition ada-exp.c:568

◆ DECLARE_INSN

#define DECLARE_INSN ( INSN_NAME,
INSN_MATCH,
INSN_MASK )
Value:
static inline bool is_ ## INSN_NAME ## _insn (long insn) \
{ \
return (insn & INSN_MASK) == INSN_MATCH; \
}

Definition at line 69 of file riscv-tdep.c.

◆ MASK_ADD

#define MASK_ADD   0xfe00707f

◆ MASK_ADD_UW

#define MASK_ADD_UW   0xfe00707f

◆ MASK_ADDI

#define MASK_ADDI   0x707f

◆ MASK_ADDIW

#define MASK_ADDIW   0x707f

◆ MASK_ADDW

#define MASK_ADDW   0xfe00707f

◆ MASK_AES32DSI

#define MASK_AES32DSI   0x3e00707f

◆ MASK_AES32DSMI

#define MASK_AES32DSMI   0x3e00707f

◆ MASK_AES32ESI

#define MASK_AES32ESI   0x3e00707f

◆ MASK_AES32ESMI

#define MASK_AES32ESMI   0x3e00707f

◆ MASK_AES64DS

#define MASK_AES64DS   0xfe00707f

◆ MASK_AES64DSM

#define MASK_AES64DSM   0xfe00707f

◆ MASK_AES64ES

#define MASK_AES64ES   0xfe00707f

◆ MASK_AES64ESM

#define MASK_AES64ESM   0xfe00707f

◆ MASK_AES64IM

#define MASK_AES64IM   0xfff0707f

◆ MASK_AES64KS1I

#define MASK_AES64KS1I   0xff00707f

◆ MASK_AES64KS2

#define MASK_AES64KS2   0xfe00707f

◆ MASK_AMOADD_D

#define MASK_AMOADD_D   0xf800707f

◆ MASK_AMOADD_W

#define MASK_AMOADD_W   0xf800707f

◆ MASK_AMOAND_D

#define MASK_AMOAND_D   0xf800707f

◆ MASK_AMOAND_W

#define MASK_AMOAND_W   0xf800707f

◆ MASK_AMOMAX_D

#define MASK_AMOMAX_D   0xf800707f

◆ MASK_AMOMAX_W

#define MASK_AMOMAX_W   0xf800707f

◆ MASK_AMOMAXU_D

#define MASK_AMOMAXU_D   0xf800707f

◆ MASK_AMOMAXU_W

#define MASK_AMOMAXU_W   0xf800707f

◆ MASK_AMOMIN_D

#define MASK_AMOMIN_D   0xf800707f

◆ MASK_AMOMIN_W

#define MASK_AMOMIN_W   0xf800707f

◆ MASK_AMOMINU_D

#define MASK_AMOMINU_D   0xf800707f

◆ MASK_AMOMINU_W

#define MASK_AMOMINU_W   0xf800707f

◆ MASK_AMOOR_D

#define MASK_AMOOR_D   0xf800707f

◆ MASK_AMOOR_W

#define MASK_AMOOR_W   0xf800707f

◆ MASK_AMOSWAP_D

#define MASK_AMOSWAP_D   0xf800707f

◆ MASK_AMOSWAP_W

#define MASK_AMOSWAP_W   0xf800707f

◆ MASK_AMOXOR_D

#define MASK_AMOXOR_D   0xf800707f

◆ MASK_AMOXOR_W

#define MASK_AMOXOR_W   0xf800707f

◆ MASK_AND

#define MASK_AND   0xfe00707f

◆ MASK_ANDI

#define MASK_ANDI   0x707f

◆ MASK_ANDN

#define MASK_ANDN   0xfe00707f

◆ MASK_AUIPC

#define MASK_AUIPC   0x7f

◆ MASK_BCLR

#define MASK_BCLR   0xfe00707f

◆ MASK_BCLRI

#define MASK_BCLRI   0xfc00707f

◆ MASK_BEQ

#define MASK_BEQ   0x707f

◆ MASK_BEXT

#define MASK_BEXT   0xfe00707f

◆ MASK_BEXTI

#define MASK_BEXTI   0xfc00707f

◆ MASK_BGE

#define MASK_BGE   0x707f

◆ MASK_BGEU

#define MASK_BGEU   0x707f

◆ MASK_BINV

#define MASK_BINV   0xfe00707f

◆ MASK_BINVI

#define MASK_BINVI   0xfc00707f

◆ MASK_BLT

#define MASK_BLT   0x707f

◆ MASK_BLTU

#define MASK_BLTU   0x707f

◆ MASK_BNE

#define MASK_BNE   0x707f

◆ MASK_BSET

#define MASK_BSET   0xfe00707f

◆ MASK_BSETI

#define MASK_BSETI   0xfc00707f

◆ MASK_C_ADD

#define MASK_C_ADD   0xf003

◆ MASK_C_ADDI

#define MASK_C_ADDI   0xe003

◆ MASK_C_ADDI16SP

#define MASK_C_ADDI16SP   0xef83

◆ MASK_C_ADDI4SPN

#define MASK_C_ADDI4SPN   0xe003

◆ MASK_C_ADDIW

#define MASK_C_ADDIW   0xe003

◆ MASK_C_ADDW

#define MASK_C_ADDW   0xfc63

◆ MASK_C_AND

#define MASK_C_AND   0xfc63

◆ MASK_C_ANDI

#define MASK_C_ANDI   0xec03

◆ MASK_C_BEQZ

#define MASK_C_BEQZ   0xe003

◆ MASK_C_BNEZ

#define MASK_C_BNEZ   0xe003

◆ MASK_C_EBREAK

#define MASK_C_EBREAK   0xffff

◆ MASK_C_FLD

#define MASK_C_FLD   0xe003

◆ MASK_C_FLDSP

#define MASK_C_FLDSP   0xe003

◆ MASK_C_FLW

#define MASK_C_FLW   0xe003

◆ MASK_C_FLWSP

#define MASK_C_FLWSP   0xe003

◆ MASK_C_FSD

#define MASK_C_FSD   0xe003

◆ MASK_C_FSDSP

#define MASK_C_FSDSP   0xe003

◆ MASK_C_FSW

#define MASK_C_FSW   0xe003

◆ MASK_C_FSWSP

#define MASK_C_FSWSP   0xe003

◆ MASK_C_J

#define MASK_C_J   0xe003

◆ MASK_C_JAL

#define MASK_C_JAL   0xe003

◆ MASK_C_JALR

#define MASK_C_JALR   0xf07f

◆ MASK_C_JR

#define MASK_C_JR   0xf07f

◆ MASK_C_LBU

#define MASK_C_LBU   0xfc03

◆ MASK_C_LD

#define MASK_C_LD   0xe003

◆ MASK_C_LDSP

#define MASK_C_LDSP   0xe003

◆ MASK_C_LH

#define MASK_C_LH   0xfc43

◆ MASK_C_LHU

#define MASK_C_LHU   0xfc43

◆ MASK_C_LI

#define MASK_C_LI   0xe003

◆ MASK_C_LUI

#define MASK_C_LUI   0xe003

◆ MASK_C_LW

#define MASK_C_LW   0xe003

◆ MASK_C_LWSP

#define MASK_C_LWSP   0xe003

◆ MASK_C_MUL

#define MASK_C_MUL   0xfc63

◆ MASK_C_MV

#define MASK_C_MV   0xf003

◆ MASK_C_NOP

#define MASK_C_NOP   0xffff

◆ MASK_C_NOT

#define MASK_C_NOT   0xfc7f

◆ MASK_C_NTL_ALL

#define MASK_C_NTL_ALL   0xffff

◆ MASK_C_NTL_P1

#define MASK_C_NTL_P1   0xffff

◆ MASK_C_NTL_PALL

#define MASK_C_NTL_PALL   0xffff

◆ MASK_C_NTL_S1

#define MASK_C_NTL_S1   0xffff

◆ MASK_C_OR

#define MASK_C_OR   0xfc63

◆ MASK_C_SB

#define MASK_C_SB   0xfc03

◆ MASK_C_SD

#define MASK_C_SD   0xe003

◆ MASK_C_SDSP

#define MASK_C_SDSP   0xe003

◆ MASK_C_SEXT_B

#define MASK_C_SEXT_B   0xfc7f

◆ MASK_C_SEXT_H

#define MASK_C_SEXT_H   0xfc7f

◆ MASK_C_SH

#define MASK_C_SH   0xfc43

◆ MASK_C_SLLI

#define MASK_C_SLLI   0xe003

◆ MASK_C_SLLI64

#define MASK_C_SLLI64   0xf07f

◆ MASK_C_SRAI

#define MASK_C_SRAI   0xec03

◆ MASK_C_SRAI64

#define MASK_C_SRAI64   0xfc7f

◆ MASK_C_SRLI

#define MASK_C_SRLI   0xec03

◆ MASK_C_SRLI64

#define MASK_C_SRLI64   0xfc7f

◆ MASK_C_SUB

#define MASK_C_SUB   0xfc63

◆ MASK_C_SUBW

#define MASK_C_SUBW   0xfc63

◆ MASK_C_SW

#define MASK_C_SW   0xe003

◆ MASK_C_SWSP

#define MASK_C_SWSP   0xe003

◆ MASK_C_XOR

#define MASK_C_XOR   0xfc63

◆ MASK_C_ZEXT_B

#define MASK_C_ZEXT_B   0xfc7f

◆ MASK_C_ZEXT_H

#define MASK_C_ZEXT_H   0xfc7f

◆ MASK_C_ZEXT_W

#define MASK_C_ZEXT_W   0xfc7f

◆ MASK_CBO_CLEAN

#define MASK_CBO_CLEAN   0xfff07fff

◆ MASK_CBO_FLUSH

#define MASK_CBO_FLUSH   0xfff07fff

◆ MASK_CBO_INVAL

#define MASK_CBO_INVAL   0xfff07fff

◆ MASK_CBO_ZERO

#define MASK_CBO_ZERO   0xfff07fff

◆ MASK_CLMUL

#define MASK_CLMUL   0xfe00707f

◆ MASK_CLMULH

#define MASK_CLMULH   0xfe00707f

◆ MASK_CLMULR

#define MASK_CLMULR   0xfe00707f

◆ MASK_CLZ

#define MASK_CLZ   0xfff0707f

◆ MASK_CLZW

#define MASK_CLZW   0xfff0707f

◆ MASK_CPOP

#define MASK_CPOP   0xfff0707f

◆ MASK_CPOPW

#define MASK_CPOPW   0xfff0707f

◆ MASK_CSRRC

#define MASK_CSRRC   0x707f

◆ MASK_CSRRCI

#define MASK_CSRRCI   0x707f

◆ MASK_CSRRS

#define MASK_CSRRS   0x707f

◆ MASK_CSRRSI

#define MASK_CSRRSI   0x707f

◆ MASK_CSRRW

#define MASK_CSRRW   0x707f

◆ MASK_CSRRWI

#define MASK_CSRRWI   0x707f

◆ MASK_CTZ

#define MASK_CTZ   0xfff0707f

◆ MASK_CTZW

#define MASK_CTZW   0xfff0707f

◆ MASK_CZERO_EQZ

#define MASK_CZERO_EQZ   0xfe00707f

◆ MASK_CZERO_NEZ

#define MASK_CZERO_NEZ   0xfe00707f

◆ MASK_DIV

#define MASK_DIV   0xfe00707f

◆ MASK_DIVU

#define MASK_DIVU   0xfe00707f

◆ MASK_DIVUW

#define MASK_DIVUW   0xfe00707f

◆ MASK_DIVW

#define MASK_DIVW   0xfe00707f

◆ MASK_DRET

#define MASK_DRET   0xffffffff

◆ MASK_EBREAK

#define MASK_EBREAK   0xffffffff

◆ MASK_ECALL

#define MASK_ECALL   0xffffffff

◆ MASK_FADD_D

#define MASK_FADD_D   0xfe00007f

◆ MASK_FADD_H

#define MASK_FADD_H   0xfe00007f

◆ MASK_FADD_Q

#define MASK_FADD_Q   0xfe00007f

◆ MASK_FADD_S

#define MASK_FADD_S   0xfe00007f

◆ MASK_FCLASS_D

#define MASK_FCLASS_D   0xfff0707f

◆ MASK_FCLASS_H

#define MASK_FCLASS_H   0xfff0707f

◆ MASK_FCLASS_Q

#define MASK_FCLASS_Q   0xfff0707f

◆ MASK_FCLASS_S

#define MASK_FCLASS_S   0xfff0707f

◆ MASK_FCVT_D_H

#define MASK_FCVT_D_H   0xfff0007f

◆ MASK_FCVT_D_L

#define MASK_FCVT_D_L   0xfff0007f

◆ MASK_FCVT_D_LU

#define MASK_FCVT_D_LU   0xfff0007f

◆ MASK_FCVT_D_Q

#define MASK_FCVT_D_Q   0xfff0007f

◆ MASK_FCVT_D_S

#define MASK_FCVT_D_S   0xfff0007f

◆ MASK_FCVT_D_W

#define MASK_FCVT_D_W   0xfff0007f

◆ MASK_FCVT_D_WU

#define MASK_FCVT_D_WU   0xfff0007f

◆ MASK_FCVT_H_D

#define MASK_FCVT_H_D   0xfff0007f

◆ MASK_FCVT_H_L

#define MASK_FCVT_H_L   0xfff0007f

◆ MASK_FCVT_H_LU

#define MASK_FCVT_H_LU   0xfff0007f

◆ MASK_FCVT_H_Q

#define MASK_FCVT_H_Q   0xfff0007f

◆ MASK_FCVT_H_S

#define MASK_FCVT_H_S   0xfff0007f

◆ MASK_FCVT_H_W

#define MASK_FCVT_H_W   0xfff0007f

◆ MASK_FCVT_H_WU

#define MASK_FCVT_H_WU   0xfff0007f

◆ MASK_FCVT_L_D

#define MASK_FCVT_L_D   0xfff0007f

◆ MASK_FCVT_L_H

#define MASK_FCVT_L_H   0xfff0007f

◆ MASK_FCVT_L_Q

#define MASK_FCVT_L_Q   0xfff0007f

◆ MASK_FCVT_L_S

#define MASK_FCVT_L_S   0xfff0007f

◆ MASK_FCVT_LU_D

#define MASK_FCVT_LU_D   0xfff0007f

◆ MASK_FCVT_LU_H

#define MASK_FCVT_LU_H   0xfff0007f

◆ MASK_FCVT_LU_Q

#define MASK_FCVT_LU_Q   0xfff0007f

◆ MASK_FCVT_LU_S

#define MASK_FCVT_LU_S   0xfff0007f

◆ MASK_FCVT_Q_D

#define MASK_FCVT_Q_D   0xfff0007f

◆ MASK_FCVT_Q_H

#define MASK_FCVT_Q_H   0xfff0007f

◆ MASK_FCVT_Q_L

#define MASK_FCVT_Q_L   0xfff0007f

◆ MASK_FCVT_Q_LU

#define MASK_FCVT_Q_LU   0xfff0007f

◆ MASK_FCVT_Q_S

#define MASK_FCVT_Q_S   0xfff0007f

◆ MASK_FCVT_Q_W

#define MASK_FCVT_Q_W   0xfff0007f

◆ MASK_FCVT_Q_WU

#define MASK_FCVT_Q_WU   0xfff0007f

◆ MASK_FCVT_S_D

#define MASK_FCVT_S_D   0xfff0007f

◆ MASK_FCVT_S_H

#define MASK_FCVT_S_H   0xfff0007f

◆ MASK_FCVT_S_L

#define MASK_FCVT_S_L   0xfff0007f

◆ MASK_FCVT_S_LU

#define MASK_FCVT_S_LU   0xfff0007f

◆ MASK_FCVT_S_Q

#define MASK_FCVT_S_Q   0xfff0007f

◆ MASK_FCVT_S_W

#define MASK_FCVT_S_W   0xfff0007f

◆ MASK_FCVT_S_WU

#define MASK_FCVT_S_WU   0xfff0007f

◆ MASK_FCVT_W_D

#define MASK_FCVT_W_D   0xfff0007f

◆ MASK_FCVT_W_H

#define MASK_FCVT_W_H   0xfff0007f

◆ MASK_FCVT_W_Q

#define MASK_FCVT_W_Q   0xfff0007f

◆ MASK_FCVT_W_S

#define MASK_FCVT_W_S   0xfff0007f

◆ MASK_FCVT_WU_D

#define MASK_FCVT_WU_D   0xfff0007f

◆ MASK_FCVT_WU_H

#define MASK_FCVT_WU_H   0xfff0007f

◆ MASK_FCVT_WU_Q

#define MASK_FCVT_WU_Q   0xfff0007f

◆ MASK_FCVT_WU_S

#define MASK_FCVT_WU_S   0xfff0007f

◆ MASK_FCVTMOD_W_D

#define MASK_FCVTMOD_W_D   0xfff0707f

◆ MASK_FDIV_D

#define MASK_FDIV_D   0xfe00007f

◆ MASK_FDIV_H

#define MASK_FDIV_H   0xfe00007f

◆ MASK_FDIV_Q

#define MASK_FDIV_Q   0xfe00007f

◆ MASK_FDIV_S

#define MASK_FDIV_S   0xfe00007f

◆ MASK_FENCE

#define MASK_FENCE   0x707f

◆ MASK_FENCE_I

#define MASK_FENCE_I   0x707f

◆ MASK_FENCE_TSO

#define MASK_FENCE_TSO   0xfff0707f

◆ MASK_FEQ_D

#define MASK_FEQ_D   0xfe00707f

◆ MASK_FEQ_H

#define MASK_FEQ_H   0xfe00707f

◆ MASK_FEQ_Q

#define MASK_FEQ_Q   0xfe00707f

◆ MASK_FEQ_S

#define MASK_FEQ_S   0xfe00707f

◆ MASK_FLD

#define MASK_FLD   0x707f

◆ MASK_FLE_D

#define MASK_FLE_D   0xfe00707f

◆ MASK_FLE_H

#define MASK_FLE_H   0xfe00707f

◆ MASK_FLE_Q

#define MASK_FLE_Q   0xfe00707f

◆ MASK_FLE_S

#define MASK_FLE_S   0xfe00707f

◆ MASK_FLEQ_D

#define MASK_FLEQ_D   0xfe00707f

◆ MASK_FLEQ_H

#define MASK_FLEQ_H   0xfe00707f

◆ MASK_FLEQ_Q

#define MASK_FLEQ_Q   0xfe00707f

◆ MASK_FLEQ_S

#define MASK_FLEQ_S   0xfe00707f

◆ MASK_FLH

#define MASK_FLH   0x707f

◆ MASK_FLI_D

#define MASK_FLI_D   0xfff0707f

◆ MASK_FLI_H

#define MASK_FLI_H   0xfff0707f

◆ MASK_FLI_Q

#define MASK_FLI_Q   0xfff0707f

◆ MASK_FLI_S

#define MASK_FLI_S   0xfff0707f

◆ MASK_FLQ

#define MASK_FLQ   0x707f

◆ MASK_FLT_D

#define MASK_FLT_D   0xfe00707f

◆ MASK_FLT_H

#define MASK_FLT_H   0xfe00707f

◆ MASK_FLT_Q

#define MASK_FLT_Q   0xfe00707f

◆ MASK_FLT_S

#define MASK_FLT_S   0xfe00707f

◆ MASK_FLTQ_D

#define MASK_FLTQ_D   0xfe00707f

◆ MASK_FLTQ_H

#define MASK_FLTQ_H   0xfe00707f

◆ MASK_FLTQ_Q

#define MASK_FLTQ_Q   0xfe00707f

◆ MASK_FLTQ_S

#define MASK_FLTQ_S   0xfe00707f

◆ MASK_FLW

#define MASK_FLW   0x707f

◆ MASK_FMADD_D

#define MASK_FMADD_D   0x600007f

◆ MASK_FMADD_H

#define MASK_FMADD_H   0x600007f

◆ MASK_FMADD_Q

#define MASK_FMADD_Q   0x600007f

◆ MASK_FMADD_S

#define MASK_FMADD_S   0x600007f

◆ MASK_FMAX_D

#define MASK_FMAX_D   0xfe00707f

◆ MASK_FMAX_H

#define MASK_FMAX_H   0xfe00707f

◆ MASK_FMAX_Q

#define MASK_FMAX_Q   0xfe00707f

◆ MASK_FMAX_S

#define MASK_FMAX_S   0xfe00707f

◆ MASK_FMAXM_D

#define MASK_FMAXM_D   0xfe00707f

◆ MASK_FMAXM_H

#define MASK_FMAXM_H   0xfe00707f

◆ MASK_FMAXM_Q

#define MASK_FMAXM_Q   0xfe00707f

◆ MASK_FMAXM_S

#define MASK_FMAXM_S   0xfe00707f

◆ MASK_FMIN_D

#define MASK_FMIN_D   0xfe00707f

◆ MASK_FMIN_H

#define MASK_FMIN_H   0xfe00707f

◆ MASK_FMIN_Q

#define MASK_FMIN_Q   0xfe00707f

◆ MASK_FMIN_S

#define MASK_FMIN_S   0xfe00707f

◆ MASK_FMINM_D

#define MASK_FMINM_D   0xfe00707f

◆ MASK_FMINM_H

#define MASK_FMINM_H   0xfe00707f

◆ MASK_FMINM_Q

#define MASK_FMINM_Q   0xfe00707f

◆ MASK_FMINM_S

#define MASK_FMINM_S   0xfe00707f

◆ MASK_FMSUB_D

#define MASK_FMSUB_D   0x600007f

◆ MASK_FMSUB_H

#define MASK_FMSUB_H   0x600007f

◆ MASK_FMSUB_Q

#define MASK_FMSUB_Q   0x600007f

◆ MASK_FMSUB_S

#define MASK_FMSUB_S   0x600007f

◆ MASK_FMUL_D

#define MASK_FMUL_D   0xfe00007f

◆ MASK_FMUL_H

#define MASK_FMUL_H   0xfe00007f

◆ MASK_FMUL_Q

#define MASK_FMUL_Q   0xfe00007f

◆ MASK_FMUL_S

#define MASK_FMUL_S   0xfe00007f

◆ MASK_FMV_D_X

#define MASK_FMV_D_X   0xfff0707f

◆ MASK_FMV_H_X

#define MASK_FMV_H_X   0xfff0707f

◆ MASK_FMV_S_X

#define MASK_FMV_S_X   0xfff0707f

◆ MASK_FMV_X_D

#define MASK_FMV_X_D   0xfff0707f

◆ MASK_FMV_X_H

#define MASK_FMV_X_H   0xfff0707f

◆ MASK_FMV_X_S

#define MASK_FMV_X_S   0xfff0707f

◆ MASK_FMVH_X_D

#define MASK_FMVH_X_D   0xfff0707f

◆ MASK_FMVH_X_Q

#define MASK_FMVH_X_Q   0xfff0707f

◆ MASK_FMVP_D_X

#define MASK_FMVP_D_X   0xfe00707f

◆ MASK_FMVP_Q_X

#define MASK_FMVP_Q_X   0xfe00707f

◆ MASK_FNMADD_D

#define MASK_FNMADD_D   0x600007f

◆ MASK_FNMADD_H

#define MASK_FNMADD_H   0x600007f

◆ MASK_FNMADD_Q

#define MASK_FNMADD_Q   0x600007f

◆ MASK_FNMADD_S

#define MASK_FNMADD_S   0x600007f

◆ MASK_FNMSUB_D

#define MASK_FNMSUB_D   0x600007f

◆ MASK_FNMSUB_H

#define MASK_FNMSUB_H   0x600007f

◆ MASK_FNMSUB_Q

#define MASK_FNMSUB_Q   0x600007f

◆ MASK_FNMSUB_S

#define MASK_FNMSUB_S   0x600007f

◆ MASK_FRCSR

#define MASK_FRCSR   0xfffff07f

◆ MASK_FRFLAGS

#define MASK_FRFLAGS   0xfffff07f

◆ MASK_FROUND_D

#define MASK_FROUND_D   0xfff0007f

◆ MASK_FROUND_H

#define MASK_FROUND_H   0xfff0007f

◆ MASK_FROUND_Q

#define MASK_FROUND_Q   0xfff0007f

◆ MASK_FROUND_S

#define MASK_FROUND_S   0xfff0007f

◆ MASK_FROUNDNX_D

#define MASK_FROUNDNX_D   0xfff0007f

◆ MASK_FROUNDNX_H

#define MASK_FROUNDNX_H   0xfff0007f

◆ MASK_FROUNDNX_Q

#define MASK_FROUNDNX_Q   0xfff0007f

◆ MASK_FROUNDNX_S

#define MASK_FROUNDNX_S   0xfff0007f

◆ MASK_FRRM

#define MASK_FRRM   0xfffff07f

◆ MASK_FSCSR

#define MASK_FSCSR   0xfff0707f

◆ MASK_FSD

#define MASK_FSD   0x707f

◆ MASK_FSFLAGS

#define MASK_FSFLAGS   0xfff0707f

◆ MASK_FSFLAGSI

#define MASK_FSFLAGSI   0xfff0707f

◆ MASK_FSGNJ_D

#define MASK_FSGNJ_D   0xfe00707f

◆ MASK_FSGNJ_H

#define MASK_FSGNJ_H   0xfe00707f

◆ MASK_FSGNJ_Q

#define MASK_FSGNJ_Q   0xfe00707f

◆ MASK_FSGNJ_S

#define MASK_FSGNJ_S   0xfe00707f

◆ MASK_FSGNJN_D

#define MASK_FSGNJN_D   0xfe00707f

◆ MASK_FSGNJN_H

#define MASK_FSGNJN_H   0xfe00707f

◆ MASK_FSGNJN_Q

#define MASK_FSGNJN_Q   0xfe00707f

◆ MASK_FSGNJN_S

#define MASK_FSGNJN_S   0xfe00707f

◆ MASK_FSGNJX_D

#define MASK_FSGNJX_D   0xfe00707f

◆ MASK_FSGNJX_H

#define MASK_FSGNJX_H   0xfe00707f

◆ MASK_FSGNJX_Q

#define MASK_FSGNJX_Q   0xfe00707f

◆ MASK_FSGNJX_S

#define MASK_FSGNJX_S   0xfe00707f

◆ MASK_FSH

#define MASK_FSH   0x707f

◆ MASK_FSQ

#define MASK_FSQ   0x707f

◆ MASK_FSQRT_D

#define MASK_FSQRT_D   0xfff0007f

◆ MASK_FSQRT_H

#define MASK_FSQRT_H   0xfff0007f

◆ MASK_FSQRT_Q

#define MASK_FSQRT_Q   0xfff0007f

◆ MASK_FSQRT_S

#define MASK_FSQRT_S   0xfff0007f

◆ MASK_FSRM

#define MASK_FSRM   0xfff0707f

◆ MASK_FSRMI

#define MASK_FSRMI   0xfff0707f

◆ MASK_FSUB_D

#define MASK_FSUB_D   0xfe00007f

◆ MASK_FSUB_H

#define MASK_FSUB_H   0xfe00007f

◆ MASK_FSUB_Q

#define MASK_FSUB_Q   0xfe00007f

◆ MASK_FSUB_S

#define MASK_FSUB_S   0xfe00007f

◆ MASK_FSW

#define MASK_FSW   0x707f

◆ MASK_GORCI

#define MASK_GORCI   0xfc00707f

◆ MASK_GREVI

#define MASK_GREVI   0xfc00707f

◆ MASK_HFENCE_GVMA

#define MASK_HFENCE_GVMA   0xfe007fff

◆ MASK_HFENCE_VVMA

#define MASK_HFENCE_VVMA   0xfe007fff

◆ MASK_HINVAL_GVMA

#define MASK_HINVAL_GVMA   0xfe007fff

◆ MASK_HINVAL_VVMA

#define MASK_HINVAL_VVMA   0xfe007fff

◆ MASK_HLV_B

#define MASK_HLV_B   0xfff0707f

◆ MASK_HLV_BU

#define MASK_HLV_BU   0xfff0707f

◆ MASK_HLV_D

#define MASK_HLV_D   0xfff0707f

◆ MASK_HLV_H

#define MASK_HLV_H   0xfff0707f

◆ MASK_HLV_HU

#define MASK_HLV_HU   0xfff0707f

◆ MASK_HLV_W

#define MASK_HLV_W   0xfff0707f

◆ MASK_HLV_WU

#define MASK_HLV_WU   0xfff0707f

◆ MASK_HLVX_HU

#define MASK_HLVX_HU   0xfff0707f

◆ MASK_HLVX_WU

#define MASK_HLVX_WU   0xfff0707f

◆ MASK_HRET

#define MASK_HRET   0xffffffff

◆ MASK_HSV_B

#define MASK_HSV_B   0xfe007fff

◆ MASK_HSV_D

#define MASK_HSV_D   0xfe007fff

◆ MASK_HSV_H

#define MASK_HSV_H   0xfe007fff

◆ MASK_HSV_W

#define MASK_HSV_W   0xfe007fff

◆ MASK_JAL

#define MASK_JAL   0x7f

◆ MASK_JALR

#define MASK_JALR   0x707f

◆ MASK_LB

#define MASK_LB   0x707f

◆ MASK_LBU

#define MASK_LBU   0x707f

◆ MASK_LD

#define MASK_LD   0x707f

◆ MASK_LH

#define MASK_LH   0x707f

◆ MASK_LHU

#define MASK_LHU   0x707f

◆ MASK_LR_D

#define MASK_LR_D   0xf9f0707f

◆ MASK_LR_W

#define MASK_LR_W   0xf9f0707f

◆ MASK_LUI

#define MASK_LUI   0x7f

◆ MASK_LW

#define MASK_LW   0x707f

◆ MASK_LWU

#define MASK_LWU   0x707f

◆ MASK_MAX

#define MASK_MAX   0xfe00707f

◆ MASK_MAXU

#define MASK_MAXU   0xfe00707f

◆ MASK_MIN

#define MASK_MIN   0xfe00707f

◆ MASK_MINU

#define MASK_MINU   0xfe00707f

◆ MASK_MRET

#define MASK_MRET   0xffffffff

◆ MASK_MUL

#define MASK_MUL   0xfe00707f

◆ MASK_MULH

#define MASK_MULH   0xfe00707f

◆ MASK_MULHSU

#define MASK_MULHSU   0xfe00707f

◆ MASK_MULHU

#define MASK_MULHU   0xfe00707f

◆ MASK_MULW

#define MASK_MULW   0xfe00707f

◆ MASK_NTL_ALL

#define MASK_NTL_ALL   0xffffffff

◆ MASK_NTL_P1

#define MASK_NTL_P1   0xffffffff

◆ MASK_NTL_PALL

#define MASK_NTL_PALL   0xffffffff

◆ MASK_NTL_S1

#define MASK_NTL_S1   0xffffffff

◆ MASK_OR

#define MASK_OR   0xfe00707f

◆ MASK_ORI

#define MASK_ORI   0x707f

◆ MASK_ORN

#define MASK_ORN   0xfe00707f

◆ MASK_PACK

#define MASK_PACK   0xfe00707f

◆ MASK_PACKH

#define MASK_PACKH   0xfe00707f

◆ MASK_PACKW

#define MASK_PACKW   0xfe00707f

◆ MASK_PAUSE

#define MASK_PAUSE   0xffffffff

◆ MASK_PREFETCH_I

#define MASK_PREFETCH_I   0x1f07fff

◆ MASK_PREFETCH_R

#define MASK_PREFETCH_R   0x1f07fff

◆ MASK_PREFETCH_W

#define MASK_PREFETCH_W   0x1f07fff

◆ MASK_RDCYCLE

#define MASK_RDCYCLE   0xfffff07f

◆ MASK_RDCYCLEH

#define MASK_RDCYCLEH   0xfffff07f

◆ MASK_RDINSTRET

#define MASK_RDINSTRET   0xfffff07f

◆ MASK_RDINSTRETH

#define MASK_RDINSTRETH   0xfffff07f

◆ MASK_RDTIME

#define MASK_RDTIME   0xfffff07f

◆ MASK_RDTIMEH

#define MASK_RDTIMEH   0xfffff07f

◆ MASK_REM

#define MASK_REM   0xfe00707f

◆ MASK_REMU

#define MASK_REMU   0xfe00707f

◆ MASK_REMUW

#define MASK_REMUW   0xfe00707f

◆ MASK_REMW

#define MASK_REMW   0xfe00707f

◆ MASK_ROL

#define MASK_ROL   0xfe00707f

◆ MASK_ROLW

#define MASK_ROLW   0xfe00707f

◆ MASK_ROR

#define MASK_ROR   0xfe00707f

◆ MASK_RORI

#define MASK_RORI   0xfc00707f

◆ MASK_RORIW

#define MASK_RORIW   0xfe00707f

◆ MASK_RORW

#define MASK_RORW   0xfe00707f

◆ MASK_SB

#define MASK_SB   0x707f

◆ MASK_SBREAK

#define MASK_SBREAK   0xffffffff

◆ MASK_SC_D

#define MASK_SC_D   0xf800707f

◆ MASK_SC_W

#define MASK_SC_W   0xf800707f

◆ MASK_SCALL

#define MASK_SCALL   0xffffffff

◆ MASK_SD

#define MASK_SD   0x707f

◆ MASK_SEXT_B

#define MASK_SEXT_B   0xfff0707f

◆ MASK_SEXT_H

#define MASK_SEXT_H   0xfff0707f

◆ MASK_SFENCE_INVAL_IR

#define MASK_SFENCE_INVAL_IR   0xffffffff

◆ MASK_SFENCE_VM

#define MASK_SFENCE_VM   0xfff07fff

◆ MASK_SFENCE_VMA

#define MASK_SFENCE_VMA   0xfe007fff

◆ MASK_SFENCE_W_INVAL

#define MASK_SFENCE_W_INVAL   0xffffffff

◆ MASK_SH

#define MASK_SH   0x707f

◆ MASK_SH1ADD

#define MASK_SH1ADD   0xfe00707f

◆ MASK_SH1ADD_UW

#define MASK_SH1ADD_UW   0xfe00707f

◆ MASK_SH2ADD

#define MASK_SH2ADD   0xfe00707f

◆ MASK_SH2ADD_UW

#define MASK_SH2ADD_UW   0xfe00707f

◆ MASK_SH3ADD

#define MASK_SH3ADD   0xfe00707f

◆ MASK_SH3ADD_UW

#define MASK_SH3ADD_UW   0xfe00707f

◆ MASK_SHA256SIG0

#define MASK_SHA256SIG0   0xfff0707f

◆ MASK_SHA256SIG1

#define MASK_SHA256SIG1   0xfff0707f

◆ MASK_SHA256SUM0

#define MASK_SHA256SUM0   0xfff0707f

◆ MASK_SHA256SUM1

#define MASK_SHA256SUM1   0xfff0707f

◆ MASK_SHA512SIG0

#define MASK_SHA512SIG0   0xfff0707f

◆ MASK_SHA512SIG0H

#define MASK_SHA512SIG0H   0xfe00707f

◆ MASK_SHA512SIG0L

#define MASK_SHA512SIG0L   0xfe00707f

◆ MASK_SHA512SIG1

#define MASK_SHA512SIG1   0xfff0707f

◆ MASK_SHA512SIG1H

#define MASK_SHA512SIG1H   0xfe00707f

◆ MASK_SHA512SIG1L

#define MASK_SHA512SIG1L   0xfe00707f

◆ MASK_SHA512SUM0

#define MASK_SHA512SUM0   0xfff0707f

◆ MASK_SHA512SUM0R

#define MASK_SHA512SUM0R   0xfe00707f

◆ MASK_SHA512SUM1

#define MASK_SHA512SUM1   0xfff0707f

◆ MASK_SHA512SUM1R

#define MASK_SHA512SUM1R   0xfe00707f

◆ MASK_SHFLI

#define MASK_SHFLI   0xfe00707f

◆ MASK_SINVAL_VMA

#define MASK_SINVAL_VMA   0xfe007fff

◆ MASK_SLL

#define MASK_SLL   0xfe00707f

◆ MASK_SLLI

#define MASK_SLLI   0xfc00707f

◆ MASK_SLLI_RV32

#define MASK_SLLI_RV32   0xfe00707f

◆ MASK_SLLI_UW

#define MASK_SLLI_UW   0xfc00707f

◆ MASK_SLLIW

#define MASK_SLLIW   0xfe00707f

◆ MASK_SLLW

#define MASK_SLLW   0xfe00707f

◆ MASK_SLT

#define MASK_SLT   0xfe00707f

◆ MASK_SLTI

#define MASK_SLTI   0x707f

◆ MASK_SLTIU

#define MASK_SLTIU   0x707f

◆ MASK_SLTU

#define MASK_SLTU   0xfe00707f

◆ MASK_SM3P0

#define MASK_SM3P0   0xfff0707f

◆ MASK_SM3P1

#define MASK_SM3P1   0xfff0707f

◆ MASK_SM4ED

#define MASK_SM4ED   0x3e00707f

◆ MASK_SM4KS

#define MASK_SM4KS   0x3e00707f

◆ MASK_SRA

#define MASK_SRA   0xfe00707f

◆ MASK_SRAI

#define MASK_SRAI   0xfc00707f

◆ MASK_SRAI_RV32

#define MASK_SRAI_RV32   0xfe00707f

◆ MASK_SRAIW

#define MASK_SRAIW   0xfe00707f

◆ MASK_SRAW

#define MASK_SRAW   0xfe00707f

◆ MASK_SRET

#define MASK_SRET   0xffffffff

◆ MASK_SRL

#define MASK_SRL   0xfe00707f

◆ MASK_SRLI

#define MASK_SRLI   0xfc00707f

◆ MASK_SRLI_RV32

#define MASK_SRLI_RV32   0xfe00707f

◆ MASK_SRLIW

#define MASK_SRLIW   0xfe00707f

◆ MASK_SRLW

#define MASK_SRLW   0xfe00707f

◆ MASK_SUB

#define MASK_SUB   0xfe00707f

◆ MASK_SUBW

#define MASK_SUBW   0xfe00707f

◆ MASK_SW

#define MASK_SW   0x707f

◆ MASK_TH_ADDSL

#define MASK_TH_ADDSL   0xf800707f

◆ MASK_TH_DCACHE_CALL

#define MASK_TH_DCACHE_CALL   0xffffffff

◆ MASK_TH_DCACHE_CIALL

#define MASK_TH_DCACHE_CIALL   0xffffffff

◆ MASK_TH_DCACHE_CIPA

#define MASK_TH_DCACHE_CIPA   0xfff07fff

◆ MASK_TH_DCACHE_CISW

#define MASK_TH_DCACHE_CISW   0xfff07fff

◆ MASK_TH_DCACHE_CIVA

#define MASK_TH_DCACHE_CIVA   0xfff07fff

◆ MASK_TH_DCACHE_CPA

#define MASK_TH_DCACHE_CPA   0xfff07fff

◆ MASK_TH_DCACHE_CPAL1

#define MASK_TH_DCACHE_CPAL1   0xfff07fff

◆ MASK_TH_DCACHE_CSW

#define MASK_TH_DCACHE_CSW   0xfff07fff

◆ MASK_TH_DCACHE_CVA

#define MASK_TH_DCACHE_CVA   0xfff07fff

◆ MASK_TH_DCACHE_CVAL1

#define MASK_TH_DCACHE_CVAL1   0xfff07fff

◆ MASK_TH_DCACHE_IALL

#define MASK_TH_DCACHE_IALL   0xffffffff

◆ MASK_TH_DCACHE_IPA

#define MASK_TH_DCACHE_IPA   0xfff07fff

◆ MASK_TH_DCACHE_ISW

#define MASK_TH_DCACHE_ISW   0xfff07fff

◆ MASK_TH_DCACHE_IVA

#define MASK_TH_DCACHE_IVA   0xfff07fff

◆ MASK_TH_EXT

#define MASK_TH_EXT   0x0000707f

◆ MASK_TH_EXTU

#define MASK_TH_EXTU   0x0000707f

◆ MASK_TH_FF0

#define MASK_TH_FF0   0xfff0707f

◆ MASK_TH_FF1

#define MASK_TH_FF1   0xfff0707f

◆ MASK_TH_FLRD

#define MASK_TH_FLRD   0xf800707f

◆ MASK_TH_FLRW

#define MASK_TH_FLRW   0xf800707f

◆ MASK_TH_FLURD

#define MASK_TH_FLURD   0xf800707f

◆ MASK_TH_FLURW

#define MASK_TH_FLURW   0xf800707f

◆ MASK_TH_FMV_HW_X

#define MASK_TH_FMV_HW_X   0xfff0707f

◆ MASK_TH_FMV_X_HW

#define MASK_TH_FMV_X_HW   0xfff0707f

◆ MASK_TH_FSRD

#define MASK_TH_FSRD   0xf800707f

◆ MASK_TH_FSRW

#define MASK_TH_FSRW   0xf800707f

◆ MASK_TH_FSURD

#define MASK_TH_FSURD   0xf800707f

◆ MASK_TH_FSURW

#define MASK_TH_FSURW   0xf800707f

◆ MASK_TH_ICACHE_IALL

#define MASK_TH_ICACHE_IALL   0xffffffff

◆ MASK_TH_ICACHE_IALLS

#define MASK_TH_ICACHE_IALLS   0xffffffff

◆ MASK_TH_ICACHE_IPA

#define MASK_TH_ICACHE_IPA   0xfff07fff

◆ MASK_TH_ICACHE_IVA

#define MASK_TH_ICACHE_IVA   0xfff07fff

◆ MASK_TH_IPOP

#define MASK_TH_IPOP   0xffffffff

◆ MASK_TH_IPUSH

#define MASK_TH_IPUSH   0xffffffff

◆ MASK_TH_L2CACHE_CALL

#define MASK_TH_L2CACHE_CALL   0xffffffff

◆ MASK_TH_L2CACHE_CIALL

#define MASK_TH_L2CACHE_CIALL   0xffffffff

◆ MASK_TH_L2CACHE_IALL

#define MASK_TH_L2CACHE_IALL   0xffffffff

◆ MASK_TH_LBIA

#define MASK_TH_LBIA   0xf800707f

◆ MASK_TH_LBIB

#define MASK_TH_LBIB   0xf800707f

◆ MASK_TH_LBUIA

#define MASK_TH_LBUIA   0xf800707f

◆ MASK_TH_LBUIB

#define MASK_TH_LBUIB   0xf800707f

◆ MASK_TH_LDD

#define MASK_TH_LDD   0xf800707f

◆ MASK_TH_LDIA

#define MASK_TH_LDIA   0xf800707f

◆ MASK_TH_LDIB

#define MASK_TH_LDIB   0xf800707f

◆ MASK_TH_LHIA

#define MASK_TH_LHIA   0xf800707f

◆ MASK_TH_LHIB

#define MASK_TH_LHIB   0xf800707f

◆ MASK_TH_LHUIA

#define MASK_TH_LHUIA   0xf800707f

◆ MASK_TH_LHUIB

#define MASK_TH_LHUIB   0xf800707f

◆ MASK_TH_LRB

#define MASK_TH_LRB   0xf800707f

◆ MASK_TH_LRBU

#define MASK_TH_LRBU   0xf800707f

◆ MASK_TH_LRD

#define MASK_TH_LRD   0xf800707f

◆ MASK_TH_LRH

#define MASK_TH_LRH   0xf800707f

◆ MASK_TH_LRHU

#define MASK_TH_LRHU   0xf800707f

◆ MASK_TH_LRW

#define MASK_TH_LRW   0xf800707f

◆ MASK_TH_LRWU

#define MASK_TH_LRWU   0xf800707f

◆ MASK_TH_LURB

#define MASK_TH_LURB   0xf800707f

◆ MASK_TH_LURBU

#define MASK_TH_LURBU   0xf800707f

◆ MASK_TH_LURD

#define MASK_TH_LURD   0xf800707f

◆ MASK_TH_LURH

#define MASK_TH_LURH   0xf800707f

◆ MASK_TH_LURHU

#define MASK_TH_LURHU   0xf800707f

◆ MASK_TH_LURW

#define MASK_TH_LURW   0xf800707f

◆ MASK_TH_LURWU

#define MASK_TH_LURWU   0xf800707f

◆ MASK_TH_LWD

#define MASK_TH_LWD   0xf800707f

◆ MASK_TH_LWIA

#define MASK_TH_LWIA   0xf800707f

◆ MASK_TH_LWIB

#define MASK_TH_LWIB   0xf800707f

◆ MASK_TH_LWUD

#define MASK_TH_LWUD   0xf800707f

◆ MASK_TH_LWUIA

#define MASK_TH_LWUIA   0xf800707f

◆ MASK_TH_LWUIB

#define MASK_TH_LWUIB   0xf800707f

◆ MASK_TH_MULA

#define MASK_TH_MULA   0xfe00707f

◆ MASK_TH_MULAH

#define MASK_TH_MULAH   0xfe00707f

◆ MASK_TH_MULAW

#define MASK_TH_MULAW   0xfe00707f

◆ MASK_TH_MULS

#define MASK_TH_MULS   0xfe00707f

◆ MASK_TH_MULSH

#define MASK_TH_MULSH   0xfe00707f

◆ MASK_TH_MULSW

#define MASK_TH_MULSW   0xfe00707f

◆ MASK_TH_MVEQZ

#define MASK_TH_MVEQZ   0xfe00707f

◆ MASK_TH_MVNEZ

#define MASK_TH_MVNEZ   0xfe00707f

◆ MASK_TH_REV

#define MASK_TH_REV   0xfff0707f

◆ MASK_TH_REVW

#define MASK_TH_REVW   0xfff0707f

◆ MASK_TH_SBIA

#define MASK_TH_SBIA   0xf800707f

◆ MASK_TH_SBIB

#define MASK_TH_SBIB   0xf800707f

◆ MASK_TH_SDD

#define MASK_TH_SDD   0xf800707f

◆ MASK_TH_SDIA

#define MASK_TH_SDIA   0xf800707f

◆ MASK_TH_SDIB

#define MASK_TH_SDIB   0xf800707f

◆ MASK_TH_SFENCE_VMAS

#define MASK_TH_SFENCE_VMAS   0xfe007fff

◆ MASK_TH_SHIA

#define MASK_TH_SHIA   0xf800707f

◆ MASK_TH_SHIB

#define MASK_TH_SHIB   0xf800707f

◆ MASK_TH_SRB

#define MASK_TH_SRB   0xf800707f

◆ MASK_TH_SRD

#define MASK_TH_SRD   0xf800707f

◆ MASK_TH_SRH

#define MASK_TH_SRH   0xf800707f

◆ MASK_TH_SRRI

#define MASK_TH_SRRI   0xfc00707f

◆ MASK_TH_SRRIW

#define MASK_TH_SRRIW   0xfe00707f

◆ MASK_TH_SRW

#define MASK_TH_SRW   0xf800707f

◆ MASK_TH_SURB

#define MASK_TH_SURB   0xf800707f

◆ MASK_TH_SURD

#define MASK_TH_SURD   0xf800707f

◆ MASK_TH_SURH

#define MASK_TH_SURH   0xf800707f

◆ MASK_TH_SURW

#define MASK_TH_SURW   0xf800707f

◆ MASK_TH_SWD

#define MASK_TH_SWD   0xf800707f

◆ MASK_TH_SWIA

#define MASK_TH_SWIA   0xf800707f

◆ MASK_TH_SWIB

#define MASK_TH_SWIB   0xf800707f

◆ MASK_TH_SYNC

#define MASK_TH_SYNC   0xffffffff

◆ MASK_TH_SYNC_I

#define MASK_TH_SYNC_I   0xffffffff

◆ MASK_TH_SYNC_IS

#define MASK_TH_SYNC_IS   0xffffffff

◆ MASK_TH_SYNC_S

#define MASK_TH_SYNC_S   0xffffffff

◆ MASK_TH_TST

#define MASK_TH_TST   0xfc00707f

◆ MASK_TH_TSTNBZ

#define MASK_TH_TSTNBZ   0xfff0707f

◆ MASK_UNSHFLI

#define MASK_UNSHFLI   0xfe00707f

◆ MASK_URET

#define MASK_URET   0xffffffff

◆ MASK_VAADDUVV

#define MASK_VAADDUVV   0xfc00707f

◆ MASK_VAADDUVX

#define MASK_VAADDUVX   0xfc00707f

◆ MASK_VAADDVV

#define MASK_VAADDVV   0xfc00707f

◆ MASK_VAADDVX

#define MASK_VAADDVX   0xfc00707f

◆ MASK_VADCVIM

#define MASK_VADCVIM   0xfe00707f

◆ MASK_VADCVVM

#define MASK_VADCVVM   0xfe00707f

◆ MASK_VADCVXM

#define MASK_VADCVXM   0xfe00707f

◆ MASK_VADDVI

#define MASK_VADDVI   0xfc00707f

◆ MASK_VADDVV

#define MASK_VADDVV   0xfc00707f

◆ MASK_VADDVX

#define MASK_VADDVX   0xfc00707f

◆ MASK_VAESDF_VS

#define MASK_VAESDF_VS   0xfe0ff07f

◆ MASK_VAESDF_VV

#define MASK_VAESDF_VV   0xfe0ff07f

◆ MASK_VAESDM_VS

#define MASK_VAESDM_VS   0xfe0ff07f

◆ MASK_VAESDM_VV

#define MASK_VAESDM_VV   0xfe0ff07f

◆ MASK_VAESEF_VS

#define MASK_VAESEF_VS   0xfe0ff07f

◆ MASK_VAESEF_VV

#define MASK_VAESEF_VV   0xfe0ff07f

◆ MASK_VAESEM_VS

#define MASK_VAESEM_VS   0xfe0ff07f

◆ MASK_VAESEM_VV

#define MASK_VAESEM_VV   0xfe0ff07f

◆ MASK_VAESKF1_VI

#define MASK_VAESKF1_VI   0xfe00707f

◆ MASK_VAESKF2_VI

#define MASK_VAESKF2_VI   0xfe00707f

◆ MASK_VAESZ_VS

#define MASK_VAESZ_VS   0xfe0ff07f

◆ MASK_VANDN_VV

#define MASK_VANDN_VV   0xfc00707f

◆ MASK_VANDN_VX

#define MASK_VANDN_VX   0xfc00707f

◆ MASK_VANDVI

#define MASK_VANDVI   0xfc00707f

◆ MASK_VANDVV

#define MASK_VANDVV   0xfc00707f

◆ MASK_VANDVX

#define MASK_VANDVX   0xfc00707f

◆ MASK_VASUBUVV

#define MASK_VASUBUVV   0xfc00707f

◆ MASK_VASUBUVX

#define MASK_VASUBUVX   0xfc00707f

◆ MASK_VASUBVV

#define MASK_VASUBVV   0xfc00707f

◆ MASK_VASUBVX

#define MASK_VASUBVX   0xfc00707f

◆ MASK_VBREV8_V

#define MASK_VBREV8_V   0xfc0ff07f

◆ MASK_VBREV_V

#define MASK_VBREV_V   0xfc0ff07f

◆ MASK_VCLMUL_VV

#define MASK_VCLMUL_VV   0xfc00707f

◆ MASK_VCLMUL_VX

#define MASK_VCLMUL_VX   0xfc00707f

◆ MASK_VCLMULH_VV

#define MASK_VCLMULH_VV   0xfc00707f

◆ MASK_VCLMULH_VX

#define MASK_VCLMULH_VX   0xfc00707f

◆ MASK_VCLZ_V

#define MASK_VCLZ_V   0xfc0ff07f

◆ MASK_VCOMPRESSVM

#define MASK_VCOMPRESSVM   0xfe00707f

◆ MASK_VCPOP_V

#define MASK_VCPOP_V   0xfc0ff07f

◆ MASK_VCPOPM

#define MASK_VCPOPM   0xfc0ff07f

◆ MASK_VCTZ_V

#define MASK_VCTZ_V   0xfc0ff07f

◆ MASK_VDIVUVV

#define MASK_VDIVUVV   0xfc00707f

◆ MASK_VDIVUVX

#define MASK_VDIVUVX   0xfc00707f

◆ MASK_VDIVVV

#define MASK_VDIVVV   0xfc00707f

◆ MASK_VDIVVX

#define MASK_VDIVVX   0xfc00707f

◆ MASK_VDOTUVV

#define MASK_VDOTUVV   0xfc00707f

◆ MASK_VDOTVV

#define MASK_VDOTVV   0xfc00707f

◆ MASK_VFADDVF

#define MASK_VFADDVF   0xfc00707f

◆ MASK_VFADDVV

#define MASK_VFADDVV   0xfc00707f

◆ MASK_VFCLASSV

#define MASK_VFCLASSV   0xfc0ff07f

◆ MASK_VFCVTFXUV

#define MASK_VFCVTFXUV   0xfc0ff07f

◆ MASK_VFCVTFXV

#define MASK_VFCVTFXV   0xfc0ff07f

◆ MASK_VFCVTRTZXFV

#define MASK_VFCVTRTZXFV   0xfc0ff07f

◆ MASK_VFCVTRTZXUFV

#define MASK_VFCVTRTZXUFV   0xfc0ff07f

◆ MASK_VFCVTXFV

#define MASK_VFCVTXFV   0xfc0ff07f

◆ MASK_VFCVTXUFV

#define MASK_VFCVTXUFV   0xfc0ff07f

◆ MASK_VFDIVVF

#define MASK_VFDIVVF   0xfc00707f

◆ MASK_VFDIVVV

#define MASK_VFDIVVV   0xfc00707f

◆ MASK_VFDOTVV

#define MASK_VFDOTVV   0xfc00707f

◆ MASK_VFIRSTM

#define MASK_VFIRSTM   0xfc0ff07f

◆ MASK_VFMACCVF

#define MASK_VFMACCVF   0xfc00707f

◆ MASK_VFMACCVV

#define MASK_VFMACCVV   0xfc00707f

◆ MASK_VFMADDVF

#define MASK_VFMADDVF   0xfc00707f

◆ MASK_VFMADDVV

#define MASK_VFMADDVV   0xfc00707f

◆ MASK_VFMAXVF

#define MASK_VFMAXVF   0xfc00707f

◆ MASK_VFMAXVV

#define MASK_VFMAXVV   0xfc00707f

◆ MASK_VFMERGEVFM

#define MASK_VFMERGEVFM   0xfe00707f

◆ MASK_VFMINVF

#define MASK_VFMINVF   0xfc00707f

◆ MASK_VFMINVV

#define MASK_VFMINVV   0xfc00707f

◆ MASK_VFMSACVF

#define MASK_VFMSACVF   0xfc00707f

◆ MASK_VFMSACVV

#define MASK_VFMSACVV   0xfc00707f

◆ MASK_VFMSUBVF

#define MASK_VFMSUBVF   0xfc00707f

◆ MASK_VFMSUBVV

#define MASK_VFMSUBVV   0xfc00707f

◆ MASK_VFMULVF

#define MASK_VFMULVF   0xfc00707f

◆ MASK_VFMULVV

#define MASK_VFMULVV   0xfc00707f

◆ MASK_VFMVFS

#define MASK_VFMVFS   0xfe0ff07f

◆ MASK_VFMVSF

#define MASK_VFMVSF   0xfff0707f

◆ MASK_VFMVVF

#define MASK_VFMVVF   0xfff0707f

◆ MASK_VFNCVTFFW

#define MASK_VFNCVTFFW   0xfc0ff07f

◆ MASK_VFNCVTFXUW

#define MASK_VFNCVTFXUW   0xfc0ff07f

◆ MASK_VFNCVTFXW

#define MASK_VFNCVTFXW   0xfc0ff07f

◆ MASK_VFNCVTRODFFW

#define MASK_VFNCVTRODFFW   0xfc0ff07f

◆ MASK_VFNCVTRTZXFW

#define MASK_VFNCVTRTZXFW   0xfc0ff07f

◆ MASK_VFNCVTRTZXUFW

#define MASK_VFNCVTRTZXUFW   0xfc0ff07f

◆ MASK_VFNCVTXFW

#define MASK_VFNCVTXFW   0xfc0ff07f

◆ MASK_VFNCVTXUFW

#define MASK_VFNCVTXUFW   0xfc0ff07f

◆ MASK_VFNMACCVF

#define MASK_VFNMACCVF   0xfc00707f

◆ MASK_VFNMACCVV

#define MASK_VFNMACCVV   0xfc00707f

◆ MASK_VFNMADDVF

#define MASK_VFNMADDVF   0xfc00707f

◆ MASK_VFNMADDVV

#define MASK_VFNMADDVV   0xfc00707f

◆ MASK_VFNMSACVF

#define MASK_VFNMSACVF   0xfc00707f

◆ MASK_VFNMSACVV

#define MASK_VFNMSACVV   0xfc00707f

◆ MASK_VFNMSUBVF

#define MASK_VFNMSUBVF   0xfc00707f

◆ MASK_VFNMSUBVV

#define MASK_VFNMSUBVV   0xfc00707f

◆ MASK_VFRDIVVF

#define MASK_VFRDIVVF   0xfc00707f

◆ MASK_VFREC7V

#define MASK_VFREC7V   0xfc0ff07f

◆ MASK_VFREDMAXVS

#define MASK_VFREDMAXVS   0xfc00707f

◆ MASK_VFREDMINVS

#define MASK_VFREDMINVS   0xfc00707f

◆ MASK_VFREDOSUMVS

#define MASK_VFREDOSUMVS   0xfc00707f

◆ MASK_VFREDUSUMVS

#define MASK_VFREDUSUMVS   0xfc00707f

◆ MASK_VFRSQRT7V

#define MASK_VFRSQRT7V   0xfc0ff07f

◆ MASK_VFRSUBVF

#define MASK_VFRSUBVF   0xfc00707f

◆ MASK_VFSGNJNVF

#define MASK_VFSGNJNVF   0xfc00707f

◆ MASK_VFSGNJNVV

#define MASK_VFSGNJNVV   0xfc00707f

◆ MASK_VFSGNJVF

#define MASK_VFSGNJVF   0xfc00707f

◆ MASK_VFSGNJVV

#define MASK_VFSGNJVV   0xfc00707f

◆ MASK_VFSGNJXVF

#define MASK_VFSGNJXVF   0xfc00707f

◆ MASK_VFSGNJXVV

#define MASK_VFSGNJXVV   0xfc00707f

◆ MASK_VFSLIDE1DOWNVF

#define MASK_VFSLIDE1DOWNVF   0xfc00707f

◆ MASK_VFSLIDE1UPVF

#define MASK_VFSLIDE1UPVF   0xfc00707f

◆ MASK_VFSQRTV

#define MASK_VFSQRTV   0xfc0ff07f

◆ MASK_VFSUBVF

#define MASK_VFSUBVF   0xfc00707f

◆ MASK_VFSUBVV

#define MASK_VFSUBVV   0xfc00707f

◆ MASK_VFWADDVF

#define MASK_VFWADDVF   0xfc00707f

◆ MASK_VFWADDVV

#define MASK_VFWADDVV   0xfc00707f

◆ MASK_VFWADDWF

#define MASK_VFWADDWF   0xfc00707f

◆ MASK_VFWADDWV

#define MASK_VFWADDWV   0xfc00707f

◆ MASK_VFWCVTFFV

#define MASK_VFWCVTFFV   0xfc0ff07f

◆ MASK_VFWCVTFXUV

#define MASK_VFWCVTFXUV   0xfc0ff07f

◆ MASK_VFWCVTFXV

#define MASK_VFWCVTFXV   0xfc0ff07f

◆ MASK_VFWCVTRTZXFV

#define MASK_VFWCVTRTZXFV   0xfc0ff07f

◆ MASK_VFWCVTRTZXUFV

#define MASK_VFWCVTRTZXUFV   0xfc0ff07f

◆ MASK_VFWCVTXFV

#define MASK_VFWCVTXFV   0xfc0ff07f

◆ MASK_VFWCVTXUFV

#define MASK_VFWCVTXUFV   0xfc0ff07f

◆ MASK_VFWMACCVF

#define MASK_VFWMACCVF   0xfc00707f

◆ MASK_VFWMACCVV

#define MASK_VFWMACCVV   0xfc00707f

◆ MASK_VFWMSACVF

#define MASK_VFWMSACVF   0xfc00707f

◆ MASK_VFWMSACVV

#define MASK_VFWMSACVV   0xfc00707f

◆ MASK_VFWMULVF

#define MASK_VFWMULVF   0xfc00707f

◆ MASK_VFWMULVV

#define MASK_VFWMULVV   0xfc00707f

◆ MASK_VFWNMACCVF

#define MASK_VFWNMACCVF   0xfc00707f

◆ MASK_VFWNMACCVV

#define MASK_VFWNMACCVV   0xfc00707f

◆ MASK_VFWNMSACVF

#define MASK_VFWNMSACVF   0xfc00707f

◆ MASK_VFWNMSACVV

#define MASK_VFWNMSACVV   0xfc00707f

◆ MASK_VFWREDOSUMVS

#define MASK_VFWREDOSUMVS   0xfc00707f

◆ MASK_VFWREDUSUMVS

#define MASK_VFWREDUSUMVS   0xfc00707f

◆ MASK_VFWSUBVF

#define MASK_VFWSUBVF   0xfc00707f

◆ MASK_VFWSUBVV

#define MASK_VFWSUBVV   0xfc00707f

◆ MASK_VFWSUBWF

#define MASK_VFWSUBWF   0xfc00707f

◆ MASK_VFWSUBWV

#define MASK_VFWSUBWV   0xfc00707f

◆ MASK_VGHSH_VV

#define MASK_VGHSH_VV   0xfe00707f

◆ MASK_VGMUL_VV

#define MASK_VGMUL_VV   0xfe0ff07f

◆ MASK_VIDV

#define MASK_VIDV   0xfdfff07f

◆ MASK_VIOTAM

#define MASK_VIOTAM   0xfc0ff07f

◆ MASK_VL1RE16V

#define MASK_VL1RE16V   0xfff0707f

◆ MASK_VL1RE32V

#define MASK_VL1RE32V   0xfff0707f

◆ MASK_VL1RE64V

#define MASK_VL1RE64V   0xfff0707f

◆ MASK_VL1RE8V

#define MASK_VL1RE8V   0xfff0707f

◆ MASK_VL2RE16V

#define MASK_VL2RE16V   0xfff0707f

◆ MASK_VL2RE32V

#define MASK_VL2RE32V   0xfff0707f

◆ MASK_VL2RE64V

#define MASK_VL2RE64V   0xfff0707f

◆ MASK_VL2RE8V

#define MASK_VL2RE8V   0xfff0707f

◆ MASK_VL4RE16V

#define MASK_VL4RE16V   0xfff0707f

◆ MASK_VL4RE32V

#define MASK_VL4RE32V   0xfff0707f

◆ MASK_VL4RE64V

#define MASK_VL4RE64V   0xfff0707f

◆ MASK_VL4RE8V

#define MASK_VL4RE8V   0xfff0707f

◆ MASK_VL8RE16V

#define MASK_VL8RE16V   0xfff0707f

◆ MASK_VL8RE32V

#define MASK_VL8RE32V   0xfff0707f

◆ MASK_VL8RE64V

#define MASK_VL8RE64V   0xfff0707f

◆ MASK_VL8RE8V

#define MASK_VL8RE8V   0xfff0707f

◆ MASK_VLE16FFV

#define MASK_VLE16FFV   0xfdf0707f

◆ MASK_VLE16V

#define MASK_VLE16V   0xfdf0707f

◆ MASK_VLE32FFV

#define MASK_VLE32FFV   0xfdf0707f

◆ MASK_VLE32V

#define MASK_VLE32V   0xfdf0707f

◆ MASK_VLE64FFV

#define MASK_VLE64FFV   0xfdf0707f

◆ MASK_VLE64V

#define MASK_VLE64V   0xfdf0707f

◆ MASK_VLE8FFV

#define MASK_VLE8FFV   0xfdf0707f

◆ MASK_VLE8V

#define MASK_VLE8V   0xfdf0707f

◆ MASK_VLMV

#define MASK_VLMV   0xfff0707f

◆ MASK_VLOXEI16V

#define MASK_VLOXEI16V   0xfc00707f

◆ MASK_VLOXEI32V

#define MASK_VLOXEI32V   0xfc00707f

◆ MASK_VLOXEI64V

#define MASK_VLOXEI64V   0xfc00707f

◆ MASK_VLOXEI8V

#define MASK_VLOXEI8V   0xfc00707f

◆ MASK_VLOXSEG2EI16V

#define MASK_VLOXSEG2EI16V   0xfc00707f

◆ MASK_VLOXSEG2EI32V

#define MASK_VLOXSEG2EI32V   0xfc00707f

◆ MASK_VLOXSEG2EI64V

#define MASK_VLOXSEG2EI64V   0xfc00707f

◆ MASK_VLOXSEG2EI8V

#define MASK_VLOXSEG2EI8V   0xfc00707f

◆ MASK_VLOXSEG3EI16V

#define MASK_VLOXSEG3EI16V   0xfc00707f

◆ MASK_VLOXSEG3EI32V

#define MASK_VLOXSEG3EI32V   0xfc00707f

◆ MASK_VLOXSEG3EI64V

#define MASK_VLOXSEG3EI64V   0xfc00707f

◆ MASK_VLOXSEG3EI8V

#define MASK_VLOXSEG3EI8V   0xfc00707f

◆ MASK_VLOXSEG4EI16V

#define MASK_VLOXSEG4EI16V   0xfc00707f

◆ MASK_VLOXSEG4EI32V

#define MASK_VLOXSEG4EI32V   0xfc00707f

◆ MASK_VLOXSEG4EI64V

#define MASK_VLOXSEG4EI64V   0xfc00707f

◆ MASK_VLOXSEG4EI8V

#define MASK_VLOXSEG4EI8V   0xfc00707f

◆ MASK_VLOXSEG5EI16V

#define MASK_VLOXSEG5EI16V   0xfc00707f

◆ MASK_VLOXSEG5EI32V

#define MASK_VLOXSEG5EI32V   0xfc00707f

◆ MASK_VLOXSEG5EI64V

#define MASK_VLOXSEG5EI64V   0xfc00707f

◆ MASK_VLOXSEG5EI8V

#define MASK_VLOXSEG5EI8V   0xfc00707f

◆ MASK_VLOXSEG6EI16V

#define MASK_VLOXSEG6EI16V   0xfc00707f

◆ MASK_VLOXSEG6EI32V

#define MASK_VLOXSEG6EI32V   0xfc00707f

◆ MASK_VLOXSEG6EI64V

#define MASK_VLOXSEG6EI64V   0xfc00707f

◆ MASK_VLOXSEG6EI8V

#define MASK_VLOXSEG6EI8V   0xfc00707f

◆ MASK_VLOXSEG7EI16V

#define MASK_VLOXSEG7EI16V   0xfc00707f

◆ MASK_VLOXSEG7EI32V

#define MASK_VLOXSEG7EI32V   0xfc00707f

◆ MASK_VLOXSEG7EI64V

#define MASK_VLOXSEG7EI64V   0xfc00707f

◆ MASK_VLOXSEG7EI8V

#define MASK_VLOXSEG7EI8V   0xfc00707f

◆ MASK_VLOXSEG8EI16V

#define MASK_VLOXSEG8EI16V   0xfc00707f

◆ MASK_VLOXSEG8EI32V

#define MASK_VLOXSEG8EI32V   0xfc00707f

◆ MASK_VLOXSEG8EI64V

#define MASK_VLOXSEG8EI64V   0xfc00707f

◆ MASK_VLOXSEG8EI8V

#define MASK_VLOXSEG8EI8V   0xfc00707f

◆ MASK_VLSE16V

#define MASK_VLSE16V   0xfc00707f

◆ MASK_VLSE32V

#define MASK_VLSE32V   0xfc00707f

◆ MASK_VLSE64V

#define MASK_VLSE64V   0xfc00707f

◆ MASK_VLSE8V

#define MASK_VLSE8V   0xfc00707f

◆ MASK_VLSEG2E16FFV

#define MASK_VLSEG2E16FFV   0xfdf0707f

◆ MASK_VLSEG2E16V

#define MASK_VLSEG2E16V   0xfdf0707f

◆ MASK_VLSEG2E32FFV

#define MASK_VLSEG2E32FFV   0xfdf0707f

◆ MASK_VLSEG2E32V

#define MASK_VLSEG2E32V   0xfdf0707f

◆ MASK_VLSEG2E64FFV

#define MASK_VLSEG2E64FFV   0xfdf0707f

◆ MASK_VLSEG2E64V

#define MASK_VLSEG2E64V   0xfdf0707f

◆ MASK_VLSEG2E8FFV

#define MASK_VLSEG2E8FFV   0xfdf0707f

◆ MASK_VLSEG2E8V

#define MASK_VLSEG2E8V   0xfdf0707f

◆ MASK_VLSEG3E16FFV

#define MASK_VLSEG3E16FFV   0xfdf0707f

◆ MASK_VLSEG3E16V

#define MASK_VLSEG3E16V   0xfdf0707f

◆ MASK_VLSEG3E32FFV

#define MASK_VLSEG3E32FFV   0xfdf0707f

◆ MASK_VLSEG3E32V

#define MASK_VLSEG3E32V   0xfdf0707f

◆ MASK_VLSEG3E64FFV

#define MASK_VLSEG3E64FFV   0xfdf0707f

◆ MASK_VLSEG3E64V

#define MASK_VLSEG3E64V   0xfdf0707f

◆ MASK_VLSEG3E8FFV

#define MASK_VLSEG3E8FFV   0xfdf0707f

◆ MASK_VLSEG3E8V

#define MASK_VLSEG3E8V   0xfdf0707f

◆ MASK_VLSEG4E16FFV

#define MASK_VLSEG4E16FFV   0xfdf0707f

◆ MASK_VLSEG4E16V

#define MASK_VLSEG4E16V   0xfdf0707f

◆ MASK_VLSEG4E32FFV

#define MASK_VLSEG4E32FFV   0xfdf0707f

◆ MASK_VLSEG4E32V

#define MASK_VLSEG4E32V   0xfdf0707f

◆ MASK_VLSEG4E64FFV

#define MASK_VLSEG4E64FFV   0xfdf0707f

◆ MASK_VLSEG4E64V

#define MASK_VLSEG4E64V   0xfdf0707f

◆ MASK_VLSEG4E8FFV

#define MASK_VLSEG4E8FFV   0xfdf0707f

◆ MASK_VLSEG4E8V

#define MASK_VLSEG4E8V   0xfdf0707f

◆ MASK_VLSEG5E16FFV

#define MASK_VLSEG5E16FFV   0xfdf0707f

◆ MASK_VLSEG5E16V

#define MASK_VLSEG5E16V   0xfdf0707f

◆ MASK_VLSEG5E32FFV

#define MASK_VLSEG5E32FFV   0xfdf0707f

◆ MASK_VLSEG5E32V

#define MASK_VLSEG5E32V   0xfdf0707f

◆ MASK_VLSEG5E64FFV

#define MASK_VLSEG5E64FFV   0xfdf0707f

◆ MASK_VLSEG5E64V

#define MASK_VLSEG5E64V   0xfdf0707f

◆ MASK_VLSEG5E8FFV

#define MASK_VLSEG5E8FFV   0xfdf0707f

◆ MASK_VLSEG5E8V

#define MASK_VLSEG5E8V   0xfdf0707f

◆ MASK_VLSEG6E16FFV

#define MASK_VLSEG6E16FFV   0xfdf0707f

◆ MASK_VLSEG6E16V

#define MASK_VLSEG6E16V   0xfdf0707f

◆ MASK_VLSEG6E32FFV

#define MASK_VLSEG6E32FFV   0xfdf0707f

◆ MASK_VLSEG6E32V

#define MASK_VLSEG6E32V   0xfdf0707f

◆ MASK_VLSEG6E64FFV

#define MASK_VLSEG6E64FFV   0xfdf0707f

◆ MASK_VLSEG6E64V

#define MASK_VLSEG6E64V   0xfdf0707f

◆ MASK_VLSEG6E8FFV

#define MASK_VLSEG6E8FFV   0xfdf0707f

◆ MASK_VLSEG6E8V

#define MASK_VLSEG6E8V   0xfdf0707f

◆ MASK_VLSEG7E16FFV

#define MASK_VLSEG7E16FFV   0xfdf0707f

◆ MASK_VLSEG7E16V

#define MASK_VLSEG7E16V   0xfdf0707f

◆ MASK_VLSEG7E32FFV

#define MASK_VLSEG7E32FFV   0xfdf0707f

◆ MASK_VLSEG7E32V

#define MASK_VLSEG7E32V   0xfdf0707f

◆ MASK_VLSEG7E64FFV

#define MASK_VLSEG7E64FFV   0xfdf0707f

◆ MASK_VLSEG7E64V

#define MASK_VLSEG7E64V   0xfdf0707f

◆ MASK_VLSEG7E8FFV

#define MASK_VLSEG7E8FFV   0xfdf0707f

◆ MASK_VLSEG7E8V

#define MASK_VLSEG7E8V   0xfdf0707f

◆ MASK_VLSEG8E16FFV

#define MASK_VLSEG8E16FFV   0xfdf0707f

◆ MASK_VLSEG8E16V

#define MASK_VLSEG8E16V   0xfdf0707f

◆ MASK_VLSEG8E32FFV

#define MASK_VLSEG8E32FFV   0xfdf0707f

◆ MASK_VLSEG8E32V

#define MASK_VLSEG8E32V   0xfdf0707f

◆ MASK_VLSEG8E64FFV

#define MASK_VLSEG8E64FFV   0xfdf0707f

◆ MASK_VLSEG8E64V

#define MASK_VLSEG8E64V   0xfdf0707f

◆ MASK_VLSEG8E8FFV

#define MASK_VLSEG8E8FFV   0xfdf0707f

◆ MASK_VLSEG8E8V

#define MASK_VLSEG8E8V   0xfdf0707f

◆ MASK_VLSSEG2E16V

#define MASK_VLSSEG2E16V   0xfc00707f

◆ MASK_VLSSEG2E32V

#define MASK_VLSSEG2E32V   0xfc00707f

◆ MASK_VLSSEG2E64V

#define MASK_VLSSEG2E64V   0xfc00707f

◆ MASK_VLSSEG2E8V

#define MASK_VLSSEG2E8V   0xfc00707f

◆ MASK_VLSSEG3E16V

#define MASK_VLSSEG3E16V   0xfc00707f

◆ MASK_VLSSEG3E32V

#define MASK_VLSSEG3E32V   0xfc00707f

◆ MASK_VLSSEG3E64V

#define MASK_VLSSEG3E64V   0xfc00707f

◆ MASK_VLSSEG3E8V

#define MASK_VLSSEG3E8V   0xfc00707f

◆ MASK_VLSSEG4E16V

#define MASK_VLSSEG4E16V   0xfc00707f

◆ MASK_VLSSEG4E32V

#define MASK_VLSSEG4E32V   0xfc00707f

◆ MASK_VLSSEG4E64V

#define MASK_VLSSEG4E64V   0xfc00707f

◆ MASK_VLSSEG4E8V

#define MASK_VLSSEG4E8V   0xfc00707f

◆ MASK_VLSSEG5E16V

#define MASK_VLSSEG5E16V   0xfc00707f

◆ MASK_VLSSEG5E32V

#define MASK_VLSSEG5E32V   0xfc00707f

◆ MASK_VLSSEG5E64V

#define MASK_VLSSEG5E64V   0xfc00707f

◆ MASK_VLSSEG5E8V

#define MASK_VLSSEG5E8V   0xfc00707f

◆ MASK_VLSSEG6E16V

#define MASK_VLSSEG6E16V   0xfc00707f

◆ MASK_VLSSEG6E32V

#define MASK_VLSSEG6E32V   0xfc00707f

◆ MASK_VLSSEG6E64V

#define MASK_VLSSEG6E64V   0xfc00707f

◆ MASK_VLSSEG6E8V

#define MASK_VLSSEG6E8V   0xfc00707f

◆ MASK_VLSSEG7E16V

#define MASK_VLSSEG7E16V   0xfc00707f

◆ MASK_VLSSEG7E32V

#define MASK_VLSSEG7E32V   0xfc00707f

◆ MASK_VLSSEG7E64V

#define MASK_VLSSEG7E64V   0xfc00707f

◆ MASK_VLSSEG7E8V

#define MASK_VLSSEG7E8V   0xfc00707f

◆ MASK_VLSSEG8E16V

#define MASK_VLSSEG8E16V   0xfc00707f

◆ MASK_VLSSEG8E32V

#define MASK_VLSSEG8E32V   0xfc00707f

◆ MASK_VLSSEG8E64V

#define MASK_VLSSEG8E64V   0xfc00707f

◆ MASK_VLSSEG8E8V

#define MASK_VLSSEG8E8V   0xfc00707f

◆ MASK_VLUXEI16V

#define MASK_VLUXEI16V   0xfc00707f

◆ MASK_VLUXEI32V

#define MASK_VLUXEI32V   0xfc00707f

◆ MASK_VLUXEI64V

#define MASK_VLUXEI64V   0xfc00707f

◆ MASK_VLUXEI8V

#define MASK_VLUXEI8V   0xfc00707f

◆ MASK_VLUXSEG2EI16V

#define MASK_VLUXSEG2EI16V   0xfc00707f

◆ MASK_VLUXSEG2EI32V

#define MASK_VLUXSEG2EI32V   0xfc00707f

◆ MASK_VLUXSEG2EI64V

#define MASK_VLUXSEG2EI64V   0xfc00707f

◆ MASK_VLUXSEG2EI8V

#define MASK_VLUXSEG2EI8V   0xfc00707f

◆ MASK_VLUXSEG3EI16V

#define MASK_VLUXSEG3EI16V   0xfc00707f

◆ MASK_VLUXSEG3EI32V

#define MASK_VLUXSEG3EI32V   0xfc00707f

◆ MASK_VLUXSEG3EI64V

#define MASK_VLUXSEG3EI64V   0xfc00707f

◆ MASK_VLUXSEG3EI8V

#define MASK_VLUXSEG3EI8V   0xfc00707f

◆ MASK_VLUXSEG4EI16V

#define MASK_VLUXSEG4EI16V   0xfc00707f

◆ MASK_VLUXSEG4EI32V

#define MASK_VLUXSEG4EI32V   0xfc00707f

◆ MASK_VLUXSEG4EI64V

#define MASK_VLUXSEG4EI64V   0xfc00707f

◆ MASK_VLUXSEG4EI8V

#define MASK_VLUXSEG4EI8V   0xfc00707f

◆ MASK_VLUXSEG5EI16V

#define MASK_VLUXSEG5EI16V   0xfc00707f

◆ MASK_VLUXSEG5EI32V

#define MASK_VLUXSEG5EI32V   0xfc00707f

◆ MASK_VLUXSEG5EI64V

#define MASK_VLUXSEG5EI64V   0xfc00707f

◆ MASK_VLUXSEG5EI8V

#define MASK_VLUXSEG5EI8V   0xfc00707f

◆ MASK_VLUXSEG6EI16V

#define MASK_VLUXSEG6EI16V   0xfc00707f

◆ MASK_VLUXSEG6EI32V

#define MASK_VLUXSEG6EI32V   0xfc00707f

◆ MASK_VLUXSEG6EI64V

#define MASK_VLUXSEG6EI64V   0xfc00707f

◆ MASK_VLUXSEG6EI8V

#define MASK_VLUXSEG6EI8V   0xfc00707f

◆ MASK_VLUXSEG7EI16V

#define MASK_VLUXSEG7EI16V   0xfc00707f

◆ MASK_VLUXSEG7EI32V

#define MASK_VLUXSEG7EI32V   0xfc00707f

◆ MASK_VLUXSEG7EI64V

#define MASK_VLUXSEG7EI64V   0xfc00707f

◆ MASK_VLUXSEG7EI8V

#define MASK_VLUXSEG7EI8V   0xfc00707f

◆ MASK_VLUXSEG8EI16V

#define MASK_VLUXSEG8EI16V   0xfc00707f

◆ MASK_VLUXSEG8EI32V

#define MASK_VLUXSEG8EI32V   0xfc00707f

◆ MASK_VLUXSEG8EI64V

#define MASK_VLUXSEG8EI64V   0xfc00707f

◆ MASK_VLUXSEG8EI8V

#define MASK_VLUXSEG8EI8V   0xfc00707f

◆ MASK_VMACCVV

#define MASK_VMACCVV   0xfc00707f

◆ MASK_VMACCVX

#define MASK_VMACCVX   0xfc00707f

◆ MASK_VMADCVI

#define MASK_VMADCVI   0xfe00707f

◆ MASK_VMADCVIM

#define MASK_VMADCVIM   0xfe00707f

◆ MASK_VMADCVV

#define MASK_VMADCVV   0xfe00707f

◆ MASK_VMADCVVM

#define MASK_VMADCVVM   0xfe00707f

◆ MASK_VMADCVX

#define MASK_VMADCVX   0xfe00707f

◆ MASK_VMADCVXM

#define MASK_VMADCVXM   0xfe00707f

◆ MASK_VMADDVV

#define MASK_VMADDVV   0xfc00707f

◆ MASK_VMADDVX

#define MASK_VMADDVX   0xfc00707f

◆ MASK_VMANDMM

#define MASK_VMANDMM   0xfe00707f

◆ MASK_VMANDNMM

#define MASK_VMANDNMM   0xfe00707f

◆ MASK_VMAXUVV

#define MASK_VMAXUVV   0xfc00707f

◆ MASK_VMAXUVX

#define MASK_VMAXUVX   0xfc00707f

◆ MASK_VMAXVV

#define MASK_VMAXVV   0xfc00707f

◆ MASK_VMAXVX

#define MASK_VMAXVX   0xfc00707f

◆ MASK_VMERGEVIM

#define MASK_VMERGEVIM   0xfe00707f

◆ MASK_VMERGEVVM

#define MASK_VMERGEVVM   0xfe00707f

◆ MASK_VMERGEVXM

#define MASK_VMERGEVXM   0xfe00707f

◆ MASK_VMFEQVF

#define MASK_VMFEQVF   0xfc00707f

◆ MASK_VMFEQVV

#define MASK_VMFEQVV   0xfc00707f

◆ MASK_VMFGEVF

#define MASK_VMFGEVF   0xfc00707f

◆ MASK_VMFGTVF

#define MASK_VMFGTVF   0xfc00707f

◆ MASK_VMFLEVF

#define MASK_VMFLEVF   0xfc00707f

◆ MASK_VMFLEVV

#define MASK_VMFLEVV   0xfc00707f

◆ MASK_VMFLTVF

#define MASK_VMFLTVF   0xfc00707f

◆ MASK_VMFLTVV

#define MASK_VMFLTVV   0xfc00707f

◆ MASK_VMFNEVF

#define MASK_VMFNEVF   0xfc00707f

◆ MASK_VMFNEVV

#define MASK_VMFNEVV   0xfc00707f

◆ MASK_VMINUVV

#define MASK_VMINUVV   0xfc00707f

◆ MASK_VMINUVX

#define MASK_VMINUVX   0xfc00707f

◆ MASK_VMINVV

#define MASK_VMINVV   0xfc00707f

◆ MASK_VMINVX

#define MASK_VMINVX   0xfc00707f

◆ MASK_VMNANDMM

#define MASK_VMNANDMM   0xfe00707f

◆ MASK_VMNORMM

#define MASK_VMNORMM   0xfe00707f

◆ MASK_VMORMM

#define MASK_VMORMM   0xfe00707f

◆ MASK_VMORNMM

#define MASK_VMORNMM   0xfe00707f

◆ MASK_VMSBCVV

#define MASK_VMSBCVV   0xfe00707f

◆ MASK_VMSBCVVM

#define MASK_VMSBCVVM   0xfe00707f

◆ MASK_VMSBCVX

#define MASK_VMSBCVX   0xfe00707f

◆ MASK_VMSBCVXM

#define MASK_VMSBCVXM   0xfe00707f

◆ MASK_VMSBFM

#define MASK_VMSBFM   0xfc0ff07f

◆ MASK_VMSEQVI

#define MASK_VMSEQVI   0xfc00707f

◆ MASK_VMSEQVV

#define MASK_VMSEQVV   0xfc00707f

◆ MASK_VMSEQVX

#define MASK_VMSEQVX   0xfc00707f

◆ MASK_VMSGTUVI

#define MASK_VMSGTUVI   0xfc00707f

◆ MASK_VMSGTUVX

#define MASK_VMSGTUVX   0xfc00707f

◆ MASK_VMSGTVI

#define MASK_VMSGTVI   0xfc00707f

◆ MASK_VMSGTVX

#define MASK_VMSGTVX   0xfc00707f

◆ MASK_VMSIFM

#define MASK_VMSIFM   0xfc0ff07f

◆ MASK_VMSLEUVI

#define MASK_VMSLEUVI   0xfc00707f

◆ MASK_VMSLEUVV

#define MASK_VMSLEUVV   0xfc00707f

◆ MASK_VMSLEUVX

#define MASK_VMSLEUVX   0xfc00707f

◆ MASK_VMSLEVI

#define MASK_VMSLEVI   0xfc00707f

◆ MASK_VMSLEVV

#define MASK_VMSLEVV   0xfc00707f

◆ MASK_VMSLEVX

#define MASK_VMSLEVX   0xfc00707f

◆ MASK_VMSLTUVV

#define MASK_VMSLTUVV   0xfc00707f

◆ MASK_VMSLTUVX

#define MASK_VMSLTUVX   0xfc00707f

◆ MASK_VMSLTVV

#define MASK_VMSLTVV   0xfc00707f

◆ MASK_VMSLTVX

#define MASK_VMSLTVX   0xfc00707f

◆ MASK_VMSNEVI

#define MASK_VMSNEVI   0xfc00707f

◆ MASK_VMSNEVV

#define MASK_VMSNEVV   0xfc00707f

◆ MASK_VMSNEVX

#define MASK_VMSNEVX   0xfc00707f

◆ MASK_VMSOFM

#define MASK_VMSOFM   0xfc0ff07f

◆ MASK_VMULHSUVV

#define MASK_VMULHSUVV   0xfc00707f

◆ MASK_VMULHSUVX

#define MASK_VMULHSUVX   0xfc00707f

◆ MASK_VMULHUVV

#define MASK_VMULHUVV   0xfc00707f

◆ MASK_VMULHUVX

#define MASK_VMULHUVX   0xfc00707f

◆ MASK_VMULHVV

#define MASK_VMULHVV   0xfc00707f

◆ MASK_VMULHVX

#define MASK_VMULHVX   0xfc00707f

◆ MASK_VMULVV

#define MASK_VMULVV   0xfc00707f

◆ MASK_VMULVX

#define MASK_VMULVX   0xfc00707f

◆ MASK_VMV1RV

#define MASK_VMV1RV   0xfe0ff07f

◆ MASK_VMV2RV

#define MASK_VMV2RV   0xfe0ff07f

◆ MASK_VMV4RV

#define MASK_VMV4RV   0xfe0ff07f

◆ MASK_VMV8RV

#define MASK_VMV8RV   0xfe0ff07f

◆ MASK_VMVSX

#define MASK_VMVSX   0xfff0707f

◆ MASK_VMVVI

#define MASK_VMVVI   0xfff0707f

◆ MASK_VMVVV

#define MASK_VMVVV   0xfff0707f

◆ MASK_VMVVX

#define MASK_VMVVX   0xfff0707f

◆ MASK_VMVXS

#define MASK_VMVXS   0xfe0ff07f

◆ MASK_VMXNORMM

#define MASK_VMXNORMM   0xfe00707f

◆ MASK_VMXORMM

#define MASK_VMXORMM   0xfe00707f

◆ MASK_VNCLIPUWI

#define MASK_VNCLIPUWI   0xfc00707f

◆ MASK_VNCLIPUWV

#define MASK_VNCLIPUWV   0xfc00707f

◆ MASK_VNCLIPUWX

#define MASK_VNCLIPUWX   0xfc00707f

◆ MASK_VNCLIPWI

#define MASK_VNCLIPWI   0xfc00707f

◆ MASK_VNCLIPWV

#define MASK_VNCLIPWV   0xfc00707f

◆ MASK_VNCLIPWX

#define MASK_VNCLIPWX   0xfc00707f

◆ MASK_VNCVTXXW

#define MASK_VNCVTXXW   0xfc0ff07f

◆ MASK_VNMSACVV

#define MASK_VNMSACVV   0xfc00707f

◆ MASK_VNMSACVX

#define MASK_VNMSACVX   0xfc00707f

◆ MASK_VNMSUBVV

#define MASK_VNMSUBVV   0xfc00707f

◆ MASK_VNMSUBVX

#define MASK_VNMSUBVX   0xfc00707f

◆ MASK_VNOTV

#define MASK_VNOTV   0xfc0ff07f

◆ MASK_VNSRAWI

#define MASK_VNSRAWI   0xfc00707f

◆ MASK_VNSRAWV

#define MASK_VNSRAWV   0xfc00707f

◆ MASK_VNSRAWX

#define MASK_VNSRAWX   0xfc00707f

◆ MASK_VNSRLWI

#define MASK_VNSRLWI   0xfc00707f

◆ MASK_VNSRLWV

#define MASK_VNSRLWV   0xfc00707f

◆ MASK_VNSRLWX

#define MASK_VNSRLWX   0xfc00707f

◆ MASK_VORVI

#define MASK_VORVI   0xfc00707f

◆ MASK_VORVV

#define MASK_VORVV   0xfc00707f

◆ MASK_VORVX

#define MASK_VORVX   0xfc00707f

◆ MASK_VQMACCSUVV

#define MASK_VQMACCSUVV   0xfc00707f

◆ MASK_VQMACCSUVX

#define MASK_VQMACCSUVX   0xfc00707f

◆ MASK_VQMACCUSVX

#define MASK_VQMACCUSVX   0xfc00707f

◆ MASK_VQMACCUVV

#define MASK_VQMACCUVV   0xfc00707f

◆ MASK_VQMACCUVX

#define MASK_VQMACCUVX   0xfc00707f

◆ MASK_VQMACCVV

#define MASK_VQMACCVV   0xfc00707f

◆ MASK_VQMACCVX

#define MASK_VQMACCVX   0xfc00707f

◆ MASK_VREDANDVS

#define MASK_VREDANDVS   0xfc00707f

◆ MASK_VREDMAXUVS

#define MASK_VREDMAXUVS   0xfc00707f

◆ MASK_VREDMAXVS

#define MASK_VREDMAXVS   0xfc00707f

◆ MASK_VREDMINUVS

#define MASK_VREDMINUVS   0xfc00707f

◆ MASK_VREDMINVS

#define MASK_VREDMINVS   0xfc00707f

◆ MASK_VREDORVS

#define MASK_VREDORVS   0xfc00707f

◆ MASK_VREDSUMVS

#define MASK_VREDSUMVS   0xfc00707f

◆ MASK_VREDXORVS

#define MASK_VREDXORVS   0xfc00707f

◆ MASK_VREMUVV

#define MASK_VREMUVV   0xfc00707f

◆ MASK_VREMUVX

#define MASK_VREMUVX   0xfc00707f

◆ MASK_VREMVV

#define MASK_VREMVV   0xfc00707f

◆ MASK_VREMVX

#define MASK_VREMVX   0xfc00707f

◆ MASK_VREV8_V

#define MASK_VREV8_V   0xfc0ff07f

◆ MASK_VRGATHEREI16VV

#define MASK_VRGATHEREI16VV   0xfc00707f

◆ MASK_VRGATHERVI

#define MASK_VRGATHERVI   0xfc00707f

◆ MASK_VRGATHERVV

#define MASK_VRGATHERVV   0xfc00707f

◆ MASK_VRGATHERVX

#define MASK_VRGATHERVX   0xfc00707f

◆ MASK_VROL_VV

#define MASK_VROL_VV   0xfc00707f

◆ MASK_VROL_VX

#define MASK_VROL_VX   0xfc00707f

◆ MASK_VROR_VI

#define MASK_VROR_VI   0xf800707f

◆ MASK_VROR_VV

#define MASK_VROR_VV   0xfc00707f

◆ MASK_VROR_VX

#define MASK_VROR_VX   0xfc00707f

◆ MASK_VRSUBVI

#define MASK_VRSUBVI   0xfc00707f

◆ MASK_VRSUBVX

#define MASK_VRSUBVX   0xfc00707f

◆ MASK_VS1RV

#define MASK_VS1RV   0xfff0707f

◆ MASK_VS2RV

#define MASK_VS2RV   0xfff0707f

◆ MASK_VS4RV

#define MASK_VS4RV   0xfff0707f

◆ MASK_VS8RV

#define MASK_VS8RV   0xfff0707f

◆ MASK_VSADDUVI

#define MASK_VSADDUVI   0xfc00707f

◆ MASK_VSADDUVV

#define MASK_VSADDUVV   0xfc00707f

◆ MASK_VSADDUVX

#define MASK_VSADDUVX   0xfc00707f

◆ MASK_VSADDVI

#define MASK_VSADDVI   0xfc00707f

◆ MASK_VSADDVV

#define MASK_VSADDVV   0xfc00707f

◆ MASK_VSADDVX

#define MASK_VSADDVX   0xfc00707f

◆ MASK_VSBCVVM

#define MASK_VSBCVVM   0xfe00707f

◆ MASK_VSBCVXM

#define MASK_VSBCVXM   0xfe00707f

◆ MASK_VSE16V

#define MASK_VSE16V   0xfdf0707f

◆ MASK_VSE32V

#define MASK_VSE32V   0xfdf0707f

◆ MASK_VSE64V

#define MASK_VSE64V   0xfdf0707f

◆ MASK_VSE8V

#define MASK_VSE8V   0xfdf0707f

◆ MASK_VSETIVLI

#define MASK_VSETIVLI   0xc000707f

◆ MASK_VSETVL

#define MASK_VSETVL   0xfe00707f

◆ MASK_VSETVLI

#define MASK_VSETVLI   0x8000707f

◆ MASK_VSEXT_VF2

#define MASK_VSEXT_VF2   0xfc0ff07f

◆ MASK_VSEXT_VF4

#define MASK_VSEXT_VF4   0xfc0ff07f

◆ MASK_VSEXT_VF8

#define MASK_VSEXT_VF8   0xfc0ff07f

◆ MASK_VSHA2CH_VV

#define MASK_VSHA2CH_VV   0xfe00707f

◆ MASK_VSHA2CL_VV

#define MASK_VSHA2CL_VV   0xfe00707f

◆ MASK_VSHA2MS_VV

#define MASK_VSHA2MS_VV   0xfe00707f

◆ MASK_VSLIDE1DOWNVX

#define MASK_VSLIDE1DOWNVX   0xfc00707f

◆ MASK_VSLIDE1UPVX

#define MASK_VSLIDE1UPVX   0xfc00707f

◆ MASK_VSLIDEDOWNVI

#define MASK_VSLIDEDOWNVI   0xfc00707f

◆ MASK_VSLIDEDOWNVX

#define MASK_VSLIDEDOWNVX   0xfc00707f

◆ MASK_VSLIDEUPVI

#define MASK_VSLIDEUPVI   0xfc00707f

◆ MASK_VSLIDEUPVX

#define MASK_VSLIDEUPVX   0xfc00707f

◆ MASK_VSLLVI

#define MASK_VSLLVI   0xfc00707f

◆ MASK_VSLLVV

#define MASK_VSLLVV   0xfc00707f

◆ MASK_VSLLVX

#define MASK_VSLLVX   0xfc00707f

◆ MASK_VSM3C_VI

#define MASK_VSM3C_VI   0xfe00707f

◆ MASK_VSM3ME_VV

#define MASK_VSM3ME_VV   0xfe00707f

◆ MASK_VSM4K_VI

#define MASK_VSM4K_VI   0xfe00707f

◆ MASK_VSM4R_VS

#define MASK_VSM4R_VS   0xfe0ff07f

◆ MASK_VSM4R_VV

#define MASK_VSM4R_VV   0xfe0ff07f

◆ MASK_VSMULVV

#define MASK_VSMULVV   0xfc00707f

◆ MASK_VSMULVX

#define MASK_VSMULVX   0xfc00707f

◆ MASK_VSMV

#define MASK_VSMV   0xfff0707f

◆ MASK_VSOXEI16V

#define MASK_VSOXEI16V   0xfc00707f

◆ MASK_VSOXEI32V

#define MASK_VSOXEI32V   0xfc00707f

◆ MASK_VSOXEI64V

#define MASK_VSOXEI64V   0xfc00707f

◆ MASK_VSOXEI8V

#define MASK_VSOXEI8V   0xfc00707f

◆ MASK_VSOXSEG2EI16V

#define MASK_VSOXSEG2EI16V   0xfc00707f

◆ MASK_VSOXSEG2EI32V

#define MASK_VSOXSEG2EI32V   0xfc00707f

◆ MASK_VSOXSEG2EI64V

#define MASK_VSOXSEG2EI64V   0xfc00707f

◆ MASK_VSOXSEG2EI8V

#define MASK_VSOXSEG2EI8V   0xfc00707f

◆ MASK_VSOXSEG3EI16V

#define MASK_VSOXSEG3EI16V   0xfc00707f

◆ MASK_VSOXSEG3EI32V

#define MASK_VSOXSEG3EI32V   0xfc00707f

◆ MASK_VSOXSEG3EI64V

#define MASK_VSOXSEG3EI64V   0xfc00707f

◆ MASK_VSOXSEG3EI8V

#define MASK_VSOXSEG3EI8V   0xfc00707f

◆ MASK_VSOXSEG4EI16V

#define MASK_VSOXSEG4EI16V   0xfc00707f

◆ MASK_VSOXSEG4EI32V

#define MASK_VSOXSEG4EI32V   0xfc00707f

◆ MASK_VSOXSEG4EI64V

#define MASK_VSOXSEG4EI64V   0xfc00707f

◆ MASK_VSOXSEG4EI8V

#define MASK_VSOXSEG4EI8V   0xfc00707f

◆ MASK_VSOXSEG5EI16V

#define MASK_VSOXSEG5EI16V   0xfc00707f

◆ MASK_VSOXSEG5EI32V

#define MASK_VSOXSEG5EI32V   0xfc00707f

◆ MASK_VSOXSEG5EI64V

#define MASK_VSOXSEG5EI64V   0xfc00707f

◆ MASK_VSOXSEG5EI8V

#define MASK_VSOXSEG5EI8V   0xfc00707f

◆ MASK_VSOXSEG6EI16V

#define MASK_VSOXSEG6EI16V   0xfc00707f

◆ MASK_VSOXSEG6EI32V

#define MASK_VSOXSEG6EI32V   0xfc00707f

◆ MASK_VSOXSEG6EI64V

#define MASK_VSOXSEG6EI64V   0xfc00707f

◆ MASK_VSOXSEG6EI8V

#define MASK_VSOXSEG6EI8V   0xfc00707f

◆ MASK_VSOXSEG7EI16V

#define MASK_VSOXSEG7EI16V   0xfc00707f

◆ MASK_VSOXSEG7EI32V

#define MASK_VSOXSEG7EI32V   0xfc00707f

◆ MASK_VSOXSEG7EI64V

#define MASK_VSOXSEG7EI64V   0xfc00707f

◆ MASK_VSOXSEG7EI8V

#define MASK_VSOXSEG7EI8V   0xfc00707f

◆ MASK_VSOXSEG8EI16V

#define MASK_VSOXSEG8EI16V   0xfc00707f

◆ MASK_VSOXSEG8EI32V

#define MASK_VSOXSEG8EI32V   0xfc00707f

◆ MASK_VSOXSEG8EI64V

#define MASK_VSOXSEG8EI64V   0xfc00707f

◆ MASK_VSOXSEG8EI8V

#define MASK_VSOXSEG8EI8V   0xfc00707f

◆ MASK_VSRAVI

#define MASK_VSRAVI   0xfc00707f

◆ MASK_VSRAVV

#define MASK_VSRAVV   0xfc00707f

◆ MASK_VSRAVX

#define MASK_VSRAVX   0xfc00707f

◆ MASK_VSRLVI

#define MASK_VSRLVI   0xfc00707f

◆ MASK_VSRLVV

#define MASK_VSRLVV   0xfc00707f

◆ MASK_VSRLVX

#define MASK_VSRLVX   0xfc00707f

◆ MASK_VSSE16V

#define MASK_VSSE16V   0xfc00707f

◆ MASK_VSSE32V

#define MASK_VSSE32V   0xfc00707f

◆ MASK_VSSE64V

#define MASK_VSSE64V   0xfc00707f

◆ MASK_VSSE8V

#define MASK_VSSE8V   0xfc00707f

◆ MASK_VSSEG2E16V

#define MASK_VSSEG2E16V   0xfdf0707f

◆ MASK_VSSEG2E32V

#define MASK_VSSEG2E32V   0xfdf0707f

◆ MASK_VSSEG2E64V

#define MASK_VSSEG2E64V   0xfdf0707f

◆ MASK_VSSEG2E8V

#define MASK_VSSEG2E8V   0xfdf0707f

◆ MASK_VSSEG3E16V

#define MASK_VSSEG3E16V   0xfdf0707f

◆ MASK_VSSEG3E32V

#define MASK_VSSEG3E32V   0xfdf0707f

◆ MASK_VSSEG3E64V

#define MASK_VSSEG3E64V   0xfdf0707f

◆ MASK_VSSEG3E8V

#define MASK_VSSEG3E8V   0xfdf0707f

◆ MASK_VSSEG4E16V

#define MASK_VSSEG4E16V   0xfdf0707f

◆ MASK_VSSEG4E32V

#define MASK_VSSEG4E32V   0xfdf0707f

◆ MASK_VSSEG4E64V

#define MASK_VSSEG4E64V   0xfdf0707f

◆ MASK_VSSEG4E8V

#define MASK_VSSEG4E8V   0xfdf0707f

◆ MASK_VSSEG5E16V

#define MASK_VSSEG5E16V   0xfdf0707f

◆ MASK_VSSEG5E32V

#define MASK_VSSEG5E32V   0xfdf0707f

◆ MASK_VSSEG5E64V

#define MASK_VSSEG5E64V   0xfdf0707f

◆ MASK_VSSEG5E8V

#define MASK_VSSEG5E8V   0xfdf0707f

◆ MASK_VSSEG6E16V

#define MASK_VSSEG6E16V   0xfdf0707f

◆ MASK_VSSEG6E32V

#define MASK_VSSEG6E32V   0xfdf0707f

◆ MASK_VSSEG6E64V

#define MASK_VSSEG6E64V   0xfdf0707f

◆ MASK_VSSEG6E8V

#define MASK_VSSEG6E8V   0xfdf0707f

◆ MASK_VSSEG7E16V

#define MASK_VSSEG7E16V   0xfdf0707f

◆ MASK_VSSEG7E32V

#define MASK_VSSEG7E32V   0xfdf0707f

◆ MASK_VSSEG7E64V

#define MASK_VSSEG7E64V   0xfdf0707f

◆ MASK_VSSEG7E8V

#define MASK_VSSEG7E8V   0xfdf0707f

◆ MASK_VSSEG8E16V

#define MASK_VSSEG8E16V   0xfdf0707f

◆ MASK_VSSEG8E32V

#define MASK_VSSEG8E32V   0xfdf0707f

◆ MASK_VSSEG8E64V

#define MASK_VSSEG8E64V   0xfdf0707f

◆ MASK_VSSEG8E8V

#define MASK_VSSEG8E8V   0xfdf0707f

◆ MASK_VSSRAVI

#define MASK_VSSRAVI   0xfc00707f

◆ MASK_VSSRAVV

#define MASK_VSSRAVV   0xfc00707f

◆ MASK_VSSRAVX

#define MASK_VSSRAVX   0xfc00707f

◆ MASK_VSSRLVI

#define MASK_VSSRLVI   0xfc00707f

◆ MASK_VSSRLVV

#define MASK_VSSRLVV   0xfc00707f

◆ MASK_VSSRLVX

#define MASK_VSSRLVX   0xfc00707f

◆ MASK_VSSSEG2E16V

#define MASK_VSSSEG2E16V   0xfc00707f

◆ MASK_VSSSEG2E32V

#define MASK_VSSSEG2E32V   0xfc00707f

◆ MASK_VSSSEG2E64V

#define MASK_VSSSEG2E64V   0xfc00707f

◆ MASK_VSSSEG2E8V

#define MASK_VSSSEG2E8V   0xfc00707f

◆ MASK_VSSSEG3E16V

#define MASK_VSSSEG3E16V   0xfc00707f

◆ MASK_VSSSEG3E32V

#define MASK_VSSSEG3E32V   0xfc00707f

◆ MASK_VSSSEG3E64V

#define MASK_VSSSEG3E64V   0xfc00707f

◆ MASK_VSSSEG3E8V

#define MASK_VSSSEG3E8V   0xfc00707f

◆ MASK_VSSSEG4E16V

#define MASK_VSSSEG4E16V   0xfc00707f

◆ MASK_VSSSEG4E32V

#define MASK_VSSSEG4E32V   0xfc00707f

◆ MASK_VSSSEG4E64V

#define MASK_VSSSEG4E64V   0xfc00707f

◆ MASK_VSSSEG4E8V

#define MASK_VSSSEG4E8V   0xfc00707f

◆ MASK_VSSSEG5E16V

#define MASK_VSSSEG5E16V   0xfc00707f

◆ MASK_VSSSEG5E32V

#define MASK_VSSSEG5E32V   0xfc00707f

◆ MASK_VSSSEG5E64V

#define MASK_VSSSEG5E64V   0xfc00707f

◆ MASK_VSSSEG5E8V

#define MASK_VSSSEG5E8V   0xfc00707f

◆ MASK_VSSSEG6E16V

#define MASK_VSSSEG6E16V   0xfc00707f

◆ MASK_VSSSEG6E32V

#define MASK_VSSSEG6E32V   0xfc00707f

◆ MASK_VSSSEG6E64V

#define MASK_VSSSEG6E64V   0xfc00707f

◆ MASK_VSSSEG6E8V

#define MASK_VSSSEG6E8V   0xfc00707f

◆ MASK_VSSSEG7E16V

#define MASK_VSSSEG7E16V   0xfc00707f

◆ MASK_VSSSEG7E32V

#define MASK_VSSSEG7E32V   0xfc00707f

◆ MASK_VSSSEG7E64V

#define MASK_VSSSEG7E64V   0xfc00707f

◆ MASK_VSSSEG7E8V

#define MASK_VSSSEG7E8V   0xfc00707f

◆ MASK_VSSSEG8E16V

#define MASK_VSSSEG8E16V   0xfc00707f

◆ MASK_VSSSEG8E32V

#define MASK_VSSSEG8E32V   0xfc00707f

◆ MASK_VSSSEG8E64V

#define MASK_VSSSEG8E64V   0xfc00707f

◆ MASK_VSSSEG8E8V

#define MASK_VSSSEG8E8V   0xfc00707f

◆ MASK_VSSUBUVV

#define MASK_VSSUBUVV   0xfc00707f

◆ MASK_VSSUBUVX

#define MASK_VSSUBUVX   0xfc00707f

◆ MASK_VSSUBVV

#define MASK_VSSUBVV   0xfc00707f

◆ MASK_VSSUBVX

#define MASK_VSSUBVX   0xfc00707f

◆ MASK_VSUBVV

#define MASK_VSUBVV   0xfc00707f

◆ MASK_VSUBVX

#define MASK_VSUBVX   0xfc00707f

◆ MASK_VSUXEI16V

#define MASK_VSUXEI16V   0xfc00707f

◆ MASK_VSUXEI32V

#define MASK_VSUXEI32V   0xfc00707f

◆ MASK_VSUXEI64V

#define MASK_VSUXEI64V   0xfc00707f

◆ MASK_VSUXEI8V

#define MASK_VSUXEI8V   0xfc00707f

◆ MASK_VSUXSEG2EI16V

#define MASK_VSUXSEG2EI16V   0xfc00707f

◆ MASK_VSUXSEG2EI32V

#define MASK_VSUXSEG2EI32V   0xfc00707f

◆ MASK_VSUXSEG2EI64V

#define MASK_VSUXSEG2EI64V   0xfc00707f

◆ MASK_VSUXSEG2EI8V

#define MASK_VSUXSEG2EI8V   0xfc00707f

◆ MASK_VSUXSEG3EI16V

#define MASK_VSUXSEG3EI16V   0xfc00707f

◆ MASK_VSUXSEG3EI32V

#define MASK_VSUXSEG3EI32V   0xfc00707f

◆ MASK_VSUXSEG3EI64V

#define MASK_VSUXSEG3EI64V   0xfc00707f

◆ MASK_VSUXSEG3EI8V

#define MASK_VSUXSEG3EI8V   0xfc00707f

◆ MASK_VSUXSEG4EI16V

#define MASK_VSUXSEG4EI16V   0xfc00707f

◆ MASK_VSUXSEG4EI32V

#define MASK_VSUXSEG4EI32V   0xfc00707f

◆ MASK_VSUXSEG4EI64V

#define MASK_VSUXSEG4EI64V   0xfc00707f

◆ MASK_VSUXSEG4EI8V

#define MASK_VSUXSEG4EI8V   0xfc00707f

◆ MASK_VSUXSEG5EI16V

#define MASK_VSUXSEG5EI16V   0xfc00707f

◆ MASK_VSUXSEG5EI32V

#define MASK_VSUXSEG5EI32V   0xfc00707f

◆ MASK_VSUXSEG5EI64V

#define MASK_VSUXSEG5EI64V   0xfc00707f

◆ MASK_VSUXSEG5EI8V

#define MASK_VSUXSEG5EI8V   0xfc00707f

◆ MASK_VSUXSEG6EI16V

#define MASK_VSUXSEG6EI16V   0xfc00707f

◆ MASK_VSUXSEG6EI32V

#define MASK_VSUXSEG6EI32V   0xfc00707f

◆ MASK_VSUXSEG6EI64V

#define MASK_VSUXSEG6EI64V   0xfc00707f

◆ MASK_VSUXSEG6EI8V

#define MASK_VSUXSEG6EI8V   0xfc00707f

◆ MASK_VSUXSEG7EI16V

#define MASK_VSUXSEG7EI16V   0xfc00707f

◆ MASK_VSUXSEG7EI32V

#define MASK_VSUXSEG7EI32V   0xfc00707f

◆ MASK_VSUXSEG7EI64V

#define MASK_VSUXSEG7EI64V   0xfc00707f

◆ MASK_VSUXSEG7EI8V

#define MASK_VSUXSEG7EI8V   0xfc00707f

◆ MASK_VSUXSEG8EI16V

#define MASK_VSUXSEG8EI16V   0xfc00707f

◆ MASK_VSUXSEG8EI32V

#define MASK_VSUXSEG8EI32V   0xfc00707f

◆ MASK_VSUXSEG8EI64V

#define MASK_VSUXSEG8EI64V   0xfc00707f

◆ MASK_VSUXSEG8EI8V

#define MASK_VSUXSEG8EI8V   0xfc00707f

◆ MASK_VT_MASKC

#define MASK_VT_MASKC   0xfe00707f

◆ MASK_VT_MASKCN

#define MASK_VT_MASKCN   0xfe00707f

◆ MASK_VWADDUVV

#define MASK_VWADDUVV   0xfc00707f

◆ MASK_VWADDUVX

#define MASK_VWADDUVX   0xfc00707f

◆ MASK_VWADDUWV

#define MASK_VWADDUWV   0xfc00707f

◆ MASK_VWADDUWX

#define MASK_VWADDUWX   0xfc00707f

◆ MASK_VWADDVV

#define MASK_VWADDVV   0xfc00707f

◆ MASK_VWADDVX

#define MASK_VWADDVX   0xfc00707f

◆ MASK_VWADDWV

#define MASK_VWADDWV   0xfc00707f

◆ MASK_VWADDWX

#define MASK_VWADDWX   0xfc00707f

◆ MASK_VWCVTUXXV

#define MASK_VWCVTUXXV   0xfc0ff07f

◆ MASK_VWCVTXXV

#define MASK_VWCVTXXV   0xfc0ff07f

◆ MASK_VWMACCSUVV

#define MASK_VWMACCSUVV   0xfc00707f

◆ MASK_VWMACCSUVX

#define MASK_VWMACCSUVX   0xfc00707f

◆ MASK_VWMACCUSVX

#define MASK_VWMACCUSVX   0xfc00707f

◆ MASK_VWMACCUVV

#define MASK_VWMACCUVV   0xfc00707f

◆ MASK_VWMACCUVX

#define MASK_VWMACCUVX   0xfc00707f

◆ MASK_VWMACCVV

#define MASK_VWMACCVV   0xfc00707f

◆ MASK_VWMACCVX

#define MASK_VWMACCVX   0xfc00707f

◆ MASK_VWMULSUVV

#define MASK_VWMULSUVV   0xfc00707f

◆ MASK_VWMULSUVX

#define MASK_VWMULSUVX   0xfc00707f

◆ MASK_VWMULUVV

#define MASK_VWMULUVV   0xfc00707f

◆ MASK_VWMULUVX

#define MASK_VWMULUVX   0xfc00707f

◆ MASK_VWMULVV

#define MASK_VWMULVV   0xfc00707f

◆ MASK_VWMULVX

#define MASK_VWMULVX   0xfc00707f

◆ MASK_VWREDSUMUVS

#define MASK_VWREDSUMUVS   0xfc00707f

◆ MASK_VWREDSUMVS

#define MASK_VWREDSUMVS   0xfc00707f

◆ MASK_VWSLL_VI

#define MASK_VWSLL_VI   0xfc00707f

◆ MASK_VWSLL_VV

#define MASK_VWSLL_VV   0xfc00707f

◆ MASK_VWSLL_VX

#define MASK_VWSLL_VX   0xfc00707f

◆ MASK_VWSUBUVV

#define MASK_VWSUBUVV   0xfc00707f

◆ MASK_VWSUBUVX

#define MASK_VWSUBUVX   0xfc00707f

◆ MASK_VWSUBUWV

#define MASK_VWSUBUWV   0xfc00707f

◆ MASK_VWSUBUWX

#define MASK_VWSUBUWX   0xfc00707f

◆ MASK_VWSUBVV

#define MASK_VWSUBVV   0xfc00707f

◆ MASK_VWSUBVX

#define MASK_VWSUBVX   0xfc00707f

◆ MASK_VWSUBWV

#define MASK_VWSUBWV   0xfc00707f

◆ MASK_VWSUBWX

#define MASK_VWSUBWX   0xfc00707f

◆ MASK_VXORVI

#define MASK_VXORVI   0xfc00707f

◆ MASK_VXORVV

#define MASK_VXORVV   0xfc00707f

◆ MASK_VXORVX

#define MASK_VXORVX   0xfc00707f

◆ MASK_VZEXT_VF2

#define MASK_VZEXT_VF2   0xfc0ff07f

◆ MASK_VZEXT_VF4

#define MASK_VZEXT_VF4   0xfc0ff07f

◆ MASK_VZEXT_VF8

#define MASK_VZEXT_VF8   0xfc0ff07f

◆ MASK_WFI

#define MASK_WFI   0xffffffff

◆ MASK_WRS_NTO

#define MASK_WRS_NTO   0xffffffff

◆ MASK_WRS_STO

#define MASK_WRS_STO   0xffffffff

◆ MASK_XNOR

#define MASK_XNOR   0xfe00707f

◆ MASK_XOR

#define MASK_XOR   0xfe00707f

◆ MASK_XORI

#define MASK_XORI   0x707f

◆ MASK_XPERM4

#define MASK_XPERM4   0xfe00707f

◆ MASK_XPERM8

#define MASK_XPERM8   0xfe00707f

◆ MATCH_ADD

#define MATCH_ADD   0x33

◆ MATCH_ADD_UW

#define MATCH_ADD_UW   0x800003b

◆ MATCH_ADDI

#define MATCH_ADDI   0x13

◆ MATCH_ADDIW

#define MATCH_ADDIW   0x1b

◆ MATCH_ADDW

#define MATCH_ADDW   0x3b

◆ MATCH_AES32DSI

#define MATCH_AES32DSI   0x2a000033

◆ MATCH_AES32DSMI

#define MATCH_AES32DSMI   0x2e000033

◆ MATCH_AES32ESI

#define MATCH_AES32ESI   0x22000033

◆ MATCH_AES32ESMI

#define MATCH_AES32ESMI   0x26000033

◆ MATCH_AES64DS

#define MATCH_AES64DS   0x3a000033

◆ MATCH_AES64DSM

#define MATCH_AES64DSM   0x3e000033

◆ MATCH_AES64ES

#define MATCH_AES64ES   0x32000033

◆ MATCH_AES64ESM

#define MATCH_AES64ESM   0x36000033

◆ MATCH_AES64IM

#define MATCH_AES64IM   0x30001013

◆ MATCH_AES64KS1I

#define MATCH_AES64KS1I   0x31001013

◆ MATCH_AES64KS2

#define MATCH_AES64KS2   0x7e000033

◆ MATCH_AMOADD_D

#define MATCH_AMOADD_D   0x302f

◆ MATCH_AMOADD_W

#define MATCH_AMOADD_W   0x202f

◆ MATCH_AMOAND_D

#define MATCH_AMOAND_D   0x6000302f

◆ MATCH_AMOAND_W

#define MATCH_AMOAND_W   0x6000202f

◆ MATCH_AMOMAX_D

#define MATCH_AMOMAX_D   0xa000302f

◆ MATCH_AMOMAX_W

#define MATCH_AMOMAX_W   0xa000202f

◆ MATCH_AMOMAXU_D

#define MATCH_AMOMAXU_D   0xe000302f

◆ MATCH_AMOMAXU_W

#define MATCH_AMOMAXU_W   0xe000202f

◆ MATCH_AMOMIN_D

#define MATCH_AMOMIN_D   0x8000302f

◆ MATCH_AMOMIN_W

#define MATCH_AMOMIN_W   0x8000202f

◆ MATCH_AMOMINU_D

#define MATCH_AMOMINU_D   0xc000302f

◆ MATCH_AMOMINU_W

#define MATCH_AMOMINU_W   0xc000202f

◆ MATCH_AMOOR_D

#define MATCH_AMOOR_D   0x4000302f

◆ MATCH_AMOOR_W

#define MATCH_AMOOR_W   0x4000202f

◆ MATCH_AMOSWAP_D

#define MATCH_AMOSWAP_D   0x800302f

◆ MATCH_AMOSWAP_W

#define MATCH_AMOSWAP_W   0x800202f

◆ MATCH_AMOXOR_D

#define MATCH_AMOXOR_D   0x2000302f

◆ MATCH_AMOXOR_W

#define MATCH_AMOXOR_W   0x2000202f

◆ MATCH_AND

#define MATCH_AND   0x7033

◆ MATCH_ANDI

#define MATCH_ANDI   0x7013

◆ MATCH_ANDN

#define MATCH_ANDN   0x40007033

◆ MATCH_AUIPC

#define MATCH_AUIPC   0x17

◆ MATCH_BCLR

#define MATCH_BCLR   0x48001033

◆ MATCH_BCLRI

#define MATCH_BCLRI   0x48001013

◆ MATCH_BEQ

#define MATCH_BEQ   0x63

◆ MATCH_BEXT

#define MATCH_BEXT   0x48005033

◆ MATCH_BEXTI

#define MATCH_BEXTI   0x48005013

◆ MATCH_BGE

#define MATCH_BGE   0x5063

◆ MATCH_BGEU

#define MATCH_BGEU   0x7063

◆ MATCH_BINV

#define MATCH_BINV   0x68001033

◆ MATCH_BINVI

#define MATCH_BINVI   0x68001013

◆ MATCH_BLT

#define MATCH_BLT   0x4063

◆ MATCH_BLTU

#define MATCH_BLTU   0x6063

◆ MATCH_BNE

#define MATCH_BNE   0x1063

◆ MATCH_BSET

#define MATCH_BSET   0x28001033

◆ MATCH_BSETI

#define MATCH_BSETI   0x28001013

◆ MATCH_C_ADD

#define MATCH_C_ADD   0x9002

◆ MATCH_C_ADDI

#define MATCH_C_ADDI   0x1

◆ MATCH_C_ADDI16SP

#define MATCH_C_ADDI16SP   0x6101

◆ MATCH_C_ADDI4SPN

#define MATCH_C_ADDI4SPN   0x0

◆ MATCH_C_ADDIW

#define MATCH_C_ADDIW   0x2001

◆ MATCH_C_ADDW

#define MATCH_C_ADDW   0x9c21

◆ MATCH_C_AND

#define MATCH_C_AND   0x8c61

◆ MATCH_C_ANDI

#define MATCH_C_ANDI   0x8801

◆ MATCH_C_BEQZ

#define MATCH_C_BEQZ   0xc001

◆ MATCH_C_BNEZ

#define MATCH_C_BNEZ   0xe001

◆ MATCH_C_EBREAK

#define MATCH_C_EBREAK   0x9002

◆ MATCH_C_FLD

#define MATCH_C_FLD   0x2000

◆ MATCH_C_FLDSP

#define MATCH_C_FLDSP   0x2002

◆ MATCH_C_FLW

#define MATCH_C_FLW   0x6000

◆ MATCH_C_FLWSP

#define MATCH_C_FLWSP   0x6002

◆ MATCH_C_FSD

#define MATCH_C_FSD   0xa000

◆ MATCH_C_FSDSP

#define MATCH_C_FSDSP   0xa002

◆ MATCH_C_FSW

#define MATCH_C_FSW   0xe000

◆ MATCH_C_FSWSP

#define MATCH_C_FSWSP   0xe002

◆ MATCH_C_J

#define MATCH_C_J   0xa001

◆ MATCH_C_JAL

#define MATCH_C_JAL   0x2001

◆ MATCH_C_JALR

#define MATCH_C_JALR   0x9002

◆ MATCH_C_JR

#define MATCH_C_JR   0x8002

◆ MATCH_C_LBU

#define MATCH_C_LBU   0x8000

◆ MATCH_C_LD

#define MATCH_C_LD   0x6000

◆ MATCH_C_LDSP

#define MATCH_C_LDSP   0x6002

◆ MATCH_C_LH

#define MATCH_C_LH   0x8440

◆ MATCH_C_LHU

#define MATCH_C_LHU   0x8400

◆ MATCH_C_LI

#define MATCH_C_LI   0x4001

◆ MATCH_C_LUI

#define MATCH_C_LUI   0x6001

◆ MATCH_C_LW

#define MATCH_C_LW   0x4000

◆ MATCH_C_LWSP

#define MATCH_C_LWSP   0x4002

◆ MATCH_C_MUL

#define MATCH_C_MUL   0x9c41

◆ MATCH_C_MV

#define MATCH_C_MV   0x8002

◆ MATCH_C_NOP

#define MATCH_C_NOP   0x1

◆ MATCH_C_NOT

#define MATCH_C_NOT   0x9c75

◆ MATCH_C_NTL_ALL

#define MATCH_C_NTL_ALL   0x9016

◆ MATCH_C_NTL_P1

#define MATCH_C_NTL_P1   0x900a

◆ MATCH_C_NTL_PALL

#define MATCH_C_NTL_PALL   0x900e

◆ MATCH_C_NTL_S1

#define MATCH_C_NTL_S1   0x9012

◆ MATCH_C_OR

#define MATCH_C_OR   0x8c41

◆ MATCH_C_SB

#define MATCH_C_SB   0x8800

◆ MATCH_C_SD

#define MATCH_C_SD   0xe000

◆ MATCH_C_SDSP

#define MATCH_C_SDSP   0xe002

◆ MATCH_C_SEXT_B

#define MATCH_C_SEXT_B   0x9c65

◆ MATCH_C_SEXT_H

#define MATCH_C_SEXT_H   0x9c6d

◆ MATCH_C_SH

#define MATCH_C_SH   0x8c00

◆ MATCH_C_SLLI

#define MATCH_C_SLLI   0x2

◆ MATCH_C_SLLI64

#define MATCH_C_SLLI64   0x2

◆ MATCH_C_SRAI

#define MATCH_C_SRAI   0x8401

◆ MATCH_C_SRAI64

#define MATCH_C_SRAI64   0x8401

◆ MATCH_C_SRLI

#define MATCH_C_SRLI   0x8001

◆ MATCH_C_SRLI64

#define MATCH_C_SRLI64   0x8001

◆ MATCH_C_SUB

#define MATCH_C_SUB   0x8c01

◆ MATCH_C_SUBW

#define MATCH_C_SUBW   0x9c01

◆ MATCH_C_SW

#define MATCH_C_SW   0xc000

◆ MATCH_C_SWSP

#define MATCH_C_SWSP   0xc002

◆ MATCH_C_XOR

#define MATCH_C_XOR   0x8c21

◆ MATCH_C_ZEXT_B

#define MATCH_C_ZEXT_B   0x9c61

◆ MATCH_C_ZEXT_H

#define MATCH_C_ZEXT_H   0x9c69

◆ MATCH_C_ZEXT_W

#define MATCH_C_ZEXT_W   0x9c71

◆ MATCH_CBO_CLEAN

#define MATCH_CBO_CLEAN   0x10200f

◆ MATCH_CBO_FLUSH

#define MATCH_CBO_FLUSH   0x20200f

◆ MATCH_CBO_INVAL

#define MATCH_CBO_INVAL   0x200f

◆ MATCH_CBO_ZERO

#define MATCH_CBO_ZERO   0x40200f

◆ MATCH_CLMUL

#define MATCH_CLMUL   0xa001033

◆ MATCH_CLMULH

#define MATCH_CLMULH   0xa003033

◆ MATCH_CLMULR

#define MATCH_CLMULR   0xa002033

◆ MATCH_CLZ

#define MATCH_CLZ   0x60001013

◆ MATCH_CLZW

#define MATCH_CLZW   0x6000101b

◆ MATCH_CPOP

#define MATCH_CPOP   0x60201013

◆ MATCH_CPOPW

#define MATCH_CPOPW   0x6020101b

◆ MATCH_CSRRC

#define MATCH_CSRRC   0x3073

◆ MATCH_CSRRCI

#define MATCH_CSRRCI   0x7073

◆ MATCH_CSRRS

#define MATCH_CSRRS   0x2073

◆ MATCH_CSRRSI

#define MATCH_CSRRSI   0x6073

◆ MATCH_CSRRW

#define MATCH_CSRRW   0x1073

◆ MATCH_CSRRWI

#define MATCH_CSRRWI   0x5073

◆ MATCH_CTZ

#define MATCH_CTZ   0x60101013

◆ MATCH_CTZW

#define MATCH_CTZW   0x6010101b

◆ MATCH_CZERO_EQZ

#define MATCH_CZERO_EQZ   0xe005033

◆ MATCH_CZERO_NEZ

#define MATCH_CZERO_NEZ   0xe007033

◆ MATCH_DIV

#define MATCH_DIV   0x2004033

◆ MATCH_DIVU

#define MATCH_DIVU   0x2005033

◆ MATCH_DIVUW

#define MATCH_DIVUW   0x200503b

◆ MATCH_DIVW

#define MATCH_DIVW   0x200403b

◆ MATCH_DRET

#define MATCH_DRET   0x7b200073

◆ MATCH_EBREAK

#define MATCH_EBREAK   0x100073

◆ MATCH_ECALL

#define MATCH_ECALL   0x73

◆ MATCH_FADD_D

#define MATCH_FADD_D   0x2000053

◆ MATCH_FADD_H

#define MATCH_FADD_H   0x4000053

◆ MATCH_FADD_Q

#define MATCH_FADD_Q   0x6000053

◆ MATCH_FADD_S

#define MATCH_FADD_S   0x53

◆ MATCH_FCLASS_D

#define MATCH_FCLASS_D   0xe2001053

◆ MATCH_FCLASS_H

#define MATCH_FCLASS_H   0xe4001053

◆ MATCH_FCLASS_Q

#define MATCH_FCLASS_Q   0xe6001053

◆ MATCH_FCLASS_S

#define MATCH_FCLASS_S   0xe0001053

◆ MATCH_FCVT_D_H

#define MATCH_FCVT_D_H   0x42200053

◆ MATCH_FCVT_D_L

#define MATCH_FCVT_D_L   0xd2200053

◆ MATCH_FCVT_D_LU

#define MATCH_FCVT_D_LU   0xd2300053

◆ MATCH_FCVT_D_Q

#define MATCH_FCVT_D_Q   0x42300053

◆ MATCH_FCVT_D_S

#define MATCH_FCVT_D_S   0x42000053

◆ MATCH_FCVT_D_W

#define MATCH_FCVT_D_W   0xd2000053

◆ MATCH_FCVT_D_WU

#define MATCH_FCVT_D_WU   0xd2100053

◆ MATCH_FCVT_H_D

#define MATCH_FCVT_H_D   0x44100053

◆ MATCH_FCVT_H_L

#define MATCH_FCVT_H_L   0xd4200053

◆ MATCH_FCVT_H_LU

#define MATCH_FCVT_H_LU   0xd4300053

◆ MATCH_FCVT_H_Q

#define MATCH_FCVT_H_Q   0x44300053

◆ MATCH_FCVT_H_S

#define MATCH_FCVT_H_S   0x44000053

◆ MATCH_FCVT_H_W

#define MATCH_FCVT_H_W   0xd4000053

◆ MATCH_FCVT_H_WU

#define MATCH_FCVT_H_WU   0xd4100053

◆ MATCH_FCVT_L_D

#define MATCH_FCVT_L_D   0xc2200053

◆ MATCH_FCVT_L_H

#define MATCH_FCVT_L_H   0xc4200053

◆ MATCH_FCVT_L_Q

#define MATCH_FCVT_L_Q   0xc6200053

◆ MATCH_FCVT_L_S

#define MATCH_FCVT_L_S   0xc0200053

◆ MATCH_FCVT_LU_D

#define MATCH_FCVT_LU_D   0xc2300053

◆ MATCH_FCVT_LU_H

#define MATCH_FCVT_LU_H   0xc4300053

◆ MATCH_FCVT_LU_Q

#define MATCH_FCVT_LU_Q   0xc6300053

◆ MATCH_FCVT_LU_S

#define MATCH_FCVT_LU_S   0xc0300053

◆ MATCH_FCVT_Q_D

#define MATCH_FCVT_Q_D   0x46100053

◆ MATCH_FCVT_Q_H

#define MATCH_FCVT_Q_H   0x46200053

◆ MATCH_FCVT_Q_L

#define MATCH_FCVT_Q_L   0xd6200053

◆ MATCH_FCVT_Q_LU

#define MATCH_FCVT_Q_LU   0xd6300053

◆ MATCH_FCVT_Q_S

#define MATCH_FCVT_Q_S   0x46000053

◆ MATCH_FCVT_Q_W

#define MATCH_FCVT_Q_W   0xd6000053

◆ MATCH_FCVT_Q_WU

#define MATCH_FCVT_Q_WU   0xd6100053

◆ MATCH_FCVT_S_D

#define MATCH_FCVT_S_D   0x40100053

◆ MATCH_FCVT_S_H

#define MATCH_FCVT_S_H   0x40200053

◆ MATCH_FCVT_S_L

#define MATCH_FCVT_S_L   0xd0200053

◆ MATCH_FCVT_S_LU

#define MATCH_FCVT_S_LU   0xd0300053

◆ MATCH_FCVT_S_Q

#define MATCH_FCVT_S_Q   0x40300053

◆ MATCH_FCVT_S_W

#define MATCH_FCVT_S_W   0xd0000053

◆ MATCH_FCVT_S_WU

#define MATCH_FCVT_S_WU   0xd0100053

◆ MATCH_FCVT_W_D

#define MATCH_FCVT_W_D   0xc2000053

◆ MATCH_FCVT_W_H

#define MATCH_FCVT_W_H   0xc4000053

◆ MATCH_FCVT_W_Q

#define MATCH_FCVT_W_Q   0xc6000053

◆ MATCH_FCVT_W_S

#define MATCH_FCVT_W_S   0xc0000053

◆ MATCH_FCVT_WU_D

#define MATCH_FCVT_WU_D   0xc2100053

◆ MATCH_FCVT_WU_H

#define MATCH_FCVT_WU_H   0xc4100053

◆ MATCH_FCVT_WU_Q

#define MATCH_FCVT_WU_Q   0xc6100053

◆ MATCH_FCVT_WU_S

#define MATCH_FCVT_WU_S   0xc0100053

◆ MATCH_FCVTMOD_W_D

#define MATCH_FCVTMOD_W_D   0xc2801053

◆ MATCH_FDIV_D

#define MATCH_FDIV_D   0x1a000053

◆ MATCH_FDIV_H

#define MATCH_FDIV_H   0x1c000053

◆ MATCH_FDIV_Q

#define MATCH_FDIV_Q   0x1e000053

◆ MATCH_FDIV_S

#define MATCH_FDIV_S   0x18000053

◆ MATCH_FENCE

#define MATCH_FENCE   0xf

◆ MATCH_FENCE_I

#define MATCH_FENCE_I   0x100f

◆ MATCH_FENCE_TSO

#define MATCH_FENCE_TSO   0x8330000f

◆ MATCH_FEQ_D

#define MATCH_FEQ_D   0xa2002053

◆ MATCH_FEQ_H

#define MATCH_FEQ_H   0xa4002053

◆ MATCH_FEQ_Q

#define MATCH_FEQ_Q   0xa6002053

◆ MATCH_FEQ_S

#define MATCH_FEQ_S   0xa0002053

◆ MATCH_FLD

#define MATCH_FLD   0x3007

◆ MATCH_FLE_D

#define MATCH_FLE_D   0xa2000053

◆ MATCH_FLE_H

#define MATCH_FLE_H   0xa4000053

◆ MATCH_FLE_Q

#define MATCH_FLE_Q   0xa6000053

◆ MATCH_FLE_S

#define MATCH_FLE_S   0xa0000053

◆ MATCH_FLEQ_D

#define MATCH_FLEQ_D   0xa2004053

◆ MATCH_FLEQ_H

#define MATCH_FLEQ_H   0xa4004053

◆ MATCH_FLEQ_Q

#define MATCH_FLEQ_Q   0xa6004053

◆ MATCH_FLEQ_S

#define MATCH_FLEQ_S   0xa0004053

◆ MATCH_FLH

#define MATCH_FLH   0x1007

◆ MATCH_FLI_D

#define MATCH_FLI_D   0xf2100053

◆ MATCH_FLI_H

#define MATCH_FLI_H   0xf4100053

◆ MATCH_FLI_Q

#define MATCH_FLI_Q   0xf6100053

◆ MATCH_FLI_S

#define MATCH_FLI_S   0xf0100053

◆ MATCH_FLQ

#define MATCH_FLQ   0x4007

◆ MATCH_FLT_D

#define MATCH_FLT_D   0xa2001053

◆ MATCH_FLT_H

#define MATCH_FLT_H   0xa4001053

◆ MATCH_FLT_Q

#define MATCH_FLT_Q   0xa6001053

◆ MATCH_FLT_S

#define MATCH_FLT_S   0xa0001053

◆ MATCH_FLTQ_D

#define MATCH_FLTQ_D   0xa2005053

◆ MATCH_FLTQ_H

#define MATCH_FLTQ_H   0xa4005053

◆ MATCH_FLTQ_Q

#define MATCH_FLTQ_Q   0xa6005053

◆ MATCH_FLTQ_S

#define MATCH_FLTQ_S   0xa0005053

◆ MATCH_FLW

#define MATCH_FLW   0x2007

◆ MATCH_FMADD_D

#define MATCH_FMADD_D   0x2000043

◆ MATCH_FMADD_H

#define MATCH_FMADD_H   0x4000043

◆ MATCH_FMADD_Q

#define MATCH_FMADD_Q   0x6000043

◆ MATCH_FMADD_S

#define MATCH_FMADD_S   0x43

◆ MATCH_FMAX_D

#define MATCH_FMAX_D   0x2a001053

◆ MATCH_FMAX_H

#define MATCH_FMAX_H   0x2c001053

◆ MATCH_FMAX_Q

#define MATCH_FMAX_Q   0x2e001053

◆ MATCH_FMAX_S

#define MATCH_FMAX_S   0x28001053

◆ MATCH_FMAXM_D

#define MATCH_FMAXM_D   0x2a003053

◆ MATCH_FMAXM_H

#define MATCH_FMAXM_H   0x2c003053

◆ MATCH_FMAXM_Q

#define MATCH_FMAXM_Q   0x2e003053

◆ MATCH_FMAXM_S

#define MATCH_FMAXM_S   0x28003053

◆ MATCH_FMIN_D

#define MATCH_FMIN_D   0x2a000053

◆ MATCH_FMIN_H

#define MATCH_FMIN_H   0x2c000053

◆ MATCH_FMIN_Q

#define MATCH_FMIN_Q   0x2e000053

◆ MATCH_FMIN_S

#define MATCH_FMIN_S   0x28000053

◆ MATCH_FMINM_D

#define MATCH_FMINM_D   0x2a002053

◆ MATCH_FMINM_H

#define MATCH_FMINM_H   0x2c002053

◆ MATCH_FMINM_Q

#define MATCH_FMINM_Q   0x2e002053

◆ MATCH_FMINM_S

#define MATCH_FMINM_S   0x28002053

◆ MATCH_FMSUB_D

#define MATCH_FMSUB_D   0x2000047

◆ MATCH_FMSUB_H

#define MATCH_FMSUB_H   0x4000047

◆ MATCH_FMSUB_Q

#define MATCH_FMSUB_Q   0x6000047

◆ MATCH_FMSUB_S

#define MATCH_FMSUB_S   0x47

◆ MATCH_FMUL_D

#define MATCH_FMUL_D   0x12000053

◆ MATCH_FMUL_H

#define MATCH_FMUL_H   0x14000053

◆ MATCH_FMUL_Q

#define MATCH_FMUL_Q   0x16000053

◆ MATCH_FMUL_S

#define MATCH_FMUL_S   0x10000053

◆ MATCH_FMV_D_X

#define MATCH_FMV_D_X   0xf2000053

◆ MATCH_FMV_H_X

#define MATCH_FMV_H_X   0xf4000053

◆ MATCH_FMV_S_X

#define MATCH_FMV_S_X   0xf0000053

◆ MATCH_FMV_X_D

#define MATCH_FMV_X_D   0xe2000053

◆ MATCH_FMV_X_H

#define MATCH_FMV_X_H   0xe4000053

◆ MATCH_FMV_X_S

#define MATCH_FMV_X_S   0xe0000053

◆ MATCH_FMVH_X_D

#define MATCH_FMVH_X_D   0xe2100053

◆ MATCH_FMVH_X_Q

#define MATCH_FMVH_X_Q   0xe6100053

◆ MATCH_FMVP_D_X

#define MATCH_FMVP_D_X   0xb2000053

◆ MATCH_FMVP_Q_X

#define MATCH_FMVP_Q_X   0xb6000053

◆ MATCH_FNMADD_D

#define MATCH_FNMADD_D   0x200004f

◆ MATCH_FNMADD_H

#define MATCH_FNMADD_H   0x400004f

◆ MATCH_FNMADD_Q

#define MATCH_FNMADD_Q   0x600004f

◆ MATCH_FNMADD_S

#define MATCH_FNMADD_S   0x4f

◆ MATCH_FNMSUB_D

#define MATCH_FNMSUB_D   0x200004b

◆ MATCH_FNMSUB_H

#define MATCH_FNMSUB_H   0x400004b

◆ MATCH_FNMSUB_Q

#define MATCH_FNMSUB_Q   0x600004b

◆ MATCH_FNMSUB_S

#define MATCH_FNMSUB_S   0x4b

◆ MATCH_FRCSR

#define MATCH_FRCSR   0x302073

◆ MATCH_FRFLAGS

#define MATCH_FRFLAGS   0x102073

◆ MATCH_FROUND_D

#define MATCH_FROUND_D   0x42400053

◆ MATCH_FROUND_H

#define MATCH_FROUND_H   0x44400053

◆ MATCH_FROUND_Q

#define MATCH_FROUND_Q   0x46400053

◆ MATCH_FROUND_S

#define MATCH_FROUND_S   0x40400053

◆ MATCH_FROUNDNX_D

#define MATCH_FROUNDNX_D   0x42500053

◆ MATCH_FROUNDNX_H

#define MATCH_FROUNDNX_H   0x44500053

◆ MATCH_FROUNDNX_Q

#define MATCH_FROUNDNX_Q   0x46500053

◆ MATCH_FROUNDNX_S

#define MATCH_FROUNDNX_S   0x40500053

◆ MATCH_FRRM

#define MATCH_FRRM   0x202073

◆ MATCH_FSCSR

#define MATCH_FSCSR   0x301073

◆ MATCH_FSD

#define MATCH_FSD   0x3027

◆ MATCH_FSFLAGS

#define MATCH_FSFLAGS   0x101073

◆ MATCH_FSFLAGSI

#define MATCH_FSFLAGSI   0x105073

◆ MATCH_FSGNJ_D

#define MATCH_FSGNJ_D   0x22000053

◆ MATCH_FSGNJ_H

#define MATCH_FSGNJ_H   0x24000053

◆ MATCH_FSGNJ_Q

#define MATCH_FSGNJ_Q   0x26000053

◆ MATCH_FSGNJ_S

#define MATCH_FSGNJ_S   0x20000053

◆ MATCH_FSGNJN_D

#define MATCH_FSGNJN_D   0x22001053

◆ MATCH_FSGNJN_H

#define MATCH_FSGNJN_H   0x24001053

◆ MATCH_FSGNJN_Q

#define MATCH_FSGNJN_Q   0x26001053

◆ MATCH_FSGNJN_S

#define MATCH_FSGNJN_S   0x20001053

◆ MATCH_FSGNJX_D

#define MATCH_FSGNJX_D   0x22002053

◆ MATCH_FSGNJX_H

#define MATCH_FSGNJX_H   0x24002053

◆ MATCH_FSGNJX_Q

#define MATCH_FSGNJX_Q   0x26002053

◆ MATCH_FSGNJX_S

#define MATCH_FSGNJX_S   0x20002053

◆ MATCH_FSH

#define MATCH_FSH   0x1027

◆ MATCH_FSQ

#define MATCH_FSQ   0x4027

◆ MATCH_FSQRT_D

#define MATCH_FSQRT_D   0x5a000053

◆ MATCH_FSQRT_H

#define MATCH_FSQRT_H   0x5c000053

◆ MATCH_FSQRT_Q

#define MATCH_FSQRT_Q   0x5e000053

◆ MATCH_FSQRT_S

#define MATCH_FSQRT_S   0x58000053

◆ MATCH_FSRM

#define MATCH_FSRM   0x201073

◆ MATCH_FSRMI

#define MATCH_FSRMI   0x205073

◆ MATCH_FSUB_D

#define MATCH_FSUB_D   0xa000053

◆ MATCH_FSUB_H

#define MATCH_FSUB_H   0xc000053

◆ MATCH_FSUB_Q

#define MATCH_FSUB_Q   0xe000053

◆ MATCH_FSUB_S

#define MATCH_FSUB_S   0x8000053

◆ MATCH_FSW

#define MATCH_FSW   0x2027

◆ MATCH_GORCI

#define MATCH_GORCI   0x28005013

◆ MATCH_GREVI

#define MATCH_GREVI   0x68005013

◆ MATCH_HFENCE_GVMA

#define MATCH_HFENCE_GVMA   0x62000073

◆ MATCH_HFENCE_VVMA

#define MATCH_HFENCE_VVMA   0x22000073

◆ MATCH_HINVAL_GVMA

#define MATCH_HINVAL_GVMA   0x66000073

◆ MATCH_HINVAL_VVMA

#define MATCH_HINVAL_VVMA   0x26000073

◆ MATCH_HLV_B

#define MATCH_HLV_B   0x60004073

◆ MATCH_HLV_BU

#define MATCH_HLV_BU   0x60104073

◆ MATCH_HLV_D

#define MATCH_HLV_D   0x6c004073

◆ MATCH_HLV_H

#define MATCH_HLV_H   0x64004073

◆ MATCH_HLV_HU

#define MATCH_HLV_HU   0x64104073

◆ MATCH_HLV_W

#define MATCH_HLV_W   0x68004073

◆ MATCH_HLV_WU

#define MATCH_HLV_WU   0x68104073

◆ MATCH_HLVX_HU

#define MATCH_HLVX_HU   0x64304073

◆ MATCH_HLVX_WU

#define MATCH_HLVX_WU   0x68304073

◆ MATCH_HRET

#define MATCH_HRET   0x20200073

◆ MATCH_HSV_B

#define MATCH_HSV_B   0x62004073

◆ MATCH_HSV_D

#define MATCH_HSV_D   0x6e004073

◆ MATCH_HSV_H

#define MATCH_HSV_H   0x66004073

◆ MATCH_HSV_W

#define MATCH_HSV_W   0x6a004073

◆ MATCH_JAL

#define MATCH_JAL   0x6f

◆ MATCH_JALR

#define MATCH_JALR   0x67

◆ MATCH_LB

#define MATCH_LB   0x3

◆ MATCH_LBU

#define MATCH_LBU   0x4003

◆ MATCH_LD

#define MATCH_LD   0x3003

◆ MATCH_LH

#define MATCH_LH   0x1003

◆ MATCH_LHU

#define MATCH_LHU   0x5003

◆ MATCH_LR_D

#define MATCH_LR_D   0x1000302f

◆ MATCH_LR_W

#define MATCH_LR_W   0x1000202f

◆ MATCH_LUI

#define MATCH_LUI   0x37

◆ MATCH_LW

#define MATCH_LW   0x2003

◆ MATCH_LWU

#define MATCH_LWU   0x6003

◆ MATCH_MAX

#define MATCH_MAX   0xa006033

◆ MATCH_MAXU

#define MATCH_MAXU   0xa007033

◆ MATCH_MIN

#define MATCH_MIN   0xa004033

◆ MATCH_MINU

#define MATCH_MINU   0xa005033

◆ MATCH_MRET

#define MATCH_MRET   0x30200073

◆ MATCH_MUL

#define MATCH_MUL   0x2000033

◆ MATCH_MULH

#define MATCH_MULH   0x2001033

◆ MATCH_MULHSU

#define MATCH_MULHSU   0x2002033

◆ MATCH_MULHU

#define MATCH_MULHU   0x2003033

◆ MATCH_MULW

#define MATCH_MULW   0x200003b

◆ MATCH_NTL_ALL

#define MATCH_NTL_ALL   0x500033

◆ MATCH_NTL_P1

#define MATCH_NTL_P1   0x200033

◆ MATCH_NTL_PALL

#define MATCH_NTL_PALL   0x300033

◆ MATCH_NTL_S1

#define MATCH_NTL_S1   0x400033

◆ MATCH_OR

#define MATCH_OR   0x6033

◆ MATCH_ORI

#define MATCH_ORI   0x6013

◆ MATCH_ORN

#define MATCH_ORN   0x40006033

◆ MATCH_PACK

#define MATCH_PACK   0x8004033

◆ MATCH_PACKH

#define MATCH_PACKH   0x8007033

◆ MATCH_PACKW

#define MATCH_PACKW   0x800403b

◆ MATCH_PAUSE

#define MATCH_PAUSE   0x0100000f

◆ MATCH_PREFETCH_I

#define MATCH_PREFETCH_I   0x6013

◆ MATCH_PREFETCH_R

#define MATCH_PREFETCH_R   0x106013

◆ MATCH_PREFETCH_W

#define MATCH_PREFETCH_W   0x306013

◆ MATCH_RDCYCLE

#define MATCH_RDCYCLE   0xc0002073

◆ MATCH_RDCYCLEH

#define MATCH_RDCYCLEH   0xc8002073

◆ MATCH_RDINSTRET

#define MATCH_RDINSTRET   0xc0202073

◆ MATCH_RDINSTRETH

#define MATCH_RDINSTRETH   0xc8202073

◆ MATCH_RDTIME

#define MATCH_RDTIME   0xc0102073

◆ MATCH_RDTIMEH

#define MATCH_RDTIMEH   0xc8102073

◆ MATCH_REM

#define MATCH_REM   0x2006033

◆ MATCH_REMU

#define MATCH_REMU   0x2007033

◆ MATCH_REMUW

#define MATCH_REMUW   0x200703b

◆ MATCH_REMW

#define MATCH_REMW   0x200603b

◆ MATCH_ROL

#define MATCH_ROL   0x60001033

◆ MATCH_ROLW

#define MATCH_ROLW   0x6000103b

◆ MATCH_ROR

#define MATCH_ROR   0x60005033

◆ MATCH_RORI

#define MATCH_RORI   0x60005013

◆ MATCH_RORIW

#define MATCH_RORIW   0x6000501b

◆ MATCH_RORW

#define MATCH_RORW   0x6000503b

◆ MATCH_SB

#define MATCH_SB   0x23

◆ MATCH_SBREAK

#define MATCH_SBREAK   0x100073

◆ MATCH_SC_D

#define MATCH_SC_D   0x1800302f

◆ MATCH_SC_W

#define MATCH_SC_W   0x1800202f

◆ MATCH_SCALL

#define MATCH_SCALL   0x73

◆ MATCH_SD

#define MATCH_SD   0x3023

◆ MATCH_SEXT_B

#define MATCH_SEXT_B   0x60401013

◆ MATCH_SEXT_H

#define MATCH_SEXT_H   0x60501013

◆ MATCH_SFENCE_INVAL_IR

#define MATCH_SFENCE_INVAL_IR   0x18100073

◆ MATCH_SFENCE_VM

#define MATCH_SFENCE_VM   0x10400073

◆ MATCH_SFENCE_VMA

#define MATCH_SFENCE_VMA   0x12000073

◆ MATCH_SFENCE_W_INVAL

#define MATCH_SFENCE_W_INVAL   0x18000073

◆ MATCH_SH

#define MATCH_SH   0x1023

◆ MATCH_SH1ADD

#define MATCH_SH1ADD   0x20002033

◆ MATCH_SH1ADD_UW

#define MATCH_SH1ADD_UW   0x2000203b

◆ MATCH_SH2ADD

#define MATCH_SH2ADD   0x20004033

◆ MATCH_SH2ADD_UW

#define MATCH_SH2ADD_UW   0x2000403b

◆ MATCH_SH3ADD

#define MATCH_SH3ADD   0x20006033

◆ MATCH_SH3ADD_UW

#define MATCH_SH3ADD_UW   0x2000603b

◆ MATCH_SHA256SIG0

#define MATCH_SHA256SIG0   0x10201013

◆ MATCH_SHA256SIG1

#define MATCH_SHA256SIG1   0x10301013

◆ MATCH_SHA256SUM0

#define MATCH_SHA256SUM0   0x10001013

◆ MATCH_SHA256SUM1

#define MATCH_SHA256SUM1   0x10101013

◆ MATCH_SHA512SIG0

#define MATCH_SHA512SIG0   0x10601013

◆ MATCH_SHA512SIG0H

#define MATCH_SHA512SIG0H   0x5c000033

◆ MATCH_SHA512SIG0L

#define MATCH_SHA512SIG0L   0x54000033

◆ MATCH_SHA512SIG1

#define MATCH_SHA512SIG1   0x10701013

◆ MATCH_SHA512SIG1H

#define MATCH_SHA512SIG1H   0x5e000033

◆ MATCH_SHA512SIG1L

#define MATCH_SHA512SIG1L   0x56000033

◆ MATCH_SHA512SUM0

#define MATCH_SHA512SUM0   0x10401013

◆ MATCH_SHA512SUM0R

#define MATCH_SHA512SUM0R   0x50000033

◆ MATCH_SHA512SUM1

#define MATCH_SHA512SUM1   0x10501013

◆ MATCH_SHA512SUM1R

#define MATCH_SHA512SUM1R   0x52000033

◆ MATCH_SHFLI

#define MATCH_SHFLI   0x8001013

◆ MATCH_SINVAL_VMA

#define MATCH_SINVAL_VMA   0x16000073

◆ MATCH_SLL

#define MATCH_SLL   0x1033

◆ MATCH_SLLI

#define MATCH_SLLI   0x1013

◆ MATCH_SLLI_RV32

#define MATCH_SLLI_RV32   0x1013

◆ MATCH_SLLI_UW

#define MATCH_SLLI_UW   0x800101b

◆ MATCH_SLLIW

#define MATCH_SLLIW   0x101b

◆ MATCH_SLLW

#define MATCH_SLLW   0x103b

◆ MATCH_SLT

#define MATCH_SLT   0x2033

◆ MATCH_SLTI

#define MATCH_SLTI   0x2013

◆ MATCH_SLTIU

#define MATCH_SLTIU   0x3013

◆ MATCH_SLTU

#define MATCH_SLTU   0x3033

◆ MATCH_SM3P0

#define MATCH_SM3P0   0x10801013

◆ MATCH_SM3P1

#define MATCH_SM3P1   0x10901013

◆ MATCH_SM4ED

#define MATCH_SM4ED   0x30000033

◆ MATCH_SM4KS

#define MATCH_SM4KS   0x34000033

◆ MATCH_SRA

#define MATCH_SRA   0x40005033

◆ MATCH_SRAI

#define MATCH_SRAI   0x40005013

◆ MATCH_SRAI_RV32

#define MATCH_SRAI_RV32   0x40005013

◆ MATCH_SRAIW

#define MATCH_SRAIW   0x4000501b

◆ MATCH_SRAW

#define MATCH_SRAW   0x4000503b

◆ MATCH_SRET

#define MATCH_SRET   0x10200073

◆ MATCH_SRL

#define MATCH_SRL   0x5033

◆ MATCH_SRLI

#define MATCH_SRLI   0x5013

◆ MATCH_SRLI_RV32

#define MATCH_SRLI_RV32   0x5013

◆ MATCH_SRLIW

#define MATCH_SRLIW   0x501b

◆ MATCH_SRLW

#define MATCH_SRLW   0x503b

◆ MATCH_SUB

#define MATCH_SUB   0x40000033

◆ MATCH_SUBW

#define MATCH_SUBW   0x4000003b

◆ MATCH_SW

#define MATCH_SW   0x2023

◆ MATCH_TH_ADDSL

#define MATCH_TH_ADDSL   0x0000100b

◆ MATCH_TH_DCACHE_CALL

#define MATCH_TH_DCACHE_CALL   0x0010000b

◆ MATCH_TH_DCACHE_CIALL

#define MATCH_TH_DCACHE_CIALL   0x0030000b

◆ MATCH_TH_DCACHE_CIPA

#define MATCH_TH_DCACHE_CIPA   0x02b0000b

◆ MATCH_TH_DCACHE_CISW

#define MATCH_TH_DCACHE_CISW   0x0230000b

◆ MATCH_TH_DCACHE_CIVA

#define MATCH_TH_DCACHE_CIVA   0x0270000b

◆ MATCH_TH_DCACHE_CPA

#define MATCH_TH_DCACHE_CPA   0x0290000b

◆ MATCH_TH_DCACHE_CPAL1

#define MATCH_TH_DCACHE_CPAL1   0x0280000b

◆ MATCH_TH_DCACHE_CSW

#define MATCH_TH_DCACHE_CSW   0x0210000b

◆ MATCH_TH_DCACHE_CVA

#define MATCH_TH_DCACHE_CVA   0x0250000b

◆ MATCH_TH_DCACHE_CVAL1

#define MATCH_TH_DCACHE_CVAL1   0x0240000b

◆ MATCH_TH_DCACHE_IALL

#define MATCH_TH_DCACHE_IALL   0x0020000b

◆ MATCH_TH_DCACHE_IPA

#define MATCH_TH_DCACHE_IPA   0x02a0000b

◆ MATCH_TH_DCACHE_ISW

#define MATCH_TH_DCACHE_ISW   0x0220000b

◆ MATCH_TH_DCACHE_IVA

#define MATCH_TH_DCACHE_IVA   0x0260000b

◆ MATCH_TH_EXT

#define MATCH_TH_EXT   0x0000200b

◆ MATCH_TH_EXTU

#define MATCH_TH_EXTU   0x0000300b

◆ MATCH_TH_FF0

#define MATCH_TH_FF0   0x8400100b

◆ MATCH_TH_FF1

#define MATCH_TH_FF1   0x8600100b

◆ MATCH_TH_FLRD

#define MATCH_TH_FLRD   0x6000600b

◆ MATCH_TH_FLRW

#define MATCH_TH_FLRW   0x4000600b

◆ MATCH_TH_FLURD

#define MATCH_TH_FLURD   0x7000600b

◆ MATCH_TH_FLURW

#define MATCH_TH_FLURW   0x5000600b

◆ MATCH_TH_FMV_HW_X

#define MATCH_TH_FMV_HW_X   0x5000100b

◆ MATCH_TH_FMV_X_HW

#define MATCH_TH_FMV_X_HW   0x6000100b

◆ MATCH_TH_FSRD

#define MATCH_TH_FSRD   0x6000700b

◆ MATCH_TH_FSRW

#define MATCH_TH_FSRW   0x4000700b

◆ MATCH_TH_FSURD

#define MATCH_TH_FSURD   0x7000700b

◆ MATCH_TH_FSURW

#define MATCH_TH_FSURW   0x5000700b

◆ MATCH_TH_ICACHE_IALL

#define MATCH_TH_ICACHE_IALL   0x0100000b

◆ MATCH_TH_ICACHE_IALLS

#define MATCH_TH_ICACHE_IALLS   0x0110000b

◆ MATCH_TH_ICACHE_IPA

#define MATCH_TH_ICACHE_IPA   0x0380000b

◆ MATCH_TH_ICACHE_IVA

#define MATCH_TH_ICACHE_IVA   0x0300000b

◆ MATCH_TH_IPOP

#define MATCH_TH_IPOP   0x0050000b

◆ MATCH_TH_IPUSH

#define MATCH_TH_IPUSH   0x0040000b

◆ MATCH_TH_L2CACHE_CALL

#define MATCH_TH_L2CACHE_CALL   0x0150000b

◆ MATCH_TH_L2CACHE_CIALL

#define MATCH_TH_L2CACHE_CIALL   0x0170000b

◆ MATCH_TH_L2CACHE_IALL

#define MATCH_TH_L2CACHE_IALL   0x0160000b

◆ MATCH_TH_LBIA

#define MATCH_TH_LBIA   0x1800400b

◆ MATCH_TH_LBIB

#define MATCH_TH_LBIB   0x0800400b

◆ MATCH_TH_LBUIA

#define MATCH_TH_LBUIA   0x9800400b

◆ MATCH_TH_LBUIB

#define MATCH_TH_LBUIB   0x8800400b

◆ MATCH_TH_LDD

#define MATCH_TH_LDD   0xf800400b

◆ MATCH_TH_LDIA

#define MATCH_TH_LDIA   0x7800400b

◆ MATCH_TH_LDIB

#define MATCH_TH_LDIB   0x6800400b

◆ MATCH_TH_LHIA

#define MATCH_TH_LHIA   0x3800400b

◆ MATCH_TH_LHIB

#define MATCH_TH_LHIB   0x2800400b

◆ MATCH_TH_LHUIA

#define MATCH_TH_LHUIA   0xb800400b

◆ MATCH_TH_LHUIB

#define MATCH_TH_LHUIB   0xa800400b

◆ MATCH_TH_LRB

#define MATCH_TH_LRB   0x0000400b

◆ MATCH_TH_LRBU

#define MATCH_TH_LRBU   0x8000400b

◆ MATCH_TH_LRD

#define MATCH_TH_LRD   0x6000400b

◆ MATCH_TH_LRH

#define MATCH_TH_LRH   0x2000400b

◆ MATCH_TH_LRHU

#define MATCH_TH_LRHU   0xa000400b

◆ MATCH_TH_LRW

#define MATCH_TH_LRW   0x4000400b

◆ MATCH_TH_LRWU

#define MATCH_TH_LRWU   0xc000400b

◆ MATCH_TH_LURB

#define MATCH_TH_LURB   0x1000400b

◆ MATCH_TH_LURBU

#define MATCH_TH_LURBU   0x9000400b

◆ MATCH_TH_LURD

#define MATCH_TH_LURD   0x7000400b

◆ MATCH_TH_LURH

#define MATCH_TH_LURH   0x3000400b

◆ MATCH_TH_LURHU

#define MATCH_TH_LURHU   0xb000400b

◆ MATCH_TH_LURW

#define MATCH_TH_LURW   0x5000400b

◆ MATCH_TH_LURWU

#define MATCH_TH_LURWU   0xd000400b

◆ MATCH_TH_LWD

#define MATCH_TH_LWD   0xe000400b

◆ MATCH_TH_LWIA

#define MATCH_TH_LWIA   0x5800400b

◆ MATCH_TH_LWIB

#define MATCH_TH_LWIB   0x4800400b

◆ MATCH_TH_LWUD

#define MATCH_TH_LWUD   0xf000400b

◆ MATCH_TH_LWUIA

#define MATCH_TH_LWUIA   0xd800400b

◆ MATCH_TH_LWUIB

#define MATCH_TH_LWUIB   0xc800400b

◆ MATCH_TH_MULA

#define MATCH_TH_MULA   0x2000100b

◆ MATCH_TH_MULAH

#define MATCH_TH_MULAH   0x2800100b

◆ MATCH_TH_MULAW

#define MATCH_TH_MULAW   0x2400100b

◆ MATCH_TH_MULS

#define MATCH_TH_MULS   0x2200100b

◆ MATCH_TH_MULSH

#define MATCH_TH_MULSH   0x2a00100b

◆ MATCH_TH_MULSW

#define MATCH_TH_MULSW   0x2600100b

◆ MATCH_TH_MVEQZ

#define MATCH_TH_MVEQZ   0x4000100b

◆ MATCH_TH_MVNEZ

#define MATCH_TH_MVNEZ   0x4200100b

◆ MATCH_TH_REV

#define MATCH_TH_REV   0x8200100b

◆ MATCH_TH_REVW

#define MATCH_TH_REVW   0x9000100b

◆ MATCH_TH_SBIA

#define MATCH_TH_SBIA   0x1800500b

◆ MATCH_TH_SBIB

#define MATCH_TH_SBIB   0x0800500b

◆ MATCH_TH_SDD

#define MATCH_TH_SDD   0xf800500b

◆ MATCH_TH_SDIA

#define MATCH_TH_SDIA   0x7800500b

◆ MATCH_TH_SDIB

#define MATCH_TH_SDIB   0x6800500b

◆ MATCH_TH_SFENCE_VMAS

#define MATCH_TH_SFENCE_VMAS   0x0400000b

◆ MATCH_TH_SHIA

#define MATCH_TH_SHIA   0x3800500b

◆ MATCH_TH_SHIB

#define MATCH_TH_SHIB   0x2800500b

◆ MATCH_TH_SRB

#define MATCH_TH_SRB   0x0000500b

◆ MATCH_TH_SRD

#define MATCH_TH_SRD   0x6000500b

◆ MATCH_TH_SRH

#define MATCH_TH_SRH   0x2000500b

◆ MATCH_TH_SRRI

#define MATCH_TH_SRRI   0x1000100b

◆ MATCH_TH_SRRIW

#define MATCH_TH_SRRIW   0x1400100b

◆ MATCH_TH_SRW

#define MATCH_TH_SRW   0x4000500b

◆ MATCH_TH_SURB

#define MATCH_TH_SURB   0x1000500b

◆ MATCH_TH_SURD

#define MATCH_TH_SURD   0x7000500b

◆ MATCH_TH_SURH

#define MATCH_TH_SURH   0x3000500b

◆ MATCH_TH_SURW

#define MATCH_TH_SURW   0x5000500b

◆ MATCH_TH_SWD

#define MATCH_TH_SWD   0xe000500b

◆ MATCH_TH_SWIA

#define MATCH_TH_SWIA   0x5800500b

◆ MATCH_TH_SWIB

#define MATCH_TH_SWIB   0x4800500b

◆ MATCH_TH_SYNC

#define MATCH_TH_SYNC   0x0180000b

◆ MATCH_TH_SYNC_I

#define MATCH_TH_SYNC_I   0x01a0000b

◆ MATCH_TH_SYNC_IS

#define MATCH_TH_SYNC_IS   0x01b0000b

◆ MATCH_TH_SYNC_S

#define MATCH_TH_SYNC_S   0x0190000b

◆ MATCH_TH_TST

#define MATCH_TH_TST   0x8800100b

◆ MATCH_TH_TSTNBZ

#define MATCH_TH_TSTNBZ   0x8000100b

◆ MATCH_UNSHFLI

#define MATCH_UNSHFLI   0x8005013

◆ MATCH_URET

#define MATCH_URET   0x200073

◆ MATCH_VAADDUVV

#define MATCH_VAADDUVV   0x20002057

◆ MATCH_VAADDUVX

#define MATCH_VAADDUVX   0x20006057

◆ MATCH_VAADDVV

#define MATCH_VAADDVV   0x24002057

◆ MATCH_VAADDVX

#define MATCH_VAADDVX   0x24006057

◆ MATCH_VADCVIM

#define MATCH_VADCVIM   0x40003057

◆ MATCH_VADCVVM

#define MATCH_VADCVVM   0x40000057

◆ MATCH_VADCVXM

#define MATCH_VADCVXM   0x40004057

◆ MATCH_VADDVI

#define MATCH_VADDVI   0x00003057

◆ MATCH_VADDVV

#define MATCH_VADDVV   0x00000057

◆ MATCH_VADDVX

#define MATCH_VADDVX   0x00004057

◆ MATCH_VAESDF_VS

#define MATCH_VAESDF_VS   0xa600a077

◆ MATCH_VAESDF_VV

#define MATCH_VAESDF_VV   0xa200a077

◆ MATCH_VAESDM_VS

#define MATCH_VAESDM_VS   0xa6002077

◆ MATCH_VAESDM_VV

#define MATCH_VAESDM_VV   0xa2002077

◆ MATCH_VAESEF_VS

#define MATCH_VAESEF_VS   0xa601a077

◆ MATCH_VAESEF_VV

#define MATCH_VAESEF_VV   0xa201a077

◆ MATCH_VAESEM_VS

#define MATCH_VAESEM_VS   0xa6012077

◆ MATCH_VAESEM_VV

#define MATCH_VAESEM_VV   0xa2012077

◆ MATCH_VAESKF1_VI

#define MATCH_VAESKF1_VI   0x8a002077

◆ MATCH_VAESKF2_VI

#define MATCH_VAESKF2_VI   0xaa002077

◆ MATCH_VAESZ_VS

#define MATCH_VAESZ_VS   0xa603a077

◆ MATCH_VANDN_VV

#define MATCH_VANDN_VV   0x4000057

◆ MATCH_VANDN_VX

#define MATCH_VANDN_VX   0x4004057

◆ MATCH_VANDVI

#define MATCH_VANDVI   0x24003057

◆ MATCH_VANDVV

#define MATCH_VANDVV   0x24000057

◆ MATCH_VANDVX

#define MATCH_VANDVX   0x24004057

◆ MATCH_VASUBUVV

#define MATCH_VASUBUVV   0x28002057

◆ MATCH_VASUBUVX

#define MATCH_VASUBUVX   0x28006057

◆ MATCH_VASUBVV

#define MATCH_VASUBVV   0x2c002057

◆ MATCH_VASUBVX

#define MATCH_VASUBVX   0x2c006057

◆ MATCH_VBREV8_V

#define MATCH_VBREV8_V   0x48042057

◆ MATCH_VBREV_V

#define MATCH_VBREV_V   0x48052057

◆ MATCH_VCLMUL_VV

#define MATCH_VCLMUL_VV   0x30002057

◆ MATCH_VCLMUL_VX

#define MATCH_VCLMUL_VX   0x30006057

◆ MATCH_VCLMULH_VV

#define MATCH_VCLMULH_VV   0x34002057

◆ MATCH_VCLMULH_VX

#define MATCH_VCLMULH_VX   0x34006057

◆ MATCH_VCLZ_V

#define MATCH_VCLZ_V   0x48062057

◆ MATCH_VCOMPRESSVM

#define MATCH_VCOMPRESSVM   0x5e002057

◆ MATCH_VCPOP_V

#define MATCH_VCPOP_V   0x48072057

◆ MATCH_VCPOPM

#define MATCH_VCPOPM   0x40082057

◆ MATCH_VCTZ_V

#define MATCH_VCTZ_V   0x4806a057

◆ MATCH_VDIVUVV

#define MATCH_VDIVUVV   0x80002057

◆ MATCH_VDIVUVX

#define MATCH_VDIVUVX   0x80006057

◆ MATCH_VDIVVV

#define MATCH_VDIVVV   0x84002057

◆ MATCH_VDIVVX

#define MATCH_VDIVVX   0x84006057

◆ MATCH_VDOTUVV

#define MATCH_VDOTUVV   0xe0000057

◆ MATCH_VDOTVV

#define MATCH_VDOTVV   0xe4000057

◆ MATCH_VFADDVF

#define MATCH_VFADDVF   0x00005057

◆ MATCH_VFADDVV

#define MATCH_VFADDVV   0x00001057

◆ MATCH_VFCLASSV

#define MATCH_VFCLASSV   0x4c081057

◆ MATCH_VFCVTFXUV

#define MATCH_VFCVTFXUV   0x48011057

◆ MATCH_VFCVTFXV

#define MATCH_VFCVTFXV   0x48019057

◆ MATCH_VFCVTRTZXFV

#define MATCH_VFCVTRTZXFV   0x48039057

◆ MATCH_VFCVTRTZXUFV

#define MATCH_VFCVTRTZXUFV   0x48031057

◆ MATCH_VFCVTXFV

#define MATCH_VFCVTXFV   0x48009057

◆ MATCH_VFCVTXUFV

#define MATCH_VFCVTXUFV   0x48001057

◆ MATCH_VFDIVVF

#define MATCH_VFDIVVF   0x80005057

◆ MATCH_VFDIVVV

#define MATCH_VFDIVVV   0x80001057

◆ MATCH_VFDOTVV

#define MATCH_VFDOTVV   0xe4001057

◆ MATCH_VFIRSTM

#define MATCH_VFIRSTM   0x4008a057

◆ MATCH_VFMACCVF

#define MATCH_VFMACCVF   0xb0005057

◆ MATCH_VFMACCVV

#define MATCH_VFMACCVV   0xb0001057

◆ MATCH_VFMADDVF

#define MATCH_VFMADDVF   0xa0005057

◆ MATCH_VFMADDVV

#define MATCH_VFMADDVV   0xa0001057

◆ MATCH_VFMAXVF

#define MATCH_VFMAXVF   0x18005057

◆ MATCH_VFMAXVV

#define MATCH_VFMAXVV   0x18001057

◆ MATCH_VFMERGEVFM

#define MATCH_VFMERGEVFM   0x5c005057

◆ MATCH_VFMINVF

#define MATCH_VFMINVF   0x10005057

◆ MATCH_VFMINVV

#define MATCH_VFMINVV   0x10001057

◆ MATCH_VFMSACVF

#define MATCH_VFMSACVF   0xb8005057

◆ MATCH_VFMSACVV

#define MATCH_VFMSACVV   0xb8001057

◆ MATCH_VFMSUBVF

#define MATCH_VFMSUBVF   0xa8005057

◆ MATCH_VFMSUBVV

#define MATCH_VFMSUBVV   0xa8001057

◆ MATCH_VFMULVF

#define MATCH_VFMULVF   0x90005057

◆ MATCH_VFMULVV

#define MATCH_VFMULVV   0x90001057

◆ MATCH_VFMVFS

#define MATCH_VFMVFS   0x42001057

◆ MATCH_VFMVSF

#define MATCH_VFMVSF   0x42005057

◆ MATCH_VFMVVF

#define MATCH_VFMVVF   0x5e005057

◆ MATCH_VFNCVTFFW

#define MATCH_VFNCVTFFW   0x480a1057

◆ MATCH_VFNCVTFXUW

#define MATCH_VFNCVTFXUW   0x48091057

◆ MATCH_VFNCVTFXW

#define MATCH_VFNCVTFXW   0x48099057

◆ MATCH_VFNCVTRODFFW

#define MATCH_VFNCVTRODFFW   0x480a9057

◆ MATCH_VFNCVTRTZXFW

#define MATCH_VFNCVTRTZXFW   0x480b9057

◆ MATCH_VFNCVTRTZXUFW

#define MATCH_VFNCVTRTZXUFW   0x480b1057

◆ MATCH_VFNCVTXFW

#define MATCH_VFNCVTXFW   0x48089057

◆ MATCH_VFNCVTXUFW

#define MATCH_VFNCVTXUFW   0x48081057

◆ MATCH_VFNMACCVF

#define MATCH_VFNMACCVF   0xb4005057

◆ MATCH_VFNMACCVV

#define MATCH_VFNMACCVV   0xb4001057

◆ MATCH_VFNMADDVF

#define MATCH_VFNMADDVF   0xa4005057

◆ MATCH_VFNMADDVV

#define MATCH_VFNMADDVV   0xa4001057

◆ MATCH_VFNMSACVF

#define MATCH_VFNMSACVF   0xbc005057

◆ MATCH_VFNMSACVV

#define MATCH_VFNMSACVV   0xbc001057

◆ MATCH_VFNMSUBVF

#define MATCH_VFNMSUBVF   0xac005057

◆ MATCH_VFNMSUBVV

#define MATCH_VFNMSUBVV   0xac001057

◆ MATCH_VFRDIVVF

#define MATCH_VFRDIVVF   0x84005057

◆ MATCH_VFREC7V

#define MATCH_VFREC7V   0x4c029057

◆ MATCH_VFREDMAXVS

#define MATCH_VFREDMAXVS   0x1c001057

◆ MATCH_VFREDMINVS

#define MATCH_VFREDMINVS   0x14001057

◆ MATCH_VFREDOSUMVS

#define MATCH_VFREDOSUMVS   0x0c001057

◆ MATCH_VFREDUSUMVS

#define MATCH_VFREDUSUMVS   0x04001057

◆ MATCH_VFRSQRT7V

#define MATCH_VFRSQRT7V   0x4c021057

◆ MATCH_VFRSUBVF

#define MATCH_VFRSUBVF   0x9c005057

◆ MATCH_VFSGNJNVF

#define MATCH_VFSGNJNVF   0x24005057

◆ MATCH_VFSGNJNVV

#define MATCH_VFSGNJNVV   0x24001057

◆ MATCH_VFSGNJVF

#define MATCH_VFSGNJVF   0x20005057

◆ MATCH_VFSGNJVV

#define MATCH_VFSGNJVV   0x20001057

◆ MATCH_VFSGNJXVF

#define MATCH_VFSGNJXVF   0x28005057

◆ MATCH_VFSGNJXVV

#define MATCH_VFSGNJXVV   0x28001057

◆ MATCH_VFSLIDE1DOWNVF

#define MATCH_VFSLIDE1DOWNVF   0x3c005057

◆ MATCH_VFSLIDE1UPVF

#define MATCH_VFSLIDE1UPVF   0x38005057

◆ MATCH_VFSQRTV

#define MATCH_VFSQRTV   0x4c001057

◆ MATCH_VFSUBVF

#define MATCH_VFSUBVF   0x08005057

◆ MATCH_VFSUBVV

#define MATCH_VFSUBVV   0x08001057

◆ MATCH_VFWADDVF

#define MATCH_VFWADDVF   0xc0005057

◆ MATCH_VFWADDVV

#define MATCH_VFWADDVV   0xc0001057

◆ MATCH_VFWADDWF

#define MATCH_VFWADDWF   0xd0005057

◆ MATCH_VFWADDWV

#define MATCH_VFWADDWV   0xd0001057

◆ MATCH_VFWCVTFFV

#define MATCH_VFWCVTFFV   0x48061057

◆ MATCH_VFWCVTFXUV

#define MATCH_VFWCVTFXUV   0x48051057

◆ MATCH_VFWCVTFXV

#define MATCH_VFWCVTFXV   0x48059057

◆ MATCH_VFWCVTRTZXFV

#define MATCH_VFWCVTRTZXFV   0x48079057

◆ MATCH_VFWCVTRTZXUFV

#define MATCH_VFWCVTRTZXUFV   0x48071057

◆ MATCH_VFWCVTXFV

#define MATCH_VFWCVTXFV   0x48049057

◆ MATCH_VFWCVTXUFV

#define MATCH_VFWCVTXUFV   0x48041057

◆ MATCH_VFWMACCVF

#define MATCH_VFWMACCVF   0xf0005057

◆ MATCH_VFWMACCVV

#define MATCH_VFWMACCVV   0xf0001057

◆ MATCH_VFWMSACVF

#define MATCH_VFWMSACVF   0xf8005057

◆ MATCH_VFWMSACVV

#define MATCH_VFWMSACVV   0xf8001057

◆ MATCH_VFWMULVF

#define MATCH_VFWMULVF   0xe0005057

◆ MATCH_VFWMULVV

#define MATCH_VFWMULVV   0xe0001057

◆ MATCH_VFWNMACCVF

#define MATCH_VFWNMACCVF   0xf4005057

◆ MATCH_VFWNMACCVV

#define MATCH_VFWNMACCVV   0xf4001057

◆ MATCH_VFWNMSACVF

#define MATCH_VFWNMSACVF   0xfc005057

◆ MATCH_VFWNMSACVV

#define MATCH_VFWNMSACVV   0xfc001057

◆ MATCH_VFWREDOSUMVS

#define MATCH_VFWREDOSUMVS   0xcc001057

◆ MATCH_VFWREDUSUMVS

#define MATCH_VFWREDUSUMVS   0xc4001057

◆ MATCH_VFWSUBVF

#define MATCH_VFWSUBVF   0xc8005057

◆ MATCH_VFWSUBVV

#define MATCH_VFWSUBVV   0xc8001057

◆ MATCH_VFWSUBWF

#define MATCH_VFWSUBWF   0xd8005057

◆ MATCH_VFWSUBWV

#define MATCH_VFWSUBWV   0xd8001057

◆ MATCH_VGHSH_VV

#define MATCH_VGHSH_VV   0xb2002077

◆ MATCH_VGMUL_VV

#define MATCH_VGMUL_VV   0xa208a077

◆ MATCH_VIDV

#define MATCH_VIDV   0x5008a057

◆ MATCH_VIOTAM

#define MATCH_VIOTAM   0x50082057

◆ MATCH_VL1RE16V

#define MATCH_VL1RE16V   0x02805007

◆ MATCH_VL1RE32V

#define MATCH_VL1RE32V   0x02806007

◆ MATCH_VL1RE64V

#define MATCH_VL1RE64V   0x02807007

◆ MATCH_VL1RE8V

#define MATCH_VL1RE8V   0x02800007

◆ MATCH_VL2RE16V

#define MATCH_VL2RE16V   0x22805007

◆ MATCH_VL2RE32V

#define MATCH_VL2RE32V   0x22806007

◆ MATCH_VL2RE64V

#define MATCH_VL2RE64V   0x22807007

◆ MATCH_VL2RE8V

#define MATCH_VL2RE8V   0x22800007

◆ MATCH_VL4RE16V

#define MATCH_VL4RE16V   0x62805007

◆ MATCH_VL4RE32V

#define MATCH_VL4RE32V   0x62806007

◆ MATCH_VL4RE64V

#define MATCH_VL4RE64V   0x62807007

◆ MATCH_VL4RE8V

#define MATCH_VL4RE8V   0x62800007

◆ MATCH_VL8RE16V

#define MATCH_VL8RE16V   0xe2805007

◆ MATCH_VL8RE32V

#define MATCH_VL8RE32V   0xe2806007

◆ MATCH_VL8RE64V

#define MATCH_VL8RE64V   0xe2807007

◆ MATCH_VL8RE8V

#define MATCH_VL8RE8V   0xe2800007

◆ MATCH_VLE16FFV

#define MATCH_VLE16FFV   0x01005007

◆ MATCH_VLE16V

#define MATCH_VLE16V   0x00005007

◆ MATCH_VLE32FFV

#define MATCH_VLE32FFV   0x01006007

◆ MATCH_VLE32V

#define MATCH_VLE32V   0x00006007

◆ MATCH_VLE64FFV

#define MATCH_VLE64FFV   0x01007007

◆ MATCH_VLE64V

#define MATCH_VLE64V   0x00007007

◆ MATCH_VLE8FFV

#define MATCH_VLE8FFV   0x01000007

◆ MATCH_VLE8V

#define MATCH_VLE8V   0x00000007

◆ MATCH_VLMV

#define MATCH_VLMV   0x02b00007

◆ MATCH_VLOXEI16V

#define MATCH_VLOXEI16V   0x0c005007

◆ MATCH_VLOXEI32V

#define MATCH_VLOXEI32V   0x0c006007

◆ MATCH_VLOXEI64V

#define MATCH_VLOXEI64V   0x0c007007

◆ MATCH_VLOXEI8V

#define MATCH_VLOXEI8V   0x0c000007

◆ MATCH_VLOXSEG2EI16V

#define MATCH_VLOXSEG2EI16V   0x2c005007

◆ MATCH_VLOXSEG2EI32V

#define MATCH_VLOXSEG2EI32V   0x2c006007

◆ MATCH_VLOXSEG2EI64V

#define MATCH_VLOXSEG2EI64V   0x2c007007

◆ MATCH_VLOXSEG2EI8V

#define MATCH_VLOXSEG2EI8V   0x2c000007

◆ MATCH_VLOXSEG3EI16V

#define MATCH_VLOXSEG3EI16V   0x4c005007

◆ MATCH_VLOXSEG3EI32V

#define MATCH_VLOXSEG3EI32V   0x4c006007

◆ MATCH_VLOXSEG3EI64V

#define MATCH_VLOXSEG3EI64V   0x4c007007

◆ MATCH_VLOXSEG3EI8V

#define MATCH_VLOXSEG3EI8V   0x4c000007

◆ MATCH_VLOXSEG4EI16V

#define MATCH_VLOXSEG4EI16V   0x6c005007

◆ MATCH_VLOXSEG4EI32V

#define MATCH_VLOXSEG4EI32V   0x6c006007

◆ MATCH_VLOXSEG4EI64V

#define MATCH_VLOXSEG4EI64V   0x6c007007

◆ MATCH_VLOXSEG4EI8V

#define MATCH_VLOXSEG4EI8V   0x6c000007

◆ MATCH_VLOXSEG5EI16V

#define MATCH_VLOXSEG5EI16V   0x8c005007

◆ MATCH_VLOXSEG5EI32V

#define MATCH_VLOXSEG5EI32V   0x8c006007

◆ MATCH_VLOXSEG5EI64V

#define MATCH_VLOXSEG5EI64V   0x8c007007

◆ MATCH_VLOXSEG5EI8V

#define MATCH_VLOXSEG5EI8V   0x8c000007

◆ MATCH_VLOXSEG6EI16V

#define MATCH_VLOXSEG6EI16V   0xac005007

◆ MATCH_VLOXSEG6EI32V

#define MATCH_VLOXSEG6EI32V   0xac006007

◆ MATCH_VLOXSEG6EI64V

#define MATCH_VLOXSEG6EI64V   0xac007007

◆ MATCH_VLOXSEG6EI8V

#define MATCH_VLOXSEG6EI8V   0xac000007

◆ MATCH_VLOXSEG7EI16V

#define MATCH_VLOXSEG7EI16V   0xcc005007

◆ MATCH_VLOXSEG7EI32V

#define MATCH_VLOXSEG7EI32V   0xcc006007

◆ MATCH_VLOXSEG7EI64V

#define MATCH_VLOXSEG7EI64V   0xcc007007

◆ MATCH_VLOXSEG7EI8V

#define MATCH_VLOXSEG7EI8V   0xcc000007

◆ MATCH_VLOXSEG8EI16V

#define MATCH_VLOXSEG8EI16V   0xec005007

◆ MATCH_VLOXSEG8EI32V

#define MATCH_VLOXSEG8EI32V   0xec006007

◆ MATCH_VLOXSEG8EI64V

#define MATCH_VLOXSEG8EI64V   0xec007007

◆ MATCH_VLOXSEG8EI8V

#define MATCH_VLOXSEG8EI8V   0xec000007

◆ MATCH_VLSE16V

#define MATCH_VLSE16V   0x08005007

◆ MATCH_VLSE32V

#define MATCH_VLSE32V   0x08006007

◆ MATCH_VLSE64V

#define MATCH_VLSE64V   0x08007007

◆ MATCH_VLSE8V

#define MATCH_VLSE8V   0x08000007

◆ MATCH_VLSEG2E16FFV

#define MATCH_VLSEG2E16FFV   0x21005007

◆ MATCH_VLSEG2E16V

#define MATCH_VLSEG2E16V   0x20005007

◆ MATCH_VLSEG2E32FFV

#define MATCH_VLSEG2E32FFV   0x21006007

◆ MATCH_VLSEG2E32V

#define MATCH_VLSEG2E32V   0x20006007

◆ MATCH_VLSEG2E64FFV

#define MATCH_VLSEG2E64FFV   0x21007007

◆ MATCH_VLSEG2E64V

#define MATCH_VLSEG2E64V   0x20007007

◆ MATCH_VLSEG2E8FFV

#define MATCH_VLSEG2E8FFV   0x21000007

◆ MATCH_VLSEG2E8V

#define MATCH_VLSEG2E8V   0x20000007

◆ MATCH_VLSEG3E16FFV

#define MATCH_VLSEG3E16FFV   0x41005007

◆ MATCH_VLSEG3E16V

#define MATCH_VLSEG3E16V   0x40005007

◆ MATCH_VLSEG3E32FFV

#define MATCH_VLSEG3E32FFV   0x41006007

◆ MATCH_VLSEG3E32V

#define MATCH_VLSEG3E32V   0x40006007

◆ MATCH_VLSEG3E64FFV

#define MATCH_VLSEG3E64FFV   0x41007007

◆ MATCH_VLSEG3E64V

#define MATCH_VLSEG3E64V   0x40007007

◆ MATCH_VLSEG3E8FFV

#define MATCH_VLSEG3E8FFV   0x41000007

◆ MATCH_VLSEG3E8V

#define MATCH_VLSEG3E8V   0x40000007

◆ MATCH_VLSEG4E16FFV

#define MATCH_VLSEG4E16FFV   0x61005007

◆ MATCH_VLSEG4E16V

#define MATCH_VLSEG4E16V   0x60005007

◆ MATCH_VLSEG4E32FFV

#define MATCH_VLSEG4E32FFV   0x61006007

◆ MATCH_VLSEG4E32V

#define MATCH_VLSEG4E32V   0x60006007

◆ MATCH_VLSEG4E64FFV

#define MATCH_VLSEG4E64FFV   0x61007007

◆ MATCH_VLSEG4E64V

#define MATCH_VLSEG4E64V   0x60007007

◆ MATCH_VLSEG4E8FFV

#define MATCH_VLSEG4E8FFV   0x61000007

◆ MATCH_VLSEG4E8V

#define MATCH_VLSEG4E8V   0x60000007

◆ MATCH_VLSEG5E16FFV

#define MATCH_VLSEG5E16FFV   0x81005007

◆ MATCH_VLSEG5E16V

#define MATCH_VLSEG5E16V   0x80005007

◆ MATCH_VLSEG5E32FFV

#define MATCH_VLSEG5E32FFV   0x81006007

◆ MATCH_VLSEG5E32V

#define MATCH_VLSEG5E32V   0x80006007

◆ MATCH_VLSEG5E64FFV

#define MATCH_VLSEG5E64FFV   0x81007007

◆ MATCH_VLSEG5E64V

#define MATCH_VLSEG5E64V   0x80007007

◆ MATCH_VLSEG5E8FFV

#define MATCH_VLSEG5E8FFV   0x81000007

◆ MATCH_VLSEG5E8V

#define MATCH_VLSEG5E8V   0x80000007

◆ MATCH_VLSEG6E16FFV

#define MATCH_VLSEG6E16FFV   0xa1005007

◆ MATCH_VLSEG6E16V

#define MATCH_VLSEG6E16V   0xa0005007

◆ MATCH_VLSEG6E32FFV

#define MATCH_VLSEG6E32FFV   0xa1006007

◆ MATCH_VLSEG6E32V

#define MATCH_VLSEG6E32V   0xa0006007

◆ MATCH_VLSEG6E64FFV

#define MATCH_VLSEG6E64FFV   0xa1007007

◆ MATCH_VLSEG6E64V

#define MATCH_VLSEG6E64V   0xa0007007

◆ MATCH_VLSEG6E8FFV

#define MATCH_VLSEG6E8FFV   0xa1000007

◆ MATCH_VLSEG6E8V

#define MATCH_VLSEG6E8V   0xa0000007

◆ MATCH_VLSEG7E16FFV

#define MATCH_VLSEG7E16FFV   0xc1005007

◆ MATCH_VLSEG7E16V

#define MATCH_VLSEG7E16V   0xc0005007

◆ MATCH_VLSEG7E32FFV

#define MATCH_VLSEG7E32FFV   0xc1006007

◆ MATCH_VLSEG7E32V

#define MATCH_VLSEG7E32V   0xc0006007

◆ MATCH_VLSEG7E64FFV

#define MATCH_VLSEG7E64FFV   0xc1007007

◆ MATCH_VLSEG7E64V

#define MATCH_VLSEG7E64V   0xc0007007

◆ MATCH_VLSEG7E8FFV

#define MATCH_VLSEG7E8FFV   0xc1000007

◆ MATCH_VLSEG7E8V

#define MATCH_VLSEG7E8V   0xc0000007

◆ MATCH_VLSEG8E16FFV

#define MATCH_VLSEG8E16FFV   0xe1005007

◆ MATCH_VLSEG8E16V

#define MATCH_VLSEG8E16V   0xe0005007

◆ MATCH_VLSEG8E32FFV

#define MATCH_VLSEG8E32FFV   0xe1006007

◆ MATCH_VLSEG8E32V

#define MATCH_VLSEG8E32V   0xe0006007

◆ MATCH_VLSEG8E64FFV

#define MATCH_VLSEG8E64FFV   0xe1007007

◆ MATCH_VLSEG8E64V

#define MATCH_VLSEG8E64V   0xe0007007

◆ MATCH_VLSEG8E8FFV

#define MATCH_VLSEG8E8FFV   0xe1000007

◆ MATCH_VLSEG8E8V

#define MATCH_VLSEG8E8V   0xe0000007

◆ MATCH_VLSSEG2E16V

#define MATCH_VLSSEG2E16V   0x28005007

◆ MATCH_VLSSEG2E32V

#define MATCH_VLSSEG2E32V   0x28006007

◆ MATCH_VLSSEG2E64V

#define MATCH_VLSSEG2E64V   0x28007007

◆ MATCH_VLSSEG2E8V

#define MATCH_VLSSEG2E8V   0x28000007

◆ MATCH_VLSSEG3E16V

#define MATCH_VLSSEG3E16V   0x48005007

◆ MATCH_VLSSEG3E32V

#define MATCH_VLSSEG3E32V   0x48006007

◆ MATCH_VLSSEG3E64V

#define MATCH_VLSSEG3E64V   0x48007007

◆ MATCH_VLSSEG3E8V

#define MATCH_VLSSEG3E8V   0x48000007

◆ MATCH_VLSSEG4E16V

#define MATCH_VLSSEG4E16V   0x68005007

◆ MATCH_VLSSEG4E32V

#define MATCH_VLSSEG4E32V   0x68006007

◆ MATCH_VLSSEG4E64V

#define MATCH_VLSSEG4E64V   0x68007007

◆ MATCH_VLSSEG4E8V

#define MATCH_VLSSEG4E8V   0x68000007

◆ MATCH_VLSSEG5E16V

#define MATCH_VLSSEG5E16V   0x88005007

◆ MATCH_VLSSEG5E32V

#define MATCH_VLSSEG5E32V   0x88006007

◆ MATCH_VLSSEG5E64V

#define MATCH_VLSSEG5E64V   0x88007007

◆ MATCH_VLSSEG5E8V

#define MATCH_VLSSEG5E8V   0x88000007

◆ MATCH_VLSSEG6E16V

#define MATCH_VLSSEG6E16V   0xa8005007

◆ MATCH_VLSSEG6E32V

#define MATCH_VLSSEG6E32V   0xa8006007

◆ MATCH_VLSSEG6E64V

#define MATCH_VLSSEG6E64V   0xa8007007

◆ MATCH_VLSSEG6E8V

#define MATCH_VLSSEG6E8V   0xa8000007

◆ MATCH_VLSSEG7E16V

#define MATCH_VLSSEG7E16V   0xc8005007

◆ MATCH_VLSSEG7E32V

#define MATCH_VLSSEG7E32V   0xc8006007

◆ MATCH_VLSSEG7E64V

#define MATCH_VLSSEG7E64V   0xc8007007

◆ MATCH_VLSSEG7E8V

#define MATCH_VLSSEG7E8V   0xc8000007

◆ MATCH_VLSSEG8E16V

#define MATCH_VLSSEG8E16V   0xe8005007

◆ MATCH_VLSSEG8E32V

#define MATCH_VLSSEG8E32V   0xe8006007

◆ MATCH_VLSSEG8E64V

#define MATCH_VLSSEG8E64V   0xe8007007

◆ MATCH_VLSSEG8E8V

#define MATCH_VLSSEG8E8V   0xe8000007

◆ MATCH_VLUXEI16V

#define MATCH_VLUXEI16V   0x04005007

◆ MATCH_VLUXEI32V

#define MATCH_VLUXEI32V   0x04006007

◆ MATCH_VLUXEI64V

#define MATCH_VLUXEI64V   0x04007007

◆ MATCH_VLUXEI8V

#define MATCH_VLUXEI8V   0x04000007

◆ MATCH_VLUXSEG2EI16V

#define MATCH_VLUXSEG2EI16V   0x24005007

◆ MATCH_VLUXSEG2EI32V

#define MATCH_VLUXSEG2EI32V   0x24006007

◆ MATCH_VLUXSEG2EI64V

#define MATCH_VLUXSEG2EI64V   0x24007007

◆ MATCH_VLUXSEG2EI8V

#define MATCH_VLUXSEG2EI8V   0x24000007

◆ MATCH_VLUXSEG3EI16V

#define MATCH_VLUXSEG3EI16V   0x44005007

◆ MATCH_VLUXSEG3EI32V

#define MATCH_VLUXSEG3EI32V   0x44006007

◆ MATCH_VLUXSEG3EI64V

#define MATCH_VLUXSEG3EI64V   0x44007007

◆ MATCH_VLUXSEG3EI8V

#define MATCH_VLUXSEG3EI8V   0x44000007

◆ MATCH_VLUXSEG4EI16V

#define MATCH_VLUXSEG4EI16V   0x64005007

◆ MATCH_VLUXSEG4EI32V

#define MATCH_VLUXSEG4EI32V   0x64006007

◆ MATCH_VLUXSEG4EI64V

#define MATCH_VLUXSEG4EI64V   0x64007007

◆ MATCH_VLUXSEG4EI8V

#define MATCH_VLUXSEG4EI8V   0x64000007

◆ MATCH_VLUXSEG5EI16V

#define MATCH_VLUXSEG5EI16V   0x84005007

◆ MATCH_VLUXSEG5EI32V

#define MATCH_VLUXSEG5EI32V   0x84006007

◆ MATCH_VLUXSEG5EI64V

#define MATCH_VLUXSEG5EI64V   0x84007007

◆ MATCH_VLUXSEG5EI8V

#define MATCH_VLUXSEG5EI8V   0x84000007

◆ MATCH_VLUXSEG6EI16V

#define MATCH_VLUXSEG6EI16V   0xa4005007

◆ MATCH_VLUXSEG6EI32V

#define MATCH_VLUXSEG6EI32V   0xa4006007

◆ MATCH_VLUXSEG6EI64V

#define MATCH_VLUXSEG6EI64V   0xa4007007

◆ MATCH_VLUXSEG6EI8V

#define MATCH_VLUXSEG6EI8V   0xa4000007

◆ MATCH_VLUXSEG7EI16V

#define MATCH_VLUXSEG7EI16V   0xc4005007

◆ MATCH_VLUXSEG7EI32V

#define MATCH_VLUXSEG7EI32V   0xc4006007

◆ MATCH_VLUXSEG7EI64V

#define MATCH_VLUXSEG7EI64V   0xc4007007

◆ MATCH_VLUXSEG7EI8V

#define MATCH_VLUXSEG7EI8V   0xc4000007

◆ MATCH_VLUXSEG8EI16V

#define MATCH_VLUXSEG8EI16V   0xe4005007

◆ MATCH_VLUXSEG8EI32V

#define MATCH_VLUXSEG8EI32V   0xe4006007

◆ MATCH_VLUXSEG8EI64V

#define MATCH_VLUXSEG8EI64V   0xe4007007

◆ MATCH_VLUXSEG8EI8V

#define MATCH_VLUXSEG8EI8V   0xe4000007

◆ MATCH_VMACCVV

#define MATCH_VMACCVV   0xb4002057

◆ MATCH_VMACCVX

#define MATCH_VMACCVX   0xb4006057

◆ MATCH_VMADCVI

#define MATCH_VMADCVI   0x46003057

◆ MATCH_VMADCVIM

#define MATCH_VMADCVIM   0x44003057

◆ MATCH_VMADCVV

#define MATCH_VMADCVV   0x46000057

◆ MATCH_VMADCVVM

#define MATCH_VMADCVVM   0x44000057

◆ MATCH_VMADCVX

#define MATCH_VMADCVX   0x46004057

◆ MATCH_VMADCVXM

#define MATCH_VMADCVXM   0x44004057

◆ MATCH_VMADDVV

#define MATCH_VMADDVV   0xa4002057

◆ MATCH_VMADDVX

#define MATCH_VMADDVX   0xa4006057

◆ MATCH_VMANDMM

#define MATCH_VMANDMM   0x66002057

◆ MATCH_VMANDNMM

#define MATCH_VMANDNMM   0x62002057

◆ MATCH_VMAXUVV

#define MATCH_VMAXUVV   0x18000057

◆ MATCH_VMAXUVX

#define MATCH_VMAXUVX   0x18004057

◆ MATCH_VMAXVV

#define MATCH_VMAXVV   0x1c000057

◆ MATCH_VMAXVX

#define MATCH_VMAXVX   0x1c004057

◆ MATCH_VMERGEVIM

#define MATCH_VMERGEVIM   0x5c003057

◆ MATCH_VMERGEVVM

#define MATCH_VMERGEVVM   0x5c000057

◆ MATCH_VMERGEVXM

#define MATCH_VMERGEVXM   0x5c004057

◆ MATCH_VMFEQVF

#define MATCH_VMFEQVF   0x60005057

◆ MATCH_VMFEQVV

#define MATCH_VMFEQVV   0x60001057

◆ MATCH_VMFGEVF

#define MATCH_VMFGEVF   0x7c005057

◆ MATCH_VMFGTVF

#define MATCH_VMFGTVF   0x74005057

◆ MATCH_VMFLEVF

#define MATCH_VMFLEVF   0x64005057

◆ MATCH_VMFLEVV

#define MATCH_VMFLEVV   0x64001057

◆ MATCH_VMFLTVF

#define MATCH_VMFLTVF   0x6c005057

◆ MATCH_VMFLTVV

#define MATCH_VMFLTVV   0x6c001057

◆ MATCH_VMFNEVF

#define MATCH_VMFNEVF   0x70005057

◆ MATCH_VMFNEVV

#define MATCH_VMFNEVV   0x70001057

◆ MATCH_VMINUVV

#define MATCH_VMINUVV   0x10000057

◆ MATCH_VMINUVX

#define MATCH_VMINUVX   0x10004057

◆ MATCH_VMINVV

#define MATCH_VMINVV   0x14000057

◆ MATCH_VMINVX

#define MATCH_VMINVX   0x14004057

◆ MATCH_VMNANDMM

#define MATCH_VMNANDMM   0x76002057

◆ MATCH_VMNORMM

#define MATCH_VMNORMM   0x7a002057

◆ MATCH_VMORMM

#define MATCH_VMORMM   0x6a002057

◆ MATCH_VMORNMM

#define MATCH_VMORNMM   0x72002057

◆ MATCH_VMSBCVV

#define MATCH_VMSBCVV   0x4e000057

◆ MATCH_VMSBCVVM

#define MATCH_VMSBCVVM   0x4c000057

◆ MATCH_VMSBCVX

#define MATCH_VMSBCVX   0x4e004057

◆ MATCH_VMSBCVXM

#define MATCH_VMSBCVXM   0x4c004057

◆ MATCH_VMSBFM

#define MATCH_VMSBFM   0x5000a057

◆ MATCH_VMSEQVI

#define MATCH_VMSEQVI   0x60003057

◆ MATCH_VMSEQVV

#define MATCH_VMSEQVV   0x60000057

◆ MATCH_VMSEQVX

#define MATCH_VMSEQVX   0x60004057

◆ MATCH_VMSGTUVI

#define MATCH_VMSGTUVI   0x78003057

◆ MATCH_VMSGTUVX

#define MATCH_VMSGTUVX   0x78004057

◆ MATCH_VMSGTVI

#define MATCH_VMSGTVI   0x7c003057

◆ MATCH_VMSGTVX

#define MATCH_VMSGTVX   0x7c004057

◆ MATCH_VMSIFM

#define MATCH_VMSIFM   0x5001a057

◆ MATCH_VMSLEUVI

#define MATCH_VMSLEUVI   0x70003057

◆ MATCH_VMSLEUVV

#define MATCH_VMSLEUVV   0x70000057

◆ MATCH_VMSLEUVX

#define MATCH_VMSLEUVX   0x70004057

◆ MATCH_VMSLEVI

#define MATCH_VMSLEVI   0x74003057

◆ MATCH_VMSLEVV

#define MATCH_VMSLEVV   0x74000057

◆ MATCH_VMSLEVX

#define MATCH_VMSLEVX   0x74004057

◆ MATCH_VMSLTUVV

#define MATCH_VMSLTUVV   0x68000057

◆ MATCH_VMSLTUVX

#define MATCH_VMSLTUVX   0x68004057

◆ MATCH_VMSLTVV

#define MATCH_VMSLTVV   0x6c000057

◆ MATCH_VMSLTVX

#define MATCH_VMSLTVX   0x6c004057

◆ MATCH_VMSNEVI

#define MATCH_VMSNEVI   0x64003057

◆ MATCH_VMSNEVV

#define MATCH_VMSNEVV   0x64000057

◆ MATCH_VMSNEVX

#define MATCH_VMSNEVX   0x64004057

◆ MATCH_VMSOFM

#define MATCH_VMSOFM   0x50012057

◆ MATCH_VMULHSUVV

#define MATCH_VMULHSUVV   0x98002057

◆ MATCH_VMULHSUVX

#define MATCH_VMULHSUVX   0x98006057

◆ MATCH_VMULHUVV

#define MATCH_VMULHUVV   0x90002057

◆ MATCH_VMULHUVX

#define MATCH_VMULHUVX   0x90006057

◆ MATCH_VMULHVV

#define MATCH_VMULHVV   0x9c002057

◆ MATCH_VMULHVX

#define MATCH_VMULHVX   0x9c006057

◆ MATCH_VMULVV

#define MATCH_VMULVV   0x94002057

◆ MATCH_VMULVX

#define MATCH_VMULVX   0x94006057

◆ MATCH_VMV1RV

#define MATCH_VMV1RV   0x9e003057

◆ MATCH_VMV2RV

#define MATCH_VMV2RV   0x9e00b057

◆ MATCH_VMV4RV

#define MATCH_VMV4RV   0x9e01b057

◆ MATCH_VMV8RV

#define MATCH_VMV8RV   0x9e03b057

◆ MATCH_VMVSX

#define MATCH_VMVSX   0x42006057

◆ MATCH_VMVVI

#define MATCH_VMVVI   0x5e003057

◆ MATCH_VMVVV

#define MATCH_VMVVV   0x5e000057

◆ MATCH_VMVVX

#define MATCH_VMVVX   0x5e004057

◆ MATCH_VMVXS

#define MATCH_VMVXS   0x42002057

◆ MATCH_VMXNORMM

#define MATCH_VMXNORMM   0x7e002057

◆ MATCH_VMXORMM

#define MATCH_VMXORMM   0x6e002057

◆ MATCH_VNCLIPUWI

#define MATCH_VNCLIPUWI   0xb8003057

◆ MATCH_VNCLIPUWV

#define MATCH_VNCLIPUWV   0xb8000057

◆ MATCH_VNCLIPUWX

#define MATCH_VNCLIPUWX   0xb8004057

◆ MATCH_VNCLIPWI

#define MATCH_VNCLIPWI   0xbc003057

◆ MATCH_VNCLIPWV

#define MATCH_VNCLIPWV   0xbc000057

◆ MATCH_VNCLIPWX

#define MATCH_VNCLIPWX   0xbc004057

◆ MATCH_VNCVTXXW

#define MATCH_VNCVTXXW   0xb0004057

◆ MATCH_VNMSACVV

#define MATCH_VNMSACVV   0xbc002057

◆ MATCH_VNMSACVX

#define MATCH_VNMSACVX   0xbc006057

◆ MATCH_VNMSUBVV

#define MATCH_VNMSUBVV   0xac002057

◆ MATCH_VNMSUBVX

#define MATCH_VNMSUBVX   0xac006057

◆ MATCH_VNOTV

#define MATCH_VNOTV   0x2c0fb057

◆ MATCH_VNSRAWI

#define MATCH_VNSRAWI   0xb4003057

◆ MATCH_VNSRAWV

#define MATCH_VNSRAWV   0xb4000057

◆ MATCH_VNSRAWX

#define MATCH_VNSRAWX   0xb4004057

◆ MATCH_VNSRLWI

#define MATCH_VNSRLWI   0xb0003057

◆ MATCH_VNSRLWV

#define MATCH_VNSRLWV   0xb0000057

◆ MATCH_VNSRLWX

#define MATCH_VNSRLWX   0xb0004057

◆ MATCH_VORVI

#define MATCH_VORVI   0x28003057

◆ MATCH_VORVV

#define MATCH_VORVV   0x28000057

◆ MATCH_VORVX

#define MATCH_VORVX   0x28004057

◆ MATCH_VQMACCSUVV

#define MATCH_VQMACCSUVV   0xfc000057

◆ MATCH_VQMACCSUVX

#define MATCH_VQMACCSUVX   0xfc004057

◆ MATCH_VQMACCUSVX

#define MATCH_VQMACCUSVX   0xf8004057

◆ MATCH_VQMACCUVV

#define MATCH_VQMACCUVV   0xf0000057

◆ MATCH_VQMACCUVX

#define MATCH_VQMACCUVX   0xf0004057

◆ MATCH_VQMACCVV

#define MATCH_VQMACCVV   0xf4000057

◆ MATCH_VQMACCVX

#define MATCH_VQMACCVX   0xf4004057

◆ MATCH_VREDANDVS

#define MATCH_VREDANDVS   0x04002057

◆ MATCH_VREDMAXUVS

#define MATCH_VREDMAXUVS   0x18002057

◆ MATCH_VREDMAXVS

#define MATCH_VREDMAXVS   0x1c002057

◆ MATCH_VREDMINUVS

#define MATCH_VREDMINUVS   0x10002057

◆ MATCH_VREDMINVS

#define MATCH_VREDMINVS   0x14002057

◆ MATCH_VREDORVS

#define MATCH_VREDORVS   0x08002057

◆ MATCH_VREDSUMVS

#define MATCH_VREDSUMVS   0x00002057

◆ MATCH_VREDXORVS

#define MATCH_VREDXORVS   0x0c002057

◆ MATCH_VREMUVV

#define MATCH_VREMUVV   0x88002057

◆ MATCH_VREMUVX

#define MATCH_VREMUVX   0x88006057

◆ MATCH_VREMVV

#define MATCH_VREMVV   0x8c002057

◆ MATCH_VREMVX

#define MATCH_VREMVX   0x8c006057

◆ MATCH_VREV8_V

#define MATCH_VREV8_V   0x4804a057

◆ MATCH_VRGATHEREI16VV

#define MATCH_VRGATHEREI16VV   0x38000057

◆ MATCH_VRGATHERVI

#define MATCH_VRGATHERVI   0x30003057

◆ MATCH_VRGATHERVV

#define MATCH_VRGATHERVV   0x30000057

◆ MATCH_VRGATHERVX

#define MATCH_VRGATHERVX   0x30004057

◆ MATCH_VROL_VV

#define MATCH_VROL_VV   0x54000057

◆ MATCH_VROL_VX

#define MATCH_VROL_VX   0x54004057

◆ MATCH_VROR_VI

#define MATCH_VROR_VI   0x50003057

◆ MATCH_VROR_VV

#define MATCH_VROR_VV   0x50000057

◆ MATCH_VROR_VX

#define MATCH_VROR_VX   0x50004057

◆ MATCH_VRSUBVI

#define MATCH_VRSUBVI   0x0c003057

◆ MATCH_VRSUBVX

#define MATCH_VRSUBVX   0x0c004057

◆ MATCH_VS1RV

#define MATCH_VS1RV   0x02800027

◆ MATCH_VS2RV

#define MATCH_VS2RV   0x22800027

◆ MATCH_VS4RV

#define MATCH_VS4RV   0x62800027

◆ MATCH_VS8RV

#define MATCH_VS8RV   0xe2800027

◆ MATCH_VSADDUVI

#define MATCH_VSADDUVI   0x80003057

◆ MATCH_VSADDUVV

#define MATCH_VSADDUVV   0x80000057

◆ MATCH_VSADDUVX

#define MATCH_VSADDUVX   0x80004057

◆ MATCH_VSADDVI

#define MATCH_VSADDVI   0x84003057

◆ MATCH_VSADDVV

#define MATCH_VSADDVV   0x84000057

◆ MATCH_VSADDVX

#define MATCH_VSADDVX   0x84004057

◆ MATCH_VSBCVVM

#define MATCH_VSBCVVM   0x48000057

◆ MATCH_VSBCVXM

#define MATCH_VSBCVXM   0x48004057

◆ MATCH_VSE16V

#define MATCH_VSE16V   0x00005027

◆ MATCH_VSE32V

#define MATCH_VSE32V   0x00006027

◆ MATCH_VSE64V

#define MATCH_VSE64V   0x00007027

◆ MATCH_VSE8V

#define MATCH_VSE8V   0x00000027

◆ MATCH_VSETIVLI

#define MATCH_VSETIVLI   0xc0007057

◆ MATCH_VSETVL

#define MATCH_VSETVL   0x80007057

◆ MATCH_VSETVLI

#define MATCH_VSETVLI   0x00007057

◆ MATCH_VSEXT_VF2

#define MATCH_VSEXT_VF2   0x4803a057

◆ MATCH_VSEXT_VF4

#define MATCH_VSEXT_VF4   0x4802a057

◆ MATCH_VSEXT_VF8

#define MATCH_VSEXT_VF8   0x4801a057

◆ MATCH_VSHA2CH_VV

#define MATCH_VSHA2CH_VV   0xba002077

◆ MATCH_VSHA2CL_VV

#define MATCH_VSHA2CL_VV   0xbe002077

◆ MATCH_VSHA2MS_VV

#define MATCH_VSHA2MS_VV   0xb6002077

◆ MATCH_VSLIDE1DOWNVX

#define MATCH_VSLIDE1DOWNVX   0x3c006057

◆ MATCH_VSLIDE1UPVX

#define MATCH_VSLIDE1UPVX   0x38006057

◆ MATCH_VSLIDEDOWNVI

#define MATCH_VSLIDEDOWNVI   0x3c003057

◆ MATCH_VSLIDEDOWNVX

#define MATCH_VSLIDEDOWNVX   0x3c004057

◆ MATCH_VSLIDEUPVI

#define MATCH_VSLIDEUPVI   0x38003057

◆ MATCH_VSLIDEUPVX

#define MATCH_VSLIDEUPVX   0x38004057

◆ MATCH_VSLLVI

#define MATCH_VSLLVI   0x94003057

◆ MATCH_VSLLVV

#define MATCH_VSLLVV   0x94000057

◆ MATCH_VSLLVX

#define MATCH_VSLLVX   0x94004057

◆ MATCH_VSM3C_VI

#define MATCH_VSM3C_VI   0xae002077

◆ MATCH_VSM3ME_VV

#define MATCH_VSM3ME_VV   0x82002077

◆ MATCH_VSM4K_VI

#define MATCH_VSM4K_VI   0x86002077

◆ MATCH_VSM4R_VS

#define MATCH_VSM4R_VS   0xa6082077

◆ MATCH_VSM4R_VV

#define MATCH_VSM4R_VV   0xa2082077

◆ MATCH_VSMULVV

#define MATCH_VSMULVV   0x9c000057

◆ MATCH_VSMULVX

#define MATCH_VSMULVX   0x9c004057

◆ MATCH_VSMV

#define MATCH_VSMV   0x02b00027

◆ MATCH_VSOXEI16V

#define MATCH_VSOXEI16V   0x0c005027

◆ MATCH_VSOXEI32V

#define MATCH_VSOXEI32V   0x0c006027

◆ MATCH_VSOXEI64V

#define MATCH_VSOXEI64V   0x0c007027

◆ MATCH_VSOXEI8V

#define MATCH_VSOXEI8V   0x0c000027

◆ MATCH_VSOXSEG2EI16V

#define MATCH_VSOXSEG2EI16V   0x2c005027

◆ MATCH_VSOXSEG2EI32V

#define MATCH_VSOXSEG2EI32V   0x2c006027

◆ MATCH_VSOXSEG2EI64V

#define MATCH_VSOXSEG2EI64V   0x2c007027

◆ MATCH_VSOXSEG2EI8V

#define MATCH_VSOXSEG2EI8V   0x2c000027

◆ MATCH_VSOXSEG3EI16V

#define MATCH_VSOXSEG3EI16V   0x4c005027

◆ MATCH_VSOXSEG3EI32V

#define MATCH_VSOXSEG3EI32V   0x4c006027

◆ MATCH_VSOXSEG3EI64V

#define MATCH_VSOXSEG3EI64V   0x4c007027

◆ MATCH_VSOXSEG3EI8V

#define MATCH_VSOXSEG3EI8V   0x4c000027

◆ MATCH_VSOXSEG4EI16V

#define MATCH_VSOXSEG4EI16V   0x6c005027

◆ MATCH_VSOXSEG4EI32V

#define MATCH_VSOXSEG4EI32V   0x6c006027

◆ MATCH_VSOXSEG4EI64V

#define MATCH_VSOXSEG4EI64V   0x6c007027

◆ MATCH_VSOXSEG4EI8V

#define MATCH_VSOXSEG4EI8V   0x6c000027

◆ MATCH_VSOXSEG5EI16V

#define MATCH_VSOXSEG5EI16V   0x8c005027

◆ MATCH_VSOXSEG5EI32V

#define MATCH_VSOXSEG5EI32V   0x8c006027

◆ MATCH_VSOXSEG5EI64V

#define MATCH_VSOXSEG5EI64V   0x8c007027

◆ MATCH_VSOXSEG5EI8V

#define MATCH_VSOXSEG5EI8V   0x8c000027

◆ MATCH_VSOXSEG6EI16V

#define MATCH_VSOXSEG6EI16V   0xac005027

◆ MATCH_VSOXSEG6EI32V

#define MATCH_VSOXSEG6EI32V   0xac006027

◆ MATCH_VSOXSEG6EI64V

#define MATCH_VSOXSEG6EI64V   0xac007027

◆ MATCH_VSOXSEG6EI8V

#define MATCH_VSOXSEG6EI8V   0xac000027

◆ MATCH_VSOXSEG7EI16V

#define MATCH_VSOXSEG7EI16V   0xcc005027

◆ MATCH_VSOXSEG7EI32V

#define MATCH_VSOXSEG7EI32V   0xcc006027

◆ MATCH_VSOXSEG7EI64V

#define MATCH_VSOXSEG7EI64V   0xcc007027

◆ MATCH_VSOXSEG7EI8V

#define MATCH_VSOXSEG7EI8V   0xcc000027

◆ MATCH_VSOXSEG8EI16V

#define MATCH_VSOXSEG8EI16V   0xec005027

◆ MATCH_VSOXSEG8EI32V

#define MATCH_VSOXSEG8EI32V   0xec006027

◆ MATCH_VSOXSEG8EI64V

#define MATCH_VSOXSEG8EI64V   0xec007027

◆ MATCH_VSOXSEG8EI8V

#define MATCH_VSOXSEG8EI8V   0xec000027

◆ MATCH_VSRAVI

#define MATCH_VSRAVI   0xa4003057

◆ MATCH_VSRAVV

#define MATCH_VSRAVV   0xa4000057

◆ MATCH_VSRAVX

#define MATCH_VSRAVX   0xa4004057

◆ MATCH_VSRLVI

#define MATCH_VSRLVI   0xa0003057

◆ MATCH_VSRLVV

#define MATCH_VSRLVV   0xa0000057

◆ MATCH_VSRLVX

#define MATCH_VSRLVX   0xa0004057

◆ MATCH_VSSE16V

#define MATCH_VSSE16V   0x08005027

◆ MATCH_VSSE32V

#define MATCH_VSSE32V   0x08006027

◆ MATCH_VSSE64V

#define MATCH_VSSE64V   0x08007027

◆ MATCH_VSSE8V

#define MATCH_VSSE8V   0x08000027

◆ MATCH_VSSEG2E16V

#define MATCH_VSSEG2E16V   0x20005027

◆ MATCH_VSSEG2E32V

#define MATCH_VSSEG2E32V   0x20006027

◆ MATCH_VSSEG2E64V

#define MATCH_VSSEG2E64V   0x20007027

◆ MATCH_VSSEG2E8V

#define MATCH_VSSEG2E8V   0x20000027

◆ MATCH_VSSEG3E16V

#define MATCH_VSSEG3E16V   0x40005027

◆ MATCH_VSSEG3E32V

#define MATCH_VSSEG3E32V   0x40006027

◆ MATCH_VSSEG3E64V

#define MATCH_VSSEG3E64V   0x40007027

◆ MATCH_VSSEG3E8V

#define MATCH_VSSEG3E8V   0x40000027

◆ MATCH_VSSEG4E16V

#define MATCH_VSSEG4E16V   0x60005027

◆ MATCH_VSSEG4E32V

#define MATCH_VSSEG4E32V   0x60006027

◆ MATCH_VSSEG4E64V

#define MATCH_VSSEG4E64V   0x60007027

◆ MATCH_VSSEG4E8V

#define MATCH_VSSEG4E8V   0x60000027

◆ MATCH_VSSEG5E16V

#define MATCH_VSSEG5E16V   0x80005027

◆ MATCH_VSSEG5E32V

#define MATCH_VSSEG5E32V   0x80006027

◆ MATCH_VSSEG5E64V

#define MATCH_VSSEG5E64V   0x80007027

◆ MATCH_VSSEG5E8V

#define MATCH_VSSEG5E8V   0x80000027

◆ MATCH_VSSEG6E16V

#define MATCH_VSSEG6E16V   0xa0005027

◆ MATCH_VSSEG6E32V

#define MATCH_VSSEG6E32V   0xa0006027

◆ MATCH_VSSEG6E64V

#define MATCH_VSSEG6E64V   0xa0007027

◆ MATCH_VSSEG6E8V

#define MATCH_VSSEG6E8V   0xa0000027

◆ MATCH_VSSEG7E16V

#define MATCH_VSSEG7E16V   0xc0005027

◆ MATCH_VSSEG7E32V

#define MATCH_VSSEG7E32V   0xc0006027

◆ MATCH_VSSEG7E64V

#define MATCH_VSSEG7E64V   0xc0007027

◆ MATCH_VSSEG7E8V

#define MATCH_VSSEG7E8V   0xc0000027

◆ MATCH_VSSEG8E16V

#define MATCH_VSSEG8E16V   0xe0005027

◆ MATCH_VSSEG8E32V

#define MATCH_VSSEG8E32V   0xe0006027

◆ MATCH_VSSEG8E64V

#define MATCH_VSSEG8E64V   0xe0007027

◆ MATCH_VSSEG8E8V

#define MATCH_VSSEG8E8V   0xe0000027

◆ MATCH_VSSRAVI

#define MATCH_VSSRAVI   0xac003057

◆ MATCH_VSSRAVV

#define MATCH_VSSRAVV   0xac000057

◆ MATCH_VSSRAVX

#define MATCH_VSSRAVX   0xac004057

◆ MATCH_VSSRLVI

#define MATCH_VSSRLVI   0xa8003057

◆ MATCH_VSSRLVV

#define MATCH_VSSRLVV   0xa8000057

◆ MATCH_VSSRLVX

#define MATCH_VSSRLVX   0xa8004057

◆ MATCH_VSSSEG2E16V

#define MATCH_VSSSEG2E16V   0x28005027

◆ MATCH_VSSSEG2E32V

#define MATCH_VSSSEG2E32V   0x28006027

◆ MATCH_VSSSEG2E64V

#define MATCH_VSSSEG2E64V   0x28007027

◆ MATCH_VSSSEG2E8V

#define MATCH_VSSSEG2E8V   0x28000027

◆ MATCH_VSSSEG3E16V

#define MATCH_VSSSEG3E16V   0x48005027

◆ MATCH_VSSSEG3E32V

#define MATCH_VSSSEG3E32V   0x48006027

◆ MATCH_VSSSEG3E64V

#define MATCH_VSSSEG3E64V   0x48007027

◆ MATCH_VSSSEG3E8V

#define MATCH_VSSSEG3E8V   0x48000027

◆ MATCH_VSSSEG4E16V

#define MATCH_VSSSEG4E16V   0x68005027

◆ MATCH_VSSSEG4E32V

#define MATCH_VSSSEG4E32V   0x68006027

◆ MATCH_VSSSEG4E64V

#define MATCH_VSSSEG4E64V   0x68007027

◆ MATCH_VSSSEG4E8V

#define MATCH_VSSSEG4E8V   0x68000027

◆ MATCH_VSSSEG5E16V

#define MATCH_VSSSEG5E16V   0x88005027

◆ MATCH_VSSSEG5E32V

#define MATCH_VSSSEG5E32V   0x88006027

◆ MATCH_VSSSEG5E64V

#define MATCH_VSSSEG5E64V   0x88007027

◆ MATCH_VSSSEG5E8V

#define MATCH_VSSSEG5E8V   0x88000027

◆ MATCH_VSSSEG6E16V

#define MATCH_VSSSEG6E16V   0xa8005027

◆ MATCH_VSSSEG6E32V

#define MATCH_VSSSEG6E32V   0xa8006027

◆ MATCH_VSSSEG6E64V

#define MATCH_VSSSEG6E64V   0xa8007027

◆ MATCH_VSSSEG6E8V

#define MATCH_VSSSEG6E8V   0xa8000027

◆ MATCH_VSSSEG7E16V

#define MATCH_VSSSEG7E16V   0xc8005027

◆ MATCH_VSSSEG7E32V

#define MATCH_VSSSEG7E32V   0xc8006027

◆ MATCH_VSSSEG7E64V

#define MATCH_VSSSEG7E64V   0xc8007027

◆ MATCH_VSSSEG7E8V

#define MATCH_VSSSEG7E8V   0xc8000027

◆ MATCH_VSSSEG8E16V

#define MATCH_VSSSEG8E16V   0xe8005027

◆ MATCH_VSSSEG8E32V

#define MATCH_VSSSEG8E32V   0xe8006027

◆ MATCH_VSSSEG8E64V

#define MATCH_VSSSEG8E64V   0xe8007027

◆ MATCH_VSSSEG8E8V

#define MATCH_VSSSEG8E8V   0xe8000027

◆ MATCH_VSSUBUVV

#define MATCH_VSSUBUVV   0x88000057

◆ MATCH_VSSUBUVX

#define MATCH_VSSUBUVX   0x88004057

◆ MATCH_VSSUBVV

#define MATCH_VSSUBVV   0x8c000057

◆ MATCH_VSSUBVX

#define MATCH_VSSUBVX   0x8c004057

◆ MATCH_VSUBVV

#define MATCH_VSUBVV   0x08000057

◆ MATCH_VSUBVX

#define MATCH_VSUBVX   0x08004057

◆ MATCH_VSUXEI16V

#define MATCH_VSUXEI16V   0x04005027

◆ MATCH_VSUXEI32V

#define MATCH_VSUXEI32V   0x04006027

◆ MATCH_VSUXEI64V

#define MATCH_VSUXEI64V   0x04007027

◆ MATCH_VSUXEI8V

#define MATCH_VSUXEI8V   0x04000027

◆ MATCH_VSUXSEG2EI16V

#define MATCH_VSUXSEG2EI16V   0x24005027

◆ MATCH_VSUXSEG2EI32V

#define MATCH_VSUXSEG2EI32V   0x24006027

◆ MATCH_VSUXSEG2EI64V

#define MATCH_VSUXSEG2EI64V   0x24007027

◆ MATCH_VSUXSEG2EI8V

#define MATCH_VSUXSEG2EI8V   0x24000027

◆ MATCH_VSUXSEG3EI16V

#define MATCH_VSUXSEG3EI16V   0x44005027

◆ MATCH_VSUXSEG3EI32V

#define MATCH_VSUXSEG3EI32V   0x44006027

◆ MATCH_VSUXSEG3EI64V

#define MATCH_VSUXSEG3EI64V   0x44007027

◆ MATCH_VSUXSEG3EI8V

#define MATCH_VSUXSEG3EI8V   0x44000027

◆ MATCH_VSUXSEG4EI16V

#define MATCH_VSUXSEG4EI16V   0x64005027

◆ MATCH_VSUXSEG4EI32V

#define MATCH_VSUXSEG4EI32V   0x64006027

◆ MATCH_VSUXSEG4EI64V

#define MATCH_VSUXSEG4EI64V   0x64007027

◆ MATCH_VSUXSEG4EI8V

#define MATCH_VSUXSEG4EI8V   0x64000027

◆ MATCH_VSUXSEG5EI16V

#define MATCH_VSUXSEG5EI16V   0x84005027

◆ MATCH_VSUXSEG5EI32V

#define MATCH_VSUXSEG5EI32V   0x84006027

◆ MATCH_VSUXSEG5EI64V

#define MATCH_VSUXSEG5EI64V   0x84007027

◆ MATCH_VSUXSEG5EI8V

#define MATCH_VSUXSEG5EI8V   0x84000027

◆ MATCH_VSUXSEG6EI16V

#define MATCH_VSUXSEG6EI16V   0xa4005027

◆ MATCH_VSUXSEG6EI32V

#define MATCH_VSUXSEG6EI32V   0xa4006027

◆ MATCH_VSUXSEG6EI64V

#define MATCH_VSUXSEG6EI64V   0xa4007027

◆ MATCH_VSUXSEG6EI8V

#define MATCH_VSUXSEG6EI8V   0xa4000027

◆ MATCH_VSUXSEG7EI16V

#define MATCH_VSUXSEG7EI16V   0xc4005027

◆ MATCH_VSUXSEG7EI32V

#define MATCH_VSUXSEG7EI32V   0xc4006027

◆ MATCH_VSUXSEG7EI64V

#define MATCH_VSUXSEG7EI64V   0xc4007027

◆ MATCH_VSUXSEG7EI8V

#define MATCH_VSUXSEG7EI8V   0xc4000027

◆ MATCH_VSUXSEG8EI16V

#define MATCH_VSUXSEG8EI16V   0xe4005027

◆ MATCH_VSUXSEG8EI32V

#define MATCH_VSUXSEG8EI32V   0xe4006027

◆ MATCH_VSUXSEG8EI64V

#define MATCH_VSUXSEG8EI64V   0xe4007027

◆ MATCH_VSUXSEG8EI8V

#define MATCH_VSUXSEG8EI8V   0xe4000027

◆ MATCH_VT_MASKC

#define MATCH_VT_MASKC   0x607b

◆ MATCH_VT_MASKCN

#define MATCH_VT_MASKCN   0x707b

◆ MATCH_VWADDUVV

#define MATCH_VWADDUVV   0xc0002057

◆ MATCH_VWADDUVX

#define MATCH_VWADDUVX   0xc0006057

◆ MATCH_VWADDUWV

#define MATCH_VWADDUWV   0xd0002057

◆ MATCH_VWADDUWX

#define MATCH_VWADDUWX   0xd0006057

◆ MATCH_VWADDVV

#define MATCH_VWADDVV   0xc4002057

◆ MATCH_VWADDVX

#define MATCH_VWADDVX   0xc4006057

◆ MATCH_VWADDWV

#define MATCH_VWADDWV   0xd4002057

◆ MATCH_VWADDWX

#define MATCH_VWADDWX   0xd4006057

◆ MATCH_VWCVTUXXV

#define MATCH_VWCVTUXXV   0xc0006057

◆ MATCH_VWCVTXXV

#define MATCH_VWCVTXXV   0xc4006057

◆ MATCH_VWMACCSUVV

#define MATCH_VWMACCSUVV   0xfc002057

◆ MATCH_VWMACCSUVX

#define MATCH_VWMACCSUVX   0xfc006057

◆ MATCH_VWMACCUSVX

#define MATCH_VWMACCUSVX   0xf8006057

◆ MATCH_VWMACCUVV

#define MATCH_VWMACCUVV   0xf0002057

◆ MATCH_VWMACCUVX

#define MATCH_VWMACCUVX   0xf0006057

◆ MATCH_VWMACCVV

#define MATCH_VWMACCVV   0xf4002057

◆ MATCH_VWMACCVX

#define MATCH_VWMACCVX   0xf4006057

◆ MATCH_VWMULSUVV

#define MATCH_VWMULSUVV   0xe8002057

◆ MATCH_VWMULSUVX

#define MATCH_VWMULSUVX   0xe8006057

◆ MATCH_VWMULUVV

#define MATCH_VWMULUVV   0xe0002057

◆ MATCH_VWMULUVX

#define MATCH_VWMULUVX   0xe0006057

◆ MATCH_VWMULVV

#define MATCH_VWMULVV   0xec002057

◆ MATCH_VWMULVX

#define MATCH_VWMULVX   0xec006057

◆ MATCH_VWREDSUMUVS

#define MATCH_VWREDSUMUVS   0xc0000057

◆ MATCH_VWREDSUMVS

#define MATCH_VWREDSUMVS   0xc4000057

◆ MATCH_VWSLL_VI

#define MATCH_VWSLL_VI   0xd4003057

◆ MATCH_VWSLL_VV

#define MATCH_VWSLL_VV   0xd4000057

◆ MATCH_VWSLL_VX

#define MATCH_VWSLL_VX   0xd4004057

◆ MATCH_VWSUBUVV

#define MATCH_VWSUBUVV   0xc8002057

◆ MATCH_VWSUBUVX

#define MATCH_VWSUBUVX   0xc8006057

◆ MATCH_VWSUBUWV

#define MATCH_VWSUBUWV   0xd8002057

◆ MATCH_VWSUBUWX

#define MATCH_VWSUBUWX   0xd8006057

◆ MATCH_VWSUBVV

#define MATCH_VWSUBVV   0xcc002057

◆ MATCH_VWSUBVX

#define MATCH_VWSUBVX   0xcc006057

◆ MATCH_VWSUBWV

#define MATCH_VWSUBWV   0xdc002057

◆ MATCH_VWSUBWX

#define MATCH_VWSUBWX   0xdc006057

◆ MATCH_VXORVI

#define MATCH_VXORVI   0x2c003057

◆ MATCH_VXORVV

#define MATCH_VXORVV   0x2c000057

◆ MATCH_VXORVX

#define MATCH_VXORVX   0x2c004057

◆ MATCH_VZEXT_VF2

#define MATCH_VZEXT_VF2   0x48032057

◆ MATCH_VZEXT_VF4

#define MATCH_VZEXT_VF4   0x48022057

◆ MATCH_VZEXT_VF8

#define MATCH_VZEXT_VF8   0x48012057

◆ MATCH_WFI

#define MATCH_WFI   0x10500073

◆ MATCH_WRS_NTO

#define MATCH_WRS_NTO   0x00d00073

◆ MATCH_WRS_STO

#define MATCH_WRS_STO   0x01d00073

◆ MATCH_XNOR

#define MATCH_XNOR   0x40004033

◆ MATCH_XOR

#define MATCH_XOR   0x4033

◆ MATCH_XORI

#define MATCH_XORI   0x4013

◆ MATCH_XPERM4

#define MATCH_XPERM4   0x28002033

◆ MATCH_XPERM8

#define MATCH_XPERM8   0x28004033

◆ riscv_breakpoints_debug_printf

#define riscv_breakpoints_debug_printf ( fmt,
... )
Value:
debug_prefixed_printf_cond (riscv_debug_breakpoints, \
"riscv-breakpoints", \
fmt, ##__VA_ARGS__)
static bool riscv_debug_breakpoints
Definition riscv-tdep.c:80

Definition at line 84 of file riscv-tdep.c.

Referenced by riscv_breakpoint_kind_from_pc().

◆ RISCV_ENCODING_H

#define RISCV_ENCODING_H

◆ riscv_gdbarch_debug_printf

#define riscv_gdbarch_debug_printf ( fmt,
... )
Value:
debug_prefixed_printf_cond (riscv_debug_gdbarch, "riscv-gdbarch", \
fmt, ##__VA_ARGS__)
static bool riscv_debug_gdbarch
Definition riscv-tdep.c:120

Definition at line 124 of file riscv-tdep.c.

Referenced by riscv_gdbarch_init().

◆ riscv_infcall_debug_printf

#define riscv_infcall_debug_printf ( fmt,
... )
Value:
debug_prefixed_printf_cond (riscv_debug_infcall, "riscv-infcall", \
fmt, ##__VA_ARGS__)
static bool riscv_debug_infcall
Definition riscv-tdep.c:92

Definition at line 96 of file riscv-tdep.c.

Referenced by riscv_push_dummy_call(), riscv_push_dummy_code(), and riscv_return_value().

◆ RISCV_INFCALL_SCOPED_DEBUG_START_END

#define RISCV_INFCALL_SCOPED_DEBUG_START_END ( fmt,
... )
Value:
scoped_debug_start_end (riscv_debug_infcall, "riscv-infcall", \
fmt, ##__VA_ARGS__)

Definition at line 102 of file riscv-tdep.c.

Referenced by riscv_push_dummy_call().

◆ riscv_unwinder_debug_printf

#define riscv_unwinder_debug_printf ( fmt,
... )
Value:
debug_prefixed_printf_cond (riscv_debug_unwinder, "riscv-unwinder", \
fmt, ##__VA_ARGS__)
static bool riscv_debug_unwinder
Definition riscv-tdep.c:109

Definition at line 113 of file riscv-tdep.c.

Referenced by previous_insn_is_add_imm_to_sp(), previous_insn_is_load_fp_from_stack(), riscv_detect_end_of_function(), riscv_frame_cache(), and riscv_scan_prologue().

◆ SP_ALIGNMENT

#define SP_ALIGNMENT   16

Definition at line 62 of file riscv-tdep.c.

Referenced by riscv_push_dummy_call().

Function Documentation

◆ _initialize_riscv_tdep()

◆ is_insn_addi_of_sp_to_sp()

static bool is_insn_addi_of_sp_to_sp ( const struct riscv_insn & insn)
static

◆ is_insn_load_of_fp_from_sp()

static bool is_insn_load_of_fp_from_sp ( const struct riscv_insn & insn)
static

◆ previous_insn_is_add_imm_to_sp()

static bool previous_insn_is_add_imm_to_sp ( struct gdbarch * gdbarch,
CORE_ADDR pc,
CORE_ADDR * prev_pc )
static

◆ previous_insn_is_load_fp_from_stack()

static bool previous_insn_is_load_fp_from_stack ( struct gdbarch * gdbarch,
CORE_ADDR pc )
static

◆ riscv_abi_embedded()

bool riscv_abi_embedded ( struct gdbarch * gdbarch)

◆ riscv_abi_flen()

int riscv_abi_flen ( struct gdbarch * gdbarch)

◆ riscv_abi_xlen()

int riscv_abi_xlen ( struct gdbarch * gdbarch)

◆ riscv_add_reggroups()

static void riscv_add_reggroups ( struct gdbarch * gdbarch)
static

Definition at line 3888 of file riscv-tdep.c.

References csr_reggroup, and reggroup_add().

Referenced by riscv_gdbarch_init().

◆ riscv_arg_location()

◆ riscv_arg_regs_available()

static int riscv_arg_regs_available ( struct riscv_arg_reg * reg)
static

◆ riscv_assign_reg_location()

static bool riscv_assign_reg_location ( struct riscv_arg_info::location * loc,
struct riscv_arg_reg * reg,
int length,
int offset )
static

◆ riscv_assign_stack_location()

static void riscv_assign_stack_location ( struct riscv_arg_info::location * loc,
struct riscv_memory_offsets * memory,
int length,
int align )
static

◆ riscv_breakpoint_kind_from_pc()

static int riscv_breakpoint_kind_from_pc ( struct gdbarch * gdbarch,
CORE_ADDR * pcptr )
static

◆ riscv_call_arg_complex_float()

◆ riscv_call_arg_scalar_float()

static void riscv_call_arg_scalar_float ( struct riscv_arg_info * ainfo,
struct riscv_call_info * cinfo )
static

◆ riscv_call_arg_scalar_int()

◆ riscv_call_arg_struct()

◆ riscv_cannot_store_register()

static int riscv_cannot_store_register ( struct gdbarch * gdbarch,
int regnum )
static

Definition at line 1038 of file riscv-tdep.c.

References regnum, and RISCV_ZERO_REGNUM.

Referenced by riscv_gdbarch_init().

◆ riscv_detect_end_of_function()

◆ riscv_dwarf_reg_to_regnum()

◆ riscv_features_from_bfd()

static struct riscv_gdbarch_features riscv_features_from_bfd ( const bfd * abfd)
static

◆ riscv_find_default_target_description()

static const struct target_desc * riscv_find_default_target_description ( const struct gdbarch_info info)
static

◆ riscv_fpreg_d_type()

◆ riscv_frame_align()

static CORE_ADDR riscv_frame_align ( struct gdbarch * gdbarch,
CORE_ADDR addr )
static

Definition at line 3701 of file riscv-tdep.c.

Referenced by riscv_gdbarch_init().

◆ riscv_frame_cache()

◆ riscv_frame_prev_register()

static struct value * riscv_frame_prev_register ( frame_info_ptr this_frame,
void ** prologue_cache,
int regnum )
static

◆ riscv_frame_this_id()

static void riscv_frame_this_id ( frame_info_ptr this_frame,
void ** prologue_cache,
struct frame_id * this_id )
static

Definition at line 3770 of file riscv-tdep.c.

References riscv_frame_cache(), and riscv_unwind_cache::this_id.

◆ riscv_gcc_target_options()

static std::string riscv_gcc_target_options ( struct gdbarch * gdbarch)
static

Definition at line 3919 of file riscv-tdep.c.

References riscv_abi_flen(), riscv_abi_xlen(), riscv_isa_flen(), and riscv_isa_xlen().

Referenced by riscv_gdbarch_init().

◆ riscv_gdbarch_init()

static struct gdbarch * riscv_gdbarch_init ( struct gdbarch_info info,
struct gdbarch_list * arches )
static

Definition at line 4082 of file riscv-tdep.c.

References riscv_gdbarch_tdep::abi_features, alias, arches, riscv_csr_feature::check(), riscv_freg_feature::check(), riscv_vector_feature::check(), riscv_virtual_feature::check(), riscv_xreg_feature::check(), core_addr_lessthan(), dwarf2_append_unwinders(), riscv_gdbarch_tdep::fflags_regnum, riscv_gdbarch_features::flen, floatformats_ieee_quad, frame_unwind_append_unwinder(), riscv_gdbarch_tdep::frm_regnum, gdbarch_alloc(), gdbarch_init_osabi(), gdbarch_list_lookup_by_info(), gdbarch_num_regs(), gdbarch_tdep(), registry< T >::get(), riscv_gdbarch_features::has_fcsr_reg, riscv_gdbarch_features::has_fflags_reg, riscv_gdbarch_features::has_frm_reg, riscv_gdbarch_tdep::isa_features, ON_STACK, register_riscv_ravenscar_ops(), riscv_add_reggroups(), riscv_breakpoint_kind_from_pc(), riscv_cannot_store_register(), riscv_disassembler_options, riscv_dwarf_reg_to_regnum(), riscv_features_from_bfd(), riscv_find_default_target_description(), riscv_frame_align(), riscv_frame_unwind, riscv_gcc_target_options(), riscv_gdbarch_debug_printf, riscv_gnu_triplet_regexp(), riscv_isa_xlen(), RISCV_LAST_REGNUM, RISCV_PC_REGNUM, riscv_print_registers_info(), riscv_pseudo_register_name(), riscv_pseudo_register_read(), riscv_pseudo_register_reggroup_p(), riscv_pseudo_register_type(), riscv_pseudo_register_write(), riscv_push_dummy_call(), riscv_push_dummy_code(), riscv_register_name(), riscv_register_reggroup_p(), riscv_register_type(), riscv_return_value(), riscv_skip_prologue(), RISCV_SP_REGNUM, riscv_stap_is_single_operand(), riscv_sw_breakpoint_from_kind(), riscv_tdesc_unknown_reg(), riscv_type_align(), set_gdbarch_breakpoint_kind_from_pc(), set_gdbarch_call_dummy_location(), set_gdbarch_cannot_store_register(), set_gdbarch_char_signed(), set_gdbarch_disassembler_options(), set_gdbarch_double_bit(), set_gdbarch_dwarf2_reg_to_regnum(), set_gdbarch_float_bit(), set_gdbarch_frame_align(), set_gdbarch_gcc_target_options(), set_gdbarch_gnu_triplet_regexp(), set_gdbarch_have_nonsteppable_watchpoint(), set_gdbarch_inner_than(), set_gdbarch_int_bit(), set_gdbarch_long_bit(), set_gdbarch_long_double_bit(), set_gdbarch_long_double_format(), set_gdbarch_long_long_bit(), set_gdbarch_num_pseudo_regs(), set_gdbarch_num_regs(), set_gdbarch_pc_regnum(), set_gdbarch_print_registers_info(), set_gdbarch_pseudo_register_read(), set_gdbarch_pseudo_register_write(), set_gdbarch_ptr_bit(), set_gdbarch_push_dummy_call(), set_gdbarch_push_dummy_code(), set_gdbarch_register_name(), set_gdbarch_register_reggroup_p(), set_gdbarch_register_type(), set_gdbarch_return_value_as_value(), set_gdbarch_short_bit(), set_gdbarch_skip_prologue(), set_gdbarch_sp_regnum(), set_gdbarch_stap_is_single_operand(), set_gdbarch_stap_register_indirection_prefixes(), set_gdbarch_stap_register_indirection_suffixes(), set_gdbarch_sw_breakpoint_from_kind(), set_gdbarch_type_align(), set_gdbarch_valid_disassembler_options(), set_tdesc_pseudo_register_name(), set_tdesc_pseudo_register_reggroup_p(), set_tdesc_pseudo_register_type(), stap_register_indirection_prefixes, stap_register_indirection_suffixes, tdesc_data, tdesc_data_alloc(), tdesc_found_register(), tdesc_has_registers(), tdesc_use_registers(), and riscv_gdbarch_features::xlen.

Referenced by _initialize_riscv_tdep().

◆ riscv_gnu_triplet_regexp()

static const char * riscv_gnu_triplet_regexp ( struct gdbarch * gdbarch)
static

Definition at line 4042 of file riscv-tdep.c.

Referenced by riscv_gdbarch_init().

◆ riscv_has_fp_abi()

static bool riscv_has_fp_abi ( struct gdbarch * gdbarch)
static

◆ riscv_has_fp_regs()

static bool riscv_has_fp_regs ( struct gdbarch * gdbarch)
static

Definition at line 810 of file riscv-tdep.c.

References riscv_isa_flen().

Referenced by riscv_register_name(), and riscv_register_reggroup_p().

◆ riscv_init_reggroups()

static void riscv_init_reggroups ( )
static

Definition at line 4476 of file riscv-tdep.c.

References csr_reggroup, reggroup_new(), and USER_REGGROUP.

Referenced by _initialize_riscv_tdep().

◆ riscv_is_fp_regno_p()

static bool riscv_is_fp_regno_p ( int regno)
static

◆ riscv_is_regnum_a_named_csr()

static bool riscv_is_regnum_a_named_csr ( int regnum)
static

Definition at line 1348 of file riscv-tdep.c.

References regnum, RISCV_FIRST_CSR_REGNUM, and RISCV_LAST_CSR_REGNUM.

Referenced by riscv_register_reggroup_p().

◆ riscv_is_unknown_csr()

static bool riscv_is_unknown_csr ( struct gdbarch * gdbarch,
int regnum )
static

◆ riscv_isa_flen()

◆ riscv_isa_xlen()

◆ riscv_next_pc()

◆ riscv_next_pc_atomic_sequence()

static bool riscv_next_pc_atomic_sequence ( struct regcache * regcache,
CORE_ADDR pc,
CORE_ADDR * next_pc )
static

◆ riscv_print_arg_location()

static void riscv_print_arg_location ( ui_file * stream,
struct gdbarch * gdbarch,
struct riscv_arg_info * info,
CORE_ADDR sp_refs,
CORE_ADDR sp_args )
static

◆ riscv_print_one_register_info()

◆ riscv_print_registers_info()

static void riscv_print_registers_info ( struct gdbarch * gdbarch,
struct ui_file * file,
frame_info_ptr frame,
int regnum,
int print_all )
static

◆ riscv_pseudo_register_name()

static const char * riscv_pseudo_register_name ( struct gdbarch * gdbarch,
int regnum )
static

◆ riscv_pseudo_register_read()

static enum register_status riscv_pseudo_register_read ( struct gdbarch * gdbarch,
readable_regcache * regcache,
int regnum,
gdb_byte * buf )
static

◆ riscv_pseudo_register_reggroup_p()

static int riscv_pseudo_register_reggroup_p ( struct gdbarch * gdbarch,
int regnum,
const struct reggroup * reggroup )
static

Definition at line 1494 of file riscv-tdep.c.

References regnum, and riscv_register_reggroup_p().

Referenced by riscv_gdbarch_init().

◆ riscv_pseudo_register_type()

static struct type * riscv_pseudo_register_type ( struct gdbarch * gdbarch,
int regnum )
static

◆ riscv_pseudo_register_write()

static void riscv_pseudo_register_write ( struct gdbarch * gdbarch,
struct regcache * regcache,
int regnum,
const gdb_byte * buf )
static

◆ riscv_push_dummy_call()

◆ riscv_push_dummy_code()

static CORE_ADDR riscv_push_dummy_code ( struct gdbarch * gdbarch,
CORE_ADDR sp,
CORE_ADDR funaddr,
struct value ** args,
int nargs,
struct type * value_type,
CORE_ADDR * real_pc,
CORE_ADDR * bp_addr,
struct regcache * regcache )
static

Definition at line 2458 of file riscv-tdep.c.

References paddress(), riscv_infcall_debug_printf, status, and target_write_memory().

Referenced by riscv_gdbarch_init().

◆ riscv_regcache_cooked_write()

static void riscv_regcache_cooked_write ( int regnum,
const gdb_byte * data,
int len,
struct regcache * regcache,
int flen )
static

Definition at line 3280 of file riscv-tdep.c.

References regcache::cooked_write(), regnum, and riscv_is_fp_regno_p().

Referenced by riscv_push_dummy_call(), and riscv_return_value().

◆ riscv_register_name()

◆ riscv_register_reggroup_p()

◆ riscv_register_type()

◆ riscv_return_value()

◆ riscv_scan_prologue()

◆ riscv_skip_prologue()

static CORE_ADDR riscv_skip_prologue ( struct gdbarch * gdbarch,
CORE_ADDR pc )
static

◆ riscv_software_single_step()

std::vector< CORE_ADDR > riscv_software_single_step ( struct regcache * regcache)

◆ riscv_stap_is_single_operand()

static int riscv_stap_is_single_operand ( struct gdbarch * gdbarch,
const char * s )
static

Definition at line 4051 of file riscv-tdep.c.

Referenced by riscv_gdbarch_init().

◆ riscv_supply_regset()

◆ riscv_sw_breakpoint_from_kind()

static const gdb_byte * riscv_sw_breakpoint_from_kind ( struct gdbarch * gdbarch,
int kind,
int * size )
static

Definition at line 890 of file riscv-tdep.c.

References size.

Referenced by riscv_gdbarch_init().

◆ riscv_tdesc_unknown_reg()

static int riscv_tdesc_unknown_reg ( struct gdbarch * gdbarch,
tdesc_feature * feature,
const char * reg_name,
int possible_regnum )
static

◆ riscv_type_align()

static ULONGEST riscv_type_align ( gdbarch * gdbarch,
type * type )
static

◆ show_riscv_debug_variable()

static void show_riscv_debug_variable ( struct ui_file * file,
int from_tty,
struct cmd_list_element * c,
const char * value )
static

Definition at line 753 of file riscv-tdep.c.

References gdb_printf(), and cmd_list_element::name.

Referenced by _initialize_riscv_tdep().

◆ show_use_compressed_breakpoints()

static void show_use_compressed_breakpoints ( struct ui_file * file,
int from_tty,
struct cmd_list_element * c,
const char * value )
static

Definition at line 731 of file riscv-tdep.c.

References gdb_printf().

Referenced by _initialize_riscv_tdep().

◆ value_of_riscv_user_reg()

static struct value * value_of_riscv_user_reg ( frame_info_ptr frame,
const void * baton )
static

Definition at line 168 of file riscv-tdep.c.

References value_of_register().

Referenced by riscv_pending_register_alias::create().

Variable Documentation

◆ csr_reggroup

const reggroup* csr_reggroup = nullptr
static

◆ riscv_csr_feature

const struct riscv_csr_feature riscv_csr_feature
static

Definition at line 611 of file riscv-tdep.c.

◆ riscv_debug_breakpoints

bool riscv_debug_breakpoints = false
static

Definition at line 80 of file riscv-tdep.c.

Referenced by _initialize_riscv_tdep(), and riscv_breakpoint_kind_from_pc().

◆ riscv_debug_gdbarch

bool riscv_debug_gdbarch = false
static

Definition at line 120 of file riscv-tdep.c.

Referenced by _initialize_riscv_tdep().

◆ riscv_debug_infcall

bool riscv_debug_infcall = false
static

Definition at line 92 of file riscv-tdep.c.

Referenced by _initialize_riscv_tdep(), riscv_push_dummy_call(), and riscv_return_value().

◆ riscv_debug_unwinder

bool riscv_debug_unwinder = false
static

Definition at line 109 of file riscv-tdep.c.

Referenced by _initialize_riscv_tdep().

◆ riscv_disassembler_options

char* riscv_disassembler_options
static

Definition at line 136 of file riscv-tdep.c.

Referenced by riscv_gdbarch_init().

◆ riscv_feature_name_cpu

const char* riscv_feature_name_cpu = "org.gnu.gdb.riscv.cpu"
static

Definition at line 130 of file riscv-tdep.c.

◆ riscv_feature_name_csr

const char* riscv_feature_name_csr = "org.gnu.gdb.riscv.csr"

Definition at line 129 of file riscv-tdep.c.

Referenced by riscv_iterate_over_regset_sections().

◆ riscv_feature_name_fpu

const char* riscv_feature_name_fpu = "org.gnu.gdb.riscv.fpu"
static

Definition at line 131 of file riscv-tdep.c.

◆ riscv_feature_name_vector

const char* riscv_feature_name_vector = "org.gnu.gdb.riscv.vector"
static

Definition at line 133 of file riscv-tdep.c.

◆ riscv_feature_name_virtual

const char* riscv_feature_name_virtual = "org.gnu.gdb.riscv.virtual"
static

Definition at line 132 of file riscv-tdep.c.

◆ riscv_frame_unwind

const struct frame_unwind riscv_frame_unwind
static
Initial value:
=
{
"riscv prologue",
NULL,
NULL,
NULL,
}
int default_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
enum unwind_stop_reason default_frame_unwind_stop_reason(frame_info_ptr this_frame, void **this_cache)
@ NORMAL_FRAME
Definition frame.h:187
static struct value * riscv_frame_prev_register(frame_info_ptr this_frame, void **prologue_cache, int regnum)
static void riscv_frame_this_id(frame_info_ptr this_frame, void **prologue_cache, struct frame_id *this_id)

Definition at line 3805 of file riscv-tdep.c.

Referenced by riscv_gdbarch_init().

◆ riscv_freg_feature

const struct riscv_freg_feature riscv_freg_feature
static

Definition at line 515 of file riscv-tdep.c.

◆ riscv_vector_feature

const struct riscv_vector_feature riscv_vector_feature
static

Definition at line 720 of file riscv-tdep.c.

◆ riscv_virtual_feature

const struct riscv_virtual_feature riscv_virtual_feature
static

Definition at line 555 of file riscv-tdep.c.

◆ riscv_xreg_feature

const struct riscv_xreg_feature riscv_xreg_feature
static

Definition at line 391 of file riscv-tdep.c.

◆ setdebugriscvcmdlist

struct cmd_list_element* setdebugriscvcmdlist = NULL
static

Definition at line 747 of file riscv-tdep.c.

Referenced by _initialize_riscv_tdep().

◆ setriscvcmdlist

struct cmd_list_element* setriscvcmdlist = NULL
static

Definition at line 742 of file riscv-tdep.c.

Referenced by _initialize_riscv_tdep().

◆ showdebugriscvcmdlist

struct cmd_list_element* showdebugriscvcmdlist = NULL
static

Definition at line 748 of file riscv-tdep.c.

Referenced by _initialize_riscv_tdep().

◆ showriscvcmdlist

struct cmd_list_element* showriscvcmdlist = NULL
static

Definition at line 743 of file riscv-tdep.c.

Referenced by _initialize_riscv_tdep().

◆ stap_register_indirection_prefixes

const char* const stap_register_indirection_prefixes[]
static

◆ stap_register_indirection_suffixes

const char* const stap_register_indirection_suffixes[]
static

◆ use_compressed_breakpoints

enum auto_boolean use_compressed_breakpoints
static

Definition at line 726 of file riscv-tdep.c.

Referenced by _initialize_riscv_tdep(), and riscv_breakpoint_kind_from_pc().