#include "gdbsupport/tdesc.h"
Go to the source code of this file.
|
#define | IS_PAC(instruction) (instruction == 0xf3af801d) |
|
#define | IS_PACBTI(instruction) (instruction == 0xf3af800d) |
|
#define | IS_BTI(instruction) (instruction == 0xf3af800f) |
|
#define | IS_PACG(instruction) ((instruction & 0xfff0f0f0) == 0xfb60f000) |
|
#define | IS_AUT(instruction) (instruction == 0xf3af802d) |
|
#define | IS_AUTG(instruction) ((instruction & 0xfff00ff0) == 0xfb500f00) |
|
#define | INST_EQ 0x0 |
|
#define | INST_NE 0x1 |
|
#define | INST_CS 0x2 |
|
#define | INST_CC 0x3 |
|
#define | INST_MI 0x4 |
|
#define | INST_PL 0x5 |
|
#define | INST_VS 0x6 |
|
#define | INST_VC 0x7 |
|
#define | INST_HI 0x8 |
|
#define | INST_LS 0x9 |
|
#define | INST_GE 0xa |
|
#define | INST_LT 0xb |
|
#define | INST_GT 0xc |
|
#define | INST_LE 0xd |
|
#define | INST_AL 0xe |
|
#define | INST_NV 0xf |
|
#define | FLAG_N 0x80000000 |
|
#define | FLAG_Z 0x40000000 |
|
#define | FLAG_C 0x20000000 |
|
#define | FLAG_V 0x10000000 |
|
#define | CPSR_T 0x20 |
|
#define | XPSR_T 0x01000000 |
|
#define | ARM_INT_REGISTER_SIZE 4 |
|
#define | ARM_FP_REGISTER_SIZE 12 |
|
#define | ARM_VFP_REGISTER_SIZE 8 |
|
#define | IWMMXT_VEC_REGISTER_SIZE 8 |
|
#define | ARM_CORE_REGS_SIZE (17 * ARM_INT_REGISTER_SIZE) |
|
#define | ARM_FP_REGS_SIZE (8 * ARM_FP_REGISTER_SIZE + ARM_INT_REGISTER_SIZE) |
|
#define | ARM_VFP2_REGS_SIZE (16 * ARM_VFP_REGISTER_SIZE + ARM_INT_REGISTER_SIZE) |
|
#define | ARM_VFP3_REGS_SIZE (32 * ARM_VFP_REGISTER_SIZE + ARM_INT_REGISTER_SIZE) |
|
#define | IWMMXT_REGS_SIZE |
|
#define | IS_THUMB_ADDR(addr) ((addr) & 1) |
|
#define | MAKE_THUMB_ADDR(addr) ((addr) | 1) |
|
#define | UNMAKE_THUMB_ADDR(addr) ((addr) & ~1) |
|
#define | submask(x) ((1L << ((x) + 1)) - 1) |
|
#define | bits(obj, st, fn) (((obj) >> (st)) & submask ((fn) - (st))) |
|
#define | bit(obj, st) (((obj) >> (st)) & 1) |
|
#define | sbits(obj, st, fn) ((long) (bits(obj,st,fn) | ((long) bit(obj,fn) * ~ submask (fn - st)))) |
|
#define | BranchDest(addr, instr) ((CORE_ADDR) (((unsigned long) (addr)) + 8 + (sbits (instr, 0, 23) << 2))) |
|
|
enum | arm_dwarf_regnum { ARM_DWARF_RA_AUTH_CODE = 143
} |
|
enum | gdb_regnum {
ARM_A1_REGNUM = 0
, ARM_A4_REGNUM = 3
, ARM_AP_REGNUM = 11
, ARM_IP_REGNUM = 12
,
ARM_SP_REGNUM = 13
, ARM_LR_REGNUM = 14
, ARM_PC_REGNUM = 15
, ARM_F0_REGNUM = 16
,
ARM_F3_REGNUM = 19
, ARM_F7_REGNUM = 23
, ARM_FPS_REGNUM = 24
, ARM_PS_REGNUM = 25
,
ARM_WR0_REGNUM
, ARM_WR15_REGNUM = ARM_WR0_REGNUM + 15
, ARM_WC0_REGNUM
, ARM_WCSSF_REGNUM = ARM_WC0_REGNUM + 2
,
ARM_WCASF_REGNUM = ARM_WC0_REGNUM + 3
, ARM_WC7_REGNUM = ARM_WC0_REGNUM + 7
, ARM_WCGR0_REGNUM
, ARM_WCGR3_REGNUM = ARM_WCGR0_REGNUM + 3
,
ARM_WCGR7_REGNUM = ARM_WCGR0_REGNUM + 7
, ARM_D0_REGNUM
, ARM_D31_REGNUM = ARM_D0_REGNUM + 31
, ARM_FPSCR_REGNUM
,
ARM_FP_REGNUM = 11
, THUMB_FP_REGNUM = 7
, ARM_LAST_ARG_REGNUM = ARM_A4_REGNUM
, ARM_LAST_FP_ARG_REGNUM = ARM_F3_REGNUM
} |
|
enum | arm_register_counts { ARM_MVE_NUM_Q_REGS = 8
, ARM_NUM_ARG_REGS = 4
, ARM_NUM_FP_ARG_REGS = 4
, ARM_NUM_REGS = ARM_FPSCR_REGNUM + 1
} |
|
enum | arm_breakpoint_kinds { ARM_BP_KIND_THUMB = 2
, ARM_BP_KIND_THUMB2 = 3
, ARM_BP_KIND_ARM = 4
} |
|
enum | arm_fp_type {
ARM_FP_TYPE_NONE = 0
, ARM_FP_TYPE_VFPV2
, ARM_FP_TYPE_VFPV3
, ARM_FP_TYPE_IWMMXT
,
ARM_FP_TYPE_INVALID
} |
|
enum | arm_m_profile_type {
ARM_M_TYPE_M_PROFILE
, ARM_M_TYPE_VFP_D16
, ARM_M_TYPE_WITH_FPA
, ARM_M_TYPE_MVE
,
ARM_M_TYPE_SYSTEM
, ARM_M_TYPE_INVALID
} |
|
enum | system_register_address : CORE_ADDR { FPCCR = 0xe000ef34
, FPCAR = 0xe000ef38
} |
|
◆ ARM_CORE_REGS_SIZE
◆ ARM_FP_REGISTER_SIZE
#define ARM_FP_REGISTER_SIZE 12 |
◆ ARM_FP_REGS_SIZE
◆ ARM_INT_REGISTER_SIZE
#define ARM_INT_REGISTER_SIZE 4 |
◆ ARM_VFP2_REGS_SIZE
◆ ARM_VFP3_REGS_SIZE
◆ ARM_VFP_REGISTER_SIZE
#define ARM_VFP_REGISTER_SIZE 8 |
◆ bit
#define bit |
( |
|
obj, |
|
|
|
st |
|
) |
| (((obj) >> (st)) & 1) |
◆ bits
#define bits |
( |
|
obj, |
|
|
|
st, |
|
|
|
fn |
|
) |
| (((obj) >> (st)) & submask ((fn) - (st))) |
◆ BranchDest
#define BranchDest |
( |
|
addr, |
|
|
|
instr |
|
) |
| ((CORE_ADDR) (((unsigned long) (addr)) + 8 + (sbits (instr, 0, 23) << 2))) |
◆ CPSR_T
◆ FLAG_C
#define FLAG_C 0x20000000 |
◆ FLAG_N
#define FLAG_N 0x80000000 |
◆ FLAG_V
#define FLAG_V 0x10000000 |
◆ FLAG_Z
#define FLAG_Z 0x40000000 |
◆ INST_AL
◆ INST_CC
◆ INST_CS
◆ INST_EQ
◆ INST_GE
◆ INST_GT
◆ INST_HI
◆ INST_LE
◆ INST_LS
◆ INST_LT
◆ INST_MI
◆ INST_NE
◆ INST_NV
◆ INST_PL
◆ INST_VC
◆ INST_VS
◆ IS_AUT
#define IS_AUT |
( |
|
instruction | ) |
(instruction == 0xf3af802d) |
Definition at line 29 of file arm.h.
◆ IS_AUTG
#define IS_AUTG |
( |
|
instruction | ) |
((instruction & 0xfff00ff0) == 0xfb500f00) |
Definition at line 30 of file arm.h.
◆ IS_BTI
#define IS_BTI |
( |
|
instruction | ) |
(instruction == 0xf3af800f) |
Definition at line 27 of file arm.h.
◆ IS_PAC
#define IS_PAC |
( |
|
instruction | ) |
(instruction == 0xf3af801d) |
Definition at line 25 of file arm.h.
◆ IS_PACBTI
#define IS_PACBTI |
( |
|
instruction | ) |
(instruction == 0xf3af800d) |
Definition at line 26 of file arm.h.
◆ IS_PACG
#define IS_PACG |
( |
|
instruction | ) |
((instruction & 0xfff0f0f0) == 0xfb60f000) |
Definition at line 28 of file arm.h.
◆ IS_THUMB_ADDR
#define IS_THUMB_ADDR |
( |
|
addr | ) |
((addr) & 1) |
◆ IWMMXT_REGS_SIZE
Value:
#define ARM_INT_REGISTER_SIZE
#define IWMMXT_VEC_REGISTER_SIZE
Definition at line 172 of file arm.h.
◆ IWMMXT_VEC_REGISTER_SIZE
#define IWMMXT_VEC_REGISTER_SIZE 8 |
◆ MAKE_THUMB_ADDR
#define MAKE_THUMB_ADDR |
( |
|
addr | ) |
((addr) | 1) |
◆ sbits
#define sbits |
( |
|
obj, |
|
|
|
st, |
|
|
|
fn |
|
) |
| ((long) (bits(obj,st,fn) | ((long) bit(obj,fn) * ~ submask (fn - st)))) |
◆ submask
#define submask |
( |
|
x | ) |
((1L << ((x) + 1)) - 1) |
◆ UNMAKE_THUMB_ADDR
#define UNMAKE_THUMB_ADDR |
( |
|
addr | ) |
((addr) & ~1) |
◆ XPSR_T
#define XPSR_T 0x01000000 |
◆ arm_breakpoint_kinds
Enumerator |
---|
ARM_BP_KIND_THUMB | |
ARM_BP_KIND_THUMB2 | |
ARM_BP_KIND_ARM | |
Definition at line 86 of file arm.h.
◆ arm_dwarf_regnum
Enumerator |
---|
ARM_DWARF_RA_AUTH_CODE | |
Definition at line 33 of file arm.h.
◆ arm_fp_type
Enumerator |
---|
ARM_FP_TYPE_NONE | |
ARM_FP_TYPE_VFPV2 | |
ARM_FP_TYPE_VFPV3 | |
ARM_FP_TYPE_IWMMXT | |
ARM_FP_TYPE_INVALID | |
Definition at line 94 of file arm.h.
◆ arm_m_profile_type
Enumerator |
---|
ARM_M_TYPE_M_PROFILE | |
ARM_M_TYPE_VFP_D16 | |
ARM_M_TYPE_WITH_FPA | |
ARM_M_TYPE_MVE | |
ARM_M_TYPE_SYSTEM | |
ARM_M_TYPE_INVALID | |
Definition at line 103 of file arm.h.
◆ arm_register_counts
Enumerator |
---|
ARM_MVE_NUM_Q_REGS | |
ARM_NUM_ARG_REGS | |
ARM_NUM_FP_ARG_REGS | |
ARM_NUM_REGS | |
Definition at line 74 of file arm.h.
◆ gdb_regnum
Enumerator |
---|
ARM_A1_REGNUM | |
ARM_A4_REGNUM | |
ARM_AP_REGNUM | |
ARM_IP_REGNUM | |
ARM_SP_REGNUM | |
ARM_LR_REGNUM | |
ARM_PC_REGNUM | |
ARM_F0_REGNUM | |
ARM_F3_REGNUM | |
ARM_F7_REGNUM | |
ARM_FPS_REGNUM | |
ARM_PS_REGNUM | |
ARM_WR0_REGNUM | |
ARM_WR15_REGNUM | |
ARM_WC0_REGNUM | |
ARM_WCSSF_REGNUM | |
ARM_WCASF_REGNUM | |
ARM_WC7_REGNUM | |
ARM_WCGR0_REGNUM | |
ARM_WCGR3_REGNUM | |
ARM_WCGR7_REGNUM | |
ARM_D0_REGNUM | |
ARM_D31_REGNUM | |
ARM_FPSCR_REGNUM | |
ARM_FP_REGNUM | |
THUMB_FP_REGNUM | |
ARM_LAST_ARG_REGNUM | |
ARM_LAST_FP_ARG_REGNUM | |
Definition at line 39 of file arm.h.
◆ system_register_address
◆ arm_create_mprofile_target_description()
Definition at line 423 of file arm.c.
References allocate_target_description(), ARM_M_TYPE_M_PROFILE, ARM_M_TYPE_MVE, ARM_M_TYPE_SYSTEM, ARM_M_TYPE_VFP_D16, ARM_M_TYPE_WITH_FPA, create_feature_arm_arm_m_profile(), create_feature_arm_arm_m_profile_mve(), create_feature_arm_arm_m_profile_with_fpa(), create_feature_arm_arm_m_system(), create_feature_arm_arm_vfpv2(), regnum, and set_tdesc_architecture().
Referenced by arm_read_mprofile_description().
◆ arm_create_target_description()
Definition at line 378 of file arm.c.
References allocate_target_description(), ARM_FP_TYPE_IWMMXT, ARM_FP_TYPE_NONE, ARM_FP_TYPE_VFPV2, ARM_FP_TYPE_VFPV3, create_feature_arm_arm_core(), create_feature_arm_arm_tls(), create_feature_arm_arm_vfpv2(), create_feature_arm_arm_vfpv3(), create_feature_arm_xscale_iwmmxt(), regnum, and set_tdesc_architecture().
Referenced by arm_read_description().
◆ arm_instruction_changes_pc()
int arm_instruction_changes_pc |
( |
uint32_t |
this_instr | ) |
|
◆ condition_true()
int condition_true |
( |
unsigned long |
cond, |
|
|
unsigned long |
status_reg |
|
) |
| |
Definition at line 48 of file arm.c.
References FLAG_C, FLAG_N, FLAG_V, FLAG_Z, INST_AL, INST_CC, INST_CS, INST_EQ, INST_GE, INST_GT, INST_HI, INST_LE, INST_LS, INST_LT, INST_MI, INST_NE, INST_NV, INST_PL, INST_VC, and INST_VS.
Referenced by arm_get_next_pcs_raw(), cleanup_block_load_all(), cleanup_block_load_pc(), cleanup_block_store_pc(), cleanup_branch(), and thumb_get_next_pcs_raw().
◆ shifted_reg_val()
unsigned long shifted_reg_val |
( |
struct regcache * |
regcache, |
|
|
unsigned long |
inst, |
|
|
int |
carry, |
|
|
unsigned long |
pc_val, |
|
|
unsigned long |
status_reg |
|
) |
| |
◆ thumb2_instruction_changes_pc()
int thumb2_instruction_changes_pc |
( |
unsigned short |
inst1, |
|
|
unsigned short |
inst2 |
|
) |
| |
◆ thumb_advance_itstate()
int thumb_advance_itstate |
( |
unsigned int |
itstate | ) |
|
◆ thumb_insn_size()
int thumb_insn_size |
( |
unsigned short |
inst1 | ) |
|
◆ thumb_instruction_changes_pc()
int thumb_instruction_changes_pc |
( |
unsigned short |
inst | ) |
|