41#include "opcode/mips.h"
72 CORE_ADDR addr,
int mustbe32);
74 CORE_ADDR addr,
int mustbe32);
81#define ST0_FR (1 << 26)
168#define R(n) { "r" #n, n }
169 R(0),
R(1),
R(2),
R(3),
R(4),
R(5),
R(6),
R(7),
170 R(8),
R(9),
R(10),
R(11),
R(12),
R(13),
R(14),
R(15),
171 R(16),
R(17),
R(18),
R(19),
R(20),
R(21),
R(22),
R(23),
172 R(24),
R(25),
R(26),
R(27),
R(28),
R(29),
R(30),
R(31),
191#define R(n) { #n, n }
192 R(0),
R(1),
R(2),
R(3),
R(4),
R(5),
R(6),
R(7),
193 R(8),
R(9),
R(10),
R(11),
R(12),
R(13),
R(14),
R(15),
194 R(16),
R(17),
R(18),
R(19),
R(20),
R(21),
R(22),
R(23),
195 R(24),
R(25),
R(26),
R(27),
R(28),
R(29),
R(30),
R(31),
199#ifndef MIPS_DEFAULT_FPU_TYPE
200#define MIPS_DEFAULT_FPU_TYPE MIPS_FPU_DOUBLE
209#define PROPERTY_GP32 "internal: transfers-32bit-registers"
210#define PROPERTY_GP64 "internal: transfers-64bit-registers"
278 return tdep->mips_fpu_type;
286 return tdep->mips_abi;
304#define MAX_MIPS_ABI_REGSIZE 8
324 internal_error (_(
"bad switch"));
388 return ((addr) & ~(CORE_ADDR) 1);
396 return ((addr) | (CORE_ADDR) 1);
426 elf_symbol_type *elfsym = (elf_symbol_type *) sym;
427 unsigned char st_other;
429 if ((sym->flags & BSF_SYNTHETIC) == 0)
430 st_other = elfsym->internal_elf_sym.st_other;
431 else if ((sym->flags & BSF_FUNCTION) != 0)
432 st_other = sym->udata.i;
436 if (ELF_ST_IS_MICROMIPS (st_other))
441 else if (ELF_ST_IS_MIPS16 (st_other))
490 CORE_ADDR compact_block_start;
509 int reg_num,
int length,
510 enum bfd_endian endian, gdb_byte *in,
511 const gdb_byte *out,
int buf_offset)
523 case BFD_ENDIAN_LITTLE:
526 case BFD_ENDIAN_UNKNOWN:
530 internal_error (_(
"bad switch"));
534 "xfer $%d, reg offset %d, buf offset %d, length %d, ",
540 for (i = 0; i < length; i++)
551 for (i = 0; i < length; i++)
584#define VM_MIN_ADDRESS (CORE_ADDR)0x400000
603 "sr",
"lo",
"hi",
"bad",
"cause",
"pc",
604 "f0",
"f1",
"f2",
"f3",
"f4",
"f5",
"f6",
"f7",
605 "f8",
"f9",
"f10",
"f11",
"f12",
"f13",
"f14",
"f15",
606 "f16",
"f17",
"f18",
"f19",
"f20",
"f21",
"f22",
"f23",
607 "f24",
"f25",
"f26",
"f27",
"f28",
"f29",
"f30",
"f31",
614 "sr",
"lo",
"hi",
"bad",
"cause",
"pc",
615 "",
"",
"",
"",
"",
"",
"",
"",
616 "",
"",
"",
"",
"",
"",
"",
"",
617 "",
"",
"",
"",
"",
"",
"",
"",
618 "",
"",
"",
"",
"",
"",
"",
"",
620 "",
"",
"",
"",
"",
"",
"",
"",
621 "",
"",
"config",
"cache",
"debug",
"depc",
"epc",
626 "sr",
"lo",
"hi",
"bad",
"cause",
"pc",
627 "f0",
"f1",
"f2",
"f3",
"f4",
"f5",
"f6",
"f7",
628 "f8",
"f9",
"f10",
"f11",
"f12",
"f13",
"f14",
"f15",
629 "f16",
"f17",
"f18",
"f19",
"f20",
"f21",
"f22",
"f23",
630 "f24",
"f25",
"f26",
"f27",
"f28",
"f29",
"f30",
"f31",
641 static const char *mips_gpr_names[] = {
642 "zero",
"at",
"v0",
"v1",
"a0",
"a1",
"a2",
"a3",
643 "t0",
"t1",
"t2",
"t3",
"t4",
"t5",
"t6",
"t7",
644 "s0",
"s1",
"s2",
"s3",
"s4",
"s5",
"s6",
"s7",
645 "t8",
"t9",
"k0",
"k1",
"gp",
"sp",
"s8",
"ra",
649 static const char *mips_n32_n64_gpr_names[] = {
650 "zero",
"at",
"v0",
"v1",
"a0",
"a1",
"a2",
"a3",
651 "a4",
"a5",
"a6",
"a7",
"t0",
"t1",
"t2",
"t3",
652 "s0",
"s1",
"s2",
"s3",
"s4",
"s5",
"s6",
"s7",
653 "t8",
"t9",
"k0",
"k1",
"gp",
"sp",
"s8",
"ra"
676 if (0 <= rawnum && rawnum < 32)
679 return mips_n32_n64_gpr_names[rawnum];
681 return mips_gpr_names[rawnum];
693 internal_error (_(
"mips_register_name: bad register number %d"), rawnum);
717 return float_p && pseudo;
719 return vector_p && pseudo;
721 return (!vector_p && !float_p) && pseudo;
726 return raw_p && pseudo;
729 return raw_p && pseudo;
766static enum register_status
768 int cookednum, gdb_byte *buf)
786 enum register_status
status;
795 internal_error (_(
"bad register size"));
826 internal_error (_(
"bad register size"));
856 = gdbarch_tdep<mips_gdbarch_tdep> (
gdbarch);
869 internal_error (_(
"bad register size"));
900 error (_(
"32-bit compatibility mode not supported"));
945 int *optimizedp,
int *unavailablep)
955 optimizedp, unavailablep))
959 optimizedp, unavailablep))
961 *optimizedp = *unavailablep = 0;
971 optimizedp, unavailablep))
974 *optimizedp = *unavailablep = 0;
979 internal_error (_(
"mips_register_to_value: unrecognized case"));
985 struct type *
type,
const gdb_byte *from)
1016 if (from[len-1] & 0x80)
1026 internal_error (_(
"mips_value_to_register: unrecognized case"));
1095 int rawnum =
regnum % num_regs;
1096 struct type *rawtype;
1098 gdb_assert (
regnum >= num_regs &&
regnum < 2 * num_regs);
1102 if (rawtype->
length () == 0)
1172 internal_error (_(
"mips_mask_address_p: bad switch"));
1181 const char *additional_text =
"";
1185 additional_text = _(
" (current architecture is not MIPS)");
1192 additional_text = _(
" (currently \"on\")");
1194 additional_text = _(
" (currently \"off\")");
1198 gdb_printf (file, _(
"Zeroing of upper 32 bits of 64-bit addresses is \"%s\"%s.\n"),
1199 value, additional_text);
1342 static CORE_ADDR adj_pc;
1343 static CORE_ADDR pc;
1346 pc = rel ? pc + addr : addr;
1348 addr = rel ? isa_pc - adj_pc : isa_pc;
1371 CORE_ADDR start_addr;
1463 enum mips_isa isa, CORE_ADDR addr,
int *errp)
1481 internal_error (_(
"invalid ISA"));
1497#define mips32_op(x) (x >> 26)
1498#define itype_op(x) (x >> 26)
1499#define itype_rs(x) ((x >> 21) & 0x1f)
1500#define itype_rt(x) ((x >> 16) & 0x1f)
1501#define itype_immediate(x) (x & 0xffff)
1503#define jtype_op(x) (x >> 26)
1504#define jtype_target(x) (x & 0x03ffffff)
1506#define rtype_op(x) (x >> 26)
1507#define rtype_rs(x) ((x >> 21) & 0x1f)
1508#define rtype_rt(x) ((x >> 16) & 0x1f)
1509#define rtype_rd(x) ((x >> 11) & 0x1f)
1510#define rtype_shamt(x) ((x >> 6) & 0x1f)
1511#define rtype_funct(x) (x & 0x3f)
1514#define micromips_op(x) ((x) >> 10)
1518#define b0s4_imm(x) ((x) & 0xf)
1519#define b0s5_imm(x) ((x) & 0x1f)
1520#define b0s5_reg(x) ((x) & 0x1f)
1521#define b0s7_imm(x) ((x) & 0x7f)
1522#define b0s10_imm(x) ((x) & 0x3ff)
1523#define b1s4_imm(x) (((x) >> 1) & 0xf)
1524#define b1s9_imm(x) (((x) >> 1) & 0x1ff)
1525#define b2s3_cc(x) (((x) >> 2) & 0x7)
1526#define b4s2_regl(x) (((x) >> 4) & 0x3)
1527#define b5s5_op(x) (((x) >> 5) & 0x1f)
1528#define b5s5_reg(x) (((x) >> 5) & 0x1f)
1529#define b6s4_op(x) (((x) >> 6) & 0xf)
1530#define b7s3_reg(x) (((x) >> 7) & 0x7)
1534#define b0s6_op(x) ((x) & 0x3f)
1535#define b0s11_op(x) ((x) & 0x7ff)
1536#define b0s12_imm(x) ((x) & 0xfff)
1537#define b0s16_imm(x) ((x) & 0xffff)
1538#define b0s26_imm(x) ((x) & 0x3ffffff)
1539#define b6s10_ext(x) (((x) >> 6) & 0x3ff)
1540#define b11s5_reg(x) (((x) >> 11) & 0x1f)
1541#define b12s4_op(x) (((x) >> 12) & 0xf)
1558 if ((insn & 0xf800) == 0xf000)
1565 internal_error (_(
"invalid ISA"));
1580 ULONGEST inst, CORE_ADDR pc,
int count)
1583 int cnum = (
itype_rt (inst) >> 2) & (count - 1);
1585 int mask = (1 << count) - 1;
1593 fcs = regcache_raw_get_unsigned (
regcache, fcsr);
1594 cond = ((fcs >> 24) & 0xfe) | ((fcs >> 23) & 0x01);
1596 if (((cond >> cnum) & mask) != mask * !tf)
1611 return (info->mach == bfd_mach_mips_octeon
1612 || info->mach == bfd_mach_mips_octeonp
1613 || info->mach == bfd_mach_mips_octeon2);
1627 if (op == 50 || op == 54 || op == 58 || op == 62)
1644 if ((inst & 0xe0000000) != 0)
1659 goto greater_branch;
1664 else if (op == 17 &&
itype_rs (inst) == 8)
1667 else if (op == 17 &&
itype_rs (inst) == 9
1671 else if (op == 17 &&
itype_rs (inst) == 10
1683 pc = ((pc + 4) & ~(CORE_ADDR) 0x0fffffff) + reg + 1;
1689 branch_if = op == 58 || op == 62;
1693 if (op == 54 || op == 62)
1725 = gdbarch_tdep<mips_gdbarch_tdep> (
gdbarch);
1767 unsigned int pos = (op & 2) ? 64 : 32;
1774 if ((regcache_raw_get_unsigned (
regcache,
1775 dspctl) & 0x7f) >= pos)
1793 pc = reg + ((pc + 4) & ~(CORE_ADDR) 0x0fffffff);
1837 return ((
b0s7_imm (insn) ^ 0x40) - 0x40) << 1;
1846 return ((
b0s10_imm (insn) ^ 0x200) - 0x200) << 1;
1855 return ((
b0s16_imm (insn) ^ 0x8000) - 0x8000) << 1;
1876 ULONGEST insn, CORE_ADDR pc,
int count)
1879 int cnum =
b2s3_cc (insn >> 16) & (count - 1);
1880 int tf =
b5s5_op (insn >> 16) & 1;
1881 int mask = (1 << count) - 1;
1889 fcs = regcache_raw_get_unsigned (
regcache, fcsr);
1890 cond = ((fcs >> 24) & 0xfe) | ((fcs >> 23) & 0x01);
1892 if (((cond >> cnum) & mask) != mask * !tf)
1936 = gdbarch_tdep<mips_gdbarch_tdep> (
gdbarch);
2000 if (((insn >> 16) & 0x3) == 0x0)
2008 unsigned int pos = (
b5s5_op (insn >> 16) & 1) ? 32 : 64;
2015 if ((regcache_raw_get_unsigned (
regcache,
2016 dspctl) & 0x7f) >= pos)
2027 if (((insn >> 16) & 0x2) == 0x0)
2029 ((insn >> 16) & 0x1) + 1);
2034 if (((insn >> 16) & 0x3) == 0x1)
2043 pc = ((pc | 0x7fffffe) ^ 0x7fffffe) | (
b0s26_imm (insn) << 1);
2063 pc = ((pc | 0xfffffff) ^ 0xfffffff) | (
b0s26_imm (insn) << 2);
2073 if ((
b5s5_op (insn) & 0x1c) == 0xc)
2076 else if (
b5s5_op (insn) == 0x18)
2165 value = (extension >> 16) & 0x1f;
2167 value |= (extension >> 21) & 0x3f;
2169 value |= extension & 0x1f;
2194 unsigned int extension,
2201 switch (insn_format)
2213 value = inst & 0x7ff;
2234 value = inst & 0xff;
2238 regx = (inst >> 8) & 0x07;
2244 unsigned long value;
2245 unsigned int nexthalf;
2246 value = ((inst & 0x1f) << 5) | ((inst >> 5) & 0x1f);
2257 internal_error (_(
"bad switch"));
2271 return pc + (offset << 1) + 2;
2276 unsigned int extension,
unsigned int insn)
2279 int op = (insn >> 11);
2294 pc = ((pc + 2) & (~(CORE_ADDR) 0x0fffffff)) | (upk.
offset << 2);
2295 if ((insn >> 10) & 0x01)
2333 if (((upk.
regx == 0) && (reg == 0))
2334 || ((upk.
regx == 1) && (reg != 0)))
2348 upk.
regx = (insn >> 8) & 0x07;
2349 upk.
regy = (insn >> 5) & 0x07;
2350 if ((upk.
regy & 1) == 0)
2411 switch (insn & 0xf800)
2414 return (insn & 0x009f) == 0x80;
2416 return (insn & 0x0600) == 0;
2435 return (
b5s5_op (insn) == 0x18
2440 return (
b5s5_op (insn) & 0x1d) == 0x5;
2466 int regnum, CORE_ADDR offset)
2468 if (this_cache != NULL
2487 unsigned short inst,
2494 if ((prev_inst & 0xf800) == 0xf000)
2496 offset = ((prev_inst & 0x1f) << 11) | (prev_inst & 0x7e0);
2497 if (offset & 0x8000)
2498 offset = 0 - (0x10000 - (offset & 0xffff));
2499 return offset | (inst & 0x1f);
2503 int max_imm = 1 << nbits;
2504 int mask = max_imm - 1;
2505 int sign_bit = max_imm >> 1;
2507 offset = inst & mask;
2508 if (is_signed && (offset & sign_bit))
2509 offset = 0 - (max_imm - offset);
2510 return offset * scale;
2521 CORE_ADDR start_pc, CORE_ADDR limit_pc,
2525 int prev_non_prologue_insn = 0;
2526 int this_non_prologue_insn;
2527 int non_prologue_insns = 0;
2530 CORE_ADDR frame_addr = 0;
2532 long frame_offset = 0;
2533 long frame_adjust = 0;
2535 unsigned short prev_inst = 0;
2537 unsigned entry_inst = 0;
2538 unsigned save_inst = 0;
2539 int prev_delay_slot = 0;
2543 int extend_bytes = 0;
2544 int prev_extend_bytes = 0;
2545 CORE_ADDR end_prologue_addr;
2549 if (this_frame != NULL)
2556 if (limit_pc > start_pc + 200)
2557 limit_pc = start_pc + 200;
2565 this_non_prologue_insn = 0;
2581 if ((inst & 0xf800) == 0xf000)
2587 prev_extend_bytes = extend_bytes;
2590 if ((inst & 0xff00) == 0x6300
2591 || (inst & 0xff00) == 0xfb00)
2595 frame_offset -= offset;
2602 else if ((inst & 0xf800) == 0xd000)
2608 else if ((inst & 0xff00) == 0xf900)
2614 else if ((inst & 0xff00) == 0x6200)
2619 else if ((inst & 0xff00) == 0xfa00)
2624 else if (inst == 0x673d)
2629 else if ((inst & 0xff00) == 0x0100)
2632 frame_addr = sp + offset;
2634 frame_adjust = offset;
2636 else if ((inst & 0xFF00) == 0xd900)
2642 else if ((inst & 0xFF00) == 0x7900)
2648 else if ((inst & 0xf81f) == 0xe809
2649 && (inst & 0x700) != 0x700)
2651 else if ((inst & 0xff80) == 0x6480)
2654 if (prev_extend_bytes)
2655 save_inst |= prev_inst << 16;
2657 else if ((inst & 0xff1c) == 0x6704)
2677 this_non_prologue_insn = 1;
2680 non_prologue_insns += this_non_prologue_insn;
2684 if (prev_delay_slot || non_prologue_insns > 1
2688 prev_non_prologue_insn = this_non_prologue_insn;
2689 prev_delay_slot = in_delay_slot;
2690 prev_pc = cur_pc - prev_extend_bytes;
2699 if (entry_inst != 0)
2701 int areg_count = (entry_inst >> 8) & 7;
2702 int sreg_count = (entry_inst >> 6) & 3;
2712 for (reg = 4, offset = 0; reg < areg_count + 4; reg++)
2720 if (entry_inst & 0x20)
2727 for (reg = 16; reg < sreg_count + 16; reg++)
2742 static int args_table[16] = {
2743 0, 0, 0, 0, 1, 1, 1, 1,
2744 2, 2, 2, 0, 3, 3, 4, -1,
2746 static int astatic_table[16] = {
2747 0, 1, 2, 3, 0, 1, 2, 3,
2748 0, 1, 2, 4, 0, 1, 0, -1,
2750 int aregs = (save_inst >> 16) & 0xf;
2751 int xsregs = (save_inst >> 24) & 0x7;
2752 int args = args_table[aregs];
2753 int astatic = astatic_table[aregs];
2758 warning (_(
"Invalid number of argument registers encoded in SAVE."));
2763 warning (_(
"Invalid number of static registers encoded in SAVE."));
2768 frame_size = ((save_inst >> 16) & 0xf0) | (save_inst & 0xf);
2769 if (frame_size == 0 && (save_inst >> 16) == 0)
2772 frame_offset += frame_size;
2788 if (save_inst & 0x40)
2802 for (reg = 18 + xsregs - 1; reg > 18 - 1; reg--)
2809 if (save_inst & 0x10)
2815 if (save_inst & 0x20)
2829 if (this_cache != NULL)
2834 + frame_offset - frame_adjust);
2847 end_prologue_addr = (prev_non_prologue_insn || prev_delay_slot
2848 ? prev_pc : cur_pc - prev_extend_bytes);
2850 return end_prologue_addr;
2863 if ((*this_cache) != NULL)
2866 (*this_cache) = cache;
2872 CORE_ADDR start_addr;
2875 if (start_addr == 0)
2879 if (start_addr == 0)
2900 if (info->base == 0)
2905static struct value *
2907 void **this_cache,
int regnum)
2927 "mips insn16 prologue",
2971 imm = (imm ^ 0x100) - 0x100;
2972 if (imm > -3 && imm < 2)
2982 CORE_ADDR start_pc, CORE_ADDR limit_pc,
2986 CORE_ADDR end_prologue_addr;
2987 int prev_non_prologue_insn = 0;
2989 int this_non_prologue_insn;
2990 int non_prologue_insns = 0;
2991 long frame_offset = 0;
2992 long frame_adjust = 0;
2993 int prev_delay_slot = 0;
3014 if (this_frame != NULL)
3021 if (limit_pc > start_pc + 200)
3022 limit_pc = start_pc + 200;
3028 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc +=
loc)
3030 this_non_prologue_insn = 0;
3061 else if (op != 0x150
3065 this_non_prologue_insn = 1;
3071 reglist = sreg =
b5s5_reg (insn >> 16);
3072 offset = (
b0s12_imm (insn) ^ 0x800) - 0x800;
3073 if ((op == 0x9 || op == 0xc)
3079 s = 4 << ((
b12s4_op (insn) & 0x4) == 0x4);
3083 sreg + 1, sp + offset + s);
3085 else if ((op == 0xd || op == 0xf)
3090 && ((reglist >= 1 && reglist <= 9)
3091 || (reglist >= 16 && reglist <= 25)))
3093 int sreglist = std::min(reglist & 0xf, 8);
3095 s = 4 << ((
b12s4_op (insn) & 0x2) == 0x2);
3096 for (i = 0; i < sreglist; i++)
3098 if ((reglist & 0xf) > 8)
3100 if ((reglist & 0x10) == 0x10)
3105 this_non_prologue_insn = 1;
3114 offset = (
b0s16_imm (insn) ^ 0x8000) - 0x8000;
3121 frame_adjust = offset;
3124 else if (sreg != 28 || dreg != 28)
3126 this_non_prologue_insn = 1;
3132 if (
b5s5_op (insn >> 16) == 0xd
3136 v1_off = ((
b0s16_imm (insn) << 16) ^ 0x80000000) - 0x80000000;
3137 else if (
b5s5_op (insn >> 16) != 0xd
3141 this_non_prologue_insn = 1;
3148 if (sreg == 3 && dreg == 3)
3152 this_non_prologue_insn = 1;
3160 this_non_prologue_insn = 1;
3167 offset = (
b0s16_imm (insn) ^ 0x8000) - 0x8000;
3172 this_non_prologue_insn = 1;
3181 this_non_prologue_insn = 1;
3197 else if ((sreg & 0x1c) != 0x4)
3199 this_non_prologue_insn = 1;
3206 offset = ((
b0s4_imm (insn) << 2) ^ 0x20) - 0x20;
3208 for (i = 0; i <= reglist; i++)
3214 this_non_prologue_insn = 1;
3218 if ((insn & 0x1) == 0x1)
3224 sp_adj = (
b1s4_imm (insn) ^ 8) - 8;
3226 this_non_prologue_insn = 1;
3241 this_non_prologue_insn = 1;
3247 frame_offset -= sp_adj;
3249 non_prologue_insns += this_non_prologue_insn;
3254 if (prev_delay_slot || non_prologue_insns > 1 || sp_adj > 0
3258 prev_non_prologue_insn = this_non_prologue_insn;
3259 prev_delay_slot = in_delay_slot;
3263 if (this_cache != NULL)
3268 + frame_offset - frame_adjust);
3282 = prev_non_prologue_insn || prev_delay_slot ? prev_pc : cur_pc;
3284 return end_prologue_addr;
3297 if ((*this_cache) != NULL)
3301 (*this_cache) = cache;
3307 CORE_ADDR start_addr;
3310 if (start_addr == 0)
3314 if (start_addr == 0)
3335 if (info->base == 0)
3340static struct value *
3342 void **this_cache,
int regnum)
3363 "mips micro prologue",
3407 if (this_cache == NULL || this_cache->
saved_regs == NULL)
3416 for (i = 0; i < num_regs; i++)
3427 CORE_ADDR start_pc, CORE_ADDR limit_pc,
3431 int prev_non_prologue_insn;
3432 int this_non_prologue_insn;
3433 int non_prologue_insns;
3434 CORE_ADDR frame_addr = 0;
3436 int prev_delay_slot;
3443 CORE_ADDR end_prologue_addr;
3444 int seen_sp_adjust = 0;
3445 int load_immediate_bytes = 0;
3451 if (this_frame != NULL)
3458 if (limit_pc > start_pc + 200)
3459 limit_pc = start_pc + 200;
3462 prev_non_prologue_insn = 0;
3463 non_prologue_insns = 0;
3464 prev_delay_slot = 0;
3473 unsigned long inst, high_word;
3477 this_non_prologue_insn = 0;
3485 high_word = (inst >> 16) & 0xffff;
3486 offset = ((inst & 0xffff) ^ 0x8000) - 0x8000;
3487 reg = high_word & 0x1f;
3489 if (high_word == 0x27bd
3490 || high_word == 0x23bd
3491 || high_word == 0x67bd)
3494 frame_offset -= offset;
3502 else if (((high_word & 0xFFE0) == 0xafa0)
3503 && !regsize_is_64_bits)
3507 else if (((high_word & 0xFFE0) == 0xffa0)
3508 && regsize_is_64_bits)
3513 else if (high_word == 0x27be)
3516 if (offset != frame_offset)
3517 frame_addr = sp + offset;
3520 unsigned alloca_adjust;
3527 alloca_adjust = (unsigned) (frame_addr - (sp + offset));
3528 if (alloca_adjust > 0)
3533 sp += alloca_adjust;
3546 else if (inst == 0x03A0F021 || inst == 0x03a0f025 || inst == 0x03a0f02d)
3551 unsigned alloca_adjust;
3557 alloca_adjust = (unsigned) (frame_addr - sp);
3558 if (alloca_adjust > 0)
3573 else if ((high_word & 0xFFE0) == 0xafc0
3574 && !regsize_is_64_bits)
3578 else if ((high_word & 0xFFE0) == 0xE7A0
3579 || (high_word & 0xF3E0) == 0xA3C0
3580 || (inst & 0xFF9F07FF) == 0x00800021
3581 || high_word == 0x3c1c
3582 || high_word == 0x279c
3583 || high_word == 0x679c
3584 || inst == 0x0399e021
3585 || inst == 0x033ce021
3586 || inst == 0x0399e02d
3587 || inst == 0x033ce02d
3598 else if (!seen_sp_adjust
3600 && (high_word == 0x3c01
3601 || high_word == 0x3c08
3602 || high_word == 0x3421
3603 || high_word == 0x3508
3604 || high_word == 0x3401
3605 || high_word == 0x3408
3621 this_non_prologue_insn = 1;
3624 non_prologue_insns += this_non_prologue_insn;
3628 if (prev_delay_slot || non_prologue_insns > 1)
3631 prev_non_prologue_insn = this_non_prologue_insn;
3632 prev_delay_slot = in_delay_slot;
3636 if (this_cache != NULL)
3656 = prev_non_prologue_insn || prev_delay_slot ? prev_pc : cur_pc;
3661 if (load_immediate_bytes && !seen_sp_adjust)
3662 end_prologue_addr -= load_immediate_bytes;
3664 return end_prologue_addr;
3678 if ((*this_cache) != NULL)
3682 (*this_cache) = cache;
3688 CORE_ADDR start_addr;
3691 if (start_addr == 0)
3695 if (start_addr == 0)
3716 if (info->base == 0)
3721static struct value *
3723 void **this_cache,
int regnum)
3742 "mips insn32 prologue",
3782 CORE_ADDR start_addr;
3783 CORE_ADDR stack_addr;
3788 if ((*this_cache) != NULL)
3791 (*this_cache) = this_trad_cache;
3810 return this_trad_cache;
3822static struct value *
3824 void **this_cache,
int regnum)
3917 return addr &= 0xffffffffUL;
3930#define LL_OPCODE 0x30
3931#define LLD_OPCODE 0x34
3932#define SC_OPCODE 0x38
3933#define SCD_OPCODE 0x3c
3935static std::vector<CORE_ADDR>
3938 CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
3940 CORE_ADDR branch_bp;
3944 int last_breakpoint = 0;
3945 const int atomic_sequence_length = 16;
3954 for (insn_count = 0; insn_count < atomic_sequence_length; ++insn_count)
4001 if (last_breakpoint >= 1)
4004 breaks[1] = branch_bp;
4023 if (last_breakpoint && pc <= breaks[1] && breaks[1] <= breaks[0])
4024 last_breakpoint = 0;
4026 std::vector<CORE_ADDR> next_pcs;
4029 for (index = 0; index <= last_breakpoint; index++)
4030 next_pcs.push_back (breaks[index]);
4035static std::vector<CORE_ADDR>
4039 const int atomic_sequence_length = 16;
4040 int last_breakpoint = 0;
4041 CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
4042 CORE_ADDR branch_bp = 0;
4057 if ((
b12s4_op (insn) & 0xb) != 0x3)
4064 for (insn_count = 0;
4065 !sc_found && insn_count < atomic_sequence_length;
4083 if ((
b5s5_op (insn) & 0x18) != 0x0
4086 && (
b5s5_op (insn) & 0x1d) != 0x11
4088 && ((
b5s5_op (insn) & 0x1e) != 0x14
4089 || (insn & 0x3) != 0x0)
4091 && (
b5s5_op (insn) & 0x1e) != 0x1a
4093 && ((
b5s5_op (insn) & 0x1e) != 0x1c
4094 || (insn & 0x3) != 0x0)
4096 && ((
b5s5_op (insn) & 0x1c) != 0x1c
4097 || (insn & 0x3) != 0x1))
4131 if ((
b12s4_op (insn) & 0xb) == 0xb)
4150 if ((
b5s5_op (insn) & 0x1c) != 0xc
4164 if (last_breakpoint >= 1)
4167 breaks[1] = branch_bp;
4179 if (last_breakpoint && pc <= breaks[1] && breaks[1] <= breaks[0])
4180 last_breakpoint = 0;
4182 std::vector<CORE_ADDR> next_pcs;
4185 for (index = 0; index <= last_breakpoint; index++)
4186 next_pcs.push_back (breaks[index]);
4191static std::vector<CORE_ADDR>
4207std::vector<CORE_ADDR>
4211 CORE_ADDR pc, next_pc;
4216 if (!next_pcs.empty ())
4239 return (insn & ~hint) == 0x3e00008;
4270 for (start_pc -= instlen;; start_pc -= instlen)
4271 if (start_pc < fence)
4279 static int blurb_printed = 0;
4281 warning (_(
"GDB can't find the start of the function at %s."),
4293 GDB is unable to find the start of the function at %s\n\
4294and thus can't determine the size of that function's stack frame.\n\
4295This means that GDB may be unable to access that stack frame, or\n\
4296the frames below it.\n\
4297 This problem is most likely caused by an invalid program counter or\n\
4299 However, if you think GDB should simply search farther back\n\
4300from %s for code which looks like the beginning of a\n\
4301function, you can increase the range of the search using the `set\n\
4302heuristic-fence-post' command.\n",
4312 unsigned short inst;
4323 if ((inst & 0xff80) == 0x6480)
4325 if (start_pc - instlen >= fence)
4328 start_pc - instlen, NULL);
4329 if ((inst & 0xf800) == 0xf000)
4330 start_pc -= instlen;
4334 else if (((inst & 0xf81f) == 0xe809
4335 && (inst & 0x700) != 0x700)
4336 || (inst & 0xff80) == 0x6380
4337 || (inst & 0xff80) == 0xfb80
4338 || ((inst & 0xf810) == 0xf010 && seen_adjsp))
4340 else if ((inst & 0xff00) == 0x6300
4341 || (inst & 0xff00) == 0xfb00)
4369 offset = (
b0s16_imm (insn) ^ 0x8000) - 0x8000;
4385 if ((insn & 0x1) == 0x1)
4397 offset = (
b1s4_imm (insn) ^ 8) - 8;
4431 struct type *arg_type)
4433 return ((typecode == TYPE_CODE_FLT
4435 && (typecode == TYPE_CODE_STRUCT
4436 || typecode == TYPE_CODE_UNION)
4451 if (typecode == TYPE_CODE_FLT &&
type->
length () == 8)
4453 else if (typecode == TYPE_CODE_STRUCT)
4459 else if (typecode == TYPE_CODE_UNION)
4464 for (i = 0; i < n; i++)
4477 return align_down (addr, 16);
4484 CORE_ADDR funaddr,
struct value **args,
4486 CORE_ADDR *real_pc, CORE_ADDR *bp_addr,
4489 static gdb_byte nop_insn[] = { 0, 0, 0, 0 };
4494 bp_slot = sp -
sizeof (nop_insn);
4509 nop_addr = bp_slot -
sizeof (nop_insn);
4522 int nargs,
struct value **args, CORE_ADDR sp,
4524 CORE_ADDR struct_addr)
4530 int stack_offset = 0;
4549 sp = align_down (sp, 16);
4550 struct_addr = align_down (struct_addr, 16);
4555 for (argnum = 0; argnum < nargs; argnum++)
4556 arg_space += align_up (
value_type (args[argnum])->length (),
4558 sp -= align_up (arg_space, 16);
4562 "mips_eabi_push_dummy_call: sp=%s allocated %ld\n",
4564 (
long) align_up (arg_space, 16));
4575 "mips_eabi_push_dummy_call: "
4576 "struct_return reg=%d %s\n",
4584 for (argnum = 0; argnum < nargs; argnum++)
4586 const gdb_byte *val;
4590 struct value *arg = args[argnum];
4592 int len = arg_type->
length ();
4597 "mips_eabi_push_dummy_call: %d len=%d type=%d",
4598 argnum + 1, len, (
int) typecode);
4602 if (len > abi_regsize
4603 && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION))
4605 gdb_assert (abi_regsize <= ARRAY_SIZE (ref_valbuf));
4608 typecode = TYPE_CODE_PTR;
4624 if ((float_argreg & 1))
4651 == BFD_ENDIAN_BIG ? 4 : 0;
4659 float_argreg, phex (regval, 4));
4667 float_argreg, phex (regval, 4));
4679 float_argreg, phex (regval, len));
4693 int odd_sized_struct = (len > abi_regsize && len % abi_regsize != 0);
4700 int stack_used_p = 0;
4701 int partial_len = (len < abi_regsize ? len : abi_regsize);
4714 int longword_offset = 0;
4719 if (abi_regsize == 8
4720 && (typecode == TYPE_CODE_INT
4721 || typecode == TYPE_CODE_PTR
4722 || typecode == TYPE_CODE_FLT) && len <= 4)
4723 longword_offset = abi_regsize - len;
4724 else if ((typecode == TYPE_CODE_STRUCT
4725 || typecode == TYPE_CODE_UNION)
4726 && arg_type->
length () < abi_regsize)
4727 longword_offset = abi_regsize - len;
4738 addr = sp + stack_offset + longword_offset;
4745 for (i = 0; i < partial_len; i++)
4768 phex (regval, abi_regsize));
4783 stack_offset += align_up (partial_len, abi_regsize);
4801 gdb_byte *readbuf,
const gdb_byte *writebuf)
4804 int fp_return_type = 0;
4805 int offset,
regnum, xfer;
4813 if (
type->
code () == TYPE_CODE_FLT)
4817 if ((
type->
code () == TYPE_CODE_STRUCT
4818 ||
type->
code () == TYPE_CODE_UNION)
4872 if (arg_type->
code () != TYPE_CODE_STRUCT)
4881 for (i = 0; i < arg_type->
num_fields (); i++)
4884 struct type *field_type;
4900 if (pos + field_type->
length () <= offset)
4904 if (field_type->
code () == TYPE_CODE_FLT
4919 int nargs,
struct value **args, CORE_ADDR sp,
4921 CORE_ADDR struct_addr)
4927 int stack_offset = 0;
4945 sp = align_down (sp, 16);
4946 struct_addr = align_down (struct_addr, 16);
4949 for (argnum = 0; argnum < nargs; argnum++)
4952 sp -= align_up (arg_space, 16);
4956 "mips_n32n64_push_dummy_call: sp=%s allocated %ld\n",
4958 (
long) align_up (arg_space, 16));
4969 "mips_n32n64_push_dummy_call: "
4970 "struct_return reg=%d %s\n",
4978 for (argnum = 0; argnum < nargs; argnum++)
4980 const gdb_byte *val;
4981 struct value *arg = args[argnum];
4983 int len = arg_type->
length ();
4988 "mips_n32n64_push_dummy_call: %d len=%d type=%d",
4989 argnum + 1, len, (
int) typecode);
4997 && (float_argreg & 1))
5012 float_argreg, phex (regval, reglen));
5017 argreg, phex (regval, reglen));
5024 reglen, byte_order);
5027 float_argreg, phex (regval, reglen));
5032 argreg, phex (regval, reglen));
5056 int stack_used_p = 0;
5071 int longword_offset = 0;
5076 if ((typecode == TYPE_CODE_INT
5077 || typecode == TYPE_CODE_PTR)
5090 addr = sp + stack_offset + longword_offset;
5097 for (i = 0; i < partial_len; i++)
5118 if ((partial_len == 4
5119 && (typecode == TYPE_CODE_PTR
5120 || typecode == TYPE_CODE_INT))
5122 && typecode == TYPE_CODE_INT
5141 && (typecode == TYPE_CODE_STRUCT
5142 || typecode == TYPE_CODE_UNION))
5153 arg_type->
length () - len))
5193 gdb_byte *readbuf,
const gdb_byte *writebuf)
5232 else if ((
type->
code () == TYPE_CODE_COMPLEX
5247 readbuf, writebuf, 0);
5252 readbuf ? readbuf +
type->
length () / 2 : readbuf,
5254 ? writebuf +
type->
length () / 2 : writebuf), 0);
5257 else if (
type->
code () == TYPE_CODE_FLT
5268 readbuf, writebuf, 0);
5271 else if (
type->
code () == TYPE_CODE_STRUCT
5281 == TYPE_CODE_FLT))))
5305 readbuf, writebuf, offset);
5310 readbuf, writebuf, offset + 8);
5317 readbuf, writebuf, offset);
5321 else if (
type->
code () == TYPE_CODE_STRUCT
5322 ||
type->
code () == TYPE_CODE_UNION
5323 ||
type->
code () == TYPE_CODE_ARRAY)
5342 xfer, BFD_ENDIAN_UNKNOWN, readbuf, writebuf,
5366 readbuf, writebuf, offset);
5391 int nargs,
struct value **args, CORE_ADDR sp,
5393 CORE_ADDR struct_addr)
5399 int stack_offset = 0;
5417 sp = align_down (sp, 16);
5418 struct_addr = align_down (struct_addr, 16);
5421 for (argnum = 0; argnum < nargs; argnum++)
5431 sp -= align_up (arg_space, 16);
5435 "mips_o32_push_dummy_call: sp=%s allocated %ld\n",
5437 (
long) align_up (arg_space, 16));
5448 "mips_o32_push_dummy_call: "
5449 "struct_return reg=%d %s\n",
5458 for (argnum = 0; argnum < nargs; argnum++)
5460 const gdb_byte *val;
5461 struct value *arg = args[argnum];
5463 int len = arg_type->
length ();
5468 "mips_o32_push_dummy_call: %d len=%d type=%d",
5469 argnum + 1, len, (
int) typecode);
5480 if ((float_argreg & 1))
5501 == BFD_ENDIAN_BIG ? 1 : 0;
5502 unsigned long regval;
5508 float_argreg + freg_offset,
5511 float_argreg++ + freg_offset,
5515 argreg, phex (regval, 4));
5522 float_argreg - freg_offset,
5525 float_argreg++ - freg_offset,
5529 argreg, phex (regval, 4));
5541 float_argreg, phex (regval, len));
5543 float_argreg++, regval);
5549 argreg, phex (regval, len));
5587 || odd_sized_struct)
5591 int longword_offset = 0;
5602 addr = sp + stack_offset + longword_offset;
5609 for (i = 0; i < partial_len; i++)
5656 && (typecode == TYPE_CODE_STRUCT
5657 || typecode == TYPE_CODE_UNION))
5700 gdb_byte *readbuf,
const gdb_byte *writebuf)
5708 if (
type->
code () == TYPE_CODE_STRUCT
5709 ||
type->
code () == TYPE_CODE_UNION
5710 ||
type->
code () == TYPE_CODE_ARRAY)
5712 else if (
type->
code () == TYPE_CODE_FLT
5720 gdb_assert (function || !readbuf);
5740 readbuf, writebuf, 0);
5746 readbuf, writebuf, 0);
5749 else if (
type->
code () == TYPE_CODE_FLT
5758 gdb_assert (function || !readbuf);
5770 "Return float in $fp1/$fp0 and $2/$3\n");
5779 case BFD_ENDIAN_LITTLE:
5784 readbuf, writebuf, 0);
5789 readbuf, writebuf, 4);
5791 case BFD_ENDIAN_BIG:
5796 readbuf, writebuf, 0);
5801 readbuf, writebuf, 4);
5804 internal_error (_(
"bad switch"));
5814 readbuf, writebuf, 0);
5818 readbuf, writebuf, 4);
5823 else if (
type->
code () == TYPE_CODE_STRUCT
5852 readbuf, writebuf, offset);
5858 else if (
type->
code () == TYPE_CODE_STRUCT
5859 ||
type->
code () == TYPE_CODE_UNION)
5878 BFD_ENDIAN_UNKNOWN, readbuf, writebuf, offset);
5903 readbuf, writebuf, offset);
5916 struct value **args, CORE_ADDR sp,
5923 int stack_offset = 0;
5941 sp = align_down (sp, 16);
5942 struct_addr = align_down (struct_addr, 16);
5945 for (argnum = 0; argnum < nargs; argnum++)
5952 sp -= align_up (arg_space, 16);
5956 "mips_o64_push_dummy_call: sp=%s allocated %ld\n",
5958 (
long) align_up (arg_space, 16));
5969 "mips_o64_push_dummy_call: "
5970 "struct_return reg=%d %s\n",
5979 for (argnum = 0; argnum < nargs; argnum++)
5981 const gdb_byte *val;
5982 struct value *arg = args[argnum];
5984 int len = arg_type->
length ();
5989 "mips_o64_push_dummy_call: %d len=%d type=%d",
5990 argnum + 1, len, (
int) typecode);
6010 float_argreg, phex (regval, len));
6014 argreg, phex (regval, len));
6041 || odd_sized_struct)
6045 int longword_offset = 0;
6049 if ((typecode == TYPE_CODE_INT
6050 || typecode == TYPE_CODE_PTR
6051 || typecode == TYPE_CODE_FLT)
6064 addr = sp + stack_offset + longword_offset;
6071 for (i = 0; i < partial_len; i++)
6102 && (typecode == TYPE_CODE_STRUCT
6103 || typecode == TYPE_CODE_UNION))
6146 gdb_byte *readbuf,
const gdb_byte *writebuf)
6153 if (
type->
code () == TYPE_CODE_STRUCT
6154 ||
type->
code () == TYPE_CODE_UNION
6155 ||
type->
code () == TYPE_CODE_ARRAY)
6164 gdb_assert (function || !readbuf);
6184 readbuf, writebuf, 0);
6190 readbuf, writebuf, 0);
6212 readbuf, writebuf, offset);
6253 gdb_byte *rare_buffer)
6257 gdb_byte *raw_buffer = (gdb_byte *) alloca (raw_size);
6260 error (_(
"can't read register %d (%s)"),
6273 memcpy (rare_buffer, raw_buffer + offset, 4);
6277 memcpy (rare_buffer, raw_buffer, 4);
6287 gdb_byte *rare_buffer)
6297 error (_(
"can't read register %d (%s)"),
6305 internal_error (_(
"mips_read_fp_register_double: bad access to "
6306 "odd-numbered FP register"));
6328 gdb_byte *raw_buffer;
6329 std::string flt_str, dbl_str;
6357 gdb_printf (file,
" flt: %s", flt_str.c_str ());
6364 gdb_printf (file,
" dbl: %s", dbl_str.c_str ());
6383 gdb_printf (file,
" flt: %s", flt_str.c_str ());
6384 gdb_printf (file,
" dbl: %s", dbl_str.c_str ());
6424 if (
flags & (1 << 0))
6426 if (
flags & (1 << 1))
6428 if (
flags & (1 << 2))
6430 if (
flags & (1 << 3))
6432 if (
flags & (1 << 4))
6434 if (
flags & (1 << 5))
6466 if (fcs & (1 << 23))
6468 for (i = 1; i <= 7; i++)
6469 if (fcs & (1 << (24 + i)))
6475 fputs (
"mask :", stdout);
6477 fputs (
"flags :", stdout);
6483 case 0:
gdb_puts (
"nearest\n", file);
break;
6484 case 1:
gdb_puts (
"zero\n", file);
break;
6485 case 2:
gdb_puts (
"+inf\n", file);
break;
6486 case 3:
gdb_puts (
"-inf\n", file);
break;
6490 if (fcs & (1 << 21))
6492 if (fcs & (1 << 22))
6494 if (fcs & (1 << 24))
6496 if ((fcs & (0xb << 21)) == 0)
6500 gdb_printf (file,
"nan2008 : %s\n", fcs & (1 << 18) ?
"yes" :
"no");
6501 gdb_printf (file,
"abs2008 : %s\n", fcs & (1 << 19) ?
"yes" :
"no");
6529 const gdb_byte *raw_buffer;
6537 for (col = 0,
regnum = start_regnum;
6575 for (col = 0,
regnum = start_regnum;
6594 :
"<unavailable>"));
6633 error (_(
"Not a valid register for the current processor type"));
6697 CORE_ADDR func_addr;
6704 CORE_ADDR post_prologue_pc
6706 if (post_prologue_pc != 0)
6707 return std::max (pc, post_prologue_pc);
6718 limit_pc = pc + 100;
6734 CORE_ADDR func_addr = 0, func_end = 0;
6739 CORE_ADDR addr = func_end - 12;
6741 if (addr < func_addr + 4)
6742 addr = func_addr + 4;
6748 unsigned long high_word;
6752 high_word = (inst >> 16) & 0xffff;
6754 if (high_word != 0x27bd
6755 && high_word != 0x67bd
6756 && inst != 0x03e00008
6757 && inst != 0x00000000)
6773 CORE_ADDR func_addr = 0;
6774 CORE_ADDR func_end = 0;
6786 addr = func_end - 12;
6788 if (addr < func_addr + 2)
6789 addr = func_addr + 2;
6793 for (; pc < func_end; pc +=
loc)
6831 if (sreg == 0 && dreg == 0)
6848 if ((insn & 0x1) == 0x1
6869 CORE_ADDR func_addr = 0, func_end = 0;
6874 CORE_ADDR addr = func_end - 12;
6876 if (addr < func_addr + 4)
6877 addr = func_addr + 4;
6883 unsigned short inst;
6887 if ((inst & 0xf800) == 0xf000)
6930 (
"The MIPS floating-point coprocessor is unknown "
6931 "because the current architecture is not MIPS.\n");
6938 fpu =
"single-precision";
6941 fpu =
"double-precision";
6944 fpu =
"absent (none)";
6947 internal_error (_(
"bad switch"));
6950 gdb_printf (
"The MIPS floating-point coprocessor "
6951 "is set automatically (currently %s)\n",
6955 (
"The MIPS floating-point coprocessor is assumed to be %s\n", fpu);
6969 internal_error (_(
"set mipsfpu failed"));
6982 internal_error (_(
"set mipsfpu failed"));
6995 internal_error (_(
"set mipsfpu failed"));
7026 info->mach = bfd_mach_mips16;
7028 info->mach = bfd_mach_mips_micromips;
7031 memaddr &= (
info->mach == bfd_mach_mips16
7032 ||
info->mach == bfd_mach_mips_micromips) ? ~1 : ~3;
7042 CORE_ADDR pc = *pcptr;
7067static const gdb_byte *
7076 static gdb_byte mips16_big_breakpoint[] = { 0xe8, 0xa5 };
7077 static gdb_byte mips16_little_breakpoint[] = { 0xa5, 0xe8 };
7080 if (byte_order_for_code == BFD_ENDIAN_BIG)
7081 return mips16_big_breakpoint;
7083 return mips16_little_breakpoint;
7087 static gdb_byte micromips16_big_breakpoint[] = { 0x46, 0x85 };
7088 static gdb_byte micromips16_little_breakpoint[] = { 0x85, 0x46 };
7092 if (byte_order_for_code == BFD_ENDIAN_BIG)
7093 return micromips16_big_breakpoint;
7095 return micromips16_little_breakpoint;
7099 static gdb_byte micromips32_big_breakpoint[] = { 0, 0x5, 0, 0x7 };
7100 static gdb_byte micromips32_little_breakpoint[] = { 0x5, 0, 0x7, 0 };
7103 if (byte_order_for_code == BFD_ENDIAN_BIG)
7104 return micromips32_big_breakpoint;
7106 return micromips32_little_breakpoint;
7114 if (byte_order_for_code == BFD_ENDIAN_BIG)
7120 gdb_assert_not_reached (
"unexpected mips breakpoint kind");
7136 if ((inst & 0xe0000000) != 0)
7146 || (rs == 9 && (rt & 0x2) == 0)
7148 || (rs == 10 && (rt & 0x2) == 0))));
7162 return ((rt & 0xc) == 0
7165 || ((rt & 0x1e) == 0x1c && rs == 0));
7199 ULONGEST major = insn >> 16;
7212 || (
b5s5_op (major) & 0x1e) == 0xe)));
7223 return ((
b5s5_op (major) & 0x1c) == 0x0
7225 || (
b5s5_op (major) & 0x1d) == 0x4
7227 || (
b5s5_op (major) & 0x1d) == 0x11
7229 || ((
b5s5_op (major) & 0x1e) == 0x14
7230 && (major & 0x3) == 0x0)
7232 || (
b5s5_op (major) & 0x1e) == 0x1a
7234 || ((
b5s5_op (major) & 0x1e) == 0x1c
7235 && (major & 0x3) == 0x0)
7237 || ((
b5s5_op (major) & 0x1c) == 0x1c
7238 && (major & 0x3) == 0x1));
7241 return (
b0s6_op (insn) == 0x3c
7257 CORE_ADDR addr,
int mustbe32)
7286 if ((inst & 0xf89f) == 0xe800)
7288 return (inst & 0xf800) == 0x1800;
7297 CORE_ADDR addr,
int mustbe32)
7299 unsigned short insn;
7315 CORE_ADDR mask = CORE_ADDR_MAX;
7318 if (
sizeof (CORE_ADDR) == 8)
7322 switch (bpaddr >> ((
sizeof (CORE_ADDR) << 3) - 2) & 3)
7325 if (bpaddr == (bfd_signed_vma) (int32_t) bpaddr)
7337 else if (bpaddr & 0x80000000)
7342 return bpaddr & mask;
7351 CORE_ADDR prev_addr;
7353 CORE_ADDR func_addr;
7389 && func_addr > boundary && func_addr <= bpaddr)
7390 boundary = func_addr;
7394 if (bpaddr == boundary)
7399 prev_addr = bpaddr - 4;
7405 int (*insn_at_pc_has_delay_slot) (
struct gdbarch *, CORE_ADDR, int);
7406 CORE_ADDR addr, jmpaddr;
7425 for (i = 1; i < 4; i++)
7430 if (i == 1 && insn_at_pc_has_delay_slot (
gdbarch, addr, 0))
7435 else if (i > 1 && insn_at_pc_has_delay_slot (
gdbarch, addr, 1))
7488 return zero && suffix[1] ==
'\0';
7490 return suffix[1] ==
'\0' || (suffix[1] ==
'0' && suffix[2] ==
'\0');
7495 return suffix[1] ==
'\0';
7507 return ((mode[0] ==
's' || mode[0] ==
'd')
7508 && (mode[1] ==
'f' || mode[1] ==
'c'));
7569 CORE_ADDR start_pc = pc;
7570 CORE_ADDR target_pc = 0;
7577 status == 0 && target_pc == 0 && i < 20;
7596 else if (rs == addrreg)
7615 target_pc += ((pc + 4) & ~(CORE_ADDR) 0x0fffffff);
7626 else if (rt == addrreg)
7651 memset (buf, 0,
sizeof (buf));
7690 CORE_ADDR start_addr;
7703 &&
name[prefixlen + 2] ==
'\0')
7723 &&
name[prefixlen + 2] ==
'_'
7726 if (pc == start_addr)
7746 if (pc == start_addr)
7767 CORE_ADDR start_addr;
7778 if (pc != start_addr
7781 &&
name[prefixlen + 2] ==
'_'
7788 if (pc != start_addr
7804 &&
name[prefixlen + 2] ==
'\0')
7821 gdb_byte stub_code[16];
7822 int32_t stub_words[4];
7843 for (i = 0; i < 4; i++)
7855 if ((stub_words[0] & 0xffff0000U) == 0x3c190000
7856 && (stub_words[1] & 0xfc000000U) == 0x08000000
7857 && (stub_words[2] & 0xffff0000U) == 0x27390000
7858 && stub_words[3] == 0x00000000)
7859 return ((((stub_words[0] & 0x0000ffff) << 16)
7860 + (stub_words[2] & 0x0000ffff)) ^ 0x8000) - 0x8000;
7870 CORE_ADDR requested_pc = pc;
7871 CORE_ADDR target_pc;
7890 while (pc != target_pc);
7892 return pc != requested_pc ? pc : 0;
7902 if (num >= 0 && num < 32)
7904 else if (num >= 38 && num < 70)
7925 if (num >= 0 && num < 32)
7927 else if (num >= 32 && num < 64)
7961 struct type *
type,
const gdb_byte *buf)
7974 CORE_ADDR pc,
int *reg, LONGEST *offset)
7984 const char *
name = bfd_section_name (sect);
7989 if (!startswith (
name,
".mdebug."))
7992 if (strcmp (
name,
".mdebug.abi32") == 0)
7994 else if (strcmp (
name,
".mdebug.abiN32") == 0)
7996 else if (strcmp (
name,
".mdebug.abi64") == 0)
7998 else if (strcmp (
name,
".mdebug.abiO64") == 0)
8000 else if (strcmp (
name,
".mdebug.eabi32") == 0)
8002 else if (strcmp (
name,
".mdebug.eabi64") == 0)
8005 warning (_(
"unsupported ABI %s."),
name + 8);
8011 int *lbp = (
int *) obj;
8012 const char *
name = bfd_section_name (sect);
8014 if (startswith (
name,
".gcc_compiled_long32"))
8016 else if (startswith (
name,
".gcc_compiled_long64"))
8018 else if (startswith (
name,
".gcc_compiled_long"))
8019 warning (_(
"unrecognized .gcc_compiled_longXX"));
8031 internal_error (_(
"unknown ABI string"));
8048 internal_error (_(
"unknown compressed ISA string"));
8068static struct value *
8071 const int *reg_p = (
const int *) baton;
8084 int elf_fpu_type = Val_GNU_MIPS_ABI_FP_ANY;
8085 const char *
const *reg_names;
8092 if (info.abfd && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
8093 elf_flags = elf_elfheader (info.abfd)->e_flags;
8097 = gdbarch_tdep<mips_gdbarch_tdep> (
arches->gdbarch);
8104 "mips_gdbarch_init: elf_flags = 0x%08x\n", elf_flags);
8107 switch ((elf_flags & EF_MIPS_ABI))
8109 case E_MIPS_ABI_O32:
8112 case E_MIPS_ABI_O64:
8115 case E_MIPS_ABI_EABI32:
8118 case E_MIPS_ABI_EABI64:
8122 if ((elf_flags & EF_MIPS_ABI2))
8138 = gdbarch_tdep<mips_gdbarch_tdep> (
arches->gdbarch);
8139 found_abi = tdep->found_abi;
8144 && info.bfd_arch_info != NULL
8145 && info.bfd_arch_info->arch == bfd_arch_mips)
8147 switch (info.bfd_arch_info->mach)
8149 case bfd_mach_mips3900:
8152 case bfd_mach_mips4100:
8153 case bfd_mach_mips5000:
8156 case bfd_mach_mips8000:
8157 case bfd_mach_mips10000:
8161 if (info.abfd != NULL
8162 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour
8163 && elf_elfheader (info.abfd)->e_ident[EI_CLASS] == ELFCLASS64)
8173 && info.abfd != NULL
8174 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour
8175 && elf_elfheader (info.abfd)->e_ident[EI_CLASS] == ELFCLASS64)
8203 && info.bfd_arch_info != NULL
8204 && info.bfd_arch_info->arch == bfd_arch_mips
8205 && info.bfd_arch_info->bits_per_word < 64)
8206 info.bfd_arch_info = bfd_lookup_arch (bfd_arch_mips, bfd_mach_mips4000);
8209 if ((elf_flags & EF_MIPS_ARCH_ASE_MICROMIPS) != 0
8210 && (elf_flags & EF_MIPS_ARCH_ASE_M16) == 0)
8212 else if ((elf_flags & EF_MIPS_ARCH_ASE_M16) != 0
8213 && (elf_flags & EF_MIPS_ARCH_ASE_MICROMIPS) == 0)
8222 "mips_gdbarch_init: "
8223 "mips64_transfers_32bit_regs_p = %d\n",
8229 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
8230 elf_fpu_type = bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
8231 Tag_GNU_MIPS_ABI_FP);
8236 else if (elf_fpu_type != Val_GNU_MIPS_ABI_FP_ANY)
8238 switch (elf_fpu_type)
8240 case Val_GNU_MIPS_ABI_FP_DOUBLE:
8243 case Val_GNU_MIPS_ABI_FP_SINGLE:
8246 case Val_GNU_MIPS_ABI_FP_SOFT:
8253 else if (info.bfd_arch_info != NULL
8254 && info.bfd_arch_info->arch == bfd_arch_mips)
8255 switch (info.bfd_arch_info->mach)
8257 case bfd_mach_mips3900:
8258 case bfd_mach_mips4100:
8259 case bfd_mach_mips4111:
8260 case bfd_mach_mips4120:
8263 case bfd_mach_mips4650:
8276 "mips_gdbarch_init: fpu_type = %d\n", fpu_type);
8282 if (info.target_desc
8319 if (info.bfd_arch_info != NULL
8320 && info.bfd_arch_info->mach == bfd_mach_mips3900)
8329 static const char *
const mips_gprs[] = {
8330 "r0",
"r1",
"r2",
"r3",
"r4",
"r5",
"r6",
"r7",
8331 "r8",
"r9",
"r10",
"r11",
"r12",
"r13",
"r14",
"r15",
8332 "r16",
"r17",
"r18",
"r19",
"r20",
"r21",
"r22",
"r23",
8333 "r24",
"r25",
"r26",
"r27",
"r28",
"r29",
"r30",
"r31"
8335 static const char *
const mips_fprs[] = {
8336 "f0",
"f1",
"f2",
"f3",
"f4",
"f5",
"f6",
"f7",
8337 "f8",
"f9",
"f10",
"f11",
"f12",
"f13",
"f14",
"f15",
8338 "f16",
"f17",
"f18",
"f19",
"f20",
"f21",
"f22",
"f23",
8339 "f24",
"f25",
"f26",
"f27",
"f28",
"f29",
"f30",
"f31",
8342 const struct tdesc_feature *feature;
8346 "org.gnu.gdb.mips.cpu");
8347 if (feature == NULL)
8369 "org.gnu.gdb.mips.cp0");
8370 if (feature == NULL)
8387 "org.gnu.gdb.mips.fpu");
8388 if (feature == NULL)
8392 for (i = 0; i < 32; i++)
8412 "org.gnu.gdb.mips.dsp");
8414 if (feature != NULL)
8419 dspacc + i++,
"hi1");
8421 dspacc + i++,
"lo1");
8423 dspacc + i++,
"hi2");
8425 dspacc + i++,
"lo2");
8427 dspacc + i++,
"hi3");
8429 dspacc + i++,
"lo3");
8455 = gdbarch_tdep<mips_gdbarch_tdep> (
arches->gdbarch);
8482 tdep->found_abi = found_abi;
8485 tdep->mips_fpu_type = fpu_type;
8489 if (info.target_desc)
8602 internal_error (_(
"unknown ABI in switch"));
8631 if (info.abfd != NULL)
8651 internal_error (_(
"unknown ABI in switch"));
8739 disassembler_options_mips ());
8848 const char *ignored_value)
8853 "The MIPS ABI is unknown because the current architecture "
8864 "The MIPS ABI is set automatically (currently \"%s\").\n",
8866 else if (global_abi == actual_abi)
8869 "The MIPS ABI is assumed to be \"%s\" (due to user setting).\n",
8875 "The (auto detected) MIPS ABI \"%s\" is in use "
8876 "even though the user setting was \"%s\".\n",
8888 gdb_printf (file, _(
"The compressed ISA encoding used is %s.\n"),
8917 int ef_mips_32bitmode;
8938 ef_mips_32bitmode = (tdep->
elf_flags & EF_MIPS_32BITMODE);
8940 "mips_dump_tdep: tdep->elf_flags = 0x%x\n",
8943 "mips_dump_tdep: ef_mips_32bitmode = %d\n",
8946 "mips_dump_tdep: ef_mips_arch = %d\n",
8949 "mips_dump_tdep: tdep->mips_abi = %d (%s)\n",
8953 "mips_mask_address_p() %d (default %d)\n",
8958 "mips_dump_tdep: MIPS_DEFAULT_FPU_TYPE = %d (%s)\n",
8961 gdb_printf (file,
"mips_dump_tdep: MIPS_EABI = %d\n",
8964 "mips_dump_tdep: MIPS_FPU_TYPE = %d (%s)\n",
8978 internal_error (_(
"mips_abi_strings out of sync"));
8992 _(
"Various MIPS specific commands."),
8993 _(
"Various MIPS specific commands."),
9000Set the MIPS ABI used by this program."), _(
"\
9001Show the MIPS ABI used by this program."), _(
"\
9002This option can be set to one of:\n\
9003 auto - the default ABI associated with the current binary\n\
9020Set the compressed ISA encoding used by MIPS code."), _(
"\
9021Show the compressed ISA encoding used by MIPS code."), _(
"\
9022Select the compressed ISA encoding used in functions that have no symbol\n\
9023information available. The encoding can be set to either of:\n\
9026and is updated automatically from ELF file flags if available."),
9035 _(
"Set use of MIPS floating-point coprocessor."),
9038 _(
"Select single-precision MIPS floating-point coprocessor."),
9042 _(
"Select double-precision MIPS floating-point coprocessor."),
9050 _(
"Select no MIPS floating-point coprocessor."), &mipsfpulist);
9055 _(
"Select MIPS floating-point coprocessor automatically."),
9058 _(
"Show current use of MIPS floating-point coprocessor target."),
9066Set the distance searched for the start of a function."), _(
"\
9067Show the distance searched for the start of a function."), _(
"\
9068If you are debugging a stripped executable, GDB needs to search through the\n\
9069program for the start of a function. This command sets the distance of the\n\
9070search. The only need to set it is when debugging a stripped executable."),
9080Set zeroing of upper 32 bits of 64-bit addresses."), _(
"\
9081Show zeroing of upper 32 bits of 64-bit addresses."), _(
"\
9082Use \"on\" to enable the masking, \"off\" to disable it and \"auto\" to\n\
9083allow GDB to determine the correct value."),
9091Set compatibility with 64-bit MIPS target that transfers 32-bit quantities."),
9093Show compatibility with 64-bit MIPS target that transfers 32-bit quantities."),
9095Use \"on\" to enable backward compatibility with older MIPS 64 GDB+target\n\
9096that would transfer 32 bits for some registers (e.g. SR, FSR) and\n\
909764 bits for others. Use \"off\" to disable compatibility mode"),
9107Set mips debugging."), _(
"\
9108Show mips debugging."), _(
"\
9109When non-zero, mips specific debugging is enabled."),
unsigned int gdbarch_debug
int default_print_insn(bfd_vma memaddr, disassemble_info *info)
int gdbarch_update_p(struct gdbarch_info info)
struct gdbarch * target_gdbarch(void)
static std::vector< const char * > arches
void gdbarch_register(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init, gdbarch_dump_tdep_ftype *dump_tdep)
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
void ax_reg_mask(struct agent_expr *ax, int reg)
void ax_simple(struct agent_expr *x, enum agent_op op)
void ax_const_l(struct agent_expr *x, LONGEST l)
void ax_reg(struct agent_expr *x, int reg)
bool find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr, const struct block **block)
enum breakpoint_here breakpoint_here_p(const address_space *aspace, CORE_ADDR pc)
enum register_status raw_read(int regnum, gdb_byte *buf)
enum register_status cooked_read_part(int regnum, int offset, int len, gdb_byte *buf)
enum register_status raw_read_part(int regnum, int offset, int len, gdb_byte *buf)
enum register_status cooked_read(int regnum, gdb_byte *buf)
void raw_write_part(int regnum, int offset, int len, const gdb_byte *buf)
void cooked_write_part(int regnum, int offset, int len, const gdb_byte *buf)
void raw_write(int regnum, const gdb_byte *buf)
struct cmd_list_element * showlist
struct cmd_list_element * setlist
struct cmd_list_element * showdebuglist
struct cmd_list_element * setdebuglist
struct cmd_list_element * add_alias_cmd(const char *name, cmd_list_element *target, enum command_class theclass, int abbrev_flag, struct cmd_list_element **list)
set_show_commands add_setshow_zinteger_cmd(const char *name, enum command_class theclass, int *var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
struct cmd_list_element * add_cmd(const char *name, enum command_class theclass, const char *doc, struct cmd_list_element **list)
set_show_commands add_setshow_enum_cmd(const char *name, enum command_class theclass, const char *const *enumlist, const char **var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
set_show_commands add_setshow_prefix_cmd(const char *name, command_class theclass, const char *set_doc, const char *show_doc, cmd_list_element **set_subcommands_list, cmd_list_element **show_subcommands_list, cmd_list_element **set_list, cmd_list_element **show_list)
set_show_commands add_setshow_boolean_cmd(const char *name, enum command_class theclass, bool *var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
set_show_commands add_setshow_auto_boolean_cmd(const char *name, enum command_class theclass, enum auto_boolean *var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
struct cmd_list_element * add_basic_prefix_cmd(const char *name, enum command_class theclass, const char *doc, struct cmd_list_element **subcommands, int allow_unknown, struct cmd_list_element **list)
set_show_commands add_setshow_zuinteger_cmd(const char *name, enum command_class theclass, unsigned int *var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
void memory_error(enum target_xfer_status err, CORE_ADDR memaddr)
static void store_signed_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, LONGEST val)
static void store_unsigned_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, ULONGEST val)
static LONGEST extract_signed_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
static ULONGEST extract_unsigned_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
@ RETURN_VALUE_REGISTER_CONVENTION
@ RETURN_VALUE_STRUCT_CONVENTION
void dwarf2_append_unwinders(struct gdbarch *gdbarch)
const struct frame_base * dwarf2_frame_base_sniffer(frame_info_ptr this_frame)
void address_to_signed_pointer(struct gdbarch *gdbarch, struct type *type, gdb_byte *buf, CORE_ADDR addr)
struct value * value_of_register(int regnum, frame_info_ptr frame)
CORE_ADDR signed_pointer_to_address(struct gdbarch *gdbarch, struct type *type, const gdb_byte *buf)
void frame_base_append_sniffer(struct gdbarch *gdbarch, frame_base_sniffer_ftype *sniffer)
enum unwind_stop_reason default_frame_unwind_stop_reason(frame_info_ptr this_frame, void **this_cache)
void frame_unwind_append_unwinder(struct gdbarch *gdbarch, const struct frame_unwind *unwinder)
int frame_relative_level(frame_info_ptr fi)
struct value * get_frame_register_value(frame_info_ptr frame, int regnum)
ULONGEST get_frame_register_unsigned(frame_info_ptr frame, int regnum)
LONGEST get_frame_register_signed(frame_info_ptr frame, int regnum)
CORE_ADDR get_frame_pc(frame_info_ptr frame)
bool read_frame_register_unsigned(frame_info_ptr frame, int regnum, ULONGEST *val)
void reinit_frame_cache(void)
const address_space * get_frame_address_space(frame_info_ptr frame)
LONGEST frame_unwind_register_signed(frame_info_ptr next_frame, int regnum)
void get_frame_register(frame_info_ptr frame, int regnum, gdb_byte *buf)
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
struct gdbarch * get_frame_arch(frame_info_ptr this_frame)
CORE_ADDR get_frame_func(frame_info_ptr this_frame)
void put_frame_register_bytes(frame_info_ptr frame, int regnum, CORE_ADDR offset, gdb::array_view< const gdb_byte > buffer)
bool get_frame_register_bytes(frame_info_ptr frame, int regnum, CORE_ADDR offset, gdb::array_view< gdb_byte > buffer, int *optimizedp, int *unavailablep)
bool deprecated_frame_register_read(frame_info_ptr frame, int regnum, gdb_byte *myaddr)
frame_info_ptr get_current_frame(void)
CORE_ADDR get_frame_address_in_block(frame_info_ptr this_frame)
void put_frame_register(frame_info_ptr frame, int regnum, const gdb_byte *buf)
#define FRAME_OBSTACK_ZALLOC(TYPE)
void set_gdbarch_long_long_bit(struct gdbarch *gdbarch, int long_long_bit)
void set_gdbarch_stab_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_stab_reg_to_regnum_ftype *stab_reg_to_regnum)
void set_gdbarch_address_to_pointer(struct gdbarch *gdbarch, gdbarch_address_to_pointer_ftype *address_to_pointer)
int gdbarch_pc_regnum(struct gdbarch *gdbarch)
void set_gdbarch_unwind_pc(struct gdbarch *gdbarch, gdbarch_unwind_pc_ftype *unwind_pc)
void set_gdbarch_register_to_value(struct gdbarch *gdbarch, gdbarch_register_to_value_ftype *register_to_value)
void set_gdbarch_disassembler_options(struct gdbarch *gdbarch, char **disassembler_options)
enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
void set_gdbarch_value_to_register(struct gdbarch *gdbarch, gdbarch_value_to_register_ftype *value_to_register)
void set_gdbarch_disassembler_options_implicit(struct gdbarch *gdbarch, const char *disassembler_options_implicit)
void set_gdbarch_ecoff_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_ecoff_reg_to_regnum_ftype *ecoff_reg_to_regnum)
void set_gdbarch_breakpoint_kind_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_kind_from_pc_ftype *breakpoint_kind_from_pc)
void set_gdbarch_register_sim_regno(struct gdbarch *gdbarch, gdbarch_register_sim_regno_ftype *register_sim_regno)
const char * gdbarch_register_name(struct gdbarch *gdbarch, int regnr)
void set_gdbarch_valid_disassembler_options(struct gdbarch *gdbarch, const disasm_options_and_args_t *valid_disassembler_options)
void set_gdbarch_frame_align(struct gdbarch *gdbarch, gdbarch_frame_align_ftype *frame_align)
void set_gdbarch_write_pc(struct gdbarch *gdbarch, gdbarch_write_pc_ftype *write_pc)
void set_gdbarch_integer_to_address(struct gdbarch *gdbarch, gdbarch_integer_to_address_ftype *integer_to_address)
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype *skip_prologue)
void set_gdbarch_addr_bits_remove(struct gdbarch *gdbarch, gdbarch_addr_bits_remove_ftype *addr_bits_remove)
void set_gdbarch_elf_make_msymbol_special(struct gdbarch *gdbarch, gdbarch_elf_make_msymbol_special_ftype *elf_make_msymbol_special)
void set_gdbarch_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype *register_name)
void set_gdbarch_push_dummy_code(struct gdbarch *gdbarch, gdbarch_push_dummy_code_ftype *push_dummy_code)
struct type * gdbarch_register_type(struct gdbarch *gdbarch, int reg_nr)
void set_gdbarch_int_bit(struct gdbarch *gdbarch, int int_bit)
void set_gdbarch_skip_trampoline_code(struct gdbarch *gdbarch, gdbarch_skip_trampoline_code_ftype *skip_trampoline_code)
void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype *return_value)
void set_gdbarch_single_step_through_delay(struct gdbarch *gdbarch, gdbarch_single_step_through_delay_ftype *single_step_through_delay)
void set_gdbarch_have_nonsteppable_watchpoint(struct gdbarch *gdbarch, int have_nonsteppable_watchpoint)
void set_gdbarch_print_registers_info(struct gdbarch *gdbarch, gdbarch_print_registers_info_ftype *print_registers_info)
int gdbarch_num_regs(struct gdbarch *gdbarch)
void set_gdbarch_make_symbol_special(struct gdbarch *gdbarch, gdbarch_make_symbol_special_ftype *make_symbol_special)
void set_gdbarch_fp0_regnum(struct gdbarch *gdbarch, int fp0_regnum)
void set_gdbarch_double_bit(struct gdbarch *gdbarch, int double_bit)
void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype *inner_than)
enum bfd_endian gdbarch_byte_order_for_code(struct gdbarch *gdbarch)
void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
void set_gdbarch_register_reggroup_p(struct gdbarch *gdbarch, gdbarch_register_reggroup_p_ftype *register_reggroup_p)
void set_gdbarch_ax_pseudo_register_collect(struct gdbarch *gdbarch, gdbarch_ax_pseudo_register_collect_ftype *ax_pseudo_register_collect)
void set_gdbarch_long_double_format(struct gdbarch *gdbarch, const struct floatformat **long_double_format)
void set_gdbarch_pc_regnum(struct gdbarch *gdbarch, int pc_regnum)
void set_gdbarch_adjust_breakpoint_address(struct gdbarch *gdbarch, gdbarch_adjust_breakpoint_address_ftype *adjust_breakpoint_address)
void set_gdbarch_call_dummy_location(struct gdbarch *gdbarch, enum call_dummy_location_type call_dummy_location)
void set_gdbarch_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype *register_type)
void set_gdbarch_virtual_frame_pointer(struct gdbarch *gdbarch, gdbarch_virtual_frame_pointer_ftype *virtual_frame_pointer)
void set_gdbarch_adjust_dwarf2_addr(struct gdbarch *gdbarch, gdbarch_adjust_dwarf2_addr_ftype *adjust_dwarf2_addr)
void set_gdbarch_print_insn(struct gdbarch *gdbarch, gdbarch_print_insn_ftype *print_insn)
const struct target_desc * gdbarch_target_desc(struct gdbarch *gdbarch)
void set_gdbarch_float_bit(struct gdbarch *gdbarch, int float_bit)
void set_gdbarch_stack_frame_destroyed_p(struct gdbarch *gdbarch, gdbarch_stack_frame_destroyed_p_ftype *stack_frame_destroyed_p)
void set_gdbarch_short_bit(struct gdbarch *gdbarch, int short_bit)
void set_gdbarch_adjust_dwarf2_line(struct gdbarch *gdbarch, gdbarch_adjust_dwarf2_line_ftype *adjust_dwarf2_line)
void set_gdbarch_pseudo_register_write(struct gdbarch *gdbarch, gdbarch_pseudo_register_write_ftype *pseudo_register_write)
void set_gdbarch_num_pseudo_regs(struct gdbarch *gdbarch, int num_pseudo_regs)
void set_gdbarch_dwarf2_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_dwarf2_reg_to_regnum_ftype *dwarf2_reg_to_regnum)
void set_gdbarch_long_bit(struct gdbarch *gdbarch, int long_bit)
void set_gdbarch_ptr_bit(struct gdbarch *gdbarch, int ptr_bit)
CORE_ADDR gdbarch_addr_bits_remove(struct gdbarch *gdbarch, CORE_ADDR addr)
void set_gdbarch_convert_register_p(struct gdbarch *gdbarch, gdbarch_convert_register_p_ftype *convert_register_p)
void set_gdbarch_pseudo_register_read(struct gdbarch *gdbarch, gdbarch_pseudo_register_read_ftype *pseudo_register_read)
void set_gdbarch_ax_pseudo_register_push_stack(struct gdbarch *gdbarch, gdbarch_ax_pseudo_register_push_stack_ftype *ax_pseudo_register_push_stack)
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
const struct bfd_arch_info * gdbarch_bfd_arch_info(struct gdbarch *gdbarch)
void set_gdbarch_long_double_bit(struct gdbarch *gdbarch, int long_double_bit)
void set_gdbarch_sw_breakpoint_from_kind(struct gdbarch *gdbarch, gdbarch_sw_breakpoint_from_kind_ftype *sw_breakpoint_from_kind)
void set_gdbarch_dummy_id(struct gdbarch *gdbarch, gdbarch_dummy_id_ftype *dummy_id)
enum gdb_osabi gdbarch_osabi(struct gdbarch *gdbarch)
void set_gdbarch_read_pc(struct gdbarch *gdbarch, gdbarch_read_pc_ftype *read_pc)
void set_gdbarch_unwind_sp(struct gdbarch *gdbarch, gdbarch_unwind_sp_ftype *unwind_sp)
void set_gdbarch_print_float_info(struct gdbarch *gdbarch, gdbarch_print_float_info_ftype *print_float_info)
void set_gdbarch_pointer_to_address(struct gdbarch *gdbarch, gdbarch_pointer_to_address_ftype *pointer_to_address)
void set_gdbarch_in_solib_return_trampoline(struct gdbarch *gdbarch, gdbarch_in_solib_return_trampoline_ftype *in_solib_return_trampoline)
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype *push_dummy_call)
void set_gdbarch_vbit_in_delta(struct gdbarch *gdbarch, int vbit_in_delta)
struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, struct gdbarch_tdep_base *tdep)
#define GDBARCH_OBSTACK_ZALLOC(GDBARCH, TYPE)
static int gdbarch_num_cooked_regs(gdbarch *arch)
function_call_return_method
const struct floatformat * floatformats_ibm_long_double[BFD_ENDIAN_UNKNOWN]
int field_is_static(struct field *f)
struct type * check_typedef(struct type *type)
void print_scalar_formatted(const gdb_byte *, struct type *, const struct value_print_options *, int, struct ui_file *)
mach_port_t mach_port_t name mach_port_t mach_port_t name kern_return_t err
mach_port_t kern_return_t mach_port_t mach_msg_type_name_t msgportsPoly mach_port_t kern_return_t pid_t pid mach_port_t kern_return_t mach_port_t task mach_port_t kern_return_t int flags
mach_port_t mach_port_t name mach_port_t mach_port_t name kern_return_t int status
static int is_branch(unsigned long inst)
CORE_ADDR find_function_addr(struct value *function, struct type **retval_type, struct type **function_type)
void default_print_float_info(struct gdbarch *gdbarch, struct ui_file *file, frame_info_ptr frame, const char *args)
struct inferior * current_inferior(void)
CORE_ADDR find_solib_trampoline_target(frame_info_ptr frame, CORE_ADDR pc)
struct bound_minimal_symbol lookup_minimal_symbol_by_pc(CORE_ADDR pc)
static struct value * mips_insn32_frame_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
static CORE_ADDR mips_read_pc(readable_regcache *regcache)
static void set_mipsfpu_single_command(const char *args, int from_tty)
static const char mips_disassembler_options_o32[]
static void show_mips_compression(struct ui_file *file, int from_tty, struct cmd_list_element *c, const char *value)
static void set_mips64_transfers_32bit_regs(const char *args, int from_tty, struct cmd_list_element *c)
static CORE_ADDR mips_adjust_breakpoint_address(struct gdbarch *gdbarch, CORE_ADDR bpaddr)
static const struct frame_unwind mips_micro_frame_unwind
static CORE_ADDR mips_skip_prologue(struct gdbarch *gdbarch, CORE_ADDR pc)
#define MAX_MIPS_ABI_REGSIZE
static struct value * mips_micro_frame_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
static void reset_saved_regs(struct gdbarch *gdbarch, struct mips_frame_cache *this_cache)
static CORE_ADDR mips_adjust_dwarf2_addr(CORE_ADDR pc)
static int mips32_instruction_has_delay_slot(struct gdbarch *gdbarch, ULONGEST inst)
static int mips16_stack_frame_destroyed_p(struct gdbarch *gdbarch, CORE_ADDR pc)
static CORE_ADDR mips32_next_pc(struct regcache *regcache, CORE_ADDR pc)
static CORE_ADDR mips_get_mips16_fn_stub_pc(frame_info_ptr frame, CORE_ADDR pc)
static int mips16_insn_at_pc_has_delay_slot(struct gdbarch *gdbarch, CORE_ADDR addr, int mustbe32)
static int mips_last_fp_arg_regnum(gdbarch *arch)
static void mips_print_registers_info(struct gdbarch *gdbarch, struct ui_file *file, frame_info_ptr frame, int regnum, int all)
int mips_pc_is_mips(CORE_ADDR memaddr)
static int mips_convert_register_float_case_p(struct gdbarch *gdbarch, int regnum, struct type *type)
static void print_fpu_flags(struct ui_file *file, int flags)
static enum mips_fpu_type mips_fpu_type
static CORE_ADDR heuristic_proc_start(struct gdbarch *, CORE_ADDR)
static const char mips_str_mips16_call_stub[]
static int mips_stub_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_cache)
static CORE_ADDR mips16_next_pc(struct regcache *regcache, CORE_ADDR pc)
static void set_mipsfpu_auto_command(const char *args, int from_tty)
static int mips_mask_address_p(mips_gdbarch_tdep *tdep)
static int mips_in_frame_stub(CORE_ADDR pc)
static int mips_ax_pseudo_register_push_stack(struct gdbarch *gdbarch, struct agent_expr *ax, int reg)
static void mips_xfer_register(struct gdbarch *gdbarch, struct regcache *regcache, int reg_num, int length, enum bfd_endian endian, gdb_byte *in, const gdb_byte *out, int buf_offset)
static ULONGEST mips_fetch_instruction(struct gdbarch *gdbarch, enum mips_isa isa, CORE_ADDR addr, int *errp)
static CORE_ADDR mips_stub_frame_base_address(frame_info_ptr this_frame, void **this_cache)
static const struct frame_base mips_stub_frame_base
static CORE_ADDR mips_addr_bits_remove(struct gdbarch *gdbarch, CORE_ADDR addr)
static void unpack_mips16(struct gdbarch *gdbarch, CORE_ADDR pc, unsigned int extension, unsigned int inst, enum mips16_inst_fmts insn_format, struct upk_mips16 *upk)
static LONGEST micromips_relative_offset10(ULONGEST insn)
static int mips_convert_register_p(struct gdbarch *gdbarch, int regnum, struct type *type)
static int mips_fpu_type_auto
static int mips_type_needs_double_align(struct type *type)
static int is_mips16_addr(struct gdbarch *gdbarch, CORE_ADDR addr)
static int msymbol_is_mips16(struct minimal_symbol *msym)
static const char *const mips_abi_strings[]
static struct trad_frame_cache * mips_stub_frame_cache(frame_info_ptr this_frame, void **this_cache)
static void set_mipsfpu_double_command(const char *args, int from_tty)
static int mips_about_to_return(struct gdbarch *gdbarch, CORE_ADDR pc)
@ NUM_MIPS_PROCESSOR_REGS
static int mips_insn32_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_cache)
static int mips_in_return_stub(struct gdbarch *gdbarch, CORE_ADDR pc, const char *name)
static void show_mask_address(struct ui_file *file, int from_tty, struct cmd_list_element *c, const char *value)
static const char mips_str_fn_stub[]
static const char *const mips_generic_reg_names[NUM_MIPS_PROCESSOR_REGS]
static int mips_register_to_value(frame_info_ptr frame, int regnum, struct type *type, gdb_byte *to, int *optimizedp, int *unavailablep)
struct target_desc * mips_tdesc_gp64
static int mips16_get_imm(unsigned short prev_inst, unsigned short inst, int nbits, int scale, int is_signed)
static int fp_register_arg_p(struct gdbarch *gdbarch, enum type_code typecode, struct type *arg_type)
static int is_octeon_bbit_op(int op, struct gdbarch *gdbarch)
static enum return_value_convention mips_eabi_return_value(struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
static CORE_ADDR mips_unwind_sp(struct gdbarch *gdbarch, frame_info_ptr next_frame)
static int is_mips16_isa(struct gdbarch *gdbarch)
static CORE_ADDR make_compact_addr(CORE_ADDR addr)
static struct type * mips_register_type(struct gdbarch *gdbarch, int regnum)
static LONGEST micromips_relative_offset7(ULONGEST insn)
static const char * mips_abi_string
static CORE_ADDR mips32_scan_prologue(struct gdbarch *gdbarch, CORE_ADDR start_pc, CORE_ADDR limit_pc, frame_info_ptr this_frame, struct mips_frame_cache *this_cache)
static struct cmd_list_element * showmipscmdlist
static void mips_micro_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
static int gdb_print_insn_mips(bfd_vma memaddr, struct disassemble_info *info)
static const struct frame_unwind mips_insn16_frame_unwind
static int micromips_pc_insn_size(struct gdbarch *gdbarch, CORE_ADDR pc)
static enum return_value_convention mips_o64_return_value(struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
static void mips_print_float_info(struct gdbarch *, struct ui_file *, frame_info_ptr, const char *)
static const char * mips_compression_string
@ MIPS_BP_KIND_MICROMIPS16
@ MIPS_BP_KIND_MICROMIPS32
static LONGEST mips32_relative_offset(ULONGEST inst)
static CORE_ADDR mips_skip_pic_trampoline_code(frame_info_ptr frame, CORE_ADDR pc)
static const signed char mips_reg3_to_reg[8]
static enum mips_abi global_mips_abi(void)
static void mips_make_symbol_special(struct symbol *sym, struct objfile *objfile)
static struct value * mips_insn16_frame_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
static void mips_insn16_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
static CORE_ADDR mips_frame_align(struct gdbarch *gdbarch, CORE_ADDR addr)
static int mips_is_stub_mode(const char *mode)
static int mips2_fp_compat(frame_info_ptr frame)
static const char * mips_register_name(struct gdbarch *gdbarch, int regno)
const struct register_alias mips_n32_n64_aliases[]
static unsigned int fetch_mips_16(struct gdbarch *gdbarch, CORE_ADDR pc)
static CORE_ADDR mips_segment_boundary(CORE_ADDR bpaddr)
static void mips_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int cookednum, const gdb_byte *buf)
static CORE_ADDR mips_insn16_frame_base_address(frame_info_ptr this_frame, void **this_cache)
static CORE_ADDR mips16_scan_prologue(struct gdbarch *gdbarch, CORE_ADDR start_pc, CORE_ADDR limit_pc, frame_info_ptr this_frame, struct mips_frame_cache *this_cache)
static int msymbol_is_micromips(struct minimal_symbol *msym)
static CORE_ADDR mips_n32n64_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
void mips_write_pc(struct regcache *regcache, CORE_ADDR pc)
int mips_pc_is_mips16(struct gdbarch *gdbarch, CORE_ADDR memaddr)
static struct type * mips_pseudo_register_type(struct gdbarch *gdbarch, int regnum)
static bool mips64_transfers_32bit_regs_p
static struct value * value_of_mips_user_reg(frame_info_ptr frame, const void *baton)
struct target_desc * mips_tdesc_gp32
static CORE_ADDR mips_integer_to_address(struct gdbarch *gdbarch, struct type *type, const gdb_byte *buf)
#define MIPS_DEFAULT_FPU_TYPE
static CORE_ADDR micromips_bc1_pc(struct gdbarch *gdbarch, struct regcache *regcache, ULONGEST insn, CORE_ADDR pc, int count)
static CORE_ADDR mips_skip_mips16_trampoline_code(frame_info_ptr frame, CORE_ADDR pc)
static const char *const mips_compression_strings[]
static int msymbol_is_mips(struct minimal_symbol *msym)
static enum return_value_convention mips_n32n64_return_value(struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
static void mips_elf_make_msymbol_special(asymbol *sym, struct minimal_symbol *msym)
static CORE_ADDR mips_o32_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
static CORE_ADDR mips_eabi_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
static int mips_stack_frame_destroyed_p(struct gdbarch *gdbarch, CORE_ADDR pc)
@ MIPS_FPU_DOUBLE_REGSIZE
@ MIPS_FPU_SINGLE_REGSIZE
static int mips_single_step_through_delay(struct gdbarch *gdbarch, frame_info_ptr frame)
static int mips_last_arg_regnum(gdbarch *arch)
static int micromips_instruction_is_compact_branch(unsigned short insn)
static const gdb_byte * mips_sw_breakpoint_from_kind(struct gdbarch *gdbarch, int kind, int *size)
static void mips_virtual_frame_pointer(struct gdbarch *gdbarch, CORE_ADDR pc, int *reg, LONGEST *offset)
#define itype_immediate(x)
std::vector< CORE_ADDR > mips_software_single_step(struct regcache *regcache)
static void set_reg_offset(struct gdbarch *gdbarch, struct mips_frame_cache *this_cache, int regnum, CORE_ADDR offset)
static int micromips_stack_frame_destroyed_p(struct gdbarch *gdbarch, CORE_ADDR pc)
static void mips_print_fp_register(struct ui_file *file, frame_info_ptr frame, int regnum)
static const char mips_str_mips16_ret_stub[]
static CORE_ADDR mips_adjust_dwarf2_line(CORE_ADDR addr, int rel)
static int micromips_insn_at_pc_has_delay_slot(struct gdbarch *gdbarch, CORE_ADDR addr, int mustbe32)
static const struct frame_unwind mips_insn32_frame_unwind
static void mips_abi_update(const char *ignore_args, int from_tty, struct cmd_list_element *c)
static const char mips_str_call_stub[]
static CORE_ADDR micromips_scan_prologue(struct gdbarch *gdbarch, CORE_ADDR start_pc, CORE_ADDR limit_pc, frame_info_ptr this_frame, struct mips_frame_cache *this_cache)
static const struct frame_base * mips_stub_frame_base_sniffer(frame_info_ptr this_frame)
static void mips_read_fp_register_double(frame_info_ptr frame, int regno, gdb_byte *rare_buffer)
static struct frame_id mips_dummy_id(struct gdbarch *gdbarch, frame_info_ptr this_frame)
static void mips_register_g_packet_guesses(struct gdbarch *gdbarch)
static int is_compact_addr(CORE_ADDR addr)
static int print_gp_register_row(struct ui_file *file, frame_info_ptr frame, int start_regnum)
static unsigned int mips_debug
static int mips_n32n64_fp_arg_chunk_p(struct gdbarch *gdbarch, struct type *arg_type, int offset)
static void mips_print_register(struct ui_file *file, frame_info_ptr frame, int regnum)
static enum mips_isa global_mips_compression(void)
static void mips_dump_tdep(struct gdbarch *gdbarch, struct ui_file *file)
static int is_octeon(struct gdbarch *gdbarch)
const struct register_alias mips_register_aliases[]
static struct gdbarch * mips_gdbarch_init(struct gdbarch_info info, struct gdbarch_list *arches)
static struct cmd_list_element * setmipscmdlist
static void show_mipsfpu_command(const char *args, int from_tty)
static void mips_insn32_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
static CORE_ADDR mips_o64_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
static CORE_ADDR unmake_compact_addr(CORE_ADDR addr)
static enum mips_isa mips_pc_isa(struct gdbarch *gdbarch, CORE_ADDR memaddr)
static CORE_ADDR mips_unwind_pc(struct gdbarch *gdbarch, frame_info_ptr next_frame)
static int mips_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *reggroup)
int mips_pc_is_micromips(struct gdbarch *gdbarch, CORE_ADDR memaddr)
static const struct frame_base * mips_insn16_frame_base_sniffer(frame_info_ptr this_frame)
static CORE_ADDR extended_mips16_next_pc(regcache *regcache, CORE_ADDR pc, unsigned int extension, unsigned int insn)
static const struct frame_base mips_insn32_frame_base
static const char *const mips_linux_reg_names[NUM_MIPS_PROCESSOR_REGS]
static void mips_stub_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
static int mips16_instruction_has_delay_slot(unsigned short inst, int mustbe32)
static std::vector< CORE_ADDR > mips_deal_with_atomic_sequence(struct gdbarch *gdbarch, CORE_ADDR pc)
static CORE_ADDR mips_next_pc(struct regcache *regcache, CORE_ADDR pc)
static int mips_micro_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_cache)
static struct value * mips_stub_frame_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
static void show_mips_abi(struct ui_file *file, int from_tty, struct cmd_list_element *ignored_cmd, const char *ignored_value)
const struct register_alias mips_o32_aliases[]
static char * mips_disassembler_options
static int mips_convert_register_gpreg_case_p(struct gdbarch *gdbarch, int regnum, struct type *type)
static int mips_insn16_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_cache)
static CORE_ADDR mips_insn32_frame_base_address(frame_info_ptr this_frame, void **this_cache)
static const struct frame_base mips_micro_frame_base
void _initialize_mips_tdep()
static int heuristic_fence_post
static void mips_find_abi_section(bfd *abfd, asection *sect, void *obj)
static void mips_find_long_section(bfd *abfd, asection *sect, void *obj)
static int mips_breakpoint_kind_from_pc(struct gdbarch *gdbarch, CORE_ADDR *pcptr)
unsigned int mips_abi_regsize(struct gdbarch *gdbarch)
static CORE_ADDR add_offset_16(CORE_ADDR pc, int offset)
static int micromips_instruction_has_delay_slot(ULONGEST insn, int mustbe32)
static CORE_ADDR mips_skip_trampoline_code(frame_info_ptr frame, CORE_ADDR pc)
static const struct frame_base * mips_insn32_frame_base_sniffer(frame_info_ptr this_frame)
static void mips_value_to_register(frame_info_ptr frame, int regnum, struct type *type, const gdb_byte *from)
static struct mips_frame_cache * mips_insn32_frame_cache(frame_info_ptr this_frame, void **this_cache)
static const struct frame_base mips_insn16_frame_base
CORE_ADDR mips_unmake_compact_addr(CORE_ADDR addr)
static const char mips_disassembler_options_n32[]
static const char mips_disassembler_options_n64[]
static struct mips_frame_cache * mips_insn16_frame_cache(frame_info_ptr this_frame, void **this_cache)
static CORE_ADDR mips_micro_frame_base_address(frame_info_ptr this_frame, void **this_cache)
static CORE_ADDR mips32_bc1_pc(struct gdbarch *gdbarch, struct regcache *regcache, ULONGEST inst, CORE_ADDR pc, int count)
static int micromips_decode_imm9(int imm)
static int mips16_instruction_is_compact_branch(unsigned short insn)
static int mips_is_stub_suffix(const char *suffix, int zero)
static const struct frame_base * mips_micro_frame_base_sniffer(frame_info_ptr this_frame)
static bool mips_eabi(gdbarch *arch)
static int mips_fpa0_regnum(struct gdbarch *gdbarch)
static CORE_ADDR extended_offset(unsigned int extension)
static int mips_float_register_p(struct gdbarch *gdbarch, int regnum)
static const char * mips_fpu_type_str(enum mips_fpu_type fpu_type)
static int mips_stab_reg_to_regnum(struct gdbarch *gdbarch, int num)
static const struct frame_unwind mips_stub_frame_unwind
static std::vector< CORE_ADDR > micromips_deal_with_atomic_sequence(struct gdbarch *gdbarch, CORE_ADDR pc)
static int mips_register_sim_regno(struct gdbarch *gdbarch, int regnum)
static CORE_ADDR micromips_next_pc(struct regcache *regcache, CORE_ADDR pc)
const struct register_alias mips_numeric_register_aliases[]
static int mips_insn_size(enum mips_isa isa, ULONGEST insn)
static std::vector< CORE_ADDR > deal_with_atomic_sequence(struct gdbarch *gdbarch, CORE_ADDR pc)
static void reinit_frame_cache_sfunc(const char *args, int from_tty, struct cmd_list_element *c)
static const char *const mips_tx39_reg_names[NUM_MIPS_PROCESSOR_REGS]
static const char mips_str_pic[]
static int is_micromips_isa(struct gdbarch *gdbarch)
static int mips_ax_pseudo_register_collect(struct gdbarch *gdbarch, struct agent_expr *ax, int reg)
static void set_mipsfpu_none_command(const char *args, int from_tty)
static void mips_read_fp_register_single(frame_info_ptr frame, int regno, gdb_byte *rare_buffer)
static int is_micromips_addr(struct gdbarch *gdbarch, CORE_ADDR addr)
static enum return_value_convention mips_o32_return_value(struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
static CORE_ADDR mips_push_dummy_code(struct gdbarch *gdbarch, CORE_ADDR sp, CORE_ADDR funaddr, struct value **args, int nargs, struct type *value_type, CORE_ADDR *real_pc, CORE_ADDR *bp_addr, struct regcache *regcache)
static const char mips_compression_micromips[]
static LONGEST micromips_relative_offset16(ULONGEST insn)
static enum auto_boolean mask_address_var
static int mips_tdesc_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *reggroup)
static int print_fp_register_row(struct ui_file *file, frame_info_ptr frame, int regnum)
static enum mips_fpu_type mips_get_fpu_type(gdbarch *arch)
static int mips_dwarf_dwarf2_ecoff_reg_to_regnum(struct gdbarch *gdbarch, int num)
static struct mips_frame_cache * mips_micro_frame_cache(frame_info_ptr this_frame, void **this_cache)
static const char mips_compression_mips16[]
static int mips32_stack_frame_destroyed_p(struct gdbarch *gdbarch, CORE_ADDR pc)
static int mips32_insn_at_pc_has_delay_slot(struct gdbarch *gdbarch, CORE_ADDR addr)
static enum register_status mips_pseudo_register_read(struct gdbarch *gdbarch, readable_regcache *regcache, int cookednum, gdb_byte *buf)
int mips_isa_regsize(struct gdbarch *gdbarch)
static int is_mips_addr(CORE_ADDR addr)
static const char mips_str_call_fp_stub[]
#define SET_MSYMBOL_TARGET_FLAG_MICROMIPS(sym)
#define MSYMBOL_TARGET_FLAG_MIPS16(sym)
static int in_mips_stubs_section(CORE_ADDR pc)
#define MSYMBOL_TARGET_FLAG_MICROMIPS(sym)
@ MIPS_FIRST_EMBED_REGNUM
@ MIPS_EMBED_CAUSE_REGNUM
@ MIPS_EMBED_BADVADDR_REGNUM
#define SET_MSYMBOL_TARGET_FLAG_MIPS16(sym)
static int in_plt_section(CORE_ADDR pc)
void gdbarch_init_osabi(struct gdbarch_info info, struct gdbarch *gdbarch)
CORE_ADDR regcache_read_pc(struct regcache *regcache)
void regcache_raw_write_signed(struct regcache *regcache, int regnum, LONGEST val)
int register_size(struct gdbarch *gdbarch, int regnum)
void regcache_cooked_write_signed(struct regcache *regcache, int regnum, LONGEST val)
LONGEST regcache_raw_get_signed(struct regcache *regcache, int regnum)
void regcache_cooked_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
struct type * register_type(struct gdbarch *gdbarch, int regnum)
const reggroup *const general_reggroup
const reggroup *const float_reggroup
const reggroup *const save_reggroup
const reggroup *const all_reggroup
const reggroup *const restore_reggroup
const reggroup *const vector_reggroup
void register_remote_g_packet_guess(struct gdbarch *gdbarch, int bytes, const struct target_desc *tdesc)
constexpr gdb_byte little_breakpoint[]
constexpr gdb_byte big_breakpoint[]
@ LEGACY_SIM_REGNO_IGNORE
void set_start(CORE_ADDR start)
CORE_ADDR value_address() const
struct minimal_symbol * minsym
struct type * builtin_double
struct type * builtin_func_ptr
struct type * builtin_data_ptr
struct type * builtin_int64
struct type * builtin_int32
struct type * builtin_float
LONGEST loc_bitpos() const
struct type * type() const
void set_value_address(CORE_ADDR address)
const char * linkage_name() const
unsigned long size() const
CORE_ADDR value_raw_address() const
trad_frame_saved_reg * saved_regs
int default_mask_address_p
CORE_ADDR(* syscall_next_pc)(frame_info_ptr frame)
int register_size_valid_p
const struct mips_regnum * regnum
int mips64_transfers_32bit_regs_p
int mips_last_fp_arg_regnum
const char *const * mips_processor_reg_names
int fp_implementation_revision
const block * value_block() const
address_class aclass() const
frame_info_ptr this_frame
void set_realreg(int realreg)
void set_addr(LONGEST addr)
void set_value(LONGEST val)
struct field & field(int idx) const
struct field * fields() const
CORE_ADDR skip_prologue_using_sal(struct gdbarch *gdbarch, CORE_ADDR func_addr)
tdesc_arch_data_up tdesc_data_alloc(void)
const struct tdesc_feature * tdesc_find_feature(const struct target_desc *target_desc, const char *name)
int tdesc_numbered_register(const struct tdesc_feature *feature, struct tdesc_arch_data *data, int regno, const char *name)
static const registry< gdbarch >::key< tdesc_arch_data > tdesc_data
void tdesc_use_registers(struct gdbarch *gdbarch, const struct target_desc *target_desc, tdesc_arch_data_up &&early_data, tdesc_unknown_register_ftype unk_reg_cb)
int tdesc_has_registers(const struct target_desc *target_desc)
void set_tdesc_pseudo_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype *pseudo_type)
target_desc_up allocate_target_description(void)
const char * tdesc_register_name(struct gdbarch *gdbarch, int regno)
int tdesc_register_in_reggroup_p(struct gdbarch *gdbarch, int regno, const struct reggroup *reggroup)
const char * tdesc_property(const struct target_desc *target_desc, const char *key)
void set_tdesc_property(struct target_desc *target_desc, const char *key, const char *value)
std::unique_ptr< tdesc_arch_data, tdesc_arch_data_deleter > tdesc_arch_data_up
std::string target_float_to_string(const gdb_byte *addr, const struct type *type, const char *format)
int target_read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
trad_frame_saved_reg * trad_frame_alloc_saved_regs(struct gdbarch *gdbarch)
void trad_frame_set_reg_realreg(struct trad_frame_cache *this_trad_cache, int regnum, int realreg)
struct value * trad_frame_get_prev_register(frame_info_ptr this_frame, trad_frame_saved_reg this_saved_regs[], int regnum)
struct trad_frame_cache * trad_frame_cache_zalloc(frame_info_ptr this_frame)
void trad_frame_get_id(struct trad_frame_cache *this_trad_cache, struct frame_id *this_id)
void trad_frame_set_id(struct trad_frame_cache *this_trad_cache, struct frame_id this_id)
CORE_ADDR trad_frame_get_this_base(struct trad_frame_cache *this_trad_cache)
void trad_frame_set_this_base(struct trad_frame_cache *this_trad_cache, CORE_ADDR this_base)
struct value * trad_frame_get_register(struct trad_frame_cache *this_trad_cache, frame_info_ptr this_frame, int regnum)
void user_reg_add(struct gdbarch *gdbarch, const char *name, user_reg_read_ftype *xread, const void *baton)
const char * paddress(struct gdbarch *gdbarch, CORE_ADDR addr)
void gdb_printf(struct ui_file *stream, const char *format,...)
void gdb_puts(const char *linebuffer, struct ui_file *stream)
void get_formatted_print_options(struct value_print_options *opts, char format)
void value_print_scalar_formatted(struct value *val, const struct value_print_options *options, int size, struct ui_file *stream)
struct type * value_type(const struct value *value)
int value_entirely_available(struct value *value)
gdb::array_view< const gdb_byte > value_contents_all(struct value *value)
CORE_ADDR value_address(const struct value *value)
gdb::array_view< const gdb_byte > value_contents(struct value *value)
int value_optimized_out(struct value *value)