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lm32-tdep.c
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1/* Target-dependent code for Lattice Mico32 processor, for GDB.
2 Contributed by Jon Beniston <jon@beniston.com>
3
4 Copyright (C) 2009-2023 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21#include "defs.h"
22#include "frame.h"
23#include "frame-unwind.h"
24#include "frame-base.h"
25#include "inferior.h"
26#include "dis-asm.h"
27#include "symfile.h"
28#include "remote.h"
29#include "gdbcore.h"
30#include "gdb/sim-lm32.h"
31#include "arch-utils.h"
32#include "regcache.h"
33#include "trad-frame.h"
34#include "reggroups.h"
35#include "opcodes/lm32-desc.h"
36#include <algorithm>
37#include "gdbarch.h"
38
39/* Macros to extract fields from an instruction. */
40#define LM32_OPCODE(insn) ((insn >> 26) & 0x3f)
41#define LM32_REG0(insn) ((insn >> 21) & 0x1f)
42#define LM32_REG1(insn) ((insn >> 16) & 0x1f)
43#define LM32_REG2(insn) ((insn >> 11) & 0x1f)
44#define LM32_IMM16(insn) ((((long)insn & 0xffff) << 16) >> 16)
45
47{
48 /* gdbarch target dependent data here. Currently unused for LM32. */
49};
50
52{
53 /* The frame's base. Used when constructing a frame ID. */
54 CORE_ADDR base;
55 CORE_ADDR pc;
56 /* Size of frame. */
57 int size;
58 /* Table indicating the location of each and every register. */
60};
61
62/* Return whether a given register is in a given group. */
63
64static int
66 const struct reggroup *group)
67{
68 if (group == general_reggroup)
69 return ((regnum >= SIM_LM32_R0_REGNUM) && (regnum <= SIM_LM32_RA_REGNUM))
70 || (regnum == SIM_LM32_PC_REGNUM);
71 else if (group == system_reggroup)
72 return ((regnum >= SIM_LM32_BA_REGNUM) && (regnum <= SIM_LM32_EA_REGNUM))
73 || ((regnum >= SIM_LM32_EID_REGNUM) && (regnum <= SIM_LM32_IP_REGNUM));
75}
76
77/* Return a name that corresponds to the given register number. */
78
79static const char *
80lm32_register_name (struct gdbarch *gdbarch, int reg_nr)
81{
82 static const char *register_names[] = {
83 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
84 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
85 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
86 "r24", "r25", "gp", "fp", "sp", "ra", "ea", "ba",
87 "PC", "EID", "EBA", "DEBA", "IE", "IM", "IP"
88 };
89
90 gdb_static_assert (ARRAY_SIZE (register_names) == SIM_LM32_NUM_REGS);
91 return register_names[reg_nr];
92}
93
94/* Return type of register. */
95
96static struct type *
97lm32_register_type (struct gdbarch *gdbarch, int reg_nr)
98{
100}
101
102/* Return non-zero if a register can't be written. */
103
104static int
106{
107 return (regno == SIM_LM32_R0_REGNUM) || (regno == SIM_LM32_EID_REGNUM);
108}
109
110/* Analyze a function's prologue. */
111
112static CORE_ADDR
114 CORE_ADDR pc, CORE_ADDR limit,
115 struct lm32_frame_cache *info)
116{
117 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
118 unsigned long instruction;
119
120 /* Keep reading though instructions, until we come across an instruction
121 that isn't likely to be part of the prologue. */
122 info->size = 0;
123 for (; pc < limit; pc += 4)
124 {
125
126 /* Read an instruction. */
127 instruction = read_memory_integer (pc, 4, byte_order);
128
129 if ((LM32_OPCODE (instruction) == OP_SW)
130 && (LM32_REG0 (instruction) == SIM_LM32_SP_REGNUM))
131 {
132 /* Any stack displaced store is likely part of the prologue.
133 Record that the register is being saved, and the offset
134 into the stack. */
135 info->saved_regs[LM32_REG1 (instruction)].set_addr (LM32_IMM16 (instruction));
136 }
137 else if ((LM32_OPCODE (instruction) == OP_ADDI)
138 && (LM32_REG1 (instruction) == SIM_LM32_SP_REGNUM))
139 {
140 /* An add to the SP is likely to be part of the prologue.
141 Adjust stack size by whatever the instruction adds to the sp. */
142 info->size -= LM32_IMM16 (instruction);
143 }
144 else if ( /* add fp,fp,sp */
145 ((LM32_OPCODE (instruction) == OP_ADD)
146 && (LM32_REG2 (instruction) == SIM_LM32_FP_REGNUM)
147 && (LM32_REG0 (instruction) == SIM_LM32_FP_REGNUM)
148 && (LM32_REG1 (instruction) == SIM_LM32_SP_REGNUM))
149 /* mv fp,imm */
150 || ((LM32_OPCODE (instruction) == OP_ADDI)
151 && (LM32_REG1 (instruction) == SIM_LM32_FP_REGNUM)
152 && (LM32_REG0 (instruction) == SIM_LM32_R0_REGNUM)))
153 {
154 /* Likely to be in the prologue for functions that require
155 a frame pointer. */
156 }
157 else
158 {
159 /* Any other instruction is likely not to be part of the
160 prologue. */
161 break;
162 }
163 }
164
165 return pc;
166}
167
168/* Return PC of first non prologue instruction, for the function at the
169 specified address. */
170
171static CORE_ADDR
172lm32_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
173{
174 CORE_ADDR func_addr, limit_pc;
176 trad_frame_saved_reg saved_regs[SIM_LM32_NUM_REGS];
177
178 /* See if we can determine the end of the prologue via the symbol table.
179 If so, then return either PC, or the PC after the prologue, whichever
180 is greater. */
181 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
182 {
183 CORE_ADDR post_prologue_pc
184 = skip_prologue_using_sal (gdbarch, func_addr);
185 if (post_prologue_pc != 0)
186 return std::max (pc, post_prologue_pc);
187 }
188
189 /* Can't determine prologue from the symbol table, need to examine
190 instructions. */
191
192 /* Find an upper limit on the function prologue using the debug
193 information. If the debug information could not be used to provide
194 that bound, then use an arbitrary large number as the upper bound. */
195 limit_pc = skip_prologue_using_sal (gdbarch, pc);
196 if (limit_pc == 0)
197 limit_pc = pc + 100; /* Magic. */
198
199 frame_info.saved_regs = saved_regs;
200 return lm32_analyze_prologue (gdbarch, pc, limit_pc, &frame_info);
201}
202
203/* Create a breakpoint instruction. */
204constexpr gdb_byte lm32_break_insn[4] = { OP_RAISE << 2, 0, 0, 2 };
205
206typedef BP_MANIPULATION (lm32_break_insn) lm32_breakpoint;
207
208
209/* Setup registers and stack for faking a call to a function in the
210 inferior. */
211
212static CORE_ADDR
213lm32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
214 struct regcache *regcache, CORE_ADDR bp_addr,
215 int nargs, struct value **args, CORE_ADDR sp,
216 function_call_return_method return_method,
217 CORE_ADDR struct_addr)
218{
219 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
220 int first_arg_reg = SIM_LM32_R1_REGNUM;
221 int num_arg_regs = 8;
222 int i;
223
224 /* Set the return address. */
225 regcache_cooked_write_signed (regcache, SIM_LM32_RA_REGNUM, bp_addr);
226
227 /* If we're returning a large struct, a pointer to the address to
228 store it at is passed as a first hidden parameter. */
229 if (return_method == return_method_struct)
230 {
231 regcache_cooked_write_unsigned (regcache, first_arg_reg, struct_addr);
232 first_arg_reg++;
233 num_arg_regs--;
234 sp -= 4;
235 }
236
237 /* Setup parameters. */
238 for (i = 0; i < nargs; i++)
239 {
240 struct value *arg = args[i];
241 struct type *arg_type = check_typedef (value_type (arg));
242 gdb_byte *contents;
243 ULONGEST val;
244
245 /* Promote small integer types to int. */
246 switch (arg_type->code ())
247 {
248 case TYPE_CODE_INT:
249 case TYPE_CODE_BOOL:
250 case TYPE_CODE_CHAR:
251 case TYPE_CODE_RANGE:
252 case TYPE_CODE_ENUM:
253 if (arg_type->length () < 4)
254 {
255 arg_type = builtin_type (gdbarch)->builtin_int32;
256 arg = value_cast (arg_type, arg);
257 }
258 break;
259 }
260
261 /* FIXME: Handle structures. */
262
263 contents = (gdb_byte *) value_contents (arg).data ();
264 val = extract_unsigned_integer (contents, arg_type->length (),
265 byte_order);
266
267 /* First num_arg_regs parameters are passed by registers,
268 and the rest are passed on the stack. */
269 if (i < num_arg_regs)
270 regcache_cooked_write_unsigned (regcache, first_arg_reg + i, val);
271 else
272 {
273 write_memory_unsigned_integer (sp, arg_type->length (), byte_order,
274 val);
275 sp -= 4;
276 }
277 }
278
279 /* Update stack pointer. */
280 regcache_cooked_write_signed (regcache, SIM_LM32_SP_REGNUM, sp);
281
282 /* Return adjusted stack pointer. */
283 return sp;
284}
285
286/* Extract return value after calling a function in the inferior. */
287
288static void
290 gdb_byte *valbuf)
291{
292 struct gdbarch *gdbarch = regcache->arch ();
293 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
294 ULONGEST l;
295 CORE_ADDR return_buffer;
296
297 if (type->code () != TYPE_CODE_STRUCT
298 && type->code () != TYPE_CODE_UNION
299 && type->code () != TYPE_CODE_ARRAY && type->length () <= 4)
300 {
301 /* Return value is returned in a single register. */
302 regcache_cooked_read_unsigned (regcache, SIM_LM32_R1_REGNUM, &l);
303 store_unsigned_integer (valbuf, type->length (), byte_order, l);
304 }
305 else if ((type->code () == TYPE_CODE_INT) && (type->length () == 8))
306 {
307 /* 64-bit values are returned in a register pair. */
308 regcache_cooked_read_unsigned (regcache, SIM_LM32_R1_REGNUM, &l);
309 memcpy (valbuf, &l, 4);
310 regcache_cooked_read_unsigned (regcache, SIM_LM32_R2_REGNUM, &l);
311 memcpy (valbuf + 4, &l, 4);
312 }
313 else
314 {
315 /* Aggregate types greater than a single register are returned
316 in memory. FIXME: Unless they are only 2 regs?. */
317 regcache_cooked_read_unsigned (regcache, SIM_LM32_R1_REGNUM, &l);
318 return_buffer = l;
319 read_memory (return_buffer, valbuf, type->length ());
320 }
321}
322
323/* Write into appropriate registers a function return value of type
324 TYPE, given in virtual format. */
325static void
327 const gdb_byte *valbuf)
328{
329 struct gdbarch *gdbarch = regcache->arch ();
330 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
331 ULONGEST val;
332 int len = type->length ();
333
334 if (len <= 4)
335 {
336 val = extract_unsigned_integer (valbuf, len, byte_order);
337 regcache_cooked_write_unsigned (regcache, SIM_LM32_R1_REGNUM, val);
338 }
339 else if (len <= 8)
340 {
341 val = extract_unsigned_integer (valbuf, 4, byte_order);
342 regcache_cooked_write_unsigned (regcache, SIM_LM32_R1_REGNUM, val);
343 val = extract_unsigned_integer (valbuf + 4, len - 4, byte_order);
344 regcache_cooked_write_unsigned (regcache, SIM_LM32_R2_REGNUM, val);
345 }
346 else
347 error (_("lm32_store_return_value: type length too large."));
348}
349
350/* Determine whether a functions return value is in a register or memory. */
351static enum return_value_convention
352lm32_return_value (struct gdbarch *gdbarch, struct value *function,
353 struct type *valtype, struct regcache *regcache,
354 gdb_byte *readbuf, const gdb_byte *writebuf)
355{
356 enum type_code code = valtype->code ();
357
358 if (code == TYPE_CODE_STRUCT
359 || code == TYPE_CODE_UNION
360 || code == TYPE_CODE_ARRAY || valtype->length () > 8)
362
363 if (readbuf)
364 lm32_extract_return_value (valtype, regcache, readbuf);
365 if (writebuf)
366 lm32_store_return_value (valtype, regcache, writebuf);
367
369}
370
371/* Put here the code to store, into fi->saved_regs, the addresses of
372 the saved registers of frame described by FRAME_INFO. This
373 includes special registers such as pc and fp saved in special ways
374 in the stack frame. sp is even more special: the address we return
375 for it IS the sp for the next frame. */
376
377static struct lm32_frame_cache *
378lm32_frame_cache (frame_info_ptr this_frame, void **this_prologue_cache)
379{
380 CORE_ADDR current_pc;
381 ULONGEST prev_sp;
382 ULONGEST this_base;
383 struct lm32_frame_cache *info;
384 int i;
385
386 if ((*this_prologue_cache))
387 return (struct lm32_frame_cache *) (*this_prologue_cache);
388
390 (*this_prologue_cache) = info;
391 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
392
393 info->pc = get_frame_func (this_frame);
394 current_pc = get_frame_pc (this_frame);
396 info->pc, current_pc, info);
397
398 /* Compute the frame's base, and the previous frame's SP. */
399 this_base = get_frame_register_unsigned (this_frame, SIM_LM32_SP_REGNUM);
400 prev_sp = this_base + info->size;
401 info->base = this_base;
402
403 /* Convert callee save offsets into addresses. */
404 for (i = 0; i < gdbarch_num_regs (get_frame_arch (this_frame)) - 1; i++)
405 {
406 if (info->saved_regs[i].is_addr ())
407 info->saved_regs[i].set_addr (this_base + info->saved_regs[i].addr ());
408 }
409
410 /* The call instruction moves the caller's PC in the callee's RA register.
411 Since this is an unwind, do the reverse. Copy the location of RA register
412 into PC (the address / regnum) so that a request for PC will be
413 converted into a request for the RA register. */
414 info->saved_regs[SIM_LM32_PC_REGNUM] = info->saved_regs[SIM_LM32_RA_REGNUM];
415
416 /* The previous frame's SP needed to be computed. Save the computed
417 value. */
418 info->saved_regs[SIM_LM32_SP_REGNUM].set_value (prev_sp);
419
420 return info;
421}
422
423static void
424lm32_frame_this_id (frame_info_ptr this_frame, void **this_cache,
425 struct frame_id *this_id)
426{
427 struct lm32_frame_cache *cache = lm32_frame_cache (this_frame, this_cache);
428
429 /* This marks the outermost frame. */
430 if (cache->base == 0)
431 return;
432
433 (*this_id) = frame_id_build (cache->base, cache->pc);
434}
435
436static struct value *
438 void **this_prologue_cache, int regnum)
439{
440 struct lm32_frame_cache *info;
441
442 info = lm32_frame_cache (this_frame, this_prologue_cache);
443 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
444}
445
446static const struct frame_unwind lm32_frame_unwind = {
447 "lm32 prologue",
452 NULL,
454};
455
456static CORE_ADDR
457lm32_frame_base_address (frame_info_ptr this_frame, void **this_cache)
458{
459 struct lm32_frame_cache *info = lm32_frame_cache (this_frame, this_cache);
460
461 return info->base;
462}
463
464static const struct frame_base lm32_frame_base = {
469};
470
471static CORE_ADDR
472lm32_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
473{
474 /* Align to the size of an instruction (so that they can safely be
475 pushed onto the stack. */
476 return sp & ~3;
477}
478
479static struct gdbarch *
481{
482 struct gdbarch *gdbarch;
483
484 /* If there is already a candidate, use it. */
486 if (arches != NULL)
487 return arches->gdbarch;
488
489 /* None found, create a new architecture from the information provided. */
491 gdbarch = gdbarch_alloc (&info, tdep);
492
493 /* Type sizes. */
502
503 /* Register info. */
504 set_gdbarch_num_regs (gdbarch, SIM_LM32_NUM_REGS);
505 set_gdbarch_sp_regnum (gdbarch, SIM_LM32_SP_REGNUM);
506 set_gdbarch_pc_regnum (gdbarch, SIM_LM32_PC_REGNUM);
510
511 /* Frame info. */
516
517 /* Frame unwinding. */
521
522 /* Breakpoints. */
523 set_gdbarch_breakpoint_kind_from_pc (gdbarch, lm32_breakpoint::kind_from_pc);
524 set_gdbarch_sw_breakpoint_from_kind (gdbarch, lm32_breakpoint::bp_from_kind);
526
527 /* Calling functions in the inferior. */
528 set_gdbarch_push_dummy_call (gdbarch, lm32_push_dummy_call);
530
532
533 return gdbarch;
534}
535
537void
539{
540 gdbarch_register (bfd_arch_lm32, lm32_gdbarch_init);
541}
int regnum
int code
Definition ada-lex.l:688
gdb_static_assert(sizeof(splay_tree_key) >=sizeof(CORE_ADDR *))
static std::vector< const char * > arches
Definition arch-utils.c:685
void gdbarch_register(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init, gdbarch_dump_tdep_ftype *dump_tdep)
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
Definition arch-utils.c:177
struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
#define BP_MANIPULATION(BREAK_INSN)
Definition arch-utils.h:70
bool find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr, const struct block **block)
Definition blockframe.c:373
gdbarch * arch() const
Definition regcache.c:230
void write_memory_unsigned_integer(CORE_ADDR addr, int len, enum bfd_endian byte_order, ULONGEST value)
Definition corefile.c:369
void read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition corefile.c:237
LONGEST read_memory_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
Definition corefile.c:295
static void store_unsigned_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, ULONGEST val)
Definition defs.h:561
static ULONGEST extract_unsigned_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
Definition defs.h:526
return_value_convention
Definition defs.h:258
@ RETURN_VALUE_REGISTER_CONVENTION
Definition defs.h:261
@ RETURN_VALUE_STRUCT_CONVENTION
Definition defs.h:268
void frame_base_set_default(struct gdbarch *gdbarch, const struct frame_base *default_base)
Definition frame-base.c:93
int default_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
enum unwind_stop_reason default_frame_unwind_stop_reason(frame_info_ptr this_frame, void **this_cache)
void frame_unwind_append_unwinder(struct gdbarch *gdbarch, const struct frame_unwind *unwinder)
ULONGEST get_frame_register_unsigned(frame_info_ptr frame, int regnum)
Definition frame.c:1351
CORE_ADDR get_frame_pc(frame_info_ptr frame)
Definition frame.c:2592
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
Definition frame.c:713
struct gdbarch * get_frame_arch(frame_info_ptr this_frame)
Definition frame.c:2907
CORE_ADDR get_frame_func(frame_info_ptr this_frame)
Definition frame.c:1050
@ NORMAL_FRAME
Definition frame.h:179
#define FRAME_OBSTACK_ZALLOC(TYPE)
Definition frame.h:608
void set_gdbarch_long_long_bit(struct gdbarch *gdbarch, int long_long_bit)
Definition gdbarch.c:1467
enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
Definition gdbarch.c:1370
void set_gdbarch_breakpoint_kind_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_kind_from_pc_ftype *breakpoint_kind_from_pc)
void set_gdbarch_frame_align(struct gdbarch *gdbarch, gdbarch_frame_align_ftype *frame_align)
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype *skip_prologue)
void set_gdbarch_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype *register_name)
void set_gdbarch_int_bit(struct gdbarch *gdbarch, int int_bit)
Definition gdbarch.c:1433
void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype *return_value)
void set_gdbarch_decr_pc_after_break(struct gdbarch *gdbarch, CORE_ADDR decr_pc_after_break)
Definition gdbarch.c:2848
void set_gdbarch_have_nonsteppable_watchpoint(struct gdbarch *gdbarch, int have_nonsteppable_watchpoint)
Definition gdbarch.c:3508
int gdbarch_num_regs(struct gdbarch *gdbarch)
Definition gdbarch.c:1899
void set_gdbarch_double_bit(struct gdbarch *gdbarch, int double_bit)
Definition gdbarch.c:1583
void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype *inner_than)
void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
Definition gdbarch.c:2016
void set_gdbarch_register_reggroup_p(struct gdbarch *gdbarch, gdbarch_register_reggroup_p_ftype *register_reggroup_p)
void set_gdbarch_pc_regnum(struct gdbarch *gdbarch, int pc_regnum)
Definition gdbarch.c:2033
void set_gdbarch_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype *register_type)
void set_gdbarch_float_bit(struct gdbarch *gdbarch, int float_bit)
Definition gdbarch.c:1550
void set_gdbarch_short_bit(struct gdbarch *gdbarch, int short_bit)
Definition gdbarch.c:1416
void set_gdbarch_long_bit(struct gdbarch *gdbarch, int long_bit)
Definition gdbarch.c:1450
void set_gdbarch_ptr_bit(struct gdbarch *gdbarch, int ptr_bit)
Definition gdbarch.c:1701
void set_gdbarch_cannot_store_register(struct gdbarch *gdbarch, gdbarch_cannot_store_register_ftype *cannot_store_register)
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
Definition gdbarch.c:1910
void set_gdbarch_long_double_bit(struct gdbarch *gdbarch, int long_double_bit)
Definition gdbarch.c:1616
void set_gdbarch_sw_breakpoint_from_kind(struct gdbarch *gdbarch, gdbarch_sw_breakpoint_from_kind_ftype *sw_breakpoint_from_kind)
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype *push_dummy_call)
void set_gdbarch_frame_args_skip(struct gdbarch *gdbarch, CORE_ADDR frame_args_skip)
Definition gdbarch.c:2947
struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, struct gdbarch_tdep_base *tdep)
Definition gdbarch.c:264
function_call_return_method
Definition gdbarch.h:112
@ return_method_struct
Definition gdbarch.h:124
struct type * check_typedef(struct type *type)
Definition gdbtypes.c:3010
type_code
Definition gdbtypes.h:99
static int lm32_cannot_store_register(struct gdbarch *gdbarch, int regno)
Definition lm32-tdep.c:105
static void lm32_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
Definition lm32-tdep.c:424
#define LM32_IMM16(insn)
Definition lm32-tdep.c:44
static CORE_ADDR lm32_frame_base_address(frame_info_ptr this_frame, void **this_cache)
Definition lm32-tdep.c:457
static const char * lm32_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition lm32-tdep.c:80
static struct type * lm32_register_type(struct gdbarch *gdbarch, int reg_nr)
Definition lm32-tdep.c:97
static CORE_ADDR lm32_skip_prologue(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition lm32-tdep.c:172
static const struct frame_unwind lm32_frame_unwind
Definition lm32-tdep.c:446
static struct gdbarch * lm32_gdbarch_init(struct gdbarch_info info, struct gdbarch_list *arches)
Definition lm32-tdep.c:480
static CORE_ADDR lm32_frame_align(struct gdbarch *gdbarch, CORE_ADDR sp)
Definition lm32-tdep.c:472
constexpr gdb_byte lm32_break_insn[4]
Definition lm32-tdep.c:204
static struct value * lm32_frame_prev_register(frame_info_ptr this_frame, void **this_prologue_cache, int regnum)
Definition lm32-tdep.c:437
static void lm32_extract_return_value(struct type *type, struct regcache *regcache, gdb_byte *valbuf)
Definition lm32-tdep.c:289
#define LM32_REG0(insn)
Definition lm32-tdep.c:41
static enum return_value_convention lm32_return_value(struct gdbarch *gdbarch, struct value *function, struct type *valtype, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
Definition lm32-tdep.c:352
#define LM32_REG1(insn)
Definition lm32-tdep.c:42
static CORE_ADDR lm32_analyze_prologue(struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR limit, struct lm32_frame_cache *info)
Definition lm32-tdep.c:113
#define LM32_REG2(insn)
Definition lm32-tdep.c:43
void _initialize_lm32_tdep()
Definition lm32-tdep.c:538
static void lm32_store_return_value(struct type *type, struct regcache *regcache, const gdb_byte *valbuf)
Definition lm32-tdep.c:326
static const struct frame_base lm32_frame_base
Definition lm32-tdep.c:464
static int lm32_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *group)
Definition lm32-tdep.c:65
#define LM32_OPCODE(insn)
Definition lm32-tdep.c:40
info(c)
Definition gdbarch.py:184
void regcache_cooked_write_signed(struct regcache *regcache, int regnum, LONGEST val)
Definition regcache.c:798
enum register_status regcache_cooked_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
Definition regcache.c:790
void regcache_cooked_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
Definition regcache.c:819
const reggroup *const general_reggroup
Definition reggroups.c:251
int default_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *group)
Definition reggroups.c:147
const reggroup *const system_reggroup
Definition reggroups.c:253
struct type * builtin_int32
Definition gdbtypes.h:2287
CORE_ADDR base
Definition lm32-tdep.c:54
CORE_ADDR pc
Definition lm32-tdep.c:55
trad_frame_saved_reg * saved_regs
Definition lm32-tdep.c:59
type_code code() const
Definition gdbtypes.h:927
ULONGEST length() const
Definition gdbtypes.h:954
Definition value.c:181
CORE_ADDR skip_prologue_using_sal(struct gdbarch *gdbarch, CORE_ADDR func_addr)
Definition symtab.c:3956
trad_frame_saved_reg * trad_frame_alloc_saved_regs(struct gdbarch *gdbarch)
Definition trad-frame.c:62
struct value * trad_frame_get_prev_register(frame_info_ptr this_frame, trad_frame_saved_reg this_saved_regs[], int regnum)
Definition trad-frame.c:187
struct value * value_cast(struct type *type, struct value *arg2)
Definition valops.c:408
struct type * value_type(const struct value *value)
Definition value.c:1109
gdb::array_view< const gdb_byte > value_contents(struct value *value)
Definition value.c:1464