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m32c-tdep.c
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1/* Renesas M32C target-dependent code for GDB, the GNU debugger.
2
3 Copyright (C) 2004-2023 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20#include "defs.h"
21#include "sim/sim-m32c.h"
22#include "gdbtypes.h"
23#include "regcache.h"
24#include "arch-utils.h"
25#include "frame.h"
26#include "frame-unwind.h"
27#include "symtab.h"
28#include "gdbcore.h"
29#include "value.h"
30#include "reggroups.h"
31#include "prologue-value.h"
32#include "objfiles.h"
33#include "gdbarch.h"
34
35
36/* The m32c tdep structure. */
37
39
40/* The type of a function that moves the value of REG between CACHE or
41 BUF --- in either direction. */
42typedef enum register_status (m32c_write_reg_t) (struct m32c_reg *reg,
43 struct regcache *cache,
44 const gdb_byte *buf);
45
46typedef enum register_status (m32c_read_reg_t) (struct m32c_reg *reg,
47 readable_regcache *cache,
48 gdb_byte *buf);
49
51{
52 /* The name of this register. */
53 const char *name;
54
55 /* Its type. */
56 struct type *type;
57
58 /* The architecture this register belongs to. */
59 struct gdbarch *arch;
60
61 /* Its GDB register number. */
62 int num;
63
64 /* Its sim register number. */
66
67 /* Its DWARF register number, or -1 if it doesn't have one. */
69
70 /* Register group memberships. */
71 unsigned int general_p : 1;
72 unsigned int dma_p : 1;
73 unsigned int system_p : 1;
74 unsigned int save_restore_p : 1;
75
76 /* Functions to read its value from a regcache, and write its value
77 to a regcache. */
80
81 /* Data for READ and WRITE functions. The exact meaning depends on
82 the specific functions selected; see the comments for those
83 functions. */
84 struct m32c_reg *rx, *ry;
85 int n;
86};
87
88
89/* An overestimate of the number of raw and pseudoregisters we will
90 have. The exact answer depends on the variant of the architecture
91 at hand, but we can use this to declare statically allocated
92 arrays, and bump it up when needed. */
93#define M32C_MAX_NUM_REGS (75)
94
95/* The largest assigned DWARF register number. */
96#define M32C_MAX_DWARF_REGNUM (40)
97
98
100{
101 /* All the registers for this variant, indexed by GDB register
102 number, and the number of registers present. */
104
105 /* The number of valid registers. */
106 int num_regs = 0;
107
108 /* Interesting registers. These are pointers into REGS. */
109 struct m32c_reg *pc = nullptr, *flg = nullptr;
110 struct m32c_reg *r0 = nullptr, *r1 = nullptr, *r2 = nullptr, *r3 = nullptr,
111 *a0 = nullptr, *a1 = nullptr;
112 struct m32c_reg *r2r0 = nullptr, *r3r2r1r0 = nullptr, *r3r1r2r0 = nullptr;
113 struct m32c_reg *sb = nullptr, *fb = nullptr, *sp = nullptr;
114
115 /* A table indexed by DWARF register numbers, pointing into
116 REGS. */
118
119 /* Types for this architecture. We can't use the builtin_type_foo
120 types, because they're not initialized when building a gdbarch
121 structure. */
122 struct type *voyd = nullptr, *ptr_voyd = nullptr, *func_voyd = nullptr;
123 struct type *uint8 = nullptr, *uint16 = nullptr;
124 struct type *int8 = nullptr, *int16 = nullptr, *int32 = nullptr,
125 *int64 = nullptr;
126
127 /* The types for data address and code address registers. */
128 struct type *data_addr_reg_type = nullptr, *code_addr_reg_type = nullptr;
129
130 /* The number of bytes a return address pushed by a 'jsr' instruction
131 occupies on the stack. */
133
134 /* The number of bytes an address register occupies on the stack
135 when saved by an 'enter' or 'pushm' instruction. */
137};
138
139
140/* Types. */
141
142static void
144{
145 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch);
146 unsigned long mach = gdbarch_bfd_arch_info (arch)->mach;
147 int data_addr_reg_bits, code_addr_reg_bits;
148 char type_name[50];
149
150#if 0
151 /* This is used to clip CORE_ADDR values, so this value is
152 appropriate both on the m32c, where pointers are 32 bits long,
153 and on the m16c, where pointers are sixteen bits long, but there
154 may be code above the 64k boundary. */
156#else
157 /* GCC uses 32 bits for addrs in the dwarf info, even though
158 only 16/24 bits are used. Setting addr_bit to 24 causes
159 errors in reading the dwarf addresses. */
161#endif
162
164 switch (mach)
165 {
166 case bfd_mach_m16c:
167 data_addr_reg_bits = 16;
168 code_addr_reg_bits = 24;
170 tdep->ret_addr_bytes = 3;
171 tdep->push_addr_bytes = 2;
172 break;
173
174 case bfd_mach_m32c:
175 data_addr_reg_bits = 24;
176 code_addr_reg_bits = 24;
178 tdep->ret_addr_bytes = 4;
179 tdep->push_addr_bytes = 4;
180 break;
181
182 default:
183 gdb_assert_not_reached ("unexpected mach");
184 }
185
186 /* The builtin_type_mumble variables are sometimes uninitialized when
187 this is called, so we avoid using them. */
188 type_allocator alloc (arch);
189 tdep->voyd = alloc.new_type (TYPE_CODE_VOID, TARGET_CHAR_BIT, "void");
190 tdep->ptr_voyd
191 = init_pointer_type (alloc, gdbarch_ptr_bit (arch), NULL, tdep->voyd);
192 tdep->func_voyd = lookup_function_type (tdep->voyd);
193
194 xsnprintf (type_name, sizeof (type_name), "%s_data_addr_t",
195 gdbarch_bfd_arch_info (arch)->printable_name);
197 = init_pointer_type (alloc, data_addr_reg_bits, type_name, tdep->voyd);
198
199 xsnprintf (type_name, sizeof (type_name), "%s_code_addr_t",
200 gdbarch_bfd_arch_info (arch)->printable_name);
202 = init_pointer_type (alloc, code_addr_reg_bits, type_name,
203 tdep->func_voyd);
204
205 tdep->uint8 = init_integer_type (alloc, 8, 1, "uint8_t");
206 tdep->uint16 = init_integer_type (alloc, 16, 1, "uint16_t");
207 tdep->int8 = init_integer_type (alloc, 8, 0, "int8_t");
208 tdep->int16 = init_integer_type (alloc, 16, 0, "int16_t");
209 tdep->int32 = init_integer_type (alloc, 32, 0, "int32_t");
210 tdep->int64 = init_integer_type (alloc, 64, 0, "int64_t");
211}
212
213
214
215/* Register set. */
216
217static const char *
219{
220 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (gdbarch);
221 return tdep->regs[num].name;
222}
223
224
225static struct type *
226m32c_register_type (struct gdbarch *arch, int reg_nr)
227{
228 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch);
229 return tdep->regs[reg_nr].type;
230}
231
232
233static int
235{
236 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (gdbarch);
237 return tdep->regs[reg_nr].sim_num;
238}
239
240
241static int
243{
244 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (gdbarch);
245 if (0 <= reg_nr && reg_nr <= M32C_MAX_DWARF_REGNUM
246 && tdep->dwarf_regs[reg_nr])
247 return tdep->dwarf_regs[reg_nr]->num;
248 else
249 /* The DWARF CFI code expects to see -1 for invalid register
250 numbers. */
251 return -1;
252}
253
254
255static int
257 const struct reggroup *group)
258{
259 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (gdbarch);
260 struct m32c_reg *reg = &tdep->regs[regnum];
261
262 /* The anonymous raw registers aren't in any groups. */
263 if (! reg->name)
264 return 0;
265
266 if (group == all_reggroup)
267 return 1;
268
269 if (group == general_reggroup
270 && reg->general_p)
271 return 1;
272
273 if (group == m32c_dma_reggroup
274 && reg->dma_p)
275 return 1;
276
277 if (group == system_reggroup
278 && reg->system_p)
279 return 1;
280
281 /* Since the m32c DWARF register numbers refer to cooked registers, not
282 raw registers, and frame_pop depends on the save and restore groups
283 containing registers the DWARF CFI will actually mention, our save
284 and restore groups are cooked registers, not raw registers. (This is
285 why we can't use the default reggroup function.) */
286 if ((group == save_reggroup
287 || group == restore_reggroup)
288 && reg->save_restore_p)
289 return 1;
290
291 return 0;
292}
293
294
295/* Register move functions. We declare them here using
296 m32c_{read,write}_reg_t to check the types. */
303
310
311/* Copy the value of the raw register REG from CACHE to BUF. */
312static enum register_status
313m32c_raw_read (struct m32c_reg *reg, readable_regcache *cache, gdb_byte *buf)
314{
315 return cache->raw_read (reg->num, buf);
316}
317
318
319/* Copy the value of the raw register REG from BUF to CACHE. */
320static enum register_status
321m32c_raw_write (struct m32c_reg *reg, struct regcache *cache,
322 const gdb_byte *buf)
323{
324 cache->raw_write (reg->num, buf);
325
326 return REG_VALID;
327}
328
329
330/* Return the value of the 'flg' register in CACHE. */
331static int
333{
334 gdbarch *arch = cache->arch ();
335 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch);
336 ULONGEST flg;
337
338 cache->raw_read (tdep->flg->num, &flg);
339 return flg & 0xffff;
340}
341
342
343/* Evaluate the real register number of a banked register. */
344static struct m32c_reg *
346{
347 return ((m32c_read_flg (cache) & reg->n) ? reg->ry : reg->rx);
348}
349
350
351/* Move the value of a banked register from CACHE to BUF.
352 If the value of the 'flg' register in CACHE has any of the bits
353 masked in REG->n set, then read REG->ry. Otherwise, read
354 REG->rx. */
355static enum register_status
356m32c_banked_read (struct m32c_reg *reg, readable_regcache *cache, gdb_byte *buf)
357{
358 struct m32c_reg *bank_reg = m32c_banked_register (reg, cache);
359 return cache->raw_read (bank_reg->num, buf);
360}
361
362
363/* Move the value of a banked register from BUF to CACHE.
364 If the value of the 'flg' register in CACHE has any of the bits
365 masked in REG->n set, then write REG->ry. Otherwise, write
366 REG->rx. */
367static enum register_status
368m32c_banked_write (struct m32c_reg *reg, struct regcache *cache,
369 const gdb_byte *buf)
370{
371 struct m32c_reg *bank_reg = m32c_banked_register (reg, cache);
372 cache->raw_write (bank_reg->num, buf);
373
374 return REG_VALID;
375}
376
377
378/* Move the value of SB from CACHE to BUF. On bfd_mach_m32c, SB is a
379 banked register; on bfd_mach_m16c, it's not. */
380static enum register_status
381m32c_sb_read (struct m32c_reg *reg, readable_regcache *cache, gdb_byte *buf)
382{
383 if (gdbarch_bfd_arch_info (reg->arch)->mach == bfd_mach_m16c)
384 return m32c_raw_read (reg->rx, cache, buf);
385 else
386 return m32c_banked_read (reg, cache, buf);
387}
388
389
390/* Move the value of SB from BUF to CACHE. On bfd_mach_m32c, SB is a
391 banked register; on bfd_mach_m16c, it's not. */
392static enum register_status
393m32c_sb_write (struct m32c_reg *reg, struct regcache *cache, const gdb_byte *buf)
394{
395 if (gdbarch_bfd_arch_info (reg->arch)->mach == bfd_mach_m16c)
396 m32c_raw_write (reg->rx, cache, buf);
397 else
398 m32c_banked_write (reg, cache, buf);
399
400 return REG_VALID;
401}
402
403
404/* Assuming REG uses m32c_part_read and m32c_part_write, set *OFFSET_P
405 and *LEN_P to the offset and length, in bytes, of the part REG
406 occupies in its underlying register. The offset is from the
407 lower-addressed end, regardless of the architecture's endianness.
408 (The M32C family is always little-endian, but let's keep those
409 assumptions out of here.) */
410static void
411m32c_find_part (struct m32c_reg *reg, int *offset_p, int *len_p)
412{
413 /* The length of the containing register, of which REG is one part. */
414 int containing_len = reg->rx->type->length ();
415
416 /* The length of one "element" in our imaginary array. */
417 int elt_len = reg->type->length ();
418
419 /* The offset of REG's "element" from the least significant end of
420 the containing register. */
421 int elt_offset = reg->n * elt_len;
422
423 /* If we extend off the end, trim the length of the element. */
424 if (elt_offset + elt_len > containing_len)
425 {
426 elt_len = containing_len - elt_offset;
427 /* We shouldn't be declaring partial registers that go off the
428 end of their containing registers. */
429 gdb_assert (elt_len > 0);
430 }
431
432 /* Flip the offset around if we're big-endian. */
433 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
434 elt_offset = reg->rx->type->length () - elt_offset - elt_len;
435
436 *offset_p = elt_offset;
437 *len_p = elt_len;
438}
439
440
441/* Move the value of a partial register (r0h, intbl, etc.) from CACHE
442 to BUF. Treating the value of the register REG->rx as an array of
443 REG->type values, where higher indices refer to more significant
444 bits, read the value of the REG->n'th element. */
445static enum register_status
446m32c_part_read (struct m32c_reg *reg, readable_regcache *cache, gdb_byte *buf)
447{
448 int offset, len;
449
450 memset (buf, 0, reg->type->length ());
451 m32c_find_part (reg, &offset, &len);
452 return cache->cooked_read_part (reg->rx->num, offset, len, buf);
453}
454
455
456/* Move the value of a banked register from BUF to CACHE.
457 Treating the value of the register REG->rx as an array of REG->type
458 values, where higher indices refer to more significant bits, write
459 the value of the REG->n'th element. */
460static enum register_status
461m32c_part_write (struct m32c_reg *reg, struct regcache *cache,
462 const gdb_byte *buf)
463{
464 int offset, len;
465
466 m32c_find_part (reg, &offset, &len);
467 cache->cooked_write_part (reg->rx->num, offset, len, buf);
468
469 return REG_VALID;
470}
471
472
473/* Move the value of REG from CACHE to BUF. REG's value is the
474 concatenation of the values of the registers REG->rx and REG->ry,
475 with REG->rx contributing the more significant bits. */
476static enum register_status
477m32c_cat_read (struct m32c_reg *reg, readable_regcache *cache, gdb_byte *buf)
478{
479 int high_bytes = reg->rx->type->length ();
480 int low_bytes = reg->ry->type->length ();
481 enum register_status status;
482
483 gdb_assert (reg->type->length () == high_bytes + low_bytes);
484
485 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
486 {
487 status = cache->cooked_read (reg->rx->num, buf);
488 if (status == REG_VALID)
489 status = cache->cooked_read (reg->ry->num, buf + high_bytes);
490 }
491 else
492 {
493 status = cache->cooked_read (reg->rx->num, buf + low_bytes);
494 if (status == REG_VALID)
495 status = cache->cooked_read (reg->ry->num, buf);
496 }
497 return status;
498}
499
500
501/* Move the value of REG from CACHE to BUF. REG's value is the
502 concatenation of the values of the registers REG->rx and REG->ry,
503 with REG->rx contributing the more significant bits. */
504static enum register_status
505m32c_cat_write (struct m32c_reg *reg, struct regcache *cache,
506 const gdb_byte *buf)
507{
508 int high_bytes = reg->rx->type->length ();
509 int low_bytes = reg->ry->type->length ();
510
511 gdb_assert (reg->type->length () == high_bytes + low_bytes);
512
513 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
514 {
515 cache->cooked_write (reg->rx->num, buf);
516 cache->cooked_write (reg->ry->num, buf + high_bytes);
517 }
518 else
519 {
520 cache->cooked_write (reg->rx->num, buf + low_bytes);
521 cache->cooked_write (reg->ry->num, buf);
522 }
523
524 return REG_VALID;
525}
526
527
528/* Copy the value of the raw register REG from CACHE to BUF. REG is
529 the concatenation (from most significant to least) of r3, r2, r1,
530 and r0. */
531static enum register_status
532m32c_r3r2r1r0_read (struct m32c_reg *reg, readable_regcache *cache, gdb_byte *buf)
533{
534 gdbarch *arch = reg->arch;
535 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch);
536 int len = tdep->r0->type->length ();
537 enum register_status status;
538
539 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
540 {
541 status = cache->cooked_read (tdep->r0->num, buf + len * 3);
542 if (status == REG_VALID)
543 status = cache->cooked_read (tdep->r1->num, buf + len * 2);
544 if (status == REG_VALID)
545 status = cache->cooked_read (tdep->r2->num, buf + len * 1);
546 if (status == REG_VALID)
547 status = cache->cooked_read (tdep->r3->num, buf);
548 }
549 else
550 {
551 status = cache->cooked_read (tdep->r0->num, buf);
552 if (status == REG_VALID)
553 status = cache->cooked_read (tdep->r1->num, buf + len * 1);
554 if (status == REG_VALID)
555 status = cache->cooked_read (tdep->r2->num, buf + len * 2);
556 if (status == REG_VALID)
557 status = cache->cooked_read (tdep->r3->num, buf + len * 3);
558 }
559
560 return status;
561}
562
563
564/* Copy the value of the raw register REG from BUF to CACHE. REG is
565 the concatenation (from most significant to least) of r3, r2, r1,
566 and r0. */
567static enum register_status
568m32c_r3r2r1r0_write (struct m32c_reg *reg, struct regcache *cache,
569 const gdb_byte *buf)
570{
571 gdbarch *arch = reg->arch;
572 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch);
573 int len = tdep->r0->type->length ();
574
575 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
576 {
577 cache->cooked_write (tdep->r0->num, buf + len * 3);
578 cache->cooked_write (tdep->r1->num, buf + len * 2);
579 cache->cooked_write (tdep->r2->num, buf + len * 1);
580 cache->cooked_write (tdep->r3->num, buf);
581 }
582 else
583 {
584 cache->cooked_write (tdep->r0->num, buf);
585 cache->cooked_write (tdep->r1->num, buf + len * 1);
586 cache->cooked_write (tdep->r2->num, buf + len * 2);
587 cache->cooked_write (tdep->r3->num, buf + len * 3);
588 }
589
590 return REG_VALID;
591}
592
593
594static enum register_status
596 readable_regcache *cache,
597 int cookednum,
598 gdb_byte *buf)
599{
600 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch);
601 struct m32c_reg *reg;
602
603 gdb_assert (0 <= cookednum && cookednum < tdep->num_regs);
604 gdb_assert (arch == cache->arch ());
605 gdb_assert (arch == tdep->regs[cookednum].arch);
606 reg = &tdep->regs[cookednum];
607
608 return reg->read (reg, cache, buf);
609}
610
611
612static void
614 struct regcache *cache,
615 int cookednum,
616 const gdb_byte *buf)
617{
618 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch);
619 struct m32c_reg *reg;
620
621 gdb_assert (0 <= cookednum && cookednum < tdep->num_regs);
622 gdb_assert (arch == cache->arch ());
623 gdb_assert (arch == tdep->regs[cookednum].arch);
624 reg = &tdep->regs[cookednum];
625
626 reg->write (reg, cache, buf);
627}
628
629
630/* Add a register with the given fields to the end of ARCH's table.
631 Return a pointer to the newly added register. */
632static struct m32c_reg *
634 const char *name,
635 struct type *type,
636 int sim_num,
639 struct m32c_reg *rx,
640 struct m32c_reg *ry,
641 int n)
642{
643 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch);
644 struct m32c_reg *r = &tdep->regs[tdep->num_regs];
645
646 gdb_assert (tdep->num_regs < M32C_MAX_NUM_REGS);
647
648 r->name = name;
649 r->type = type;
650 r->arch = arch;
651 r->num = tdep->num_regs;
652 r->sim_num = sim_num;
653 r->dwarf_num = -1;
654 r->general_p = 0;
655 r->dma_p = 0;
656 r->system_p = 0;
657 r->save_restore_p = 0;
658 r->read = read;
659 r->write = write;
660 r->rx = rx;
661 r->ry = ry;
662 r->n = n;
663
664 tdep->num_regs++;
665
666 return r;
667}
668
669
670/* Record NUM as REG's DWARF register number. */
671static void
672set_dwarf_regnum (struct m32c_reg *reg, int num)
673{
674 gdb_assert (num < M32C_MAX_NUM_REGS);
675
676 /* Update the reg->DWARF mapping. Only count the first number
677 assigned to this register. */
678 if (reg->dwarf_num == -1)
679 reg->dwarf_num = num;
680
681 /* Update the DWARF->reg mapping. */
682 gdbarch *arch = reg->arch;
683 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch);
684 tdep->dwarf_regs[num] = reg;
685}
686
687
688/* Mark REG as a general-purpose register, and return it. */
689static struct m32c_reg *
691{
692 reg->general_p = 1;
693 return reg;
694}
695
696
697/* Mark REG as a DMA register. */
698static void
699mark_dma (struct m32c_reg *reg)
700{
701 reg->dma_p = 1;
702}
703
704
705/* Mark REG as a SYSTEM register, and return it. */
706static struct m32c_reg *
708{
709 reg->system_p = 1;
710 return reg;
711}
712
713
714/* Mark REG as a save-restore register, and return it. */
715static struct m32c_reg *
717{
718 reg->save_restore_p = 1;
719 return reg;
720}
721
722
723#define FLAGBIT_B 0x0010
724#define FLAGBIT_U 0x0080
725
726/* Handy macros for declaring registers. These all evaluate to
727 pointers to the register declared. Macros that define two
728 registers evaluate to a pointer to the first. */
729
730/* A raw register named NAME, with type TYPE and sim number SIM_NUM. */
731#define R(name, type, sim_num) \
732 (add_reg (arch, (name), (type), (sim_num), \
733 m32c_raw_read, m32c_raw_write, NULL, NULL, 0))
734
735/* The simulator register number for a raw register named NAME. */
736#define SIM(name) (m32c_sim_reg_ ## name)
737
738/* A raw unsigned 16-bit data register named NAME.
739 NAME should be an identifier, not a string. */
740#define R16U(name) \
741 (R(#name, tdep->uint16, SIM (name)))
742
743/* A raw data address register named NAME.
744 NAME should be an identifier, not a string. */
745#define RA(name) \
746 (R(#name, tdep->data_addr_reg_type, SIM (name)))
747
748/* A raw code address register named NAME. NAME should
749 be an identifier, not a string. */
750#define RC(name) \
751 (R(#name, tdep->code_addr_reg_type, SIM (name)))
752
753/* A pair of raw registers named NAME0 and NAME1, with type TYPE.
754 NAME should be an identifier, not a string. */
755#define RP(name, type) \
756 (R(#name "0", (type), SIM (name ## 0)), \
757 R(#name "1", (type), SIM (name ## 1)) - 1)
758
759/* A raw banked general-purpose data register named NAME.
760 NAME should be an identifier, not a string. */
761#define RBD(name) \
762 (R("", tdep->int16, SIM (name ## _bank0)), \
763 R("", tdep->int16, SIM (name ## _bank1)) - 1)
764
765/* A raw banked data address register named NAME.
766 NAME should be an identifier, not a string. */
767#define RBA(name) \
768 (R("", tdep->data_addr_reg_type, SIM (name ## _bank0)), \
769 R("", tdep->data_addr_reg_type, SIM (name ## _bank1)) - 1)
770
771/* A cooked register named NAME referring to a raw banked register
772 from the bank selected by the current value of FLG. RAW_PAIR
773 should be a pointer to the first register in the banked pair.
774 NAME must be an identifier, not a string. */
775#define CB(name, raw_pair) \
776 (add_reg (arch, #name, (raw_pair)->type, 0, \
777 m32c_banked_read, m32c_banked_write, \
778 (raw_pair), (raw_pair + 1), FLAGBIT_B))
779
780/* A pair of registers named NAMEH and NAMEL, of type TYPE, that
781 access the top and bottom halves of the register pointed to by
782 NAME. NAME should be an identifier. */
783#define CHL(name, type) \
784 (add_reg (arch, #name "h", (type), 0, \
785 m32c_part_read, m32c_part_write, name, NULL, 1), \
786 add_reg (arch, #name "l", (type), 0, \
787 m32c_part_read, m32c_part_write, name, NULL, 0) - 1)
788
789/* A register constructed by concatenating the two registers HIGH and
790 LOW, whose name is HIGHLOW and whose type is TYPE. */
791#define CCAT(high, low, type) \
792 (add_reg (arch, #high #low, (type), 0, \
793 m32c_cat_read, m32c_cat_write, (high), (low), 0))
794
795/* Abbreviations for marking register group membership. */
796#define G(reg) (mark_general (reg))
797#define S(reg) (mark_system (reg))
798#define DMA(reg) (mark_dma (reg))
799
800
801/* Construct the register set for ARCH. */
802static void
804{
805 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch);
806 int mach = gdbarch_bfd_arch_info (arch)->mach;
807 int num_raw_regs;
808 int num_cooked_regs;
809
810 struct m32c_reg *r0;
811 struct m32c_reg *r1;
812 struct m32c_reg *r2;
813 struct m32c_reg *r3;
814 struct m32c_reg *a0;
815 struct m32c_reg *a1;
816 struct m32c_reg *fb;
817 struct m32c_reg *sb;
818 struct m32c_reg *sp;
819 struct m32c_reg *r0hl;
820 struct m32c_reg *r1hl;
821 struct m32c_reg *r2r0;
822 struct m32c_reg *r3r1;
823 struct m32c_reg *r3r1r2r0;
824 struct m32c_reg *r3r2r1r0;
825 struct m32c_reg *a1a0;
826
827 struct m32c_reg *raw_r0_pair = RBD (r0);
828 struct m32c_reg *raw_r1_pair = RBD (r1);
829 struct m32c_reg *raw_r2_pair = RBD (r2);
830 struct m32c_reg *raw_r3_pair = RBD (r3);
831 struct m32c_reg *raw_a0_pair = RBA (a0);
832 struct m32c_reg *raw_a1_pair = RBA (a1);
833 struct m32c_reg *raw_fb_pair = RBA (fb);
834
835 /* sb is banked on the bfd_mach_m32c, but not on bfd_mach_m16c.
836 We always declare both raw registers, and deal with the distinction
837 in the pseudoregister. */
838 struct m32c_reg *raw_sb_pair = RBA (sb);
839
840 struct m32c_reg *usp = S (RA (usp));
841 struct m32c_reg *isp = S (RA (isp));
842 struct m32c_reg *intb = S (RC (intb));
843 struct m32c_reg *pc = G (RC (pc));
844 struct m32c_reg *flg = G (R16U (flg));
845
846 if (mach == bfd_mach_m32c)
847 {
848 S (R16U (svf));
849 S (RC (svp));
850 S (RC (vct));
851
852 DMA (RP (dmd, tdep->uint8));
853 DMA (RP (dct, tdep->uint16));
854 DMA (RP (drc, tdep->uint16));
855 DMA (RP (dma, tdep->data_addr_reg_type));
856 DMA (RP (dsa, tdep->data_addr_reg_type));
857 DMA (RP (dra, tdep->data_addr_reg_type));
858 }
859
860 num_raw_regs = tdep->num_regs;
861
862 r0 = G (CB (r0, raw_r0_pair));
863 r1 = G (CB (r1, raw_r1_pair));
864 r2 = G (CB (r2, raw_r2_pair));
865 r3 = G (CB (r3, raw_r3_pair));
866 a0 = G (CB (a0, raw_a0_pair));
867 a1 = G (CB (a1, raw_a1_pair));
868 fb = G (CB (fb, raw_fb_pair));
869
870 /* sb is banked on the bfd_mach_m32c, but not on bfd_mach_m16c.
871 Specify custom read/write functions that do the right thing. */
872 sb = G (add_reg (arch, "sb", raw_sb_pair->type, 0,
874 raw_sb_pair, raw_sb_pair + 1, 0));
875
876 /* The current sp is either usp or isp, depending on the value of
877 the FLG register's U bit. */
878 sp = G (add_reg (arch, "sp", usp->type, 0,
880 isp, usp, FLAGBIT_U));
881
882 r0hl = CHL (r0, tdep->int8);
883 r1hl = CHL (r1, tdep->int8);
884 CHL (r2, tdep->int8);
885 CHL (r3, tdep->int8);
886 CHL (intb, tdep->int16);
887
888 r2r0 = CCAT (r2, r0, tdep->int32);
889 r3r1 = CCAT (r3, r1, tdep->int32);
890 r3r1r2r0 = CCAT (r3r1, r2r0, tdep->int64);
891
892 r3r2r1r0
893 = add_reg (arch, "r3r2r1r0", tdep->int64, 0,
895
896 if (mach == bfd_mach_m16c)
897 a1a0 = CCAT (a1, a0, tdep->int32);
898 else
899 a1a0 = NULL;
900
901 num_cooked_regs = tdep->num_regs - num_raw_regs;
902
903 tdep->pc = pc;
904 tdep->flg = flg;
905 tdep->r0 = r0;
906 tdep->r1 = r1;
907 tdep->r2 = r2;
908 tdep->r3 = r3;
909 tdep->r2r0 = r2r0;
910 tdep->r3r2r1r0 = r3r2r1r0;
911 tdep->r3r1r2r0 = r3r1r2r0;
912 tdep->a0 = a0;
913 tdep->a1 = a1;
914 tdep->sb = sb;
915 tdep->fb = fb;
916 tdep->sp = sp;
917
918 /* Set up the DWARF register table. */
919 memset (tdep->dwarf_regs, 0, sizeof (tdep->dwarf_regs));
920 set_dwarf_regnum (r0hl + 1, 0x01);
921 set_dwarf_regnum (r0hl + 0, 0x02);
922 set_dwarf_regnum (r1hl + 1, 0x03);
923 set_dwarf_regnum (r1hl + 0, 0x04);
924 set_dwarf_regnum (r0, 0x05);
925 set_dwarf_regnum (r1, 0x06);
926 set_dwarf_regnum (r2, 0x07);
927 set_dwarf_regnum (r3, 0x08);
928 set_dwarf_regnum (a0, 0x09);
929 set_dwarf_regnum (a1, 0x0a);
930 set_dwarf_regnum (fb, 0x0b);
931 set_dwarf_regnum (sp, 0x0c);
932 set_dwarf_regnum (pc, 0x0d); /* GCC's invention */
933 set_dwarf_regnum (sb, 0x13);
934 set_dwarf_regnum (r2r0, 0x15);
935 set_dwarf_regnum (r3r1, 0x16);
936 if (a1a0)
937 set_dwarf_regnum (a1a0, 0x17);
938
939 /* Enumerate the save/restore register group.
940
941 The regcache_save and regcache_restore functions apply their read
942 function to each register in this group.
943
944 Since frame_pop supplies frame_unwind_register as its read
945 function, the registers meaningful to the Dwarf unwinder need to
946 be in this group.
947
948 On the other hand, when we make inferior calls, save_inferior_status
949 and restore_inferior_status use them to preserve the current register
950 values across the inferior call. For this, you'd kind of like to
951 preserve all the raw registers, to protect the interrupted code from
952 any sort of bank switching the callee might have done. But we handle
953 those cases so badly anyway --- for example, it matters whether we
954 restore FLG before or after we restore the general-purpose registers,
955 but there's no way to express that --- that it isn't worth worrying
956 about.
957
958 We omit control registers like inthl: if you call a function that
959 changes those, it's probably because you wanted that change to be
960 visible to the interrupted code. */
971 mark_save_restore (flg);
972
973 set_gdbarch_num_regs (arch, num_raw_regs);
974 set_gdbarch_num_pseudo_regs (arch, num_cooked_regs);
985
987}
988
989
990
991/* Breakpoints. */
992constexpr gdb_byte m32c_break_insn[] = { 0x00 }; /* brk */
993
994typedef BP_MANIPULATION (m32c_break_insn) m32c_breakpoint;
995
996
997/* Prologue analysis. */
998
999enum m32c_prologue_kind
1000{
1001 /* This function uses a frame pointer. */
1002 prologue_with_frame_ptr,
1003
1004 /* This function has no frame pointer. */
1005 prologue_sans_frame_ptr,
1006
1007 /* This function sets up the stack, so its frame is the first
1008 frame on the stack. */
1009 prologue_first_frame
1010};
1011
1013{
1014 /* For consistency with the DWARF 2 .debug_frame info generated by
1015 GCC, a frame's CFA is the address immediately after the saved
1016 return address. */
1017
1018 /* The architecture for which we generated this prologue info. */
1019 struct gdbarch *arch;
1020
1021 enum m32c_prologue_kind kind;
1022
1023 /* If KIND is prologue_with_frame_ptr, this is the offset from the
1024 CFA to where the frame pointer points. This is always zero or
1025 negative. */
1027
1028 /* If KIND is prologue_sans_frame_ptr, the offset from the CFA to
1029 the stack pointer --- always zero or negative.
1030
1031 Calling this a "size" is a bit misleading, but given that the
1032 stack grows downwards, using offsets for everything keeps one
1033 from going completely sign-crazy: you never change anything's
1034 sign for an ADD instruction; always change the second operand's
1035 sign for a SUB instruction; and everything takes care of
1036 itself.
1037
1038 Functions that use alloca don't have a constant frame size. But
1039 they always have frame pointers, so we must use that to find the
1040 CFA (and perhaps to unwind the stack pointer). */
1041 LONGEST frame_size;
1042
1043 /* The address of the first instruction at which the frame has been
1044 set up and the arguments are where the debug info says they are
1045 --- as best as we can tell. */
1046 CORE_ADDR prologue_end;
1047
1048 /* reg_offset[R] is the offset from the CFA at which register R is
1049 saved, or 1 if register R has not been saved. (Real values are
1050 always zero or negative.) */
1052};
1053
1054
1055/* The longest I've seen, anyway. */
1056#define M32C_MAX_INSN_LEN (9)
1057
1058/* Processor state, for the prologue analyzer. */
1060{
1061 struct gdbarch *arch;
1067
1068 /* Bytes from the current PC, the address they were read from,
1069 and the address of the next unconsumed byte. */
1071 CORE_ADDR scan_pc, next_addr;
1072};
1073
1074
1075/* Push VALUE on STATE's stack, occupying SIZE bytes. Return zero if
1076 all went well, or non-zero if simulating the action would trash our
1077 state. */
1078static int
1080{
1081 if (state->stack->store_would_trash (state->sp))
1082 return 1;
1083
1084 state->sp = pv_add_constant (state->sp, -size);
1085 state->stack->store (state->sp, size, value);
1086
1087 return 0;
1088}
1089
1090
1097
1098/* A source or destination location for an m16c or m32c
1099 instruction. */
1101{
1102 /* If srcdest_reg, the location is a register pointed to by REG.
1103 If srcdest_partial_reg, the location is part of a register pointed
1104 to by REG. We don't try to handle this too well.
1105 If srcdest_mem, the location is memory whose address is ADDR. */
1108};
1109
1110
1111/* Return the SIZE-byte value at LOC in STATE. */
1112static pv_t
1114{
1115 if (loc.kind == srcdest_mem)
1116 return state->stack->fetch (loc.addr, size);
1117 else if (loc.kind == srcdest_partial_reg)
1118 return pv_unknown ();
1119 else
1120 return *loc.reg;
1121}
1122
1123
1124/* Write VALUE, a SIZE-byte value, to LOC in STATE. Return zero if
1125 all went well, or non-zero if simulating the store would trash our
1126 state. */
1127static int
1129 pv_t value, int size)
1130{
1131 if (loc.kind == srcdest_mem)
1132 {
1133 if (state->stack->store_would_trash (loc.addr))
1134 return 1;
1135 state->stack->store (loc.addr, size, value);
1136 }
1137 else if (loc.kind == srcdest_partial_reg)
1138 *loc.reg = pv_unknown ();
1139 else
1140 *loc.reg = value;
1141
1142 return 0;
1143}
1144
1145
1146static int
1148{
1149 int mask = 1 << (bits - 1);
1150 return (v ^ mask) - mask;
1151}
1152
1153static unsigned int
1155{
1156 gdb_assert (st->next_addr - st->scan_pc < sizeof (st->insn));
1157 return st->insn[st->next_addr++ - st->scan_pc];
1158}
1159
1160static int
1162{
1163 return m32c_next_byte (st);
1164}
1165
1166
1167static int
1169{
1170 return m32c_sign_ext (m32c_next_byte (st), 8);
1171}
1172
1173
1174static int
1176{
1177 int low = m32c_next_byte (st);
1178 int high = m32c_next_byte (st);
1179
1180 return low + (high << 8);
1181}
1182
1183
1184static int
1186{
1187 int low = m32c_next_byte (st);
1188 int high = m32c_next_byte (st);
1189
1190 return m32c_sign_ext (low + (high << 8), 16);
1191}
1192
1193
1194static int
1196{
1197 int low = m32c_next_byte (st);
1198 int mid = m32c_next_byte (st);
1199 int high = m32c_next_byte (st);
1200
1201 return low + (mid << 8) + (high << 16);
1202}
1203
1204
1205/* Extract the 'source' field from an m32c MOV.size:G-format instruction. */
1206static int
1207m32c_get_src23 (unsigned char *i)
1208{
1209 return (((i[0] & 0x70) >> 2)
1210 | ((i[1] & 0x30) >> 4));
1211}
1212
1213
1214/* Extract the 'dest' field from an m32c MOV.size:G-format instruction. */
1215static int
1216m32c_get_dest23 (unsigned char *i)
1217{
1218 return (((i[0] & 0x0e) << 1)
1219 | ((i[1] & 0xc0) >> 6));
1220}
1221
1222
1223static struct srcdest
1225 int code, int size)
1226{
1227 struct srcdest sd;
1228
1229 if (code < 6)
1230 sd.kind = (size == 2 ? srcdest_reg : srcdest_partial_reg);
1231 else
1232 sd.kind = srcdest_mem;
1233
1234 sd.addr = pv_unknown ();
1235 sd.reg = 0;
1236
1237 switch (code)
1238 {
1239 case 0x0: sd.reg = &st->r0; break;
1240 case 0x1: sd.reg = (size == 1 ? &st->r0 : &st->r1); break;
1241 case 0x2: sd.reg = (size == 1 ? &st->r1 : &st->r2); break;
1242 case 0x3: sd.reg = (size == 1 ? &st->r1 : &st->r3); break;
1243
1244 case 0x4: sd.reg = &st->a0; break;
1245 case 0x5: sd.reg = &st->a1; break;
1246
1247 case 0x6: sd.addr = st->a0; break;
1248 case 0x7: sd.addr = st->a1; break;
1249
1250 case 0x8: sd.addr = pv_add_constant (st->a0, m32c_udisp8 (st)); break;
1251 case 0x9: sd.addr = pv_add_constant (st->a1, m32c_udisp8 (st)); break;
1252 case 0xa: sd.addr = pv_add_constant (st->sb, m32c_udisp8 (st)); break;
1253 case 0xb: sd.addr = pv_add_constant (st->fb, m32c_sdisp8 (st)); break;
1254
1255 case 0xc: sd.addr = pv_add_constant (st->a0, m32c_udisp16 (st)); break;
1256 case 0xd: sd.addr = pv_add_constant (st->a1, m32c_udisp16 (st)); break;
1257 case 0xe: sd.addr = pv_add_constant (st->sb, m32c_udisp16 (st)); break;
1258 case 0xf: sd.addr = pv_constant (m32c_udisp16 (st)); break;
1259
1260 default:
1261 gdb_assert_not_reached ("unexpected srcdest4");
1262 }
1263
1264 return sd;
1265}
1266
1267
1268static struct srcdest
1269m32c_decode_sd23 (struct m32c_pv_state *st, int code, int size, int ind)
1270{
1271 struct srcdest sd;
1272
1273 sd.addr = pv_unknown ();
1274 sd.reg = 0;
1275
1276 switch (code)
1277 {
1278 case 0x12:
1279 case 0x13:
1280 case 0x10:
1281 case 0x11:
1282 sd.kind = (size == 1) ? srcdest_partial_reg : srcdest_reg;
1283 break;
1284
1285 case 0x02:
1286 case 0x03:
1287 sd.kind = (size == 4) ? srcdest_reg : srcdest_partial_reg;
1288 break;
1289
1290 default:
1291 sd.kind = srcdest_mem;
1292 break;
1293
1294 }
1295
1296 switch (code)
1297 {
1298 case 0x12: sd.reg = &st->r0; break;
1299 case 0x13: sd.reg = &st->r1; break;
1300 case 0x10: sd.reg = ((size == 1) ? &st->r0 : &st->r2); break;
1301 case 0x11: sd.reg = ((size == 1) ? &st->r1 : &st->r3); break;
1302 case 0x02: sd.reg = &st->a0; break;
1303 case 0x03: sd.reg = &st->a1; break;
1304
1305 case 0x00: sd.addr = st->a0; break;
1306 case 0x01: sd.addr = st->a1; break;
1307 case 0x04: sd.addr = pv_add_constant (st->a0, m32c_udisp8 (st)); break;
1308 case 0x05: sd.addr = pv_add_constant (st->a1, m32c_udisp8 (st)); break;
1309 case 0x06: sd.addr = pv_add_constant (st->sb, m32c_udisp8 (st)); break;
1310 case 0x07: sd.addr = pv_add_constant (st->fb, m32c_sdisp8 (st)); break;
1311 case 0x08: sd.addr = pv_add_constant (st->a0, m32c_udisp16 (st)); break;
1312 case 0x09: sd.addr = pv_add_constant (st->a1, m32c_udisp16 (st)); break;
1313 case 0x0a: sd.addr = pv_add_constant (st->sb, m32c_udisp16 (st)); break;
1314 case 0x0b: sd.addr = pv_add_constant (st->fb, m32c_sdisp16 (st)); break;
1315 case 0x0c: sd.addr = pv_add_constant (st->a0, m32c_udisp24 (st)); break;
1316 case 0x0d: sd.addr = pv_add_constant (st->a1, m32c_udisp24 (st)); break;
1317 case 0x0f: sd.addr = pv_constant (m32c_udisp16 (st)); break;
1318 case 0x0e: sd.addr = pv_constant (m32c_udisp24 (st)); break;
1319 default:
1320 gdb_assert_not_reached ("unexpected sd23");
1321 }
1322
1323 if (ind)
1324 {
1325 sd.addr = m32c_srcdest_fetch (st, sd, 4);
1326 sd.kind = srcdest_mem;
1327 }
1328
1329 return sd;
1330}
1331
1332
1333/* The r16c and r32c machines have instructions with similar
1334 semantics, but completely different machine language encodings. So
1335 we break out the semantics into their own functions, and leave
1336 machine-specific decoding in m32c_analyze_prologue.
1337
1338 The following functions all expect their arguments already decoded,
1339 and they all return zero if analysis should continue past this
1340 instruction, or non-zero if analysis should stop. */
1341
1342
1343/* Simulate an 'enter SIZE' instruction in STATE. */
1344static int
1346{
1347 /* If simulating this store would require us to forget
1348 everything we know about the stack frame in the name of
1349 accuracy, it would be better to just quit now. */
1350 if (state->stack->store_would_trash (state->sp))
1351 return 1;
1352
1353 gdbarch *arch = state->arch;
1354 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch);
1355 if (m32c_pv_push (state, state->fb, tdep->push_addr_bytes))
1356 return 1;
1357
1358 state->fb = state->sp;
1359 state->sp = pv_add_constant (state->sp, -size);
1360
1361 return 0;
1362}
1363
1364
1365static int
1367 int bit, int src, int size)
1368{
1369 if (bit & src)
1370 {
1371 if (m32c_pv_push (state, reg, size))
1372 return 1;
1373 }
1374
1375 return 0;
1376}
1377
1378
1379/* Simulate a 'pushm SRC' instruction in STATE. */
1380static int
1381m32c_pv_pushm (struct m32c_pv_state *state, int src)
1382{
1383 gdbarch *arch = state->arch;
1384 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch);
1385
1386 /* The bits in SRC indicating which registers to save are:
1387 r0 r1 r2 r3 a0 a1 sb fb */
1388 return
1389 ( m32c_pv_pushm_one (state, state->fb, 0x01, src, tdep->push_addr_bytes)
1390 || m32c_pv_pushm_one (state, state->sb, 0x02, src, tdep->push_addr_bytes)
1391 || m32c_pv_pushm_one (state, state->a1, 0x04, src, tdep->push_addr_bytes)
1392 || m32c_pv_pushm_one (state, state->a0, 0x08, src, tdep->push_addr_bytes)
1393 || m32c_pv_pushm_one (state, state->r3, 0x10, src, 2)
1394 || m32c_pv_pushm_one (state, state->r2, 0x20, src, 2)
1395 || m32c_pv_pushm_one (state, state->r1, 0x40, src, 2)
1396 || m32c_pv_pushm_one (state, state->r0, 0x80, src, 2));
1397}
1398
1399/* Return non-zero if VALUE is the first incoming argument register. */
1400
1401static int
1403{
1404 gdbarch *arch = state->arch;
1405 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch);
1406
1407 return (value.kind == pvk_register
1408 && (gdbarch_bfd_arch_info (state->arch)->mach == bfd_mach_m16c
1409 ? (value.reg == tdep->r1->num)
1410 : (value.reg == tdep->r0->num))
1411 && value.k == 0);
1412}
1413
1414/* Return non-zero if VALUE is an incoming argument register. */
1415
1416static int
1418{
1419 gdbarch *arch = state->arch;
1420 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch);
1421
1422 return (value.kind == pvk_register
1423 && (gdbarch_bfd_arch_info (state->arch)->mach == bfd_mach_m16c
1424 ? (value.reg == tdep->r1->num || value.reg == tdep->r2->num)
1425 : (value.reg == tdep->r0->num))
1426 && value.k == 0);
1427}
1428
1429/* Return non-zero if a store of VALUE to LOC is probably spilling an
1430 argument register to its stack slot in STATE. Such instructions
1431 should be included in the prologue, if possible.
1432
1433 The store is a spill if:
1434 - the value being stored is the original value of an argument register;
1435 - the value has not already been stored somewhere in STACK; and
1436 - LOC is a stack slot (e.g., a memory location whose address is
1437 relative to the original value of the SP). */
1438
1439static int
1441 struct srcdest loc,
1442 pv_t value)
1443{
1444 gdbarch *arch = st->arch;
1445 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch);
1446
1447 return (m32c_is_arg_reg (st, value)
1448 && loc.kind == srcdest_mem
1449 && pv_is_register (loc.addr, tdep->sp->num)
1450 && ! st->stack->find_reg (st->arch, value.reg, 0));
1451}
1452
1453/* Return non-zero if a store of VALUE to LOC is probably
1454 copying the struct return address into an address register
1455 for immediate use. This is basically a "spill" into the
1456 address register, instead of onto the stack.
1457
1458 The prerequisites are:
1459 - value being stored is original value of the FIRST arg register;
1460 - value has not already been stored on stack; and
1461 - LOC is an address register (a0 or a1). */
1462
1463static int
1465 struct srcdest loc,
1466 pv_t value)
1467{
1468 gdbarch *arch = st->arch;
1469 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch);
1470
1471 return (m32c_is_1st_arg_reg (st, value)
1472 && !st->stack->find_reg (st->arch, value.reg, 0)
1473 && loc.kind == srcdest_reg
1474 && (pv_is_register (*loc.reg, tdep->a0->num)
1475 || pv_is_register (*loc.reg, tdep->a1->num)));
1476}
1477
1478/* Return non-zero if a 'pushm' saving the registers indicated by SRC
1479 was a register save:
1480 - all the named registers should have their original values, and
1481 - the stack pointer should be at a constant offset from the
1482 original stack pointer. */
1483static int
1485{
1486 gdbarch *arch = st->arch;
1487 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch);
1488
1489 /* The bits in SRC indicating which registers to save are:
1490 r0 r1 r2 r3 a0 a1 sb fb */
1491 return
1492 (pv_is_register (st->sp, tdep->sp->num)
1493 && (! (src & 0x01) || pv_is_register_k (st->fb, tdep->fb->num, 0))
1494 && (! (src & 0x02) || pv_is_register_k (st->sb, tdep->sb->num, 0))
1495 && (! (src & 0x04) || pv_is_register_k (st->a1, tdep->a1->num, 0))
1496 && (! (src & 0x08) || pv_is_register_k (st->a0, tdep->a0->num, 0))
1497 && (! (src & 0x10) || pv_is_register_k (st->r3, tdep->r3->num, 0))
1498 && (! (src & 0x20) || pv_is_register_k (st->r2, tdep->r2->num, 0))
1499 && (! (src & 0x40) || pv_is_register_k (st->r1, tdep->r1->num, 0))
1500 && (! (src & 0x80) || pv_is_register_k (st->r0, tdep->r0->num, 0)));
1501}
1502
1503
1504/* Function for finding saved registers in a 'struct pv_area'; we pass
1505 this to pv_area::scan.
1506
1507 If VALUE is a saved register, ADDR says it was saved at a constant
1508 offset from the frame base, and SIZE indicates that the whole
1509 register was saved, record its offset in RESULT_UNTYPED. */
1510static void
1511check_for_saved (void *prologue_untyped, pv_t addr, CORE_ADDR size, pv_t value)
1512{
1513 struct m32c_prologue *prologue = (struct m32c_prologue *) prologue_untyped;
1514 struct gdbarch *arch = prologue->arch;
1515 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch);
1516
1517 /* Is this the unchanged value of some register being saved on the
1518 stack? */
1519 if (value.kind == pvk_register
1520 && value.k == 0
1521 && pv_is_register (addr, tdep->sp->num))
1522 {
1523 /* Some registers require special handling: they're saved as a
1524 larger value than the register itself. */
1525 CORE_ADDR saved_size = register_size (arch, value.reg);
1526
1527 if (value.reg == tdep->pc->num)
1528 saved_size = tdep->ret_addr_bytes;
1529 else if (register_type (arch, value.reg)
1530 == tdep->data_addr_reg_type)
1531 saved_size = tdep->push_addr_bytes;
1532
1533 if (size == saved_size)
1534 {
1535 /* Find which end of the saved value corresponds to our
1536 register. */
1537 if (gdbarch_byte_order (arch) == BFD_ENDIAN_BIG)
1538 prologue->reg_offset[value.reg]
1539 = (addr.k + saved_size - register_size (arch, value.reg));
1540 else
1541 prologue->reg_offset[value.reg] = addr.k;
1542 }
1543 }
1544}
1545
1546
1547/* Analyze the function prologue for ARCH at START, going no further
1548 than LIMIT, and place a description of what we found in
1549 PROLOGUE. */
1550static void
1552 CORE_ADDR start, CORE_ADDR limit,
1553 struct m32c_prologue *prologue)
1554{
1555 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch);
1556 unsigned long mach = gdbarch_bfd_arch_info (arch)->mach;
1557 CORE_ADDR after_last_frame_related_insn;
1558 struct m32c_pv_state st;
1559
1560 st.arch = arch;
1561 st.r0 = pv_register (tdep->r0->num, 0);
1562 st.r1 = pv_register (tdep->r1->num, 0);
1563 st.r2 = pv_register (tdep->r2->num, 0);
1564 st.r3 = pv_register (tdep->r3->num, 0);
1565 st.a0 = pv_register (tdep->a0->num, 0);
1566 st.a1 = pv_register (tdep->a1->num, 0);
1567 st.sb = pv_register (tdep->sb->num, 0);
1568 st.fb = pv_register (tdep->fb->num, 0);
1569 st.sp = pv_register (tdep->sp->num, 0);
1570 st.pc = pv_register (tdep->pc->num, 0);
1572 st.stack = &stack;
1573
1574 /* Record that the call instruction has saved the return address on
1575 the stack. */
1576 m32c_pv_push (&st, st.pc, tdep->ret_addr_bytes);
1577
1578 memset (prologue, 0, sizeof (*prologue));
1579 prologue->arch = arch;
1580 {
1581 int i;
1582 for (i = 0; i < M32C_MAX_NUM_REGS; i++)
1583 prologue->reg_offset[i] = 1;
1584 }
1585
1586 st.scan_pc = after_last_frame_related_insn = start;
1587
1588 while (st.scan_pc < limit)
1589 {
1590 pv_t pre_insn_fb = st.fb;
1591 pv_t pre_insn_sp = st.sp;
1592
1593 /* In theory we could get in trouble by trying to read ahead
1594 here, when we only know we're expecting one byte. In
1595 practice I doubt anyone will care, and it makes the rest of
1596 the code easier. */
1597 if (target_read_memory (st.scan_pc, st.insn, sizeof (st.insn)))
1598 /* If we can't fetch the instruction from memory, stop here
1599 and hope for the best. */
1600 break;
1601 st.next_addr = st.scan_pc;
1602
1603 /* The assembly instructions are written as they appear in the
1604 section of the processor manuals that describe the
1605 instruction encodings.
1606
1607 When a single assembly language instruction has several
1608 different machine-language encodings, the manual
1609 distinguishes them by a number in parens, before the
1610 mnemonic. Those numbers are included, as well.
1611
1612 The srcdest decoding instructions have the same names as the
1613 analogous functions in the simulator. */
1614 if (mach == bfd_mach_m16c)
1615 {
1616 /* (1) ENTER #imm8 */
1617 if (st.insn[0] == 0x7c && st.insn[1] == 0xf2)
1618 {
1619 if (m32c_pv_enter (&st, st.insn[2]))
1620 break;
1621 st.next_addr += 3;
1622 }
1623 /* (1) PUSHM src */
1624 else if (st.insn[0] == 0xec)
1625 {
1626 int src = st.insn[1];
1627 if (m32c_pv_pushm (&st, src))
1628 break;
1629 st.next_addr += 2;
1630
1631 if (m32c_pushm_is_reg_save (&st, src))
1632 after_last_frame_related_insn = st.next_addr;
1633 }
1634
1635 /* (6) MOV.size:G src, dest */
1636 else if ((st.insn[0] & 0xfe) == 0x72)
1637 {
1638 int size = (st.insn[0] & 0x01) ? 2 : 1;
1639 struct srcdest src;
1640 struct srcdest dest;
1641 pv_t src_value;
1642 st.next_addr += 2;
1643
1644 src
1645 = m32c_decode_srcdest4 (&st, (st.insn[1] >> 4) & 0xf, size);
1646 dest
1647 = m32c_decode_srcdest4 (&st, st.insn[1] & 0xf, size);
1648 src_value = m32c_srcdest_fetch (&st, src, size);
1649
1650 if (m32c_is_arg_spill (&st, dest, src_value))
1651 after_last_frame_related_insn = st.next_addr;
1652 else if (m32c_is_struct_return (&st, dest, src_value))
1653 after_last_frame_related_insn = st.next_addr;
1654
1655 if (m32c_srcdest_store (&st, dest, src_value, size))
1656 break;
1657 }
1658
1659 /* (1) LDC #IMM16, sp */
1660 else if (st.insn[0] == 0xeb
1661 && st.insn[1] == 0x50)
1662 {
1663 st.next_addr += 2;
1664 st.sp = pv_constant (m32c_udisp16 (&st));
1665 }
1666
1667 else
1668 /* We've hit some instruction we don't know how to simulate.
1669 Strictly speaking, we should set every value we're
1670 tracking to "unknown". But we'll be optimistic, assume
1671 that we have enough information already, and stop
1672 analysis here. */
1673 break;
1674 }
1675 else
1676 {
1677 int src_indirect = 0;
1678 int dest_indirect = 0;
1679 int i = 0;
1680
1681 gdb_assert (mach == bfd_mach_m32c);
1682
1683 /* Check for prefix bytes indicating indirect addressing. */
1684 if (st.insn[0] == 0x41)
1685 {
1686 src_indirect = 1;
1687 i++;
1688 }
1689 else if (st.insn[0] == 0x09)
1690 {
1691 dest_indirect = 1;
1692 i++;
1693 }
1694 else if (st.insn[0] == 0x49)
1695 {
1696 src_indirect = dest_indirect = 1;
1697 i++;
1698 }
1699
1700 /* (1) ENTER #imm8 */
1701 if (st.insn[i] == 0xec)
1702 {
1703 if (m32c_pv_enter (&st, st.insn[i + 1]))
1704 break;
1705 st.next_addr += 2;
1706 }
1707
1708 /* (1) PUSHM src */
1709 else if (st.insn[i] == 0x8f)
1710 {
1711 int src = st.insn[i + 1];
1712 if (m32c_pv_pushm (&st, src))
1713 break;
1714 st.next_addr += 2;
1715
1716 if (m32c_pushm_is_reg_save (&st, src))
1717 after_last_frame_related_insn = st.next_addr;
1718 }
1719
1720 /* (7) MOV.size:G src, dest */
1721 else if ((st.insn[i] & 0x80) == 0x80
1722 && (st.insn[i + 1] & 0x0f) == 0x0b
1723 && m32c_get_src23 (&st.insn[i]) < 20
1724 && m32c_get_dest23 (&st.insn[i]) < 20)
1725 {
1726 struct srcdest src;
1727 struct srcdest dest;
1728 pv_t src_value;
1729 int bw = st.insn[i] & 0x01;
1730 int size = bw ? 2 : 1;
1731 st.next_addr += 2;
1732
1733 src
1734 = m32c_decode_sd23 (&st, m32c_get_src23 (&st.insn[i]),
1735 size, src_indirect);
1736 dest
1737 = m32c_decode_sd23 (&st, m32c_get_dest23 (&st.insn[i]),
1738 size, dest_indirect);
1739 src_value = m32c_srcdest_fetch (&st, src, size);
1740
1741 if (m32c_is_arg_spill (&st, dest, src_value))
1742 after_last_frame_related_insn = st.next_addr;
1743
1744 if (m32c_srcdest_store (&st, dest, src_value, size))
1745 break;
1746 }
1747 /* (2) LDC #IMM24, sp */
1748 else if (st.insn[i] == 0xd5
1749 && st.insn[i + 1] == 0x29)
1750 {
1751 st.next_addr += 2;
1752 st.sp = pv_constant (m32c_udisp24 (&st));
1753 }
1754 else
1755 /* We've hit some instruction we don't know how to simulate.
1756 Strictly speaking, we should set every value we're
1757 tracking to "unknown". But we'll be optimistic, assume
1758 that we have enough information already, and stop
1759 analysis here. */
1760 break;
1761 }
1762
1763 /* If this instruction changed the FB or decreased the SP (i.e.,
1764 allocated more stack space), then this may be a good place to
1765 declare the prologue finished. However, there are some
1766 exceptions:
1767
1768 - If the instruction just changed the FB back to its original
1769 value, then that's probably a restore instruction. The
1770 prologue should definitely end before that.
1771
1772 - If the instruction increased the value of the SP (that is,
1773 shrunk the frame), then it's probably part of a frame
1774 teardown sequence, and the prologue should end before
1775 that. */
1776
1777 if (! pv_is_identical (st.fb, pre_insn_fb))
1778 {
1779 if (! pv_is_register_k (st.fb, tdep->fb->num, 0))
1780 after_last_frame_related_insn = st.next_addr;
1781 }
1782 else if (! pv_is_identical (st.sp, pre_insn_sp))
1783 {
1784 /* The comparison of the constants looks odd, there, because
1785 .k is unsigned. All it really means is that the SP is
1786 lower than it was before the instruction. */
1787 if ( pv_is_register (pre_insn_sp, tdep->sp->num)
1788 && pv_is_register (st.sp, tdep->sp->num)
1789 && ((pre_insn_sp.k - st.sp.k) < (st.sp.k - pre_insn_sp.k)))
1790 after_last_frame_related_insn = st.next_addr;
1791 }
1792
1793 st.scan_pc = st.next_addr;
1794 }
1795
1796 /* Did we load a constant value into the stack pointer? */
1797 if (pv_is_constant (st.sp))
1798 prologue->kind = prologue_first_frame;
1799
1800 /* Alternatively, did we initialize the frame pointer? Remember
1801 that the CFA is the address after the return address. */
1802 if (pv_is_register (st.fb, tdep->sp->num))
1803 {
1804 prologue->kind = prologue_with_frame_ptr;
1805 prologue->frame_ptr_offset = st.fb.k;
1806 }
1807
1808 /* Is the frame size a known constant? Remember that frame_size is
1809 actually the offset from the CFA to the SP (i.e., a negative
1810 value). */
1811 else if (pv_is_register (st.sp, tdep->sp->num))
1812 {
1813 prologue->kind = prologue_sans_frame_ptr;
1814 prologue->frame_size = st.sp.k;
1815 }
1816
1817 /* We haven't been able to make sense of this function's frame. Treat
1818 it as the first frame. */
1819 else
1820 prologue->kind = prologue_first_frame;
1821
1822 /* Record where all the registers were saved. */
1823 st.stack->scan (check_for_saved, (void *) prologue);
1824
1825 prologue->prologue_end = after_last_frame_related_insn;
1826}
1827
1828
1829static CORE_ADDR
1830m32c_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR ip)
1831{
1832 const char *name;
1833 CORE_ADDR func_addr, func_end, sal_end;
1834 struct m32c_prologue p;
1835
1836 /* Try to find the extent of the function that contains IP. */
1837 if (! find_pc_partial_function (ip, &name, &func_addr, &func_end))
1838 return ip;
1839
1840 /* Find end by prologue analysis. */
1841 m32c_analyze_prologue (gdbarch, ip, func_end, &p);
1842 /* Find end by line info. */
1843 sal_end = skip_prologue_using_sal (gdbarch, ip);
1844 /* Return whichever is lower. */
1845 if (sal_end != 0 && sal_end != ip && sal_end < p.prologue_end)
1846 return sal_end;
1847 else
1848 return p.prologue_end;
1849}
1850
1851
1852
1853/* Stack unwinding. */
1854
1855static struct m32c_prologue *
1857 void **this_prologue_cache)
1858{
1859 if (! *this_prologue_cache)
1860 {
1861 CORE_ADDR func_start = get_frame_func (this_frame);
1862 CORE_ADDR stop_addr = get_frame_pc (this_frame);
1863
1864 /* If we couldn't find any function containing the PC, then
1865 just initialize the prologue cache, but don't do anything. */
1866 if (! func_start)
1867 stop_addr = func_start;
1868
1869 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct m32c_prologue);
1871 func_start, stop_addr,
1872 (struct m32c_prologue *) *this_prologue_cache);
1873 }
1874
1875 return (struct m32c_prologue *) *this_prologue_cache;
1876}
1877
1878
1879static CORE_ADDR
1881 void **this_prologue_cache)
1882{
1883 struct m32c_prologue *p
1884 = m32c_analyze_frame_prologue (this_frame, this_prologue_cache);
1885 gdbarch *arch = get_frame_arch (this_frame);
1886 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch);
1887
1888 /* In functions that use alloca, the distance between the stack
1889 pointer and the frame base varies dynamically, so we can't use
1890 the SP plus static information like prologue analysis to find the
1891 frame base. However, such functions must have a frame pointer,
1892 to be able to restore the SP on exit. So whenever we do have a
1893 frame pointer, use that to find the base. */
1894 switch (p->kind)
1895 {
1896 case prologue_with_frame_ptr:
1897 {
1898 CORE_ADDR fb
1899 = get_frame_register_unsigned (this_frame, tdep->fb->num);
1900 return fb - p->frame_ptr_offset;
1901 }
1902
1903 case prologue_sans_frame_ptr:
1904 {
1905 CORE_ADDR sp
1906 = get_frame_register_unsigned (this_frame, tdep->sp->num);
1907 return sp - p->frame_size;
1908 }
1909
1910 case prologue_first_frame:
1911 return 0;
1912
1913 default:
1914 gdb_assert_not_reached ("unexpected prologue kind");
1915 }
1916}
1917
1918
1919static void
1921 void **this_prologue_cache,
1922 struct frame_id *this_id)
1923{
1924 CORE_ADDR base = m32c_frame_base (this_frame, this_prologue_cache);
1925
1926 if (base)
1927 *this_id = frame_id_build (base, get_frame_func (this_frame));
1928 /* Otherwise, leave it unset, and that will terminate the backtrace. */
1929}
1930
1931
1932static struct value *
1934 void **this_prologue_cache, int regnum)
1935{
1936 gdbarch *arch = get_frame_arch (this_frame);
1937 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch);
1938 struct m32c_prologue *p
1939 = m32c_analyze_frame_prologue (this_frame, this_prologue_cache);
1940 CORE_ADDR frame_base = m32c_frame_base (this_frame, this_prologue_cache);
1941
1942 if (regnum == tdep->sp->num)
1943 return frame_unwind_got_constant (this_frame, regnum, frame_base);
1944
1945 /* If prologue analysis says we saved this register somewhere,
1946 return a description of the stack slot holding it. */
1947 if (p->reg_offset[regnum] != 1)
1948 return frame_unwind_got_memory (this_frame, regnum,
1950
1951 /* Otherwise, presume we haven't changed the value of this
1952 register, and get it from the next frame. */
1953 return frame_unwind_got_register (this_frame, regnum, regnum);
1954}
1955
1956
1957static const struct frame_unwind m32c_unwind = {
1958 "m32c prologue",
1963 NULL,
1965};
1966
1967
1968/* Inferior calls. */
1969
1970/* The calling conventions, according to GCC:
1971
1972 r8c, m16c
1973 ---------
1974 First arg may be passed in r1l or r1 if it (1) fits (QImode or
1975 HImode), (2) is named, and (3) is an integer or pointer type (no
1976 structs, floats, etc). Otherwise, it's passed on the stack.
1977
1978 Second arg may be passed in r2, same restrictions (but not QImode),
1979 even if the first arg is passed on the stack.
1980
1981 Third and further args are passed on the stack. No padding is
1982 used, stack "alignment" is 8 bits.
1983
1984 m32cm, m32c
1985 -----------
1986
1987 First arg may be passed in r0l or r0, same restrictions as above.
1988
1989 Second and further args are passed on the stack. Padding is used
1990 after QImode parameters (i.e. lower-addressed byte is the value,
1991 higher-addressed byte is the padding), stack "alignment" is 16
1992 bits. */
1993
1994
1995/* Return true if TYPE is a type that can be passed in registers. (We
1996 ignore the size, and pay attention only to the type code;
1997 acceptable sizes depends on which register is being considered to
1998 hold it.) */
1999static int
2001{
2002 enum type_code code = type->code ();
2003
2004 return (code == TYPE_CODE_INT
2005 || code == TYPE_CODE_ENUM
2006 || code == TYPE_CODE_PTR
2008 || code == TYPE_CODE_BOOL
2009 || code == TYPE_CODE_CHAR);
2010}
2011
2012
2013static CORE_ADDR
2014m32c_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2015 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
2016 struct value **args, CORE_ADDR sp,
2017 function_call_return_method return_method,
2018 CORE_ADDR struct_addr)
2019{
2020 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (gdbarch);
2021 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2022 unsigned long mach = gdbarch_bfd_arch_info (gdbarch)->mach;
2023 CORE_ADDR cfa;
2024 int i;
2025
2026 /* The number of arguments given in this function's prototype, or
2027 zero if it has a non-prototyped function type. The m32c ABI
2028 passes arguments mentioned in the prototype differently from
2029 those in the ellipsis of a varargs function, or from those passed
2030 to a non-prototyped function. */
2031 int num_prototyped_args = 0;
2032
2033 {
2034 struct type *func_type = function->type ();
2035
2036 /* Dereference function pointer types. */
2037 if (func_type->code () == TYPE_CODE_PTR)
2038 func_type = func_type->target_type ();
2039
2040 gdb_assert (func_type->code () == TYPE_CODE_FUNC ||
2041 func_type->code () == TYPE_CODE_METHOD);
2042
2043#if 0
2044 /* The ABI description in gcc/config/m32c/m32c.abi says that
2045 we need to handle prototyped and non-prototyped functions
2046 separately, but the code in GCC doesn't actually do so. */
2047 if (TYPE_PROTOTYPED (func_type))
2048#endif
2049 num_prototyped_args = func_type->num_fields ();
2050 }
2051
2052 /* First, if the function returns an aggregate by value, push a
2053 pointer to a buffer for it. This doesn't affect the way
2054 subsequent arguments are allocated to registers. */
2055 if (return_method == return_method_struct)
2056 {
2057 int ptr_len = tdep->ptr_voyd->length ();
2058 sp -= ptr_len;
2059 write_memory_unsigned_integer (sp, ptr_len, byte_order, struct_addr);
2060 }
2061
2062 /* Push the arguments. */
2063 for (i = nargs - 1; i >= 0; i--)
2064 {
2065 struct value *arg = args[i];
2066 const gdb_byte *arg_bits = arg->contents ().data ();
2067 struct type *arg_type = arg->type ();
2068 ULONGEST arg_size = arg_type->length ();
2069
2070 /* Can it go in r1 or r1l (for m16c) or r0 or r0l (for m32c)? */
2071 if (i == 0
2072 && arg_size <= 2
2073 && i < num_prototyped_args
2074 && m32c_reg_arg_type (arg_type))
2075 {
2076 /* Extract and re-store as an integer as a terse way to make
2077 sure it ends up in the least significant end of r1. (GDB
2078 should avoid assuming endianness, even on uni-endian
2079 processors.) */
2080 ULONGEST u = extract_unsigned_integer (arg_bits, arg_size,
2081 byte_order);
2082 struct m32c_reg *reg = (mach == bfd_mach_m16c) ? tdep->r1 : tdep->r0;
2084 }
2085
2086 /* Can it go in r2? */
2087 else if (mach == bfd_mach_m16c
2088 && i == 1
2089 && arg_size == 2
2090 && i < num_prototyped_args
2091 && m32c_reg_arg_type (arg_type))
2092 regcache->cooked_write (tdep->r2->num, arg_bits);
2093
2094 /* Everything else goes on the stack. */
2095 else
2096 {
2097 sp -= arg_size;
2098
2099 /* Align the stack. */
2100 if (mach == bfd_mach_m32c)
2101 sp &= ~1;
2102
2103 write_memory (sp, arg_bits, arg_size);
2104 }
2105 }
2106
2107 /* This is the CFA we use to identify the dummy frame. */
2108 cfa = sp;
2109
2110 /* Push the return address. */
2111 sp -= tdep->ret_addr_bytes;
2112 write_memory_unsigned_integer (sp, tdep->ret_addr_bytes, byte_order,
2113 bp_addr);
2114
2115 /* Update the stack pointer. */
2117
2118 /* We need to borrow an odd trick from the i386 target here.
2119
2120 The value we return from this function gets used as the stack
2121 address (the CFA) for the dummy frame's ID. The obvious thing is
2122 to return the new TOS. However, that points at the return
2123 address, saved on the stack, which is inconsistent with the CFA's
2124 described by GCC's DWARF 2 .debug_frame information: DWARF 2
2125 .debug_frame info uses the address immediately after the saved
2126 return address. So you end up with a dummy frame whose CFA
2127 points at the return address, but the frame for the function
2128 being called has a CFA pointing after the return address: the
2129 younger CFA is *greater than* the older CFA. The sanity checks
2130 in frame.c don't like that.
2131
2132 So we try to be consistent with the CFA's used by DWARF 2.
2133 Having a dummy frame and a real frame with the *same* CFA is
2134 tolerable. */
2135 return cfa;
2136}
2137
2138
2139
2140/* Return values. */
2141
2142/* Return value conventions, according to GCC:
2143
2144 r8c, m16c
2145 ---------
2146
2147 QImode in r0l
2148 HImode in r0
2149 SImode in r2r0
2150 near pointer in r0
2151 far pointer in r2r0
2152
2153 Aggregate values (regardless of size) are returned by pushing a
2154 pointer to a temporary area on the stack after the args are pushed.
2155 The function fills in this area with the value. Note that this
2156 pointer on the stack does not affect how register arguments, if any,
2157 are configured.
2158
2159 m32cm, m32c
2160 -----------
2161 Same. */
2162
2163/* Return non-zero if values of type TYPE are returned by storing them
2164 in a buffer whose address is passed on the stack, ahead of the
2165 other arguments. */
2166static int
2168{
2169 enum type_code code = type->code ();
2170
2171 return (code == TYPE_CODE_STRUCT
2172 || code == TYPE_CODE_UNION);
2173}
2174
2175static enum return_value_convention
2177 struct value *function,
2178 struct type *valtype,
2179 struct regcache *regcache,
2180 gdb_byte *readbuf,
2181 const gdb_byte *writebuf)
2182{
2183 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (gdbarch);
2184 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2185 enum return_value_convention conv;
2186 ULONGEST valtype_len = valtype->length ();
2187
2188 if (m32c_return_by_passed_buf (valtype))
2190 else
2192
2193 if (readbuf)
2194 {
2195 /* We should never be called to find values being returned by
2196 RETURN_VALUE_STRUCT_CONVENTION. Those can't be located,
2197 unless we made the call ourselves. */
2198 gdb_assert (conv == RETURN_VALUE_REGISTER_CONVENTION);
2199
2200 gdb_assert (valtype_len <= 8);
2201
2202 /* Anything that fits in r0 is returned there. */
2203 if (valtype_len <= tdep->r0->type->length ())
2204 {
2205 ULONGEST u;
2207 store_unsigned_integer (readbuf, valtype_len, byte_order, u);
2208 }
2209 else
2210 {
2211 /* Everything else is passed in mem0, using as many bytes as
2212 needed. This is not what the Renesas tools do, but it's
2213 what GCC does at the moment. */
2214 struct bound_minimal_symbol mem0
2215 = lookup_minimal_symbol ("mem0", NULL, NULL);
2216
2217 if (! mem0.minsym)
2218 error (_("The return value is stored in memory at 'mem0', "
2219 "but GDB cannot find\n"
2220 "its address."));
2221 read_memory (mem0.value_address (), readbuf, valtype_len);
2222 }
2223 }
2224
2225 if (writebuf)
2226 {
2227 /* We should never be called to store values to be returned
2228 using RETURN_VALUE_STRUCT_CONVENTION. We have no way of
2229 finding the buffer, unless we made the call ourselves. */
2230 gdb_assert (conv == RETURN_VALUE_REGISTER_CONVENTION);
2231
2232 gdb_assert (valtype_len <= 8);
2233
2234 /* Anything that fits in r0 is returned there. */
2235 if (valtype_len <= tdep->r0->type->length ())
2236 {
2237 ULONGEST u = extract_unsigned_integer (writebuf, valtype_len,
2238 byte_order);
2240 }
2241 else
2242 {
2243 /* Everything else is passed in mem0, using as many bytes as
2244 needed. This is not what the Renesas tools do, but it's
2245 what GCC does at the moment. */
2246 struct bound_minimal_symbol mem0
2247 = lookup_minimal_symbol ("mem0", NULL, NULL);
2248
2249 if (! mem0.minsym)
2250 error (_("The return value is stored in memory at 'mem0', "
2251 "but GDB cannot find\n"
2252 " its address."));
2253 write_memory (mem0.value_address (), writebuf, valtype_len);
2254 }
2255 }
2256
2257 return conv;
2258}
2259
2260
2261
2262/* Trampolines. */
2263
2264/* The m16c and m32c use a trampoline function for indirect function
2265 calls. An indirect call looks like this:
2266
2267 ... push arguments ...
2268 ... push target function address ...
2269 jsr.a m32c_jsri16
2270
2271 The code for m32c_jsri16 looks like this:
2272
2273 m32c_jsri16:
2274
2275 # Save return address.
2276 pop.w m32c_jsri_ret
2277 pop.b m32c_jsri_ret+2
2278
2279 # Store target function address.
2280 pop.w m32c_jsri_addr
2281
2282 # Re-push return address.
2283 push.b m32c_jsri_ret+2
2284 push.w m32c_jsri_ret
2285
2286 # Call the target function.
2287 jmpi.a m32c_jsri_addr
2288
2289 Without further information, GDB will treat calls to m32c_jsri16
2290 like calls to any other function. Since m32c_jsri16 doesn't have
2291 debugging information, that normally means that GDB sets a step-
2292 resume breakpoint and lets the program continue --- which is not
2293 what the user wanted. (Giving the trampoline debugging info
2294 doesn't help: the user expects the program to stop in the function
2295 their program is calling, not in some trampoline code they've never
2296 seen before.)
2297
2298 The gdbarch_skip_trampoline_code method tells GDB how to step
2299 through such trampoline functions transparently to the user. When
2300 given the address of a trampoline function's first instruction,
2301 gdbarch_skip_trampoline_code should return the address of the first
2302 instruction of the function really being called. If GDB decides it
2303 wants to step into that function, it will set a breakpoint there
2304 and silently continue to it.
2305
2306 We recognize the trampoline by name, and extract the target address
2307 directly from the stack. This isn't great, but recognizing by its
2308 code sequence seems more fragile. */
2309
2310static CORE_ADDR
2312{
2313 struct gdbarch *gdbarch = get_frame_arch (frame);
2314 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (gdbarch);
2315 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2316
2317 /* It would be nicer to simply look up the addresses of known
2318 trampolines once, and then compare stop_pc with them. However,
2319 we'd need to ensure that that cached address got invalidated when
2320 someone loaded a new executable, and I'm not quite sure of the
2321 best way to do that. find_pc_partial_function does do some
2322 caching, so we'll see how this goes. */
2323 const char *name;
2324 CORE_ADDR start, end;
2325
2326 if (find_pc_partial_function (stop_pc, &name, &start, &end))
2327 {
2328 /* Are we stopped at the beginning of the trampoline function? */
2329 if (strcmp (name, "m32c_jsri16") == 0
2330 && stop_pc == start)
2331 {
2332 /* Get the stack pointer. The return address is at the top,
2333 and the target function's address is just below that. We
2334 know it's a two-byte address, since the trampoline is
2335 m32c_jsri*16*. */
2336 CORE_ADDR sp = get_frame_sp (get_current_frame ());
2337 CORE_ADDR target
2339 2, byte_order);
2340
2341 /* What we have now is the address of a jump instruction.
2342 What we need is the destination of that jump.
2343 The opcode is 1 byte, and the destination is the next 3 bytes. */
2344
2345 target = read_memory_unsigned_integer (target + 1, 3, byte_order);
2346 return target;
2347 }
2348 }
2349
2350 return 0;
2351}
2352
2353
2354/* Address/pointer conversions. */
2355
2356/* On the m16c, there is a 24-bit address space, but only a very few
2357 instructions can generate addresses larger than 0xffff: jumps,
2358 jumps to subroutines, and the lde/std (load/store extended)
2359 instructions.
2360
2361 Since GCC can only support one size of pointer, we can't have
2362 distinct 'near' and 'far' pointer types; we have to pick one size
2363 for everything. If we wanted to use 24-bit pointers, then GCC
2364 would have to use lde and ste for all memory references, which
2365 would be terrible for performance and code size. So the GNU
2366 toolchain uses 16-bit pointers for everything, and gives up the
2367 ability to have pointers point outside the first 64k of memory.
2368
2369 However, as a special hack, we let the linker place functions at
2370 addresses above 0xffff, as long as it also places a trampoline in
2371 the low 64k for every function whose address is taken. Each
2372 trampoline consists of a single jmp.a instruction that jumps to the
2373 function's real entry point. Pointers to functions can be 16 bits
2374 long, even though the functions themselves are at higher addresses:
2375 the pointers refer to the trampolines, not the functions.
2376
2377 This complicates things for GDB, however: given the address of a
2378 function (from debug info or linker symbols, say) which could be
2379 anywhere in the 24-bit address space, how can we find an
2380 appropriate 16-bit value to use as a pointer to it?
2381
2382 If the linker has not generated a trampoline for the function,
2383 we're out of luck. Well, I guess we could malloc some space and
2384 write a jmp.a instruction to it, but I'm not going to get into that
2385 at the moment.
2386
2387 If the linker has generated a trampoline for the function, then it
2388 also emitted a symbol for the trampoline: if the function's linker
2389 symbol is named NAME, then the function's trampoline's linker
2390 symbol is named NAME.plt.
2391
2392 So, given a code address:
2393 - We try to find a linker symbol at that address.
2394 - If we find such a symbol named NAME, we look for a linker symbol
2395 named NAME.plt.
2396 - If we find such a symbol, we assume it is a trampoline, and use
2397 its address as the pointer value.
2398
2399 And, given a function pointer:
2400 - We try to find a linker symbol at that address named NAME.plt.
2401 - If we find such a symbol, we look for a linker symbol named NAME.
2402 - If we find that, we provide that as the function's address.
2403 - If any of the above steps fail, we return the original address
2404 unchanged; it might really be a function in the low 64k.
2405
2406 See? You *knew* there was a reason you wanted to be a computer
2407 programmer! :) */
2408
2409static void
2411 struct type *type, gdb_byte *buf, CORE_ADDR addr)
2412{
2413 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2414 enum type_code target_code;
2415 gdb_assert (type->code () == TYPE_CODE_PTR || TYPE_IS_REFERENCE (type));
2416
2417 target_code = type->target_type ()->code ();
2418
2419 if (target_code == TYPE_CODE_FUNC || target_code == TYPE_CODE_METHOD)
2420 {
2421 const char *func_name;
2422 char *tramp_name;
2423 struct bound_minimal_symbol tramp_msym;
2424
2425 /* Try to find a linker symbol at this address. */
2426 struct bound_minimal_symbol func_msym
2428
2429 if (! func_msym.minsym)
2430 error (_("Cannot convert code address %s to function pointer:\n"
2431 "couldn't find a symbol at that address, to find trampoline."),
2432 paddress (gdbarch, addr));
2433
2434 func_name = func_msym.minsym->linkage_name ();
2435 tramp_name = (char *) xmalloc (strlen (func_name) + 5);
2436 strcpy (tramp_name, func_name);
2437 strcat (tramp_name, ".plt");
2438
2439 /* Try to find a linker symbol for the trampoline. */
2440 tramp_msym = lookup_minimal_symbol (tramp_name, NULL, NULL);
2441
2442 /* We've either got another copy of the name now, or don't need
2443 the name any more. */
2444 xfree (tramp_name);
2445
2446 if (! tramp_msym.minsym)
2447 {
2448 CORE_ADDR ptrval;
2449
2450 /* No PLT entry found. Mask off the upper bits of the address
2451 to make a pointer. As noted in the warning to the user
2452 below, this value might be useful if converted back into
2453 an address by GDB, but will otherwise, almost certainly,
2454 be garbage.
2455
2456 Using this masked result does seem to be useful
2457 in gdb.cp/cplusfuncs.exp in which ~40 FAILs turn into
2458 PASSes. These results appear to be correct as well.
2459
2460 We print a warning here so that the user can make a
2461 determination about whether the result is useful or not. */
2462 ptrval = addr & 0xffff;
2463
2464 warning (_("Cannot convert code address %s to function pointer:\n"
2465 "couldn't find trampoline named '%s.plt'.\n"
2466 "Returning pointer value %s instead; this may produce\n"
2467 "a useful result if converted back into an address by GDB,\n"
2468 "but will most likely not be useful otherwise."),
2469 paddress (gdbarch, addr), func_name,
2470 paddress (gdbarch, ptrval));
2471
2472 addr = ptrval;
2473
2474 }
2475 else
2476 {
2477 /* The trampoline's address is our pointer. */
2478 addr = tramp_msym.value_address ();
2479 }
2480 }
2481
2482 store_unsigned_integer (buf, type->length (), byte_order, addr);
2483}
2484
2485
2486static CORE_ADDR
2488 struct type *type, const gdb_byte *buf)
2489{
2490 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2491 CORE_ADDR ptr;
2492 enum type_code target_code;
2493
2494 gdb_assert (type->code () == TYPE_CODE_PTR || TYPE_IS_REFERENCE (type));
2495
2496 ptr = extract_unsigned_integer (buf, type->length (), byte_order);
2497
2498 target_code = type->target_type ()->code ();
2499
2500 if (target_code == TYPE_CODE_FUNC || target_code == TYPE_CODE_METHOD)
2501 {
2502 /* See if there is a minimal symbol at that address whose name is
2503 "NAME.plt". */
2504 struct bound_minimal_symbol ptr_msym = lookup_minimal_symbol_by_pc (ptr);
2505
2506 if (ptr_msym.minsym)
2507 {
2508 const char *ptr_msym_name = ptr_msym.minsym->linkage_name ();
2509 int len = strlen (ptr_msym_name);
2510
2511 if (len > 4
2512 && strcmp (ptr_msym_name + len - 4, ".plt") == 0)
2513 {
2514 struct bound_minimal_symbol func_msym;
2515 /* We have a .plt symbol; try to find the symbol for the
2516 corresponding function.
2517
2518 Since the trampoline contains a jump instruction, we
2519 could also just extract the jump's target address. I
2520 don't see much advantage one way or the other. */
2521 char *func_name = (char *) xmalloc (len - 4 + 1);
2522 memcpy (func_name, ptr_msym_name, len - 4);
2523 func_name[len - 4] = '\0';
2524 func_msym
2525 = lookup_minimal_symbol (func_name, NULL, NULL);
2526
2527 /* If we do have such a symbol, return its value as the
2528 function's true address. */
2529 if (func_msym.minsym)
2530 ptr = func_msym.value_address ();
2531 }
2532 }
2533 else
2534 {
2535 int aspace;
2536
2537 for (aspace = 1; aspace <= 15; aspace++)
2538 {
2539 ptr_msym = lookup_minimal_symbol_by_pc ((aspace << 16) | ptr);
2540
2541 if (ptr_msym.minsym)
2542 ptr |= aspace << 16;
2543 }
2544 }
2545 }
2546
2547 return ptr;
2548}
2549
2550static void
2552 int *frame_regnum,
2553 LONGEST *frame_offset)
2554{
2555 const char *name;
2556 CORE_ADDR func_addr, func_end;
2557 struct m32c_prologue p;
2558
2560 m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (gdbarch);
2561
2562 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
2563 internal_error (_("No virtual frame pointer available"));
2564
2565 m32c_analyze_prologue (gdbarch, func_addr, pc, &p);
2566 switch (p.kind)
2567 {
2568 case prologue_with_frame_ptr:
2569 *frame_regnum = m32c_banked_register (tdep->fb, regcache)->num;
2570 *frame_offset = p.frame_ptr_offset;
2571 break;
2572 case prologue_sans_frame_ptr:
2573 *frame_regnum = m32c_banked_register (tdep->sp, regcache)->num;
2574 *frame_offset = p.frame_size;
2575 break;
2576 default:
2577 *frame_regnum = m32c_banked_register (tdep->sp, regcache)->num;
2578 *frame_offset = 0;
2579 break;
2580 }
2581 /* Sanity check */
2582 if (*frame_regnum > gdbarch_num_regs (gdbarch))
2583 internal_error (_("No virtual frame pointer available"));
2584}
2585
2586
2587/* Initialization. */
2588
2589static struct gdbarch *
2591{
2592 unsigned long mach = info.bfd_arch_info->mach;
2593
2594 /* Find a candidate among the list of architectures we've created
2595 already. */
2597 arches != NULL;
2599 return arches->gdbarch;
2600
2603
2604 /* Essential types. */
2606
2607 /* Address/pointer conversions. */
2608 if (mach == bfd_mach_m16c)
2609 {
2612 }
2613
2614 /* Register set. */
2616
2617 /* Breakpoints. */
2618 set_gdbarch_breakpoint_kind_from_pc (gdbarch, m32c_breakpoint::kind_from_pc);
2619 set_gdbarch_sw_breakpoint_from_kind (gdbarch, m32c_breakpoint::bp_from_kind);
2620
2621 /* Prologue analysis and unwinding. */
2624#if 0
2625 /* I'm dropping the dwarf2 sniffer because it has a few problems.
2626 They may be in the dwarf2 cfi code in GDB, or they may be in
2627 the debug info emitted by the upstream toolchain. I don't
2628 know which, but I do know that the prologue analyzer works better.
2629 MVS 04/13/06 */
2630 dwarf2_append_sniffers (gdbarch);
2631#endif
2633
2634 /* Inferior calls. */
2637
2638 /* Trampolines. */
2640
2642
2643 /* m32c function boundary addresses are not necessarily even.
2644 Therefore, the `vbit', which indicates a pointer to a virtual
2645 member function, is stored in the delta field, rather than as
2646 the low bit of a function pointer address.
2647
2648 In order to verify this, see the definition of
2649 TARGET_PTRMEMFUNC_VBIT_LOCATION in gcc/defaults.h along with the
2650 definition of FUNCTION_BOUNDARY in gcc/config/m32c/m32c.h. */
2652
2653 return gdbarch;
2654}
2655
2656void _initialize_m32c_tdep ();
2657void
#define bit(obj, st)
#define bits(obj, st, fn)
int regnum
const char *const name
void * xmalloc(YYSIZE_T)
void xfree(void *)
int code
Definition ada-lex.l:670
void gdbarch_register(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init, gdbarch_dump_tdep_ftype *dump_tdep, gdbarch_supports_arch_info_ftype *supports_arch_info)
static std::vector< const char * > arches
Definition arch-utils.c:685
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
Definition arch-utils.c:177
struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
#define BP_MANIPULATION(BREAK_INSN)
Definition arch-utils.h:70
bool find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr, const struct block **block)
Definition blockframe.c:373
void scan(void(*func)(void *closure, pv_t addr, CORE_ADDR size, pv_t value), void *closure)
pv_t fetch(pv_t addr, CORE_ADDR size)
bool find_reg(struct gdbarch *gdbarch, int reg, CORE_ADDR *offset_p)
bool store_would_trash(pv_t addr)
void store(pv_t addr, CORE_ADDR size, pv_t value)
enum register_status raw_read(int regnum, gdb_byte *buf)
Definition regcache.c:611
enum register_status cooked_read_part(int regnum, int offset, int len, gdb_byte *buf)
Definition regcache.c:1042
enum register_status cooked_read(int regnum, gdb_byte *buf)
Definition regcache.c:698
gdbarch * arch() const
Definition regcache.c:231
void cooked_write(int regnum, const gdb_byte *buf)
Definition regcache.c:870
void cooked_write_part(int regnum, int offset, int len, const gdb_byte *buf)
Definition regcache.c:1052
void raw_write(int regnum, const gdb_byte *buf)
Definition regcache.c:833
type * new_type()
Definition gdbtypes.c:208
void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
Definition corefile.c:347
ULONGEST read_memory_unsigned_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
Definition corefile.c:306
void write_memory_unsigned_integer(CORE_ADDR addr, int len, enum bfd_endian byte_order, ULONGEST value)
Definition corefile.c:380
void read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition corefile.c:238
static void store_unsigned_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, ULONGEST val)
Definition defs.h:515
static ULONGEST extract_unsigned_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
Definition defs.h:480
return_value_convention
Definition defs.h:257
@ RETURN_VALUE_REGISTER_CONVENTION
Definition defs.h:260
@ RETURN_VALUE_STRUCT_CONVENTION
Definition defs.h:267
ssize_t read(int fd, void *buf, size_t count)
int default_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
struct value * frame_unwind_got_memory(frame_info_ptr frame, int regnum, CORE_ADDR addr)
struct value * frame_unwind_got_register(frame_info_ptr frame, int regnum, int new_regnum)
enum unwind_stop_reason default_frame_unwind_stop_reason(frame_info_ptr this_frame, void **this_cache)
struct value * frame_unwind_got_constant(frame_info_ptr frame, int regnum, ULONGEST val)
void frame_unwind_append_unwinder(struct gdbarch *gdbarch, const struct frame_unwind *unwinder)
ULONGEST get_frame_register_unsigned(frame_info_ptr frame, int regnum)
Definition frame.c:1399
CORE_ADDR get_frame_pc(frame_info_ptr frame)
Definition frame.c:2712
CORE_ADDR get_frame_sp(frame_info_ptr this_frame)
Definition frame.c:3115
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
Definition frame.c:736
struct gdbarch * get_frame_arch(frame_info_ptr this_frame)
Definition frame.c:3027
CORE_ADDR get_frame_func(frame_info_ptr this_frame)
Definition frame.c:1098
frame_info_ptr get_current_frame(void)
Definition frame.c:1670
@ NORMAL_FRAME
Definition frame.h:187
#define FRAME_OBSTACK_ZALLOC(TYPE)
Definition frame.h:825
void set_gdbarch_stab_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_stab_reg_to_regnum_ftype *stab_reg_to_regnum)
void set_gdbarch_addr_bit(struct gdbarch *gdbarch, int addr_bit)
Definition gdbarch.c:1750
void set_gdbarch_address_to_pointer(struct gdbarch *gdbarch, gdbarch_address_to_pointer_ftype *address_to_pointer)
enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
Definition gdbarch.c:1396
void set_gdbarch_breakpoint_kind_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_kind_from_pc_ftype *breakpoint_kind_from_pc)
void set_gdbarch_register_sim_regno(struct gdbarch *gdbarch, gdbarch_register_sim_regno_ftype *register_sim_regno)
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype *skip_prologue)
int gdbarch_addr_bit(struct gdbarch *gdbarch)
Definition gdbarch.c:1739
void set_gdbarch_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype *register_name)
void set_gdbarch_int_bit(struct gdbarch *gdbarch, int int_bit)
Definition gdbarch.c:1459
void set_gdbarch_skip_trampoline_code(struct gdbarch *gdbarch, gdbarch_skip_trampoline_code_ftype *skip_trampoline_code)
void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype *return_value)
int gdbarch_num_regs(struct gdbarch *gdbarch)
Definition gdbarch.c:1930
void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype *inner_than)
void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
Definition gdbarch.c:2047
void set_gdbarch_register_reggroup_p(struct gdbarch *gdbarch, gdbarch_register_reggroup_p_ftype *register_reggroup_p)
void set_gdbarch_pc_regnum(struct gdbarch *gdbarch, int pc_regnum)
Definition gdbarch.c:2064
void set_gdbarch_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype *register_type)
void set_gdbarch_virtual_frame_pointer(struct gdbarch *gdbarch, gdbarch_virtual_frame_pointer_ftype *virtual_frame_pointer)
void set_gdbarch_pseudo_register_write(struct gdbarch *gdbarch, gdbarch_pseudo_register_write_ftype *pseudo_register_write)
void set_gdbarch_num_pseudo_regs(struct gdbarch *gdbarch, int num_pseudo_regs)
Definition gdbarch.c:1958
void set_gdbarch_dwarf2_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_dwarf2_reg_to_regnum_ftype *dwarf2_reg_to_regnum)
void set_gdbarch_ptr_bit(struct gdbarch *gdbarch, int ptr_bit)
Definition gdbarch.c:1732
void set_gdbarch_pseudo_register_read(struct gdbarch *gdbarch, gdbarch_pseudo_register_read_ftype *pseudo_register_read)
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
Definition gdbarch.c:1941
const struct bfd_arch_info * gdbarch_bfd_arch_info(struct gdbarch *gdbarch)
Definition gdbarch.c:1387
void set_gdbarch_sw_breakpoint_from_kind(struct gdbarch *gdbarch, gdbarch_sw_breakpoint_from_kind_ftype *sw_breakpoint_from_kind)
int gdbarch_ptr_bit(struct gdbarch *gdbarch)
Definition gdbarch.c:1722
void set_gdbarch_pointer_to_address(struct gdbarch *gdbarch, gdbarch_pointer_to_address_ftype *pointer_to_address)
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype *push_dummy_call)
void set_gdbarch_vbit_in_delta(struct gdbarch *gdbarch, int vbit_in_delta)
Definition gdbarch.c:4051
struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, gdbarch_tdep_up tdep)
Definition gdbarch.c:266
std::unique_ptr< gdbarch_tdep_base > gdbarch_tdep_up
Definition gdbarch.h:73
function_call_return_method
Definition gdbarch.h:114
@ return_method_struct
Definition gdbarch.h:126
struct type * init_integer_type(type_allocator &alloc, int bit, int unsigned_p, const char *name)
Definition gdbtypes.c:3355
struct type * lookup_function_type(struct type *type)
Definition gdbtypes.c:567
struct type * init_pointer_type(type_allocator &alloc, int bit, const char *name, struct type *target_type)
Definition gdbtypes.c:3485
#define TYPE_IS_REFERENCE(t)
Definition gdbtypes.h:139
type_code
Definition gdbtypes.h:82
mach_port_t mach_port_t name mach_port_t mach_port_t name kern_return_t int status
Definition gnu-nat.c:1790
size_t size
Definition go32-nat.c:239
static int m32c_srcdest_store(struct m32c_pv_state *state, struct srcdest loc, pv_t value, int size)
Definition m32c-tdep.c:1128
static int m32c_get_src23(unsigned char *i)
Definition m32c-tdep.c:1207
static int m32c_pv_pushm(struct m32c_pv_state *state, int src)
Definition m32c-tdep.c:1381
static m32c_write_reg_t m32c_sb_write
Definition m32c-tdep.c:306
static m32c_write_reg_t m32c_r3r2r1r0_write
Definition m32c-tdep.c:309
static void make_regs(struct gdbarch *arch)
Definition m32c-tdep.c:803
static void m32c_analyze_prologue(struct gdbarch *arch, CORE_ADDR start, CORE_ADDR limit, struct m32c_prologue *prologue)
Definition m32c-tdep.c:1551
static void set_dwarf_regnum(struct m32c_reg *reg, int num)
Definition m32c-tdep.c:672
#define CHL(name, type)
Definition m32c-tdep.c:783
static void m32c_pseudo_register_write(struct gdbarch *arch, struct regcache *cache, int cookednum, const gdb_byte *buf)
Definition m32c-tdep.c:613
static struct m32c_reg * add_reg(struct gdbarch *arch, const char *name, struct type *type, int sim_num, m32c_read_reg_t *read, m32c_write_reg_t *write, struct m32c_reg *rx, struct m32c_reg *ry, int n)
Definition m32c-tdep.c:633
static int m32c_is_struct_return(struct m32c_pv_state *st, struct srcdest loc, pv_t value)
Definition m32c-tdep.c:1464
static struct m32c_prologue * m32c_analyze_frame_prologue(frame_info_ptr this_frame, void **this_prologue_cache)
Definition m32c-tdep.c:1856
static struct m32c_reg * mark_system(struct m32c_reg *reg)
Definition m32c-tdep.c:707
static void mark_dma(struct m32c_reg *reg)
Definition m32c-tdep.c:699
static int m32c_pv_pushm_one(struct m32c_pv_state *state, pv_t reg, int bit, int src, int size)
Definition m32c-tdep.c:1366
static struct m32c_reg * m32c_banked_register(struct m32c_reg *reg, readable_regcache *cache)
Definition m32c-tdep.c:345
#define RA(name)
Definition m32c-tdep.c:745
static unsigned int m32c_next_byte(struct m32c_pv_state *st)
Definition m32c-tdep.c:1154
constexpr gdb_byte m32c_break_insn[]
Definition m32c-tdep.c:992
static int m32c_reg_arg_type(struct type *type)
Definition m32c-tdep.c:2000
srcdest_kind
Definition m32c-tdep.c:1092
@ srcdest_mem
Definition m32c-tdep.c:1095
@ srcdest_reg
Definition m32c-tdep.c:1093
@ srcdest_partial_reg
Definition m32c-tdep.c:1094
static m32c_write_reg_t m32c_banked_write
Definition m32c-tdep.c:305
#define FLAGBIT_U
Definition m32c-tdep.c:724
#define S(reg)
Definition m32c-tdep.c:797
#define CB(name, raw_pair)
Definition m32c-tdep.c:775
enum register_status m32c_write_reg_t(struct m32c_reg *reg, struct regcache *cache, const gdb_byte *buf)
void _initialize_m32c_tdep()
Definition m32c-tdep.c:2658
enum register_status m32c_read_reg_t(struct m32c_reg *reg, readable_regcache *cache, gdb_byte *buf)
static m32c_read_reg_t m32c_raw_read
Definition m32c-tdep.c:297
#define RBA(name)
Definition m32c-tdep.c:767
static int m32c_pushm_is_reg_save(struct m32c_pv_state *st, int src)
Definition m32c-tdep.c:1484
static CORE_ADDR m32c_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
Definition m32c-tdep.c:2014
#define DMA(reg)
Definition m32c-tdep.c:798
#define M32C_MAX_NUM_REGS
Definition m32c-tdep.c:93
static struct m32c_reg * mark_general(struct m32c_reg *reg)
Definition m32c-tdep.c:690
static CORE_ADDR m32c_skip_trampoline_code(frame_info_ptr frame, CORE_ADDR stop_pc)
Definition m32c-tdep.c:2311
static int m32c_sdisp16(struct m32c_pv_state *st)
Definition m32c-tdep.c:1185
static int m32c_sign_ext(int v, int bits)
Definition m32c-tdep.c:1147
#define RC(name)
Definition m32c-tdep.c:750
static m32c_read_reg_t m32c_cat_read
Definition m32c-tdep.c:301
static m32c_write_reg_t m32c_cat_write
Definition m32c-tdep.c:308
#define RBD(name)
Definition m32c-tdep.c:761
static m32c_write_reg_t m32c_raw_write
Definition m32c-tdep.c:304
static void m32c_m16c_address_to_pointer(struct gdbarch *gdbarch, struct type *type, gdb_byte *buf, CORE_ADDR addr)
Definition m32c-tdep.c:2410
static int m32c_pv_push(struct m32c_pv_state *state, pv_t value, int size)
Definition m32c-tdep.c:1079
static m32c_read_reg_t m32c_part_read
Definition m32c-tdep.c:300
static int m32c_is_arg_spill(struct m32c_pv_state *st, struct srcdest loc, pv_t value)
Definition m32c-tdep.c:1440
static const reggroup * m32c_dma_reggroup
Definition m32c-tdep.c:38
static void m32c_this_id(frame_info_ptr this_frame, void **this_prologue_cache, struct frame_id *this_id)
Definition m32c-tdep.c:1920
#define M32C_MAX_INSN_LEN
Definition m32c-tdep.c:1056
static CORE_ADDR m32c_m16c_pointer_to_address(struct gdbarch *gdbarch, struct type *type, const gdb_byte *buf)
Definition m32c-tdep.c:2487
static m32c_write_reg_t m32c_part_write
Definition m32c-tdep.c:307
static void m32c_virtual_frame_pointer(struct gdbarch *gdbarch, CORE_ADDR pc, int *frame_regnum, LONGEST *frame_offset)
Definition m32c-tdep.c:2551
static int m32c_is_arg_reg(struct m32c_pv_state *state, pv_t value)
Definition m32c-tdep.c:1417
static int m32c_pv_enter(struct m32c_pv_state *state, int size)
Definition m32c-tdep.c:1345
static void m32c_find_part(struct m32c_reg *reg, int *offset_p, int *len_p)
Definition m32c-tdep.c:411
#define M32C_MAX_DWARF_REGNUM
Definition m32c-tdep.c:96
static struct m32c_reg * mark_save_restore(struct m32c_reg *reg)
Definition m32c-tdep.c:716
static struct gdbarch * m32c_gdbarch_init(struct gdbarch_info info, struct gdbarch_list *arches)
Definition m32c-tdep.c:2590
static CORE_ADDR m32c_skip_prologue(struct gdbarch *gdbarch, CORE_ADDR ip)
Definition m32c-tdep.c:1830
static const char * m32c_register_name(struct gdbarch *gdbarch, int num)
Definition m32c-tdep.c:218
static CORE_ADDR m32c_frame_base(frame_info_ptr this_frame, void **this_prologue_cache)
Definition m32c-tdep.c:1880
static int m32c_register_sim_regno(struct gdbarch *gdbarch, int reg_nr)
Definition m32c-tdep.c:234
#define R16U(name)
Definition m32c-tdep.c:740
static void make_types(struct gdbarch *arch)
Definition m32c-tdep.c:143
static int m32c_udisp16(struct m32c_pv_state *st)
Definition m32c-tdep.c:1175
static void check_for_saved(void *prologue_untyped, pv_t addr, CORE_ADDR size, pv_t value)
Definition m32c-tdep.c:1511
static int m32c_get_dest23(unsigned char *i)
Definition m32c-tdep.c:1216
static enum register_status m32c_pseudo_register_read(struct gdbarch *arch, readable_regcache *cache, int cookednum, gdb_byte *buf)
Definition m32c-tdep.c:595
static int m32c_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *group)
Definition m32c-tdep.c:256
static int m32c_sdisp8(struct m32c_pv_state *st)
Definition m32c-tdep.c:1168
static int m32c_return_by_passed_buf(struct type *type)
Definition m32c-tdep.c:2167
static m32c_read_reg_t m32c_banked_read
Definition m32c-tdep.c:298
static int m32c_read_flg(readable_regcache *cache)
Definition m32c-tdep.c:332
#define CCAT(high, low, type)
Definition m32c-tdep.c:791
static int m32c_is_1st_arg_reg(struct m32c_pv_state *state, pv_t value)
Definition m32c-tdep.c:1402
static struct srcdest m32c_decode_srcdest4(struct m32c_pv_state *st, int code, int size)
Definition m32c-tdep.c:1224
static const struct frame_unwind m32c_unwind
Definition m32c-tdep.c:1957
static int m32c_debug_info_reg_to_regnum(struct gdbarch *gdbarch, int reg_nr)
Definition m32c-tdep.c:242
static struct type * m32c_register_type(struct gdbarch *arch, int reg_nr)
Definition m32c-tdep.c:226
static pv_t m32c_srcdest_fetch(struct m32c_pv_state *state, struct srcdest loc, int size)
Definition m32c-tdep.c:1113
static enum return_value_convention m32c_return_value(struct gdbarch *gdbarch, struct value *function, struct type *valtype, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
Definition m32c-tdep.c:2176
static struct value * m32c_prev_register(frame_info_ptr this_frame, void **this_prologue_cache, int regnum)
Definition m32c-tdep.c:1933
static int m32c_udisp8(struct m32c_pv_state *st)
Definition m32c-tdep.c:1161
static struct srcdest m32c_decode_sd23(struct m32c_pv_state *st, int code, int size, int ind)
Definition m32c-tdep.c:1269
static m32c_read_reg_t m32c_sb_read
Definition m32c-tdep.c:299
#define RP(name, type)
Definition m32c-tdep.c:755
static m32c_read_reg_t m32c_r3r2r1r0_read
Definition m32c-tdep.c:302
#define G(reg)
Definition m32c-tdep.c:796
static int m32c_udisp24(struct m32c_pv_state *st)
Definition m32c-tdep.c:1195
struct bound_minimal_symbol lookup_minimal_symbol(const char *name, const char *sfile, struct objfile *objf)
Definition minsyms.c:363
struct bound_minimal_symbol lookup_minimal_symbol_by_pc(CORE_ADDR pc)
Definition minsyms.c:996
info(Component c)
Definition gdbarch.py:41
pv_t pv_constant(CORE_ADDR k)
int pv_is_register_k(pv_t a, int r, CORE_ADDR k)
pv_t pv_unknown(void)
pv_t pv_register(int reg, CORE_ADDR k)
int pv_is_identical(pv_t a, pv_t b)
pv_t pv_add_constant(pv_t v, CORE_ADDR k)
int pv_is_register(pv_t a, int r)
int pv_is_constant(pv_t a)
@ pvk_register
int value
Definition py-param.c:79
int register_size(struct gdbarch *gdbarch, int regnum)
Definition regcache.c:170
enum register_status regcache_cooked_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
Definition regcache.c:796
struct regcache * get_current_regcache(void)
Definition regcache.c:429
void regcache_cooked_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
Definition regcache.c:825
struct type * register_type(struct gdbarch *gdbarch, int regnum)
Definition regcache.c:158
const reggroup *const general_reggroup
Definition reggroups.c:251
const reggroup * reggroup_new(const char *name, enum reggroup_type type)
Definition reggroups.c:34
const reggroup *const system_reggroup
Definition reggroups.c:253
const reggroup *const save_reggroup
Definition reggroups.c:256
const reggroup *const all_reggroup
Definition reggroups.c:255
void reggroup_add(struct gdbarch *gdbarch, const reggroup *group)
Definition reggroups.c:124
const reggroup *const restore_reggroup
Definition reggroups.c:257
@ USER_REGGROUP
Definition reggroups.h:32
enum var_types type
Definition scm-param.c:142
CORE_ADDR value_address() const
Definition minsyms.h:41
struct minimal_symbol * minsym
Definition minsyms.h:49
const struct bfd_arch_info * bfd_arch_info
Definition gdbarch.c:41
const char * linkage_name() const
Definition symtab.h:460
struct m32c_reg * a1
Definition m32c-tdep.c:111
struct type * voyd
Definition m32c-tdep.c:122
struct m32c_reg * r2
Definition m32c-tdep.c:110
struct m32c_reg regs[M32C_MAX_NUM_REGS]
Definition m32c-tdep.c:103
struct m32c_reg * r3r2r1r0
Definition m32c-tdep.c:112
struct m32c_reg * r3
Definition m32c-tdep.c:110
struct type * int32
Definition m32c-tdep.c:124
struct m32c_reg * r3r1r2r0
Definition m32c-tdep.c:112
struct m32c_reg * fb
Definition m32c-tdep.c:113
struct m32c_reg * sb
Definition m32c-tdep.c:113
struct type * uint8
Definition m32c-tdep.c:123
struct type * int16
Definition m32c-tdep.c:124
struct m32c_reg * sp
Definition m32c-tdep.c:113
struct m32c_reg * r1
Definition m32c-tdep.c:110
struct type * int64
Definition m32c-tdep.c:125
struct m32c_reg * a0
Definition m32c-tdep.c:111
struct m32c_reg * r0
Definition m32c-tdep.c:110
struct type * code_addr_reg_type
Definition m32c-tdep.c:128
struct type * func_voyd
Definition m32c-tdep.c:122
struct m32c_reg * dwarf_regs[M32C_MAX_DWARF_REGNUM+1]
Definition m32c-tdep.c:117
struct type * ptr_voyd
Definition m32c-tdep.c:122
struct m32c_reg * r2r0
Definition m32c-tdep.c:112
struct type * data_addr_reg_type
Definition m32c-tdep.c:128
struct m32c_reg * pc
Definition m32c-tdep.c:109
struct type * int8
Definition m32c-tdep.c:124
struct type * uint16
Definition m32c-tdep.c:123
struct m32c_reg * flg
Definition m32c-tdep.c:109
struct gdbarch * arch
Definition m32c-tdep.c:1019
LONGEST reg_offset[M32C_MAX_NUM_REGS]
Definition m32c-tdep.c:1051
enum m32c_prologue_kind kind
Definition m32c-tdep.c:1021
LONGEST frame_ptr_offset
Definition m32c-tdep.c:1026
CORE_ADDR prologue_end
Definition m32c-tdep.c:1046
LONGEST frame_size
Definition m32c-tdep.c:1041
gdb_byte insn[M32C_MAX_INSN_LEN]
Definition m32c-tdep.c:1070
CORE_ADDR next_addr
Definition m32c-tdep.c:1071
struct gdbarch * arch
Definition m32c-tdep.c:1061
struct pv_area * stack
Definition m32c-tdep.c:1066
CORE_ADDR scan_pc
Definition m32c-tdep.c:1071
m32c_read_reg_t * read
Definition m32c-tdep.c:78
m32c_write_reg_t * write
Definition m32c-tdep.c:79
int dwarf_num
Definition m32c-tdep.c:68
unsigned int general_p
Definition m32c-tdep.c:71
int num
Definition m32c-tdep.c:62
struct m32c_reg * ry
Definition m32c-tdep.c:84
struct type * type
Definition m32c-tdep.c:56
struct gdbarch * arch
Definition m32c-tdep.c:59
unsigned int save_restore_p
Definition m32c-tdep.c:74
unsigned int system_p
Definition m32c-tdep.c:73
unsigned int dma_p
Definition m32c-tdep.c:72
int sim_num
Definition m32c-tdep.c:65
struct m32c_reg * rx
Definition m32c-tdep.c:84
const char * name
Definition m32c-tdep.c:53
pv_t addr
Definition m32c-tdep.c:1107
pv_t * reg
Definition m32c-tdep.c:1107
enum srcdest_kind kind
Definition m32c-tdep.c:1106
struct type * target_type() const
Definition gdbtypes.h:1037
type_code code() const
Definition gdbtypes.h:956
ULONGEST length() const
Definition gdbtypes.h:983
gdbarch * arch() const
Definition gdbtypes.c:273
Definition value.h:130
struct gdbarch * arch() const
Definition value.c:167
gdb::array_view< const gdb_byte > contents()
Definition value.c:1262
struct type * type() const
Definition value.h:180
struct value::@203::@204 reg
CORE_ADDR skip_prologue_using_sal(struct gdbarch *gdbarch, CORE_ADDR func_addr)
Definition symtab.c:3963
int target_read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition target.c:1785
const char * paddress(struct gdbarch *gdbarch, CORE_ADDR addr)
Definition utils.c:3166