20#include "gdbsupport/common-defs.h"
22#include "gdbsupport/break-common.h"
102#define TARGET_HAS_DR_LEN_8 (x86_get_debug_register_length () == 8)
107#define DR_CONTROL_SHIFT 16
109#define DR_CONTROL_SIZE 4
112#define DR_RW_EXECUTE (0x0)
113#define DR_RW_WRITE (0x1)
114#define DR_RW_READ (0x3)
120#define DR_RW_IORW (0x2)
125#define DR_LEN_1 (0x0 << 2)
126#define DR_LEN_2 (0x1 << 2)
127#define DR_LEN_4 (0x3 << 2)
128#define DR_LEN_8 (0x2 << 2)
141#define DR_LOCAL_ENABLE_SHIFT 0
142#define DR_GLOBAL_ENABLE_SHIFT 1
143#define DR_ENABLE_SIZE 2
150#define DR_LOCAL_SLOWDOWN (0x100)
151#define DR_GLOBAL_SLOWDOWN (0x200)
158#define DR_CONTROL_RESERVED (0xFC00)
163#define X86_DR_CONTROL_MASK (~DR_CONTROL_RESERVED)
167#define X86_DR_VACANT(state, i) \
168 (((state)->dr_control_mirror & (3 << (DR_ENABLE_SIZE * (i)))) == 0)
171#define X86_DR_LOCAL_ENABLE(state, i) \
173 (state)->dr_control_mirror |= \
174 (1 << (DR_LOCAL_ENABLE_SHIFT + DR_ENABLE_SIZE * (i))); \
178#define X86_DR_GLOBAL_ENABLE(state, i) \
180 (state)->dr_control_mirror |= \
181 (1 << (DR_GLOBAL_ENABLE_SHIFT + DR_ENABLE_SIZE * (i))); \
185#define X86_DR_DISABLE(state, i) \
187 (state)->dr_control_mirror &= \
188 ~(3 << (DR_ENABLE_SIZE * (i))); \
192#define X86_DR_SET_RW_LEN(state, i, rwlen) \
194 (state)->dr_control_mirror &= \
195 ~(0x0f << (DR_CONTROL_SHIFT + DR_CONTROL_SIZE * (i))); \
196 (state)->dr_control_mirror |= \
197 ((rwlen) << (DR_CONTROL_SHIFT + DR_CONTROL_SIZE * (i))); \
201#define X86_DR_GET_RW_LEN(dr7, i) \
203 >> (DR_CONTROL_SHIFT + DR_CONTROL_SIZE * (i))) & 0x0f)
206#define X86_DR_WATCH_HIT(dr6, i) ((dr6) & (1 << (i)))
215 const char *func, CORE_ADDR addr,
216 int len,
enum target_hw_bp_type type)
220 debug_printf (
"%s", func);
222 debug_printf (
" (addr=%s, len=%d, type=%s)",
224 type == hw_write ?
"data-write"
225 : (type == hw_read ?
"data-read"
226 : (type == hw_access ?
"data-read/write"
227 : (type == hw_execute ?
"instruction-execute"
232 debug_printf (
":\n");
239 debug_printf (
"\tDR%d: addr=0x%s, ref.count=%d\n",
264 internal_error (_(
"The i386 doesn't support "
265 "data-read watchpoints.\n"));
277Invalid hardware breakpoint type %d in x86_length_and_rw_bits.\n"),
295Invalid hardware breakpoint length %d in x86_length_and_rw_bits.\n"), len);
307 CORE_ADDR addr,
unsigned len_rw_bits)
367 CORE_ADDR addr,
unsigned len_rw_bits)
420 enum target_hw_bp_type type)
425 static const int size_try_array[8][8] =
427 {1, 1, 1, 1, 1, 1, 1, 1},
428 {2, 1, 2, 1, 2, 1, 2, 1},
429 {2, 1, 2, 1, 2, 1, 2, 1},
430 {4, 1, 2, 1, 4, 1, 2, 1},
431 {4, 1, 2, 1, 4, 1, 2, 1},
432 {4, 1, 2, 1, 4, 1, 2, 1},
433 {4, 1, 2, 1, 4, 1, 2, 1},
434 {8, 1, 2, 1, 4, 1, 2, 1},
439 int align = addr % max_wp_len;
442 int attempt = (len > max_wp_len ? (max_wp_len - 1) : len - 1);
443 int size = size_try_array[attempt][align];
465Invalid value %d of operation in x86_handle_nonaligned_watchpoint.\n"),
507 enum target_hw_bp_type type,
508 CORE_ADDR addr,
int len)
518 if (((len != 1 && len != 2 && len != 4)
538 x86_show_dr (state,
"insert_watchpoint", addr, len, type);
549 enum target_hw_bp_type type,
550 CORE_ADDR addr,
int len)
557 if (((len != 1 && len != 2 && len != 4)
577 x86_show_dr (state,
"remove_watchpoint", addr, len, type);
587 CORE_ADDR addr,
int len)
594 addr, len, hw_write);
616 unsigned control = 0;
667 x86_show_dr (state,
"watchpoint_hit", addr, -1, hw_write);
671 if (show_debug_regs && addr == 0)
672 x86_show_dr (state,
"stopped_data_addr", 0, 0, hw_write);
705 unsigned control = 0;
727 x86_show_dr (state,
"watchpoint_hit", addr, -1, hw_execute);
unsigned dr_status_mirror
unsigned dr_control_mirror
CORE_ADDR dr_mirror[DR_NADDR]
int dr_ref_count[DR_NADDR]
void(* set_addr)(int, CORE_ADDR)
int debug_register_length
unsigned long(* get_control)(void)
unsigned long(* get_status)(void)
void(* set_control)(unsigned long)
CORE_ADDR(* get_addr)(int)
#define X86_DR_WATCH_HIT(dr6, i)
static bool x86_dr_low_can_set_control()
static int x86_get_debug_register_length()
#define X86_DR_DISABLE(state, i)
int x86_dr_remove_watchpoint(struct x86_debug_reg_state *state, enum target_hw_bp_type type, CORE_ADDR addr, int len)
static void x86_dr_low_set_addr(struct x86_debug_reg_state *new_state, int i)
int x86_dr_stopped_by_hw_breakpoint(struct x86_debug_reg_state *state)
static void x86_dr_low_set_control(struct x86_debug_reg_state *new_state)
static unsigned long x86_dr_low_get_status()
static void x86_show_dr(struct x86_debug_reg_state *state, const char *func, CORE_ADDR addr, int len, enum target_hw_bp_type type)
static void x86_update_inferior_debug_regs(struct x86_debug_reg_state *state, struct x86_debug_reg_state *new_state)
int x86_dr_stopped_by_watchpoint(struct x86_debug_reg_state *state)
int x86_dr_insert_watchpoint(struct x86_debug_reg_state *state, enum target_hw_bp_type type, CORE_ADDR addr, int len)
static int x86_remove_aligned_watchpoint(struct x86_debug_reg_state *state, CORE_ADDR addr, unsigned len_rw_bits)
int x86_dr_region_ok_for_watchpoint(struct x86_debug_reg_state *state, CORE_ADDR addr, int len)
#define X86_DR_GET_RW_LEN(dr7, i)
#define X86_DR_LOCAL_ENABLE(state, i)
#define X86_DR_CONTROL_MASK
static int x86_insert_aligned_watchpoint(struct x86_debug_reg_state *state, CORE_ADDR addr, unsigned len_rw_bits)
#define X86_DR_SET_RW_LEN(state, i, rwlen)
static unsigned x86_length_and_rw_bits(int len, enum target_hw_bp_type type)
#define DR_LOCAL_SLOWDOWN
static bool x86_dr_low_can_set_addr()
int x86_dr_stopped_data_address(struct x86_debug_reg_state *state, CORE_ADDR *addr_p)
static CORE_ADDR x86_dr_low_get_addr(int i)
#define X86_DR_VACANT(state, i)
#define TARGET_HAS_DR_LEN_8
static int x86_handle_nonaligned_watchpoint(struct x86_debug_reg_state *state, x86_wp_op_t what, CORE_ADDR addr, int len, enum target_hw_bp_type type)
static unsigned long x86_dr_low_get_control()
#define ALL_DEBUG_ADDRESS_REGISTERS(i)
struct x86_dr_low_type x86_dr_low