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mips-tdep.h
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1/* Target-dependent header for the MIPS architecture, for GDB, the GNU Debugger.
2
3 Copyright (C) 2002-2023 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20#ifndef MIPS_TDEP_H
21#define MIPS_TDEP_H
22
23#include "objfiles.h"
24#include "gdbarch.h"
25
26struct gdbarch;
27
28/* All the possible MIPS ABIs. */
40
41/* Return the MIPS ABI associated with GDBARCH. */
42enum mips_abi mips_abi (struct gdbarch *gdbarch);
43
44/* Base and compressed MIPS ISA variations. */
46 {
47 ISA_MIPS = -1, /* mips_compression_string depends on it. */
50 };
51
52/* Corresponding MSYMBOL_TARGET_FLAG aliases. */
53#define MSYMBOL_TARGET_FLAG_MIPS16(sym) \
54 (sym)->target_flag_1 ()
55
56#define SET_MSYMBOL_TARGET_FLAG_MIPS16(sym) \
57 (sym)->set_target_flag_1 (true)
58
59#define MSYMBOL_TARGET_FLAG_MICROMIPS(sym) \
60 (sym)->target_flag_2 ()
61
62#define SET_MSYMBOL_TARGET_FLAG_MICROMIPS(sym) \
63 (sym)->set_target_flag_2 (true)
64
65/* Return the MIPS ISA's register size. Just a short cut to the BFD
66 architecture's word size. */
67extern int mips_isa_regsize (struct gdbarch *gdbarch);
68
69/* Return the current index for various MIPS registers. */
71{
72 int pc;
73 int fp0;
76 int badvaddr; /* Bad vaddr for addressing exception. */
77 int cause; /* Describes last exception. */
78 int hi; /* Multiply/divide temp. */
79 int lo; /* ... */
80 int dspacc; /* SmartMIPS/DSP accumulators. */
81 int dspctl; /* DSP control. */
82};
83extern const struct mips_regnum *mips_regnum (struct gdbarch *gdbarch);
84
85/* Some MIPS boards don't support floating point while others only
86 support single-precision floating-point operations. */
87
89{
90 MIPS_FPU_DOUBLE, /* Full double precision floating point. */
91 MIPS_FPU_SINGLE, /* Single precision floating point (R4650). */
92 MIPS_FPU_NONE /* No floating point. */
93};
94
95/* MIPS specific per-architecture information. */
97{
98 /* from the elf header */
99 int elf_flags = 0;
100
101 /* mips options */
102 enum mips_abi mips_abi {};
103 enum mips_abi found_abi {};
104 enum mips_isa mips_isa {};
109 /* Is the target using 64-bit raw integer registers but only
110 storing a left-aligned 32-bit value in each? */
112 /* Indexes for various registers. IRIX and embedded have
113 different values. This contains the "public" fields. Don't
114 add any that do not need to be public. */
115 const struct mips_regnum *regnum = nullptr;
116 /* Register names table for the current register set. */
117 const char * const *mips_processor_reg_names = nullptr;
118
119 /* The size of register data available from the target, if known.
120 This doesn't quite obsolete the manual
121 mips64_transfers_32bit_regs_p, since that is documented to force
122 left alignment even for big endian (very strange). */
125
126 /* Return the expected next PC if FRAME is stopped at a syscall
127 instruction. */
128 CORE_ADDR (*syscall_next_pc) (frame_info_ptr frame) = nullptr;
129};
130
131/* Register numbers of various important registers. */
132
133enum
134{
135 MIPS_ZERO_REGNUM = 0, /* Read-only register, always 0. */
137 MIPS_V0_REGNUM = 2, /* Function integer return value. */
138 MIPS_A0_REGNUM = 4, /* Loc of first arg during a subr call. */
139 MIPS_S2_REGNUM = 18, /* Contains return address in MIPS16 thunks. */
140 MIPS_T9_REGNUM = 25, /* Contains address of callee in PIC. */
144 MIPS_PS_REGNUM = 32, /* Contains processor status. */
151 MIPS_UNUSED_REGNUM = 73, /* Never used, FIXME. */
152 MIPS_FIRST_EMBED_REGNUM = 74, /* First CP0 register for embedded use. */
153 MIPS_PRID_REGNUM = 89, /* Processor ID. */
154 MIPS_LAST_EMBED_REGNUM = 89 /* Last one. */
156
157/* Instruction sizes and other useful constants. */
158enum
159{
162 /* The number of floating-point or integer registers. */
163 MIPS_NUMREGS = 32
165
166/* Single step based on where the current instruction will take us. */
167extern std::vector<CORE_ADDR> mips_software_single_step
168 (struct regcache *regcache);
169
170/* Strip the ISA (compression) bit off from ADDR. */
171extern CORE_ADDR mips_unmake_compact_addr (CORE_ADDR addr);
172
173/* Tell if the program counter value in MEMADDR is in a standard
174 MIPS function. */
175extern int mips_pc_is_mips (CORE_ADDR memaddr);
176
177/* Tell if the program counter value in MEMADDR is in a MIPS16
178 function. */
179extern int mips_pc_is_mips16 (struct gdbarch *gdbarch, CORE_ADDR memaddr);
180
181/* Tell if the program counter value in MEMADDR is in a microMIPS
182 function. */
183extern int mips_pc_is_micromips (struct gdbarch *gdbarch, CORE_ADDR memaddr);
184
185/* Return the currently configured (or set) saved register size. */
186extern unsigned int mips_abi_regsize (struct gdbarch *gdbarch);
187
188/* Make PC the address of the next instruction to execute. */
189extern void mips_write_pc (struct regcache *regcache, CORE_ADDR pc);
190
191/* Target descriptions which only indicate the size of general
192 registers. */
193extern struct target_desc *mips_tdesc_gp32;
194extern struct target_desc *mips_tdesc_gp64;
195
196/* Return non-zero if PC is in a MIPS SVR4 lazy binding stub section. */
197
198static inline int
200{
201 return pc_in_section (pc, ".MIPS.stubs");
202}
203
204#endif /* MIPS_TDEP_H */
mips_fpu_type
Definition mips-tdep.h:89
@ MIPS_FPU_NONE
Definition mips-tdep.h:92
@ MIPS_FPU_DOUBLE
Definition mips-tdep.h:90
@ MIPS_FPU_SINGLE
Definition mips-tdep.h:91
int mips_pc_is_mips(CORE_ADDR memaddr)
Definition mips-tdep.c:1208
@ MIPS_EMBED_HI_REGNUM
Definition mips-tdep.h:146
@ MIPS_PRID_REGNUM
Definition mips-tdep.h:153
@ MIPS_EMBED_LO_REGNUM
Definition mips-tdep.h:145
@ MIPS_RA_REGNUM
Definition mips-tdep.h:143
@ MIPS_FIRST_EMBED_REGNUM
Definition mips-tdep.h:152
@ MIPS_V0_REGNUM
Definition mips-tdep.h:137
@ MIPS_ZERO_REGNUM
Definition mips-tdep.h:135
@ MIPS_SP_REGNUM
Definition mips-tdep.h:142
@ MIPS_AT_REGNUM
Definition mips-tdep.h:136
@ MIPS_EMBED_CAUSE_REGNUM
Definition mips-tdep.h:148
@ MIPS_PS_REGNUM
Definition mips-tdep.h:144
@ MIPS_GP_REGNUM
Definition mips-tdep.h:141
@ MIPS_S2_REGNUM
Definition mips-tdep.h:139
@ MIPS_LAST_EMBED_REGNUM
Definition mips-tdep.h:154
@ MIPS_EMBED_FP0_REGNUM
Definition mips-tdep.h:150
@ MIPS_EMBED_BADVADDR_REGNUM
Definition mips-tdep.h:147
@ MIPS_UNUSED_REGNUM
Definition mips-tdep.h:151
@ MIPS_EMBED_PC_REGNUM
Definition mips-tdep.h:149
@ MIPS_T9_REGNUM
Definition mips-tdep.h:140
@ MIPS_A0_REGNUM
Definition mips-tdep.h:138
struct target_desc * mips_tdesc_gp64
Definition mips-tdep.c:213
void mips_write_pc(struct regcache *regcache, CORE_ADDR pc)
Definition mips-tdep.c:1453
int mips_pc_is_mips16(struct gdbarch *gdbarch, CORE_ADDR memaddr)
Definition mips-tdep.c:1226
struct target_desc * mips_tdesc_gp32
Definition mips-tdep.c:212
@ MIPS_INSN16_SIZE
Definition mips-tdep.h:160
@ MIPS_NUMREGS
Definition mips-tdep.h:163
@ MIPS_INSN32_SIZE
Definition mips-tdep.h:161
std::vector< CORE_ADDR > mips_software_single_step(struct regcache *regcache)
Definition mips-tdep.c:4210
mips_abi
Definition mips-tdep.h:30
@ MIPS_ABI_EABI32
Definition mips-tdep.h:36
@ MIPS_ABI_O64
Definition mips-tdep.h:35
@ MIPS_ABI_N32
Definition mips-tdep.h:32
@ MIPS_ABI_O32
Definition mips-tdep.h:33
@ MIPS_ABI_UNKNOWN
Definition mips-tdep.h:31
@ MIPS_ABI_EABI64
Definition mips-tdep.h:37
@ MIPS_ABI_LAST
Definition mips-tdep.h:38
@ MIPS_ABI_N64
Definition mips-tdep.h:34
const struct mips_regnum * mips_regnum(struct gdbarch *gdbarch)
Definition mips-tdep.c:228
static int in_mips_stubs_section(CORE_ADDR pc)
Definition mips-tdep.h:199
int mips_pc_is_micromips(struct gdbarch *gdbarch, CORE_ADDR memaddr)
Definition mips-tdep.c:1244
unsigned int mips_abi_regsize(struct gdbarch *gdbarch)
Definition mips-tdep.c:309
CORE_ADDR mips_unmake_compact_addr(CORE_ADDR addr)
Definition mips-tdep.c:403
mips_isa
Definition mips-tdep.h:46
@ ISA_MICROMIPS
Definition mips-tdep.h:49
@ ISA_MIPS
Definition mips-tdep.h:47
@ ISA_MIPS16
Definition mips-tdep.h:48
int mips_isa_regsize(struct gdbarch *gdbarch)
Definition mips-tdep.c:290
bool pc_in_section(CORE_ADDR pc, const char *name)
Definition objfiles.c:1175
CORE_ADDR(* syscall_next_pc)(frame_info_ptr frame)
Definition mips-tdep.h:128
const struct mips_regnum * regnum
Definition mips-tdep.h:115
int mips64_transfers_32bit_regs_p
Definition mips-tdep.h:111
int mips_last_fp_arg_regnum
Definition mips-tdep.h:107
const char *const * mips_processor_reg_names
Definition mips-tdep.h:117
int fp_implementation_revision
Definition mips-tdep.h:74
int fp_control_status
Definition mips-tdep.h:75