GDB (xrefs)
Loading...
Searching...
No Matches
Classes | Namespaces | Macros | Enumerations | Functions
aarch64.h File Reference
#include "gdbsupport/tdesc.h"

Go to the source code of this file.

Classes

struct  aarch64_features
 
struct  std::hash< aarch64_features >
 

Namespaces

namespace  std
 

Macros

#define AARCH64_TLS_REGISTER_SIZE   8
 
#define V_REGISTER_SIZE   16
 
#define VA_RANGE_SELECT_BIT_MASK   0x80000000000000ULL
 
#define AARCH64_TOP_BITS_MASK   0xff80000000000000ULL
 
#define AARCH64_Q0_REGNUM   0
 
#define AARCH64_D0_REGNUM   (AARCH64_Q0_REGNUM + AARCH64_D_REGISTER_COUNT)
 
#define AARCH64_S0_REGNUM   (AARCH64_D0_REGNUM + 32)
 
#define AARCH64_H0_REGNUM   (AARCH64_S0_REGNUM + 32)
 
#define AARCH64_B0_REGNUM   (AARCH64_H0_REGNUM + 32)
 
#define AARCH64_SVE_V0_REGNUM   (AARCH64_B0_REGNUM + 32)
 
#define AARCH64_PAUTH_DMASK_REGNUM(pauth_reg_base)   (pauth_reg_base)
 
#define AARCH64_PAUTH_CMASK_REGNUM(pauth_reg_base)   (pauth_reg_base + 1)
 
#define AARCH64_PAUTH_DMASK_HIGH_REGNUM(pauth_reg_base)   (pauth_reg_base + 2)
 
#define AARCH64_PAUTH_CMASK_HIGH_REGNUM(pauth_reg_base)   (pauth_reg_base + 3)
 
#define AARCH64_PAUTH_REGS_SIZE   (16)
 
#define AARCH64_X_REGS_NUM   31
 
#define AARCH64_V_REGS_NUM   32
 
#define AARCH64_SVE_Z_REGS_NUM   AARCH64_V_REGS_NUM
 
#define AARCH64_SVE_P_REGS_NUM   16
 
#define AARCH64_NUM_REGS   AARCH64_FPCR_REGNUM + 1
 
#define AARCH64_SVE_NUM_REGS   AARCH64_SVE_VG_REGNUM + 1
 
#define sve_vg_from_vl(vl)   ((vl) / 8)
 
#define sve_vl_from_vg(vg)   ((vg) * 8)
 
#define sve_vq_from_vl(vl)   ((vl) / 0x10)
 
#define sve_vl_from_vq(vq)   ((vq) * 0x10)
 
#define sve_vq_from_vg(vg)   (sve_vq_from_vl (sve_vl_from_vg (vg)))
 
#define sve_vg_from_vq(vq)   (sve_vg_from_vl (sve_vl_from_vq (vq)))
 
#define AARCH64_MAX_SVE_VQ   16
 
#define AARCH64_ZA_TILES_NUM   31
 
#define AARCH64_SME_MIN_SVL   128
 
#define AARCH64_SME_MAX_SVL   2048
 
#define AARCH64_SME2_ZT0_SIZE   64
 

Enumerations

enum  aarch64_regnum {
  AARCH64_X0_REGNUM , AARCH64_FP_REGNUM = AARCH64_X0_REGNUM + 29 , AARCH64_LR_REGNUM = AARCH64_X0_REGNUM + 30 , AARCH64_SP_REGNUM ,
  AARCH64_PC_REGNUM , AARCH64_CPSR_REGNUM , AARCH64_V0_REGNUM , AARCH64_V31_REGNUM = AARCH64_V0_REGNUM + 31 ,
  AARCH64_SVE_Z0_REGNUM = AARCH64_V0_REGNUM , AARCH64_SVE_Z31_REGNUM = AARCH64_V31_REGNUM , AARCH64_FPSR_REGNUM , AARCH64_FPCR_REGNUM ,
  AARCH64_SVE_P0_REGNUM , AARCH64_SVE_P15_REGNUM = AARCH64_SVE_P0_REGNUM + 15 , AARCH64_SVE_FFR_REGNUM , AARCH64_SVE_VG_REGNUM ,
  AARCH64_LAST_X_ARG_REGNUM = AARCH64_X0_REGNUM + 7 , AARCH64_STRUCT_RETURN_REGNUM = AARCH64_X0_REGNUM + 8 , AARCH64_LAST_V_ARG_REGNUM = AARCH64_V0_REGNUM + 7
}
 

Functions

bool operator== (const aarch64_features &lhs, const aarch64_features &rhs)
 
target_descaarch64_create_target_description (const aarch64_features &features)
 
CORE_ADDR aarch64_remove_top_bits (CORE_ADDR pointer, CORE_ADDR mask)
 
CORE_ADDR aarch64_mask_from_pac_registers (const CORE_ADDR cmask, const CORE_ADDR dmask)
 

Macro Definition Documentation

◆ AARCH64_B0_REGNUM

#define AARCH64_B0_REGNUM   (AARCH64_H0_REGNUM + 32)

◆ AARCH64_D0_REGNUM

#define AARCH64_D0_REGNUM   (AARCH64_Q0_REGNUM + AARCH64_D_REGISTER_COUNT)

◆ AARCH64_H0_REGNUM

#define AARCH64_H0_REGNUM   (AARCH64_S0_REGNUM + 32)

◆ AARCH64_MAX_SVE_VQ

#define AARCH64_MAX_SVE_VQ   16

◆ AARCH64_NUM_REGS

#define AARCH64_NUM_REGS   AARCH64_FPCR_REGNUM + 1

Definition at line 172 of file aarch64.h.

◆ AARCH64_PAUTH_CMASK_HIGH_REGNUM

#define AARCH64_PAUTH_CMASK_HIGH_REGNUM ( pauth_reg_base)    (pauth_reg_base + 3)

Definition at line 163 of file aarch64.h.

Referenced by aarch64_frame_unmask_lr(), and aarch64_remove_non_address_bits().

◆ AARCH64_PAUTH_CMASK_REGNUM

#define AARCH64_PAUTH_CMASK_REGNUM ( pauth_reg_base)    (pauth_reg_base + 1)

◆ AARCH64_PAUTH_DMASK_HIGH_REGNUM

#define AARCH64_PAUTH_DMASK_HIGH_REGNUM ( pauth_reg_base)    (pauth_reg_base + 2)

Definition at line 162 of file aarch64.h.

Referenced by aarch64_remove_non_address_bits().

◆ AARCH64_PAUTH_DMASK_REGNUM

#define AARCH64_PAUTH_DMASK_REGNUM ( pauth_reg_base)    (pauth_reg_base)

◆ AARCH64_PAUTH_REGS_SIZE

#define AARCH64_PAUTH_REGS_SIZE   (16)

Definition at line 166 of file aarch64.h.

◆ AARCH64_Q0_REGNUM

#define AARCH64_Q0_REGNUM   0

◆ AARCH64_S0_REGNUM

#define AARCH64_S0_REGNUM   (AARCH64_D0_REGNUM + 32)

◆ AARCH64_SME2_ZT0_SIZE

#define AARCH64_SME2_ZT0_SIZE   64

◆ AARCH64_SME_MAX_SVL

#define AARCH64_SME_MAX_SVL   2048

Definition at line 228 of file aarch64.h.

◆ AARCH64_SME_MIN_SVL

#define AARCH64_SME_MIN_SVL   128

Definition at line 227 of file aarch64.h.

◆ AARCH64_SVE_NUM_REGS

#define AARCH64_SVE_NUM_REGS   AARCH64_SVE_VG_REGNUM + 1

Definition at line 173 of file aarch64.h.

◆ AARCH64_SVE_P_REGS_NUM

#define AARCH64_SVE_P_REGS_NUM   16

◆ AARCH64_SVE_V0_REGNUM

#define AARCH64_SVE_V0_REGNUM   (AARCH64_B0_REGNUM + 32)

◆ AARCH64_SVE_Z_REGS_NUM

#define AARCH64_SVE_Z_REGS_NUM   AARCH64_V_REGS_NUM

◆ AARCH64_TLS_REGISTER_SIZE

#define AARCH64_TLS_REGISTER_SIZE   8

◆ AARCH64_TOP_BITS_MASK

#define AARCH64_TOP_BITS_MASK   0xff80000000000000ULL

Definition at line 148 of file aarch64.h.

Referenced by aarch64_frame_unmask_lr(), and aarch64_remove_non_address_bits().

◆ AARCH64_V_REGS_NUM

#define AARCH64_V_REGS_NUM   32

◆ AARCH64_X_REGS_NUM

#define AARCH64_X_REGS_NUM   31

Definition at line 168 of file aarch64.h.

◆ AARCH64_ZA_TILES_NUM

#define AARCH64_ZA_TILES_NUM   31

Definition at line 225 of file aarch64.h.

Referenced by aarch64_gdbarch_init(), and aarch64_initialize_sme_pseudo_names().

◆ sve_vg_from_vl

#define sve_vg_from_vl ( vl)    ((vl) / 8)

◆ sve_vg_from_vq

#define sve_vg_from_vq ( vq)    (sve_vg_from_vl (sve_vl_from_vq (vq)))

Definition at line 193 of file aarch64.h.

Referenced by aarch64_sve_set_vq(), and aarch64_za_set_svq().

◆ sve_vl_from_vg

#define sve_vl_from_vg ( vg)    ((vg) * 8)

◆ sve_vl_from_vq

#define sve_vl_from_vq ( vq)    ((vq) * 0x10)

◆ sve_vq_from_vg

#define sve_vq_from_vg ( vg)    (sve_vq_from_vl (sve_vl_from_vg (vg)))

Definition at line 192 of file aarch64.h.

Referenced by aarch64_sve_set_vq(), and aarch64_za_set_svq().

◆ sve_vq_from_vl

#define sve_vq_from_vl ( vl)    ((vl) / 0x10)

◆ V_REGISTER_SIZE

#define V_REGISTER_SIZE   16

◆ VA_RANGE_SELECT_BIT_MASK

#define VA_RANGE_SELECT_BIT_MASK   0x80000000000000ULL

Enumeration Type Documentation

◆ aarch64_regnum

Enumerator
AARCH64_X0_REGNUM 
AARCH64_FP_REGNUM 
AARCH64_LR_REGNUM 
AARCH64_SP_REGNUM 
AARCH64_PC_REGNUM 
AARCH64_CPSR_REGNUM 
AARCH64_V0_REGNUM 
AARCH64_V31_REGNUM 
AARCH64_SVE_Z0_REGNUM 
AARCH64_SVE_Z31_REGNUM 
AARCH64_FPSR_REGNUM 
AARCH64_FPCR_REGNUM 
AARCH64_SVE_P0_REGNUM 
AARCH64_SVE_P15_REGNUM 
AARCH64_SVE_FFR_REGNUM 
AARCH64_SVE_VG_REGNUM 
AARCH64_LAST_X_ARG_REGNUM 
AARCH64_STRUCT_RETURN_REGNUM 
AARCH64_LAST_V_ARG_REGNUM 

Definition at line 113 of file aarch64.h.

Function Documentation

◆ aarch64_create_target_description()

target_desc * aarch64_create_target_description ( const aarch64_features & features)

◆ aarch64_mask_from_pac_registers()

CORE_ADDR aarch64_mask_from_pac_registers ( const CORE_ADDR cmask,
const CORE_ADDR dmask )

Definition at line 94 of file aarch64.c.

Referenced by aarch64_remove_non_address_bits().

◆ aarch64_remove_top_bits()

CORE_ADDR aarch64_remove_top_bits ( CORE_ADDR pointer,
CORE_ADDR mask )

Definition at line 75 of file aarch64.c.

References VA_RANGE_SELECT_BIT_MASK.

Referenced by aarch64_frame_unmask_lr(), and aarch64_remove_non_address_bits().

◆ operator==()

bool operator== ( const aarch64_features & lhs,
const aarch64_features & rhs )
inline