38#include "sim/sim-ppc.h"
46#include "coff/internal.h"
48#include "coff/xcoff.h"
90#define IS_SPE_PSEUDOREG(tdep, regnum) ((tdep)->ppc_ev0_regnum >= 0 \
91 && (regnum) >= (tdep)->ppc_ev0_regnum \
92 && (regnum) < (tdep)->ppc_ev0_regnum + 32)
95#define IS_DFP_PSEUDOREG(tdep, regnum) ((tdep)->ppc_dl0_regnum >= 0 \
96 && (regnum) >= (tdep)->ppc_dl0_regnum \
97 && (regnum) < (tdep)->ppc_dl0_regnum + 16)
101#define IS_V_ALIAS_PSEUDOREG(tdep, regnum) (\
102 (tdep)->ppc_v0_alias_regnum >= 0 \
103 && (regnum) >= (tdep)->ppc_v0_alias_regnum \
104 && (regnum) < (tdep)->ppc_v0_alias_regnum + ppc_num_vrs)
107#define IS_VSX_PSEUDOREG(tdep, regnum) ((tdep)->ppc_vsr0_regnum >= 0 \
108 && (regnum) >= (tdep)->ppc_vsr0_regnum \
109 && (regnum) < (tdep)->ppc_vsr0_regnum + ppc_num_vsrs)
112#define IS_EFP_PSEUDOREG(tdep, regnum) ((tdep)->ppc_efpr0_regnum >= 0 \
113 && (regnum) >= (tdep)->ppc_efpr0_regnum \
114 && (regnum) < (tdep)->ppc_efpr0_regnum + ppc_num_efprs)
118#define IS_CDFP_PSEUDOREG(tdep, regnum) ((tdep)->ppc_cdl0_regnum >= 0 \
119 && (regnum) >= (tdep)->ppc_cdl0_regnum \
120 && (regnum) < (tdep)->ppc_cdl0_regnum + 16)
123#define IS_CVSX_PSEUDOREG(tdep, regnum) ((tdep)->ppc_cvsr0_regnum >= 0 \
124 && (regnum) >= (tdep)->ppc_cvsr0_regnum \
125 && (regnum) < (tdep)->ppc_cvsr0_regnum + ppc_num_vsrs)
128#define IS_CEFP_PSEUDOREG(tdep, regnum) ((tdep)->ppc_cefpr0_regnum >= 0 \
129 && (regnum) >= (tdep)->ppc_cefpr0_regnum \
130 && (regnum) < (tdep)->ppc_cefpr0_regnum + ppc_num_efprs)
167 if (per_inf ==
nullptr)
220 return (regno >= tdep->
ppc_vr0_regnum && regno <= tdep->ppc_vrsave_regnum);
289 gdb_assert (table[gdb_regno] == -1);
304 static const char *
const segment_regs[] = {
305 "sr0",
"sr1",
"sr2",
"sr3",
"sr4",
"sr5",
"sr6",
"sr7",
306 "sr8",
"sr9",
"sr10",
"sr11",
"sr12",
"sr13",
"sr14",
"sr15"
311 for (i = 0; i < total_regs; i++)
323 sim_ppc_f0_regnum + i);
347 sim_ppc_vr0_regnum + i);
353 sim_ppc_vscr_regnum);
362 sim_ppc_rh0_regnum + i);
371 for (i = 0; i < sim_ppc_num_sprs; i++)
373 const char *spr_name = sim_spr_register_name (i);
376 if (spr_name != NULL)
418 const gdb_byte *regs,
size_t offset,
int regsize)
420 if (
regnum != -1 && offset != -1)
426 if (gdb_regsize < regsize
428 offset += regsize - gdb_regsize;
439 gdb_byte *regs,
size_t offset,
int regsize)
441 if (
regnum != -1 && offset != -1)
447 if (gdb_regsize < regsize)
451 memset (regs + offset, 0, regsize - gdb_regsize);
452 offset += regsize - gdb_regsize;
455 memset (regs + offset + regsize - gdb_regsize, 0,
456 regsize - gdb_regsize);
522 int regnum,
const void *gregs,
size_t len)
551 (
const gdb_byte *) gregs, offsets->
cr_offset,
554 (
const gdb_byte *) gregs, offsets->
xer_offset,
557 (
const gdb_byte *) gregs, offsets->
mq_offset,
572 int regnum,
const void *fpregs,
size_t len)
611 int regnum,
void *gregs,
size_t len)
662 int regnum,
void *fpregs,
size_t len)
696 int opcode = (insn >> 26) & 0x03f;
697 int sd = (insn >> 21) & 0x01f;
698 int a = (insn >> 16) & 0x01f;
699 int subcode = (insn >> 1) & 0x3ff;
707 if (opcode == 31 && subcode == 444 && a == 1)
709 if (opcode == 14 && sd == 1)
711 if (opcode == 58 && sd == 1)
720 if (opcode == 19 && subcode == 16)
722 if (opcode == 19 && subcode == 528)
752 CORE_ADDR scan_pc, func_start, func_end, epilogue_start, epilogue_end;
761 if (epilogue_start < func_start) epilogue_start = func_start;
764 if (epilogue_end > func_end) epilogue_end = func_end;
768 for (scan_pc = pc; scan_pc < epilogue_end; scan_pc +=
PPC_INSN_SIZE)
774 if (insn == 0x4e800020)
778 if (insn == 0x4e800420)
782 if (ctr > func_start && ctr < func_end)
794 scan_pc >= epilogue_start;
834#define OP_MASK 0xfc000000
835#define BP_MASK 0xFC0007FE
836#define B_INSN 0x48000000
837#define BC_INSN 0x40000000
838#define BXL_INSN 0x4c000000
839#define BP_INSN 0x7C000008
843#define LOAD_AND_RESERVE_MASK 0xfc0007fe
844#define LWARX_INSTRUCTION 0x7c000028
845#define LDARX_INSTRUCTION 0x7c0000A8
846#define LBARX_INSTRUCTION 0x7c000068
847#define LHARX_INSTRUCTION 0x7c0000e8
848#define LQARX_INSTRUCTION 0x7c000228
849#define STORE_CONDITIONAL_MASK 0xfc0007ff
850#define STWCX_INSTRUCTION 0x7c00012d
851#define STDCX_INSTRUCTION 0x7c0001ad
852#define STBCX_INSTRUCTION 0x7c00056d
853#define STHCX_INSTRUCTION 0x7c0005ad
854#define STQCX_INSTRUCTION 0x7c00016d
857#define ADDPCIS_INSN 0x4c000004
858#define ADDPCIS_INSN_MASK 0xfc00003e
859#define ADDPCIS_TARGET_REGISTER 0x03F00000
860#define ADDPCIS_INSN_REGSHIFT 21
862#define PNOP_MASK 0xfff3ffff
863#define PNOP_INSN 0x07000000
864#define R_MASK 0x00100000
865#define R_ZERO 0x00000000
869#define IS_LOAD_AND_RESERVE_INSN(insn) ((insn & LOAD_AND_RESERVE_MASK) == LWARX_INSTRUCTION \
870 || (insn & LOAD_AND_RESERVE_MASK) == LDARX_INSTRUCTION \
871 || (insn & LOAD_AND_RESERVE_MASK) == LBARX_INSTRUCTION \
872 || (insn & LOAD_AND_RESERVE_MASK) == LHARX_INSTRUCTION \
873 || (insn & LOAD_AND_RESERVE_MASK) == LQARX_INSTRUCTION)
876#define IS_STORE_CONDITIONAL_INSN(insn) ((insn & STORE_CONDITIONAL_MASK) == STWCX_INSTRUCTION \
877 || (insn & STORE_CONDITIONAL_MASK) == STDCX_INSTRUCTION \
878 || (insn & STORE_CONDITIONAL_MASK) == STBCX_INSTRUCTION \
879 || (insn & STORE_CONDITIONAL_MASK) == STHCX_INSTRUCTION \
880 || (insn & STORE_CONDITIONAL_MASK) == STQCX_INSTRUCTION)
883 ppc_displaced_step_copy_insn_closure;
889 CORE_ADDR from, CORE_ADDR to,
894 std::unique_ptr<ppc_displaced_step_copy_insn_closure> closure
895 (
new ppc_displaced_step_copy_insn_closure (len));
896 gdb_byte *buf = closure->buf.data ();
912 if ((insn &
OP_MASK) == 1 << 26)
943 bytes_to_string (buf, len).c_str ());
954 CORE_ADDR from, CORE_ADDR to,
955 struct regcache *regs,
bool completed_p)
962 pc = from + (pc - to);
969 ppc_displaced_step_copy_insn_closure *closure
970 = (ppc_displaced_step_copy_insn_closure *) closure_;
980 if ((opcode) == 1 << 26)
991 LONGEST displaced_offset;
992 ULONGEST current_val;
994 displaced_offset = from - to;
1002 + displaced_offset));
1004 current_val + displaced_offset);
1012 ULONGEST current_pc;
1019 offset = current_pc - to;
1082 CORE_ADDR &displaced_pc)
1089 CORE_ADDR disp_step_buf_addr
1095 return per_inferior->
disp_step_buf->prepare (thread, displaced_pc);
1118 if (per_inferior ==
nullptr
1137std::vector<CORE_ADDR>
1143 CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
1145 CORE_ADDR closing_insn;
1149 int last_breakpoint = 0;
1150 const int atomic_sequence_length = 16;
1151 int bc_insn_count = 0;
1159 for (insn_count = 0; insn_count < atomic_sequence_length; ++insn_count)
1161 if ((insn &
OP_MASK) == 1 << 26)
1172 int immediate = ((insn & 0xfffc) ^ 0x8000) - 0x8000;
1173 int absolute = insn & 2;
1175 if (bc_insn_count >= 1)
1180 breaks[1] = immediate;
1182 breaks[1] =
loc + immediate;
1206 && (breaks[1] == breaks[0]
1207 || (breaks[1] >= pc && breaks[1] <= closing_insn)))
1208 last_breakpoint = 0;
1210 std::vector<CORE_ADDR> next_pcs;
1212 for (index = 0; index <= last_breakpoint; index++)
1213 next_pcs.push_back (breaks[index]);
1219#define SIGNED_SHORT(x) \
1220 ((sizeof (short) == 2) \
1221 ? ((int)(short)(x)) \
1222 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
1224#define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
1239 if ((op & 0xfc0007fe) == 0x7c000378)
1242 const int rx_regno = (op >> 16) & 31;
1246 if (rx_regno == 0 && ry_regno >= 3 && ry_regno <= 10)
1248 *r0_contains_arg = 1;
1257 if ((op & 0xfc1f0003) == 0xf8010000 ||
1258 (op & 0xfc1f0000) == 0xd8010000)
1263 return (rx_regno >= 3 && rx_regno <= 10);
1269 ((op & 0xfc1f0000) == 0x901f0000 ||
1270 (op & 0xfc1f0000) == 0x981f0000 ||
1271 (op & 0xfc1f0000) == 0xd81f0000))
1277 return ((rx_regno >= 3 && rx_regno <= 10)
1278 || (rx_regno == 0 && *r0_contains_arg));
1281 if ((op & 0xfc1f0000) == 0xfc010000)
1286 return (src_regno >= 2 && src_regno <= 8);
1289 if (framep && ((op & 0xfc1f0000) == 0xfc1f0000))
1294 return (src_regno >= 2 && src_regno <= 8);
1316 absolute = (int) ((insn >> 1) & 1);
1317 immediate = ((insn & ~3) << 6) >> 6;
1321 dest = pc + immediate;
1324 if ((dest_insn & 0xfc00ffff) == 0x4c000021)
1340 unsigned long ra,
bool with_update)
1346 ((op & 0xffff0003) == (rs | ra | 0xf8000000)) ||
1348 ((op & 0xffff0000) == (rs | ra | 0x90000000)))
1354 ((op & 0xffff0003) == (rs | ra | 0xf8000001)) ||
1356 ((op & 0xffff0000) == (rs | ra | 0x94000000)))
1373#define BL_MASK 0xfc000001
1374#define BL_INSTRUCTION 0x48000001
1375#define BL_DISPLACEMENT_MASK 0x03fffffc
1400 CORE_ADDR pc = start_pc;
1407 if ((op & 0xffff0000) == 0x90010000)
1409 while ((op & 0xffff0000) == 0x90010000)
1432 if ((op & 0xffff0000) != 0x39810000)
1438 if ((op & 0xffff0000) != 0x3c000000)
1444 if ((op & 0xffff0000) == 0x60000000)
1450 if (op != 0x7c0c0214)
1456 if (op != 0x7c0c0000)
1462 if ((op & 0xff9f0001) != 0x41820000)
1468 if ((op & 0xffff0000) != 0x398c0000)
1474 if (op != 0x900c0000)
1480 if ((op & 0xfc000001) != 0x48000000)
1486 if ((op & 0xffff0000) == 0x900c0000)
1515 if ((op & 0xffff0000) != 0x38010000)
1521 if ((op & 0xffff0000) != 0x3c010000)
1527 if ((op & 0xffff0000) != 0x30000000)
1534 if ((op & 0xffff0000) != 0x3d800000)
1540 if ((op & 0xffff0000) != 0x818c0000)
1546 if ((op & 0xfffffffe) != 0x7c406008)
1583 CORE_ADDR orig_pc = pc;
1584 CORE_ADDR last_prologue_pc = pc;
1585 CORE_ADDR li_found_pc = 0;
1589 long alloca_reg_offset = 0;
1590 long vr_saved_offset = 0;
1596 int vrsave_reg = -1;
1599 int minimal_toc_loaded = 0;
1600 int prev_insn_was_prologue_insn = 1;
1601 int num_skip_non_prologue_insns = 0;
1602 int r0_contains_arg = 0;
1627 if (prev_insn_was_prologue_insn)
1628 last_prologue_pc = pc;
1634 prev_insn_was_prologue_insn = 1;
1641 if ((op & 0xfc1fffff) == 0x7c0802a6)
1659 lr_reg = (op & 0x03e00000) >> 21;
1661 r0_contains_arg = 0;
1664 else if ((op & 0xfc1fffff) == 0x7c000026)
1666 cr_reg = (op & 0x03e00000) >> 21;
1668 r0_contains_arg = 0;
1672 else if ((op & 0xfc1f0000) == 0xd8010000)
1683 else if (((op & 0xfc1f0000) == 0xbc010000) ||
1684 (((op & 0xfc1f0000) == 0x90010000 ||
1685 (op & 0xfc1f0003) == 0xf8010000) &&
1686 (op & 0x03e00000) >= 0x01a00000))
1690 if ((op & 0xfc1f0000) == 0xbc010000)
1691 fdata->
gpr_mask |= ~((1U << reg) - 1);
1697 if ((op & 0xfc1f0003) == 0xf8010000)
1704 else if ((op & 0xffff0000) == 0x3c4c0000
1705 || (op & 0xffff0000) == 0x3c400000
1706 || (op & 0xffff0000) == 0x38420000)
1716 else if (op == 0x60000000)
1722 prev_insn_was_prologue_insn = 0;
1726 else if ((op & 0xffff0000) == 0x3c000000)
1728 fdata->
offset = (op & 0x0000ffff) << 16;
1730 r0_contains_arg = 0;
1734 else if ((op & 0xffff0000) == 0x60000000)
1736 fdata->
offset |= (op & 0x0000ffff);
1738 r0_contains_arg = 0;
1742 else if (lr_reg >= 0 &&
1758 if ((op & 0xfc000003) == 0xf8000000 ||
1759 (op & 0xfc000000) == 0x90000000)
1767 else if (cr_reg >= 0 &&
1774 if ((op & 0xfc000003) == 0xf8000000 ||
1775 (op & 0xfc000000) == 0x90000000)
1783 else if ((op & 0xfe80ffff) == 0x42800005 && lr_reg != -1)
1790 else if (op == 0x48000005)
1797 else if (op == 0x48000004)
1802 else if ((op & 0xffff0000) == 0x3fc00000 ||
1804 (op & 0xffff0000) == 0x3bde0000)
1809 else if ((op & 0xfc000001) == 0x48000001)
1828 if ((pc - orig_pc) > 8)
1833 if ((prologue_sal.
line == 0)
1834 || (prologue_sal.
line != this_sal.
line))
1845 if (op == 0x4def7b82 || op == 0)
1853 else if ((op & 0xfc1f0000) == 0x94010000)
1860 else if ((op & 0xfc1f07fa) == 0x7c01016a)
1867 else if ((op & 0xfc1f0003) == 0xf8010001)
1874 else if ((op & 0xffff0000) == 0x38210000)
1883 else if (((op >> 22) == 0x20f ||
1884 (op >> 22) == 0x3af)
1886 && !minimal_toc_loaded)
1888 minimal_toc_loaded = 1;
1894 else if ((op & 0xfc0007fe) == 0x7c000378 &&
1895 (((op >> 21) & 31) >= 3) &&
1896 (((op >> 21) & 31) <= 10) &&
1897 ((
long) ((op >> 16) & 31)
1911 else if (op == 0x603d0000)
1916 alloca_reg_offset = offset;
1921 else if (op == 0x603f0000
1922 || op == 0x7c3f0b78)
1927 alloca_reg_offset = offset;
1932 else if ((op & 0xfc1fffff) == 0x38010000)
1937 + ((op & ~0x38010000) >> 21));
1938 alloca_reg_offset = offset;
1949 else if ((op & 0xfc1fffff) == 0x7c0042a6)
1954 else if ((op & 0xfc1fffff) == 0x7c0043a6)
1962 else if ((op & 0xfc1f0000) == 0x90010000)
1973 else if (((op & 0xfc000000) == 0x64000000)
1974 || ((op & 0xfc000000) == 0x60000000))
1983 else if ((op & 0xffff0000) == 0x38000000
1984 || (op & 0xffff0000) == 0x39c00000)
1986 if ((op & 0xffff0000) == 0x38000000)
1987 r0_contains_arg = 0;
1994 prev_insn_was_prologue_insn = 0;
1998 else if ((op & 0xfc1fffff) == 0x7c1f01ce)
2000 if (
pc == (li_found_pc + 4))
2009 fdata->
vr_offset = vr_saved_offset + offset;
2011 vr_saved_offset = -1;
2022 else if (arch_info->mach == bfd_mach_ppc_e500
2023 && (op & 0xfc1f07ff) == 0x101f0321)
2025 if ((op & 0x03e00000) >= 0x01a00000)
2029 imm = (op >> 11) & 0x1f;
2030 ev_offset = imm * 8;
2044 else if (arch_info->mach == bfd_mach_ppc_e500
2045 && (op & 0xffe007ff) == 0x13e00320)
2047 if (
pc == (li_found_pc + 4))
2057 fdata->
ev_offset = vr_saved_offset + offset;
2059 vr_saved_offset = -1;
2067 else if (arch_info->mach == bfd_mach_ppc_e500
2068 && (op & 0xffe007ff) == 0x13e00321)
2073 ev_offset = ((op >> 11) & 0x1f) * 8;
2088 else if (arch_info->mach == bfd_mach_ppc_e500
2089 && (op & 0xfc1fffff) == 0x101f0320)
2091 if (
pc == (li_found_pc + 4))
2093 if ((op & 0x03e00000) >= 0x01a00000)
2104 fdata->
ev_offset = vr_saved_offset + offset;
2108 vr_saved_offset = -1;
2125 unsigned int all_mask = ~((1U << fdata->
saved_gpr) - 1);
2127 if ((fdata->
gpr_mask & all_mask) == all_mask)
2131 if (op == 0x4e800020
2132 || op == 0x4e800420)
2136 if ((op & 0xf4000000) == 0x40000000)
2142 if ((op & 0xffff0000) == 0x44000000)
2152 prev_insn_was_prologue_insn = 0;
2169 if ((op & 0xfc000001) == 0x48000001)
2173 if (op == 0x4def7b82)
2179 tmp = find_pc_misc_function (
pc);
2181 && strcmp (misc_function_vector[tmp].
name,
main_name ()) == 0)
2187 if (
pc == lim_pc && lr_reg >= 0)
2191 return last_prologue_pc;
2198 CORE_ADDR limit_pc, func_addr, func_end_addr = 0;
2205 CORE_ADDR post_prologue_pc
2207 if (post_prologue_pc != 0)
2208 return std::max (pc, post_prologue_pc);
2219 limit_pc = pc + 100;
2223 if (func_end_addr && limit_pc > func_end_addr)
2224 limit_pc = func_end_addr;
2252 CORE_ADDR call_dest = pc + 4 + displ;
2271 return (addr & -16);
2299 CORE_ADDR pc,
const char *
name)
2301 return name && startswith (
name,
"@FIX");
2324 unsigned int ii, op;
2326 CORE_ADDR solib_target_pc;
2329 static unsigned trampoline_code[] =
2349 if ((op & 0xfc000003) == 0x48000000)
2353 rel = ((int)(op << 6) >> 6);
2354 return pc + 8 + rel;
2360 if (solib_target_pc)
2361 return solib_target_pc;
2363 for (ii = 0; trampoline_code[ii]; ++ii)
2366 if (op != trampoline_code[ii])
2388 union __gdb_builtin_type_vec64
2392 int32_t v2_int32[2];
2393 int16_t v4_int16[4];
2401 "__ppc_builtin_type_vec64", TYPE_CODE_UNION);
2413 t->
set_name (
"ppc_builtin_type_vec64");
2446 struct type *t_float128
2452 "__ppc_builtin_type_vec128", TYPE_CODE_UNION);
2467 t->
set_name (
"ppc_builtin_type_vec128");
2505 static const char *
const spe_regnames[] = {
2506 "ev0",
"ev1",
"ev2",
"ev3",
"ev4",
"ev5",
"ev6",
"ev7",
2507 "ev8",
"ev9",
"ev10",
"ev11",
"ev12",
"ev13",
"ev14",
"ev15",
2508 "ev16",
"ev17",
"ev18",
"ev19",
"ev20",
"ev21",
"ev22",
"ev23",
2509 "ev24",
"ev25",
"ev26",
"ev27",
"ev28",
"ev29",
"ev30",
"ev31",
2517 static const char *
const dfp128_regnames[] = {
2518 "dl0",
"dl1",
"dl2",
"dl3",
2519 "dl4",
"dl5",
"dl6",
"dl7",
2520 "dl8",
"dl9",
"dl10",
"dl11",
2521 "dl12",
"dl13",
"dl14",
"dl15"
2529 static const char *
const vector_alias_regnames[] = {
2530 "v0",
"v1",
"v2",
"v3",
"v4",
"v5",
"v6",
"v7",
2531 "v8",
"v9",
"v10",
"v11",
"v12",
"v13",
"v14",
"v15",
2532 "v16",
"v17",
"v18",
"v19",
"v20",
"v21",
"v22",
"v23",
2533 "v24",
"v25",
"v26",
"v27",
"v28",
"v29",
"v30",
"v31"
2541 static const char *
const vsx_regnames[] = {
2542 "vs0",
"vs1",
"vs2",
"vs3",
"vs4",
"vs5",
"vs6",
"vs7",
2543 "vs8",
"vs9",
"vs10",
"vs11",
"vs12",
"vs13",
"vs14",
2544 "vs15",
"vs16",
"vs17",
"vs18",
"vs19",
"vs20",
"vs21",
2545 "vs22",
"vs23",
"vs24",
"vs25",
"vs26",
"vs27",
"vs28",
2546 "vs29",
"vs30",
"vs31",
"vs32",
"vs33",
"vs34",
"vs35",
2547 "vs36",
"vs37",
"vs38",
"vs39",
"vs40",
"vs41",
"vs42",
2548 "vs43",
"vs44",
"vs45",
"vs46",
"vs47",
"vs48",
"vs49",
2549 "vs50",
"vs51",
"vs52",
"vs53",
"vs54",
"vs55",
"vs56",
2550 "vs57",
"vs58",
"vs59",
"vs60",
"vs61",
"vs62",
"vs63"
2558 static const char *
const efpr_regnames[] = {
2559 "f32",
"f33",
"f34",
"f35",
"f36",
"f37",
"f38",
2560 "f39",
"f40",
"f41",
"f42",
"f43",
"f44",
"f45",
2561 "f46",
"f47",
"f48",
"f49",
"f50",
"f51",
2562 "f52",
"f53",
"f54",
"f55",
"f56",
"f57",
2563 "f58",
"f59",
"f60",
"f61",
"f62",
"f63"
2571 static const char *
const cdfp128_regnames[] = {
2572 "cdl0",
"cdl1",
"cdl2",
"cdl3",
2573 "cdl4",
"cdl5",
"cdl6",
"cdl7",
2574 "cdl8",
"cdl9",
"cdl10",
"cdl11",
2575 "cdl12",
"cdl13",
"cdl14",
"cdl15"
2583 static const char *
const cvsx_regnames[] = {
2584 "cvs0",
"cvs1",
"cvs2",
"cvs3",
"cvs4",
"cvs5",
"cvs6",
"cvs7",
2585 "cvs8",
"cvs9",
"cvs10",
"cvs11",
"cvs12",
"cvs13",
"cvs14",
2586 "cvs15",
"cvs16",
"cvs17",
"cvs18",
"cvs19",
"cvs20",
"cvs21",
2587 "cvs22",
"cvs23",
"cvs24",
"cvs25",
"cvs26",
"cvs27",
"cvs28",
2588 "cvs29",
"cvs30",
"cvs31",
"cvs32",
"cvs33",
"cvs34",
"cvs35",
2589 "cvs36",
"cvs37",
"cvs38",
"cvs39",
"cvs40",
"cvs41",
"cvs42",
2590 "cvs43",
"cvs44",
"cvs45",
"cvs46",
"cvs47",
"cvs48",
"cvs49",
2591 "cvs50",
"cvs51",
"cvs52",
"cvs53",
"cvs54",
"cvs55",
"cvs56",
2592 "cvs57",
"cvs58",
"cvs59",
"cvs60",
"cvs61",
"cvs62",
"cvs63"
2600 static const char *
const cefpr_regnames[] = {
2601 "cf32",
"cf33",
"cf34",
"cf35",
"cf36",
"cf37",
"cf38",
2602 "cf39",
"cf40",
"cf41",
"cf42",
"cf43",
"cf44",
"cf45",
2603 "cf46",
"cf47",
"cf48",
"cf49",
"cf50",
"cf51",
2604 "cf52",
"cf53",
"cf54",
"cf55",
"cf56",
"cf57",
2605 "cf58",
"cf59",
"cf60",
"cf61",
"cf62",
"cf63"
2642 internal_error (_(
"rs6000_pseudo_register_type: "
2643 "called on unexpected register '%s' (%d)"),
2687 int *optimizedp,
int *unavailablep)
2692 gdb_assert (
type->
code () == TYPE_CODE_FLT);
2695 gdb::make_array_view (from,
2698 optimizedp, unavailablep))
2703 *optimizedp = *unavailablep = 0;
2711 const gdb_byte *from)
2716 gdb_assert (
type->
code () == TYPE_CODE_FLT);
2752static enum register_status
2759 gdb_byte *byte_buffer = (gdb_byte *) buffer;
2760 enum register_status
status;
2785static enum register_status
2793static enum register_status
2795 int ev_reg, gdb_byte *buffer)
2800 enum register_status
status;
2828 int reg_nr,
const gdb_byte *buffer)
2831 reg_nr, (
void *) buffer);
2835static enum register_status
2837 int reg_nr, gdb_byte *buffer)
2841 enum register_status
status;
2877 int reg_nr,
const gdb_byte *buffer)
2911static enum register_status
2929 int reg_nr,
const gdb_byte *buffer)
2939static enum register_status
2941 int reg_nr, gdb_byte *buffer)
2944 int reg_index, vr0, fp0, vsr0_upper;
2945 enum register_status
status;
2989 int reg_nr,
const gdb_byte *buffer)
2992 int reg_index, vr0, fp0, vsr0_upper;
3029static enum register_status
3031 int reg_nr, gdb_byte *buffer)
3060 int reg_nr,
const gdb_byte *buffer)
3083 error (_(
"Cannot write to the checkpointed EFP register, "
3084 "the corresponding vector register is unavailable."));
3092static enum register_status
3095 int reg_nr, gdb_byte *buffer)
3100 gdb_assert (regcache_arch ==
gdbarch);
3117 internal_error (_(
"rs6000_pseudo_register_read: "
3118 "called on unexpected register '%s' (%d)"),
3125 int reg_nr,
const gdb_byte *buffer)
3130 gdb_assert (regcache_arch ==
gdbarch);
3146 internal_error (_(
"rs6000_pseudo_register_write: "
3147 "called on unexpected register '%s' (%d)"),
3200 int reg_index, vr0, fp0, vsr0_upper;
3287 internal_error (_(
"rs6000_pseudo_register_collect: "
3288 "called on unexpected register '%s' (%d)"),
3312 if (0 <= num && num <= 31)
3314 else if (32 <= num && num <= 63)
3319 else if (77 <= num && num <= 108)
3321 else if (1200 <= num && num < 1200 + 32)
3354 if (0 <= num && num <= 31)
3356 else if (32 <= num && num <= 63)
3361 else if (1124 <= num && num < 1124 + 32)
3363 else if (1200 <= num && num < 1200 + 32)
3426 if (0 <= num && num <= 63)
3428 else if (68 <= num && num <= 75)
3429 return num - 68 + 86;
3430 else if (77 <= num && num <= 108)
3431 return num - 77 + 1124;
3481 {
"powerpc",
"PowerPC user-level", bfd_arch_powerpc,
3483 {
"power",
"POWER user-level", bfd_arch_rs6000,
3485 {
"403",
"IBM PowerPC 403", bfd_arch_powerpc,
3487 {
"405",
"IBM PowerPC 405", bfd_arch_powerpc,
3489 {
"601",
"Motorola PowerPC 601", bfd_arch_powerpc,
3491 {
"602",
"Motorola PowerPC 602", bfd_arch_powerpc,
3493 {
"603",
"Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc,
3495 {
"604",
"Motorola PowerPC 604 or 604e", bfd_arch_powerpc,
3497 {
"403GC",
"IBM PowerPC 403GC", bfd_arch_powerpc,
3499 {
"505",
"Motorola PowerPC 505", bfd_arch_powerpc,
3501 {
"860",
"Motorola PowerPC 860 or 850", bfd_arch_powerpc,
3503 {
"750",
"Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc,
3505 {
"7400",
"Motorola/IBM PowerPC 7400 (G4)", bfd_arch_powerpc,
3507 {
"e500",
"Motorola PowerPC e500", bfd_arch_powerpc,
3511 {
"powerpc64",
"PowerPC 64-bit user-level", bfd_arch_powerpc,
3513 {
"620",
"Motorola PowerPC 620", bfd_arch_powerpc,
3515 {
"630",
"Motorola PowerPC 630", bfd_arch_powerpc,
3517 {
"a35",
"PowerPC A35", bfd_arch_powerpc,
3519 {
"rs64ii",
"PowerPC rs64ii", bfd_arch_powerpc,
3521 {
"rs64iii",
"PowerPC rs64iii", bfd_arch_powerpc,
3525 {
"rs1",
"IBM POWER RS1", bfd_arch_rs6000,
3527 {
"rsc",
"IBM POWER RSC", bfd_arch_rs6000,
3529 {
"rs2",
"IBM POWER RS2", bfd_arch_rs6000,
3532 {0, 0, (
enum bfd_architecture) 0, 0, 0}
3575 CORE_ADDR
func = 0, pc = 0;
3577 if ((*this_cache) != NULL)
3580 (*this_cache) = cache;
3601 catch (
const gdb_exception_error &ex)
3603 if (ex.error != NOT_AVAILABLE_ERROR)
3623 if (
func == 0 && saved_lr == pc)
3628 if (
func == saved_func)
3645 byte_order, &backchain))
3646 cache->
base = (CORE_ADDR) backchain;
3683 gpr_addr += wordsize;
3695 for (i = fdata.
saved_vr; i < 32; i++)
3711 CORE_ADDR off = (byte_order == BFD_ENDIAN_BIG ? 4 : 0);
3773 if (info->base == 0)
3779static struct value *
3781 void **this_cache,
int regnum)
3813 (*this_cache) = cache;
3830 catch (
const gdb_exception_error &ex)
3832 if (ex.error != NOT_AVAILABLE_ERROR)
3844 void **this_cache,
struct frame_id *this_id)
3851 if (info->base == 0)
3860static struct value *
3862 void **this_cache,
int regnum)
3875 void **this_prologue_cache)
3904 return info->initial_sp;
3935 && regnum <= tdep->ppc_gp0_regnum + 31)
3941 && regnum <= tdep->ppc_gp0_regnum + 12)
3950 && regnum <= tdep->ppc_fp0_regnum + 31))
3955 && regnum <= tdep->ppc_fp0_regnum + 13))
3964 && regnum <= tdep->ppc_vr0_regnum + 31)
3970 && regnum <= tdep->ppc_vr0_regnum + 19))
3992 gdb_byte *contents = NULL;
4004 int vector_abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_GNU,
4005 Tag_GNU_Power_ABI_Vector);
4006 if (vector_abi == 3)
4010 sect = bfd_get_section_by_name (abfd,
".PPC.EMB.apuinfo");
4014 size = bfd_section_size (sect);
4016 if (!bfd_get_section_contents (abfd, sect, contents, 0,
size))
4043 unsigned int name_len;
4044 unsigned int data_len;
4051 name_len = bfd_get_32 (abfd, ptr);
4052 name_len = (name_len + 3) & ~3U;
4053 data_len = bfd_get_32 (abfd, ptr + 4);
4054 type = bfd_get_32 (abfd, ptr + 8);
4059 && strcmp ((
const char *) ptr,
"APUinfo") != 0)
4078 unsigned int apuinfo = bfd_get_32 (abfd, ptr);
4079 unsigned int apu = apuinfo >> 16;
4085 if (apu == 0x100 || apu == 0x101)
4102#define PPC_FIELD(value, from, len) \
4103 (((value) >> (32 - (from) - (len))) & ((1 << (len)) - 1))
4104#define PPC_SEXT(v, bs) \
4105 ((((CORE_ADDR) (v) & (((CORE_ADDR) 1 << (bs)) - 1)) \
4106 ^ ((CORE_ADDR) 1 << ((bs) - 1))) \
4107 - ((CORE_ADDR) 1 << ((bs) - 1)))
4108#define PPC_OP6(insn) PPC_FIELD (insn, 0, 6)
4109#define PPC_EXTOP(insn) PPC_FIELD (insn, 21, 10)
4110#define PPC_RT(insn) PPC_FIELD (insn, 6, 5)
4111#define PPC_RS(insn) PPC_FIELD (insn, 6, 5)
4112#define PPC_RA(insn) PPC_FIELD (insn, 11, 5)
4113#define PPC_RB(insn) PPC_FIELD (insn, 16, 5)
4114#define PPC_NB(insn) PPC_FIELD (insn, 16, 5)
4115#define PPC_VRT(insn) PPC_FIELD (insn, 6, 5)
4116#define PPC_FRT(insn) PPC_FIELD (insn, 6, 5)
4117#define PPC_SPR(insn) (PPC_FIELD (insn, 11, 5) \
4118 | (PPC_FIELD (insn, 16, 5) << 5))
4119#define PPC_BO(insn) PPC_FIELD (insn, 6, 5)
4120#define PPC_T(insn) PPC_FIELD (insn, 6, 5)
4121#define PPC_D(insn) PPC_SEXT (PPC_FIELD (insn, 16, 16), 16)
4122#define PPC_DS(insn) PPC_SEXT (PPC_FIELD (insn, 16, 14), 14)
4123#define PPC_DQ(insn) PPC_SEXT (PPC_FIELD (insn, 16, 12), 12)
4124#define PPC_BIT(insn,n) ((insn & (1 << (31 - (n)))) ? 1 : 0)
4125#define PPC_OE(insn) PPC_BIT (insn, 21)
4126#define PPC_RC(insn) PPC_BIT (insn, 31)
4127#define PPC_Rc(insn) PPC_BIT (insn, 21)
4128#define PPC_LK(insn) PPC_BIT (insn, 31)
4129#define PPC_TX(insn) PPC_BIT (insn, 31)
4130#define PPC_LEV(insn) PPC_FIELD (insn, 20, 7)
4132#define PPC_XT(insn) ((PPC_TX (insn) << 5) | PPC_T (insn))
4133#define PPC_XTp(insn) ((PPC_BIT (insn, 10) << 5) \
4134 | PPC_FIELD (insn, 6, 4) << 1)
4135#define PPC_XSp(insn) ((PPC_BIT (insn, 10) << 5) \
4136 | PPC_FIELD (insn, 6, 4) << 1)
4137#define PPC_XER_NB(xer) (xer & 0x7f)
4140#define P_PPC_D(insn_prefix, insn_suffix) \
4141 PPC_SEXT (PPC_FIELD (insn_prefix, 14, 18) << 16 \
4142 | PPC_FIELD (insn_suffix, 16, 16), 34)
4143#define P_PPC_TX5(insn_sufix) PPC_BIT (insn_suffix, 5)
4144#define P_PPC_TX15(insn_suffix) PPC_BIT (insn_suffix, 15)
4145#define P_PPC_XT(insn_suffix) ((PPC_TX (insn_suffix) << 5) \
4146 | PPC_T (insn_suffix))
4147#define P_PPC_XT5(insn_suffix) ((P_PPC_TX5 (insn_suffix) << 5) \
4148 | PPC_T (insn_suffix))
4149#define P_PPC_XT15(insn_suffix) \
4150 ((P_PPC_TX15 (insn_suffix) << 5) | PPC_T (insn_suffix))
4159 if (vsr < 0 || vsr >= 64)
4187 int entry,
bool save_fpscr)
4190 if (entry < 0 || entry >= 8)
4217 for (i = 0; i < 4; i++)
4237 CORE_ADDR addr, uint32_t insn)
4305 switch ((ext & 0x1ff))
4339 switch (ext & 0x3ff)
4779 CORE_ADDR addr, uint32_t insn)
4795 ea +=
PPC_DQ (insn) << 4;
4807 CORE_ADDR addr, uint32_t insn)
4812 switch (ext & 0x01f)
4836 if ((
PPC_BO (insn) & 0x4) == 0)
4863 int RA_opcode =
PPC_RA(insn);
4883 CORE_ADDR addr, uint32_t insn)
4887 int tmp, nr, nb = 0, i;
4888 CORE_ADDR at_dcsz, ea = 0;
4889 ULONGEST rb, ra, xer;
4893 switch (ext & 0x1ff)
4941 if ((ext & 0x1f) == 15)
4949 if ((ext & 0xff) == 170)
5088 for (i = 0; i < nr; i++)
5091 + ((
PPC_RT (insn) + i) & 0x1f));
5245 if (ext == 694 || ext == 726 || ext == 150 || ext == 214 || ext == 182)
5364 nb = (rb & 0xff) > 16 ? 16 : (rb & 0xff);
5523 ea = (ra + rb) & ~((ULONGEST) (at_dcsz - 1));
5543 CORE_ADDR addr, uint32_t insn)
5713 CORE_ADDR addr, uint32_t insn)
5716 int RA_opcode =
PPC_RA(insn);
5754 CORE_ADDR addr, uint32_t insn)
5871 switch ((ext >> 2) & 0x7f)
6093 if (((ext >> 3) & 0x3) == 3)
6109 CORE_ADDR addr, uint32_t insn)
6124 ea +=
PPC_DS (insn) << 2;
6153 ea +=
PPC_DQ (insn) << 4;
6168 CORE_ADDR addr, uint32_t insn)
6465 uint32_t insn_prefix, uint32_t insn_suffix)
6469 int ST1 =
PPC_FIELD (insn_prefix, 8, 1);
6497 uint32_t insn_prefix, uint32_t insn_suffix)
6499 int opcode =
PPC_FIELD (insn_suffix, 21, 8);
6501 int ST4 =
PPC_FIELD (insn_prefix, 8, 4);
6622 CORE_ADDR addr, uint32_t insn_prefix,
6623 uint32_t insn_suffix)
6629 int op6 =
PPC_OP6 (insn_suffix);
6633 if (
PPC_RA (insn_suffix) != 0)
6635 +
PPC_RA (insn_suffix), &iaddr);
6664 iaddr +=
P_PPC_D (insn_prefix, insn_suffix);
6676 uint32_t insn_prefix, uint32_t insn_suffix)
6679 int ST1 =
PPC_FIELD (insn_prefix, 8, 1);
6680 int ST4 =
PPC_FIELD (insn_prefix, 8, 4);
6731 uint32_t insn_prefix, uint32_t insn_suffix)
6734 int ST4 =
PPC_FIELD (insn_prefix, 8, 4);
6768 uint32_t insn_prefix, uint32_t insn_suffix)
6771 int ST1 =
PPC_FIELD (insn_prefix, 8, 1);
6772 int ST4 =
PPC_FIELD (insn_prefix, 8, 4);
6816 uint32_t insn_prefix,
6817 uint32_t insn_suffix)
6824 int ST1 =
PPC_FIELD (insn_prefix, 8, 1);
6826 if ((
type == 0) && (ST1 == 0))
6830 if (
PPC_RA (insn_suffix) != 0)
6841 ea +=
P_PPC_D (insn_prefix, insn_suffix);
6869 uint32_t insn_prefix,
6870 uint32_t insn_suffix)
6877 int ST1 =
PPC_FIELD (insn_prefix, 8, 1);
6879 if ((
type == 0) && (ST1 == 0))
6891 if (
PPC_RA (insn_suffix) != 0)
6902 ea +=
P_PPC_D (insn_prefix, insn_suffix);
6928 int ST1 =
PPC_FIELD (insn_prefix, 8, 1);
6934 insn_prefix, insn_suffix) == 0)
6942 if ((
type == 2) && (ST1 == 0))
6947 goto UNKNOWN_PREFIX_OP;
6952 insn_prefix, insn_suffix) != 0)
6953 goto UNKNOWN_PREFIX_OP;
6958 insn_prefix, insn_suffix) != 0)
6959 goto UNKNOWN_PREFIX_OP;
6964 insn_prefix, insn_suffix) != 0)
6965 goto UNKNOWN_PREFIX_OP;
6968 if ((
type == 2) && (ST1 == 0))
6973 goto UNKNOWN_PREFIX_OP;
6986 insn_prefix, insn_suffix) != 0)
6987 goto UNKNOWN_PREFIX_OP;
6992 insn_prefix, insn_suffix) != 0)
6993 goto UNKNOWN_PREFIX_OP;
6997 if ((
type == 0) && (ST1 == 0))
7000 goto UNKNOWN_PREFIX_OP;
7006 insn_prefix, insn_suffix) != 0)
7007 goto UNKNOWN_PREFIX_OP;
7012 if ((
type == 0) && (ST1 == 0))
7020 goto UNKNOWN_PREFIX_OP;
7026 if ((
type == 0) && (ST1 == 0))
7031 goto UNKNOWN_PREFIX_OP;
7036 if ((
type == 2) && (ST1 == 0))
7041 goto UNKNOWN_PREFIX_OP;
7045 if ((
type == 0) && (ST1 == 0))
7051 goto UNKNOWN_PREFIX_OP;
7057 goto UNKNOWN_PREFIX_OP;
7061 if ((
type == 0) && (ST1 == 0))
7068 if (
PPC_RA (insn_suffix) != 0)
7071 +
PPC_RA (insn_suffix), &ea);
7078 ea +=
P_PPC_D (insn_prefix, insn_suffix) << 4;
7082 goto UNKNOWN_PREFIX_OP;
7088 "Warning: Don't know how to record prefix instruction "
7089 "%08x %08x at %s, %d.\n",
7110 uint32_t insn, insn_suffix;
7185 if ((
PPC_BO (insn) & 0x4) == 0)
7246 for (i =
PPC_RT (insn); i < 32; i++)
7276 iaddr +=
PPC_D (insn);
7302 iaddr +=
PPC_D (insn);
7304 if (op6 == 36 || op6 == 37 || op6 == 52 || op6 == 53)
7306 else if (op6 == 54 || op6 == 55)
7308 else if (op6 == 44 || op6 == 45)
7310 else if (op6 == 38 || op6 == 39)
7380 size = (sub2 == 2) ? 16 : 8;
7382 iaddr +=
PPC_DS (insn) << 2;
7385 if (op6 == 62 && sub2 == 1)
7456 scoped_restore restore_memory
7503 int wordsize, from_xcoff_exec, from_elf_exec;
7504 enum bfd_architecture arch;
7512 int have_fpu = 0, have_spe = 0, have_mq = 0, have_altivec = 0;
7513 int have_dfp = 0, have_vsx = 0, have_ppr = 0, have_dscr = 0;
7514 int have_tar = 0, have_ebb = 0, have_pmu = 0, have_htm_spr = 0;
7515 int have_htm_core = 0, have_htm_fpu = 0, have_htm_altivec = 0;
7516 int have_htm_vsx = 0, have_htm_ppr = 0, have_htm_dscr = 0;
7517 int have_htm_tar = 0;
7518 int tdesc_wordsize = -1;
7519 const struct target_desc *tdesc = info.target_desc;
7521 int num_pseudoregs = 0;
7524 from_xcoff_exec = info.abfd && info.abfd->format == bfd_object &&
7525 bfd_get_flavour (info.abfd) == bfd_target_xcoff_flavour;
7527 from_elf_exec = info.abfd && info.abfd->format == bfd_object &&
7528 bfd_get_flavour (info.abfd) == bfd_target_elf_flavour;
7532 if (from_xcoff_exec)
7534 if (bfd_xcoff_is_xcoff64 (info.abfd))
7539 else if (from_elf_exec)
7541 if (elf_elfheader (info.abfd)->e_ident[EI_CLASS] == ELFCLASS64)
7550 if (info.bfd_arch_info != NULL && info.bfd_arch_info->bits_per_word != 0)
7551 wordsize = (info.bfd_arch_info->bits_per_word
7552 / info.bfd_arch_info->bits_per_byte);
7558 arch = info.bfd_arch_info->arch;
7559 mach = info.bfd_arch_info->mach;
7571 arch = info.bfd_arch_info->arch;
7572 mach = bfd_mach_ppc_e500;
7573 bfd_default_set_arch_mach (&abfd,
arch, mach);
7574 info.bfd_arch_info = bfd_get_arch_info (&abfd);
7596 static const char *
const gprs[] = {
7597 "r0",
"r1",
"r2",
"r3",
"r4",
"r5",
"r6",
"r7",
7598 "r8",
"r9",
"r10",
"r11",
"r12",
"r13",
"r14",
"r15",
7599 "r16",
"r17",
"r18",
"r19",
"r20",
"r21",
"r22",
"r23",
7600 "r24",
"r25",
"r26",
"r27",
"r28",
"r29",
"r30",
"r31"
7602 const struct tdesc_feature *feature;
7604 static const char *
const msr_names[] = {
"msr",
"ps" };
7605 static const char *
const cr_names[] = {
"cr",
"cnd" };
7606 static const char *
const ctr_names[] = {
"ctr",
"cnt" };
7609 "org.gnu.gdb.power.core");
7610 if (feature == NULL)
7643 wordsize = tdesc_wordsize;
7646 "org.gnu.gdb.power.fpu");
7647 if (feature != NULL)
7649 static const char *
const fprs[] = {
7650 "f0",
"f1",
"f2",
"f3",
"f4",
"f5",
"f6",
"f7",
7651 "f8",
"f9",
"f10",
"f11",
"f12",
"f13",
"f14",
"f15",
7652 "f16",
"f17",
"f18",
"f19",
"f20",
"f21",
"f22",
"f23",
7653 "f24",
"f25",
"f26",
"f27",
"f28",
"f29",
"f30",
"f31"
7676 "org.gnu.gdb.power.altivec");
7677 if (feature != NULL)
7679 static const char *
const vector_regs[] = {
7680 "vr0",
"vr1",
"vr2",
"vr3",
"vr4",
"vr5",
"vr6",
"vr7",
7681 "vr8",
"vr9",
"vr10",
"vr11",
"vr12",
"vr13",
"vr14",
"vr15",
7682 "vr16",
"vr17",
"vr18",
"vr19",
"vr20",
"vr21",
"vr22",
"vr23",
7683 "vr24",
"vr25",
"vr26",
"vr27",
"vr28",
"vr29",
"vr30",
"vr31"
7696 if (have_spe || !valid_p)
7705 "org.gnu.gdb.power.vsx");
7707 if (feature != NULL)
7709 static const char *
const vsx_regs[] = {
7710 "vs0h",
"vs1h",
"vs2h",
"vs3h",
"vs4h",
"vs5h",
7711 "vs6h",
"vs7h",
"vs8h",
"vs9h",
"vs10h",
"vs11h",
7712 "vs12h",
"vs13h",
"vs14h",
"vs15h",
"vs16h",
"vs17h",
7713 "vs18h",
"vs19h",
"vs20h",
"vs21h",
"vs22h",
"vs23h",
7714 "vs24h",
"vs25h",
"vs26h",
"vs27h",
"vs28h",
"vs29h",
7725 if (!valid_p || !have_fpu || !have_altivec)
7747 "org.gnu.gdb.power.spe");
7748 if (feature != NULL)
7750 static const char *
const upper_spe[] = {
7751 "ev0h",
"ev1h",
"ev2h",
"ev3h",
7752 "ev4h",
"ev5h",
"ev6h",
"ev7h",
7753 "ev8h",
"ev9h",
"ev10h",
"ev11h",
7754 "ev12h",
"ev13h",
"ev14h",
"ev15h",
7755 "ev16h",
"ev17h",
"ev18h",
"ev19h",
7756 "ev20h",
"ev21h",
"ev22h",
"ev23h",
7757 "ev24h",
"ev25h",
"ev26h",
"ev27h",
7758 "ev28h",
"ev29h",
"ev30h",
"ev31h"
7771 if (have_mq || have_fpu || !valid_p)
7780 "org.gnu.gdb.power.ppr");
7781 if (feature != NULL)
7796 "org.gnu.gdb.power.dscr");
7797 if (feature != NULL)
7812 "org.gnu.gdb.power.tar");
7813 if (feature != NULL)
7828 "org.gnu.gdb.power.ebb");
7829 if (feature != NULL)
7831 static const char *
const ebb_regs[] = {
7832 "bescr",
"ebbhr",
"ebbrr"
7836 for (i = 0; i < ARRAY_SIZE (ebb_regs); i++)
7850 "org.gnu.gdb.power.linux.pmu");
7851 if (feature != NULL)
7880 "org.gnu.gdb.power.htm.spr");
7881 if (feature != NULL)
7883 static const char *
const tm_spr_regs[] = {
7884 "tfhar",
"texasr",
"tfiar"
7888 for (i = 0; i < ARRAY_SIZE (tm_spr_regs); i++)
7901 "org.gnu.gdb.power.htm.core");
7902 if (feature != NULL)
7904 static const char *
const cgprs[] = {
7905 "cr0",
"cr1",
"cr2",
"cr3",
"cr4",
"cr5",
"cr6",
"cr7",
7906 "cr8",
"cr9",
"cr10",
"cr11",
"cr12",
"cr13",
"cr14",
7907 "cr15",
"cr16",
"cr17",
"cr18",
"cr19",
"cr20",
"cr21",
7908 "cr22",
"cr23",
"cr24",
"cr25",
"cr26",
"cr27",
"cr28",
7909 "cr29",
"cr30",
"cr31",
"ccr",
"cxer",
"clr",
"cctr"
7914 for (i = 0; i < ARRAY_SIZE (cgprs); i++)
7927 "org.gnu.gdb.power.htm.fpu");
7928 if (feature != NULL)
7932 static const char *
const cfprs[] = {
7933 "cf0",
"cf1",
"cf2",
"cf3",
"cf4",
"cf5",
"cf6",
"cf7",
7934 "cf8",
"cf9",
"cf10",
"cf11",
"cf12",
"cf13",
"cf14",
"cf15",
7935 "cf16",
"cf17",
"cf18",
"cf19",
"cf20",
"cf21",
"cf22",
7936 "cf23",
"cf24",
"cf25",
"cf26",
"cf27",
"cf28",
"cf29",
7937 "cf30",
"cf31",
"cfpscr"
7940 for (i = 0; i < ARRAY_SIZE (cfprs); i++)
7953 "org.gnu.gdb.power.htm.altivec");
7954 if (feature != NULL)
7958 static const char *
const cvmx[] = {
7959 "cvr0",
"cvr1",
"cvr2",
"cvr3",
"cvr4",
"cvr5",
"cvr6",
7960 "cvr7",
"cvr8",
"cvr9",
"cvr10",
"cvr11",
"cvr12",
"cvr13",
7961 "cvr14",
"cvr15",
"cvr16",
"cvr17",
"cvr18",
"cvr19",
"cvr20",
7962 "cvr21",
"cvr22",
"cvr23",
"cvr24",
"cvr25",
"cvr26",
7963 "cvr27",
"cvr28",
"cvr29",
"cvr30",
"cvr31",
"cvscr",
7967 for (i = 0; i < ARRAY_SIZE (cvmx); i++)
7974 have_htm_altivec = 1;
7977 have_htm_altivec = 0;
7980 "org.gnu.gdb.power.htm.vsx");
7981 if (feature != NULL)
7985 static const char *
const cvsx[] = {
7986 "cvs0h",
"cvs1h",
"cvs2h",
"cvs3h",
"cvs4h",
"cvs5h",
7987 "cvs6h",
"cvs7h",
"cvs8h",
"cvs9h",
"cvs10h",
"cvs11h",
7988 "cvs12h",
"cvs13h",
"cvs14h",
"cvs15h",
"cvs16h",
"cvs17h",
7989 "cvs18h",
"cvs19h",
"cvs20h",
"cvs21h",
"cvs22h",
"cvs23h",
7990 "cvs24h",
"cvs25h",
"cvs26h",
"cvs27h",
"cvs28h",
"cvs29h",
7994 for (i = 0; i < ARRAY_SIZE (cvsx); i++)
8000 if (!valid_p || !have_htm_fpu || !have_htm_altivec)
8008 "org.gnu.gdb.power.htm.ppr");
8009 if (feature != NULL)
8022 "org.gnu.gdb.power.htm.dscr");
8023 if (feature != NULL)
8036 "org.gnu.gdb.power.htm.tar");
8037 if (feature != NULL)
8061 if (tdesc_wordsize != -1 && tdesc_wordsize != wordsize)
8067 switch (elf_elfheader (info.abfd)->e_flags & EF_PPC64_ABI)
8082 switch (bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
8083 Tag_GNU_Power_ABI_FP) & 3)
8098 switch (bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
8099 Tag_GNU_Power_ABI_FP) >> 2)
8114 switch (bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
8115 Tag_GNU_Power_ABI_Vector))
8141 if (wordsize == 8 && info.byte_order == BFD_ENDIAN_LITTLE)
8152 soft_float = !have_fpu;
8157 if (!soft_float && !have_fpu)
8189 = gdbarch_tdep<ppc_gdbarch_tdep> (
arches->gdbarch);
8190 if (tdep && tdep->elf_abi != elf_abi)
8194 if (tdep && tdep->long_double_abi != long_double_abi)
8196 if (tdep && tdep->vector_abi != vector_abi)
8198 if (tdep && tdep->
wordsize == wordsize)
8215 tdep->elf_abi = elf_abi;
8217 tdep->long_double_abi = long_double_abi;
8218 tdep->vector_abi = vector_abi;
8289 if (have_spe || have_dfp || have_altivec
8290 || have_vsx || have_htm_fpu || have_htm_vsx)
8306 num_pseudoregs += 32;
8308 num_pseudoregs += 16;
8310 num_pseudoregs += 32;
8313 num_pseudoregs += 96;
8315 num_pseudoregs += 16;
8318 num_pseudoregs += 64 + 32;
8346 else if (wordsize == 8)
8356 rs6000_breakpoint::kind_from_pc);
8358 rs6000_breakpoint::bp_from_kind);
8389 ppc_displaced_step_copy_insn);
8402 info.target_desc = tdesc;
8482 if (mach == bfd_mach_ppc_e500)
8489 disassembler_options_powerpc ());
8513 internal_error (_(
"could not update architecture"));
8533 internal_error (_(
"Invalid vector ABI accepted: %s."),
8539 internal_error (_(
"could not update architecture"));
8579 unsigned int *insns)
8584 for (i = 0, insn = 0; pattern[i].
mask; i++)
8589 if ((insn & pattern[i].mask) == pattern[i].data)
8595 else if (!pattern[i].optional)
8608 return ((((CORE_ADDR) insn & 0xffff) ^ 0x8000) - 0x8000);
8618 return ((((CORE_ADDR) insn & 0xfffc) ^ 0x8000) - 0x8000);
8625 return (CORE_ADDR) ((((insn1 & 0x3ffff) ^ 0x20000) - 0x20000) << 16)
8626 | (CORE_ADDR)(insn2 & 0xffff);
8662 _(
"Various PowerPC-specific commands."),
8663 _(
"Various PowerPC-specific commands."),
8670 _(
"Set whether to use a soft-float ABI."),
8671 _(
"Show whether to use a soft-float ABI."),
8678 _(
"Set the vector ABI."),
8679 _(
"Show the vector ABI."),
8686Set whether to use just one debug register for watchpoints on scalars."),
8688Show whether to use just one debug register for watchpoints on scalars."),
8690If true, GDB will use only one debug register when watching a variable of\n\
8691scalar type, thus assuming that the variable is accessed through the address\n\
8692of its first byte."),
void gdbarch_register(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init, gdbarch_dump_tdep_ftype *dump_tdep, gdbarch_supports_arch_info_ftype *supports_arch_info)
int gdbarch_update_p(struct gdbarch_info info)
CORE_ADDR displaced_step_at_entry_point(struct gdbarch *gdbarch)
static std::vector< const char * > arches
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
#define BP_MANIPULATION_ENDIAN(BREAK_INSN_LITTLE, BREAK_INSN_BIG)
int target_auxv_search(const gdb::byte_vector &auxv, target_ops *ops, gdbarch *gdbarch, CORE_ADDR match, CORE_ADDR *valp)
void ax_reg_mask(struct agent_expr *ax, int reg)
bool find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr, const struct block **block)
CORE_ADDR get_pc_function_start(CORE_ADDR pc)
bool target_exact_watchpoints
enum register_status raw_read(int regnum, gdb_byte *buf)
enum register_status raw_read_part(int regnum, int offset, int len, gdb_byte *buf)
void raw_collect(int regnum, void *buf) const override
void raw_supply(int regnum, const void *buf) override
enum register_status get_register_status(int regnum) const override
void raw_write_part(int regnum, int offset, int len, const gdb_byte *buf)
void raw_write(int regnum, const gdb_byte *buf)
void raw_update(int regnum) override
struct cmd_list_element * showlist
struct cmd_list_element * setlist
set_show_commands add_setshow_enum_cmd(const char *name, enum command_class theclass, const char *const *enumlist, const char **var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
set_show_commands add_setshow_prefix_cmd(const char *name, command_class theclass, const char *set_doc, const char *show_doc, cmd_list_element **set_subcommands_list, cmd_list_element **show_subcommands_list, cmd_list_element **set_list, cmd_list_element **show_list)
set_show_commands add_setshow_boolean_cmd(const char *name, enum command_class theclass, bool *var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
set_show_commands add_setshow_auto_boolean_cmd(const char *name, enum command_class theclass, enum auto_boolean *var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
ULONGEST read_memory_unsigned_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
LONGEST read_memory_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
int safe_read_memory_unsigned_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order, ULONGEST *return_value)
void memory_error(enum target_xfer_status err, CORE_ADDR memaddr)
static LONGEST extract_signed_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
static ULONGEST extract_unsigned_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
#define displaced_debug_printf(fmt,...)
displaced_step_prepare_status
std::unique_ptr< displaced_step_copy_insn_closure > displaced_step_copy_insn_closure_up
displaced_step_finish_status
void dwarf2_frame_set_adjust_regnum(struct gdbarch *gdbarch, int(*adjust_regnum)(struct gdbarch *, int, int))
void dwarf2_append_unwinders(struct gdbarch *gdbarch)
void dwarf2_frame_set_init_reg(struct gdbarch *gdbarch, void(*init_reg)(struct gdbarch *, int, struct dwarf2_frame_state_reg *, frame_info_ptr))
@ DWARF2_FRAME_REG_SAME_VALUE
@ DWARF2_FRAME_REG_UNDEFINED
void frame_base_append_sniffer(struct gdbarch *gdbarch, frame_base_sniffer_ftype *sniffer)
int default_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
enum unwind_stop_reason default_frame_unwind_stop_reason(frame_info_ptr this_frame, void **this_cache)
void frame_unwind_append_unwinder(struct gdbarch *gdbarch, const struct frame_unwind *unwinder)
int frame_relative_level(frame_info_ptr fi)
ULONGEST get_frame_register_unsigned(frame_info_ptr frame, int regnum)
CORE_ADDR get_frame_pc(frame_info_ptr frame)
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
struct gdbarch * get_frame_arch(frame_info_ptr this_frame)
struct frame_id frame_id_build_unavailable_stack(CORE_ADDR code_addr)
CORE_ADDR get_frame_func(frame_info_ptr this_frame)
bool get_frame_register_bytes(frame_info_ptr frame, int regnum, CORE_ADDR offset, gdb::array_view< gdb_byte > buffer, int *optimizedp, int *unavailablep)
frame_info_ptr get_current_frame(void)
bool safe_frame_unwind_memory(frame_info_ptr this_frame, CORE_ADDR addr, gdb::array_view< gdb_byte > buffer)
void put_frame_register(frame_info_ptr frame, int regnum, const gdb_byte *buf)
#define FRAME_OBSTACK_ZALLOC(TYPE)
void set_gdbarch_long_long_bit(struct gdbarch *gdbarch, int long_long_bit)
void set_gdbarch_stab_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_stab_reg_to_regnum_ftype *stab_reg_to_regnum)
int gdbarch_pc_regnum(struct gdbarch *gdbarch)
void set_gdbarch_char_signed(struct gdbarch *gdbarch, int char_signed)
void set_gdbarch_fetch_pointer_argument(struct gdbarch *gdbarch, gdbarch_fetch_pointer_argument_ftype *fetch_pointer_argument)
void set_gdbarch_ps_regnum(struct gdbarch *gdbarch, int ps_regnum)
void set_gdbarch_register_to_value(struct gdbarch *gdbarch, gdbarch_register_to_value_ftype *register_to_value)
void set_gdbarch_disassembler_options(struct gdbarch *gdbarch, char **disassembler_options)
void set_gdbarch_gen_return_address(struct gdbarch *gdbarch, gdbarch_gen_return_address_ftype *gen_return_address)
void set_gdbarch_displaced_step_restore_all_in_ptid(struct gdbarch *gdbarch, gdbarch_displaced_step_restore_all_in_ptid_ftype *displaced_step_restore_all_in_ptid)
enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
void set_gdbarch_value_to_register(struct gdbarch *gdbarch, gdbarch_value_to_register_ftype *value_to_register)
void set_gdbarch_breakpoint_kind_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_kind_from_pc_ftype *breakpoint_kind_from_pc)
void set_gdbarch_register_sim_regno(struct gdbarch *gdbarch, gdbarch_register_sim_regno_ftype *register_sim_regno)
const char * gdbarch_register_name(struct gdbarch *gdbarch, int regnr)
void set_gdbarch_software_single_step(struct gdbarch *gdbarch, gdbarch_software_single_step_ftype *software_single_step)
void set_gdbarch_sofun_address_maybe_missing(struct gdbarch *gdbarch, int sofun_address_maybe_missing)
void set_gdbarch_valid_disassembler_options(struct gdbarch *gdbarch, const disasm_options_and_args_t *valid_disassembler_options)
void set_gdbarch_frame_align(struct gdbarch *gdbarch, gdbarch_frame_align_ftype *frame_align)
void set_gdbarch_displaced_step_finish(struct gdbarch *gdbarch, gdbarch_displaced_step_finish_ftype *displaced_step_finish)
void set_gdbarch_program_breakpoint_here_p(struct gdbarch *gdbarch, gdbarch_program_breakpoint_here_p_ftype *program_breakpoint_here_p)
void set_gdbarch_max_insn_length(struct gdbarch *gdbarch, ULONGEST max_insn_length)
void set_gdbarch_displaced_step_prepare(struct gdbarch *gdbarch, gdbarch_displaced_step_prepare_ftype *displaced_step_prepare)
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype *skip_prologue)
void set_gdbarch_displaced_step_buffer_length(struct gdbarch *gdbarch, ULONGEST displaced_step_buffer_length)
void set_gdbarch_get_return_buf_addr(struct gdbarch *gdbarch, gdbarch_get_return_buf_addr_ftype *get_return_buf_addr)
void set_gdbarch_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype *register_name)
struct type * gdbarch_register_type(struct gdbarch *gdbarch, int reg_nr)
void set_gdbarch_update_call_site_pc(struct gdbarch *gdbarch, gdbarch_update_call_site_pc_ftype *update_call_site_pc)
void set_gdbarch_int_bit(struct gdbarch *gdbarch, int int_bit)
void set_gdbarch_skip_trampoline_code(struct gdbarch *gdbarch, gdbarch_skip_trampoline_code_ftype *skip_trampoline_code)
void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype *return_value)
void set_gdbarch_believe_pcc_promotion(struct gdbarch *gdbarch, int believe_pcc_promotion)
void set_gdbarch_have_nonsteppable_watchpoint(struct gdbarch *gdbarch, int have_nonsteppable_watchpoint)
int gdbarch_num_regs(struct gdbarch *gdbarch)
void set_gdbarch_fp0_regnum(struct gdbarch *gdbarch, int fp0_regnum)
void set_gdbarch_double_bit(struct gdbarch *gdbarch, int double_bit)
void set_gdbarch_skip_main_prologue(struct gdbarch *gdbarch, gdbarch_skip_main_prologue_ftype *skip_main_prologue)
void set_gdbarch_displaced_step_copy_insn(struct gdbarch *gdbarch, gdbarch_displaced_step_copy_insn_ftype *displaced_step_copy_insn)
void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype *inner_than)
enum bfd_endian gdbarch_byte_order_for_code(struct gdbarch *gdbarch)
void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
void set_gdbarch_ax_pseudo_register_collect(struct gdbarch *gdbarch, gdbarch_ax_pseudo_register_collect_ftype *ax_pseudo_register_collect)
int gdbarch_sp_regnum(struct gdbarch *gdbarch)
void set_gdbarch_pc_regnum(struct gdbarch *gdbarch, int pc_regnum)
void set_gdbarch_frame_red_zone_size(struct gdbarch *gdbarch, int frame_red_zone_size)
void set_gdbarch_displaced_step_fixup(struct gdbarch *gdbarch, gdbarch_displaced_step_fixup_ftype *displaced_step_fixup)
void set_gdbarch_float_bit(struct gdbarch *gdbarch, int float_bit)
void set_gdbarch_stack_frame_destroyed_p(struct gdbarch *gdbarch, gdbarch_stack_frame_destroyed_p_ftype *stack_frame_destroyed_p)
void set_gdbarch_short_bit(struct gdbarch *gdbarch, int short_bit)
void set_gdbarch_pseudo_register_write(struct gdbarch *gdbarch, gdbarch_pseudo_register_write_ftype *pseudo_register_write)
void set_gdbarch_num_pseudo_regs(struct gdbarch *gdbarch, int num_pseudo_regs)
void set_gdbarch_dwarf2_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_dwarf2_reg_to_regnum_ftype *dwarf2_reg_to_regnum)
void set_gdbarch_long_bit(struct gdbarch *gdbarch, int long_bit)
void set_gdbarch_ptr_bit(struct gdbarch *gdbarch, int ptr_bit)
void set_gdbarch_convert_register_p(struct gdbarch *gdbarch, gdbarch_convert_register_p_ftype *convert_register_p)
void set_gdbarch_pseudo_register_read(struct gdbarch *gdbarch, gdbarch_pseudo_register_read_ftype *pseudo_register_read)
ULONGEST gdbarch_displaced_step_buffer_length(struct gdbarch *gdbarch)
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
const struct bfd_arch_info * gdbarch_bfd_arch_info(struct gdbarch *gdbarch)
void set_gdbarch_long_double_bit(struct gdbarch *gdbarch, int long_double_bit)
void set_gdbarch_displaced_step_hw_singlestep(struct gdbarch *gdbarch, gdbarch_displaced_step_hw_singlestep_ftype *displaced_step_hw_singlestep)
void set_gdbarch_sw_breakpoint_from_kind(struct gdbarch *gdbarch, gdbarch_sw_breakpoint_from_kind_ftype *sw_breakpoint_from_kind)
void set_gdbarch_in_solib_return_trampoline(struct gdbarch *gdbarch, gdbarch_in_solib_return_trampoline_ftype *in_solib_return_trampoline)
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype *push_dummy_call)
void set_gdbarch_frame_args_skip(struct gdbarch *gdbarch, CORE_ADDR frame_args_skip)
struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, gdbarch_tdep_up tdep)
std::unique_ptr< gdbarch_tdep_base > gdbarch_tdep_up
#define GDBARCH_OBSTACK_CALLOC(GDBARCH, NR, TYPE)
static int gdbarch_num_cooked_regs(gdbarch *arch)
struct type * arch_composite_type(struct gdbarch *gdbarch, const char *name, enum type_code code)
const struct floatformat * floatformats_ieee_quad[BFD_ENDIAN_UNKNOWN]
struct type * init_vector_type(struct type *elt_type, int n)
struct type * init_float_type(type_allocator &alloc, int bit, const char *name, const struct floatformat **floatformats, enum bfd_endian byte_order)
const struct builtin_type * builtin_type(struct gdbarch *gdbarch)
void append_composite_type_field(struct type *t, const char *name, struct type *field)
mach_port_t mach_port_t name mach_port_t mach_port_t name kern_return_t int status
struct inferior * current_inferior(void)
#define R(name, type, sim_num)
CORE_ADDR find_solib_trampoline_target(frame_info_ptr frame, CORE_ADDR pc)
struct bound_minimal_symbol lookup_minimal_symbol_by_pc(CORE_ADDR pc)
void gdbarch_init_osabi(struct gdbarch_info info, struct gdbarch *gdbarch)
static void initialize_tdesc_powerpc_32(void)
const struct target_desc * tdesc_powerpc_403
static void initialize_tdesc_powerpc_403(void)
const struct target_desc * tdesc_powerpc_403gc
static void initialize_tdesc_powerpc_403gc(void)
static void initialize_tdesc_powerpc_405(void)
const struct target_desc * tdesc_powerpc_405
static void initialize_tdesc_powerpc_505(void)
const struct target_desc * tdesc_powerpc_505
const struct target_desc * tdesc_powerpc_601
static void initialize_tdesc_powerpc_601(void)
static void initialize_tdesc_powerpc_602(void)
const struct target_desc * tdesc_powerpc_602
static void initialize_tdesc_powerpc_603(void)
const struct target_desc * tdesc_powerpc_603
static void initialize_tdesc_powerpc_604(void)
const struct target_desc * tdesc_powerpc_604
static void initialize_tdesc_powerpc_64(void)
const struct target_desc * tdesc_powerpc_64
const struct target_desc * tdesc_powerpc_7400
static void initialize_tdesc_powerpc_7400(void)
static void initialize_tdesc_powerpc_750(void)
const struct target_desc * tdesc_powerpc_750
static void initialize_tdesc_powerpc_860(void)
const struct target_desc * tdesc_powerpc_860
const struct target_desc * tdesc_powerpc_altivec32
static void initialize_tdesc_powerpc_altivec32(void)
const struct target_desc * tdesc_powerpc_altivec64
static void initialize_tdesc_powerpc_altivec64(void)
static void initialize_tdesc_powerpc_e500(void)
const struct target_desc * tdesc_powerpc_e500
static void initialize_tdesc_powerpc_vsx32(void)
static void initialize_tdesc_powerpc_vsx64(void)
void register_ppc_ravenscar_ops(struct gdbarch *gdbarch)
void register_e500_ravenscar_ops(struct gdbarch *gdbarch)
CORE_ADDR ppc_sysv_abi_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
CORE_ADDR ppc64_sysv_abi_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
enum return_value_convention ppc64_sysv_abi_return_value(struct gdbarch *gdbarch, struct value *function, struct type *valtype, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
CORE_ADDR ppc_sysv_get_return_buf_addr(struct type *val_type, frame_info_ptr cur_frame)
enum return_value_convention ppc_sysv_abi_return_value(struct gdbarch *gdbarch, struct value *function, struct type *valtype, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
#define PPC_MAX_REGISTER_SIZE
@ POWERPC_LONG_DOUBLE_IBM128
@ POWERPC_LONG_DOUBLE_IEEE128
@ POWERPC_LONG_DOUBLE_AUTO
#define PPC_MAX_EPILOGUE_INSTRUCTIONS
@ PPC_SPE_UPPER_GP0_REGNUM
int record_full_arch_list_add_reg(struct regcache *regcache, int regnum)
int record_full_arch_list_add_mem(CORE_ADDR addr, int len)
int record_full_arch_list_add_end(void)
CORE_ADDR regcache_read_pc(struct regcache *regcache)
enum register_status regcache_raw_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
int register_size(struct gdbarch *gdbarch, int regnum)
enum register_status regcache_cooked_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
void regcache_write_pc(struct regcache *regcache, CORE_ADDR pc)
void regcache_cooked_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
struct type * register_type(struct gdbarch *gdbarch, int regnum)
int default_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *group)
void(* func)(remote_target *remote, char *)
static void e500_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int reg_nr, const gdb_byte *buffer)
static int ppc_process_record_prefix_vsx_d_form(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn_prefix, uint32_t insn_suffix)
static void v_alias_pseudo_register_collect(struct gdbarch *gdbarch, struct agent_expr *ax, int reg_nr)
void ppc_collect_gregset(const struct regset *regset, const struct regcache *regcache, int regnum, void *gregs, size_t len)
static enum auto_boolean powerpc_soft_float_global
static void rs6000_epilogue_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
static int rs6000_pseudo_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *group)
static bool rs6000_program_breakpoint_here_p(gdbarch *gdbarch, CORE_ADDR address)
static struct type * rs6000_builtin_type_vec128(struct gdbarch *gdbarch)
static struct rs6000_frame_cache * rs6000_frame_cache(frame_info_ptr this_frame, void **this_cache)
static int store_param_on_stack_p(unsigned long op, int framep, int *r0_contains_arg)
static CORE_ADDR rs6000_fetch_pointer_argument(frame_info_ptr frame, int argi, struct type *type)
static char * powerpc_disassembler_options
static int ppc_process_record_prefix_op33(struct gdbarch *gdbarch, struct regcache *regcache, uint32_t insn_prefix, uint32_t insn_suffix)
static enum register_status rs6000_pseudo_register_read(struct gdbarch *gdbarch, readable_regcache *regcache, int reg_nr, gdb_byte *buffer)
int altivec_register_p(struct gdbarch *gdbarch, int regno)
static const char * powerpc_vector_abi_string
static int rs6000_register_to_value(frame_info_ptr frame, int regnum, struct type *type, gdb_byte *to, int *optimizedp, int *unavailablep)
static int rs6000_in_solib_return_trampoline(struct gdbarch *gdbarch, CORE_ADDR pc, const char *name)
static bool ppc_displaced_step_hw_singlestep(struct gdbarch *gdbarch)
static const struct frame_base rs6000_frame_base
static const struct frame_unwind rs6000_frame_unwind
#define P_PPC_XT5(insn_suffix)
static CORE_ADDR rs6000_skip_prologue(struct gdbarch *gdbarch, CORE_ADDR pc)
static int ppc_process_record_prefix_op42(struct gdbarch *gdbarch, struct regcache *regcache, uint32_t insn_prefix, uint32_t insn_suffix)
int spe_register_p(struct gdbarch *gdbarch, int regno)
CORE_ADDR ppc_insn_d_field(unsigned int insn)
static enum register_status e500_move_ev_register(move_ev_register_func move, struct regcache *regcache, int ev_reg, void *buffer)
void ppc_supply_fpregset(const struct regset *regset, struct regcache *regcache, int regnum, const void *fpregs, size_t len)
static int rs6000_epilogue_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
static int ppc_process_record_op31_177(struct gdbarch *gdbarch, struct regcache *regcache, uint32_t insn)
static enum register_status e500_pseudo_register_read(struct gdbarch *gdbarch, readable_regcache *regcache, int ev_reg, gdb_byte *buffer)
static int bfd_uses_spe_extensions(bfd *abfd)
std::vector< CORE_ADDR > ppc_deal_with_atomic_sequence(struct regcache *regcache)
static constexpr uint32_t TX_INSN_MASK
static int ppc_fpreg_offset(ppc_gdbarch_tdep *tdep, const struct ppc_reg_offsets *offsets, int regnum)
static int ppc_process_record_prefix_store_vsx_ds_form(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn_prefix, uint32_t insn_suffix)
static int ppc_process_record_op4(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn)
#define P_PPC_D(insn_prefix, insn_suffix)
static enum register_status vsx_pseudo_register_read(struct gdbarch *gdbarch, readable_regcache *regcache, int reg_nr, gdb_byte *buffer)
static const struct frame_unwind rs6000_epilogue_frame_unwind
static CORE_ADDR skip_prologue(struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR lim_pc, struct rs6000_framedata *fdata)
static displaced_step_finish_status ppc_displaced_step_finish(gdbarch *arch, thread_info *thread, const target_waitstatus &status)
CORE_ADDR ppc_insn_prefix_dform(unsigned int insn1, unsigned int insn2)
static void rs6000_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
static bool store_insn_p(unsigned long op, unsigned long rs, unsigned long ra, bool with_update)
static const struct ppc_variant * find_variant_by_arch(enum bfd_architecture arch, unsigned long mach)
int ppc_insns_match_pattern(frame_info_ptr frame, CORE_ADDR pc, const struct ppc_insn_pattern *pattern, unsigned int *insns)
static int ppc_record_vsr(struct regcache *regcache, ppc_gdbarch_tdep *tdep, int vsr)
static void ppc_displaced_step_restore_all_in_ptid(inferior *parent_inf, ptid_t ptid)
static int rs6000_adjust_frame_regnum(struct gdbarch *gdbarch, int num, int eh_frame_p)
static int ppc_process_prefix_instruction(int insn_prefix, int insn_suffix, CORE_ADDR addr, struct gdbarch *gdbarch, struct regcache *regcache)
void ppc_collect_reg(const struct regcache *regcache, int regnum, gdb_byte *regs, size_t offset, int regsize)
static struct cmd_list_element * showpowerpccmdlist
static bool is_tw_insn(uint32_t insn)
static int ppc_process_record_op61(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn)
int ppc_altivec_support_p(struct gdbarch *gdbarch)
static constexpr uint32_t TXI_INSN_MASK
static enum register_status efp_pseudo_register_read(struct gdbarch *gdbarch, readable_regcache *regcache, int reg_nr, gdb_byte *buffer)
static struct type * rs6000_pseudo_register_type(struct gdbarch *gdbarch, int regnum)
#define IS_DFP_PSEUDOREG(tdep, regnum)
#define IS_V_ALIAS_PSEUDOREG(tdep, regnum)
static void ppc_dwarf2_frame_init_reg(struct gdbarch *gdbarch, int regnum, struct dwarf2_frame_state_reg *reg, frame_info_ptr this_frame)
static constexpr uint32_t TD_INSN
#define IS_SPE_PSEUDOREG(tdep, regnum)
#define IS_CEFP_PSEUDOREG(tdep, regnum)
static void vsx_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int reg_nr, const gdb_byte *buffer)
static constexpr uint32_t TWI_INSN
static unsigned int read_insn(frame_info_ptr frame, CORE_ADDR pc)
CORE_ADDR ppc_insn_ds_field(unsigned int insn)
static constexpr uint32_t TDI_INSN
int ppc_floating_point_unit_p(struct gdbarch *gdbarch)
static enum register_status v_alias_pseudo_register_read(struct gdbarch *gdbarch, readable_regcache *regcache, int reg_nr, gdb_byte *buffer)
static enum powerpc_vector_abi powerpc_vector_abi_global
enum register_status(* move_ev_register_func)(struct regcache *, int, void *)
static int ppc_process_record_prefix_op59_XX3(struct gdbarch *gdbarch, struct regcache *regcache, uint32_t insn_prefix, uint32_t insn_suffix)
static constexpr uint32_t TW_INSN
static int bl_to_blrl_insn_p(CORE_ADDR pc, int insn, enum bfd_endian byte_order)
static void set_sim_regno(int *table, int gdb_regno, int sim_regno)
static const registry< inferior >::key< ppc_inferior_data > ppc_inferior_data_key
static int rs6000_dwarf2_reg_to_regnum(struct gdbarch *gdbarch, int num)
#define ADDPCIS_TARGET_REGISTER
#define BL_DISPLACEMENT_MASK
static int rs6000_register_sim_regno(struct gdbarch *gdbarch, int reg)
void ppc_supply_reg(struct regcache *regcache, int regnum, const gdb_byte *regs, size_t offset, int regsize)
#define PPC_FIELD(value, from, len)
static unsigned long rs6000_fetch_instruction(struct gdbarch *gdbarch, const CORE_ADDR pc)
static void init_sim_regno_table(struct gdbarch *arch)
#define ADDPCIS_INSN_REGSHIFT
constexpr gdb_byte little_breakpoint[]
static int rs6000_stab_reg_to_regnum(struct gdbarch *gdbarch, int num)
constexpr gdb_byte big_breakpoint[]
static int ppc_process_record_op60(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn)
static int ppc_process_record_prefix_op34(struct gdbarch *gdbarch, struct regcache *regcache, uint32_t insn_prefix, uint32_t insn_suffix)
static int ppc_process_record_op60_XX2(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn)
static struct gdbarch * rs6000_gdbarch_init(struct gdbarch_info info, struct gdbarch_list *arches)
static int max_skip_non_prologue_insns
static struct cmd_list_element * setpowerpccmdlist
ppc_inferior_data * get_ppc_per_inferior(inferior *inf)
#define IS_STORE_CONDITIONAL_INSN(insn)
#define IS_CVSX_PSEUDOREG(tdep, regnum)
static int ppc_record_ACC_fpscr(struct regcache *regcache, ppc_gdbarch_tdep *tdep, int entry, bool save_fpscr)
static int ppc_process_record_op19(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn)
static int ppc_process_record_op63(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn)
static const char *const powerpc_vector_strings[]
#define P_PPC_XT(insn_suffix)
static int rs6000_stack_frame_destroyed_p(struct gdbarch *gdbarch, CORE_ADDR pc)
#define IS_LOAD_AND_RESERVE_INSN(insn)
static bool is_twi_insn(uint32_t insn)
static int ppc_process_record_prefix_store(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn_prefix, uint32_t insn_suffix)
static CORE_ADDR rs6000_frame_align(struct gdbarch *gdbarch, CORE_ADDR addr)
void ppc_supply_gregset(const struct regset *regset, struct regcache *regcache, int regnum, const void *gregs, size_t len)
int ppc_process_record(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr)
static void powerpc_set_soft_float(const char *args, int from_tty, struct cmd_list_element *c)
static void dfp_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int reg_nr, const gdb_byte *buffer)
static struct value * rs6000_epilogue_frame_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
static CORE_ADDR rs6000_skip_stack_check(struct gdbarch *gdbarch, const CORE_ADDR start_pc)
static void efp_ax_pseudo_register_collect(struct gdbarch *gdbarch, struct agent_expr *ax, int reg_nr)
static bool is_tdi_insn(uint32_t insn)
#define ADDPCIS_INSN_MASK
static displaced_step_prepare_status ppc_displaced_step_prepare(gdbarch *arch, thread_info *thread, CORE_ADDR &displaced_pc)
static struct type * rs6000_builtin_type_vec64(struct gdbarch *gdbarch)
static void vsx_ax_pseudo_register_collect(struct gdbarch *gdbarch, struct agent_expr *ax, int reg_nr)
static CORE_ADDR rs6000_skip_trampoline_code(frame_info_ptr frame, CORE_ADDR pc)
#define IS_VSX_PSEUDOREG(tdep, regnum)
static int rs6000_ax_pseudo_register_collect(struct gdbarch *gdbarch, struct agent_expr *ax, int reg_nr)
static int rs6000_in_function_epilogue_frame_p(frame_info_ptr curfrm, struct gdbarch *gdbarch, CORE_ADDR pc)
static int ppc_process_record_op6(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn)
#define P_PPC_XT15(insn_suffix)
static CORE_ADDR ppc64_update_call_site_pc(struct gdbarch *gdbarch, CORE_ADDR pc)
static void rs6000_value_to_register(frame_info_ptr frame, int regnum, struct type *type, const gdb_byte *from)
static void powerpc_set_vector_abi(const char *args, int from_tty, struct cmd_list_element *c)
static void show_powerpc_exact_watchpoints(struct ui_file *file, int from_tty, struct cmd_list_element *c, const char *value)
int vsx_register_p(struct gdbarch *gdbarch, int regno)
static bool is_td_insn(uint32_t insn)
static void rs6000_gen_return_address(struct gdbarch *gdbarch, struct agent_expr *ax, struct axs_value *value, CORE_ADDR scope)
static int ppc_greg_offset(struct gdbarch *gdbarch, ppc_gdbarch_tdep *tdep, const struct ppc_reg_offsets *offsets, int regnum, int *regsize)
static CORE_ADDR rs6000_frame_base_address(frame_info_ptr this_frame, void **this_cache)
static void ppc_displaced_step_fixup(struct gdbarch *gdbarch, struct displaced_step_copy_insn_closure *closure_, CORE_ADDR from, CORE_ADDR to, struct regcache *regs, bool completed_p)
#define IS_CDFP_PSEUDOREG(tdep, regnum)
static void v_alias_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int reg_nr, const gdb_byte *buffer)
static enum register_status dfp_pseudo_register_read(struct gdbarch *gdbarch, readable_regcache *regcache, int reg_nr, gdb_byte *buffer)
#define IS_EFP_PSEUDOREG(tdep, regnum)
static int ppc_process_record_prefix_op32(struct gdbarch *gdbarch, struct regcache *regcache, uint32_t insn_prefix, uint32_t insn_suffix)
static const struct frame_base * rs6000_frame_base_sniffer(frame_info_ptr this_frame)
static int ppc_process_record_op59(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn)
void _initialize_rs6000_tdep()
static enum register_status do_regcache_raw_write(struct regcache *regcache, int regnum, void *buffer)
static const char * rs6000_register_name(struct gdbarch *gdbarch, int regno)
static int rs6000_convert_register_p(struct gdbarch *gdbarch, int regnum, struct type *type)
static struct rs6000_frame_cache * rs6000_epilogue_frame_cache(frame_info_ptr this_frame, void **this_cache)
static CORE_ADDR rs6000_skip_main_prologue(struct gdbarch *gdbarch, CORE_ADDR pc)
static void efp_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int reg_nr, const gdb_byte *buffer)
static struct ppc_variant variants[]
static int insn_changes_sp_or_jumps(unsigned long insn)
void ppc_collect_fpregset(const struct regset *regset, const struct regcache *regcache, int regnum, void *fpregs, size_t len)
static int ppc_process_record_op31(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn)
static void rs6000_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int reg_nr, const gdb_byte *buffer)
static void dfp_ax_pseudo_register_collect(struct gdbarch *gdbarch, struct agent_expr *ax, int reg_nr)
static struct value * rs6000_frame_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
static void rs6000_dump_tdep(struct gdbarch *gdbarch, struct ui_file *file)
const struct target_desc * tdesc_rs6000
static void initialize_tdesc_rs6000(void)
@ LEGACY_SIM_REGNO_IGNORE
struct minimal_symbol * minsym
struct type * builtin_declong
struct type * builtin_double
enum dwarf2_frame_reg_rule how
const char * linkage_name() const
struct type * ppc_builtin_type_vec128
struct type * ppc_builtin_type_vec64
int(* ppc_syscall_record)(struct regcache *regcache)
int ppc_vsr0_upper_regnum
gdb::optional< displaced_step_buffers > disp_step_buf
const struct target_desc ** tdesc
enum bfd_architecture arch
trad_frame_saved_reg * saved_regs
const struct bfd_arch_info * arch
void set_realreg(int realreg)
void set_addr(LONGEST addr)
void set_value(LONGEST val)
void set_name(const char *name)
void set_is_vector(bool is_vector)
struct type * type() const
struct value::@203::@204 reg
CORE_ADDR skip_prologue_using_sal(struct gdbarch *gdbarch, CORE_ADDR func_addr)
struct symtab_and_line find_pc_line(CORE_ADDR pc, int notcurrent)
tdesc_arch_data_up tdesc_data_alloc(void)
const struct tdesc_feature * tdesc_find_feature(const struct target_desc *target_desc, const char *name)
int tdesc_numbered_register(const struct tdesc_feature *feature, struct tdesc_arch_data *data, int regno, const char *name)
static const registry< gdbarch >::key< tdesc_arch_data > tdesc_data
void tdesc_use_registers(struct gdbarch *gdbarch, const struct target_desc *target_desc, tdesc_arch_data_up &&early_data, tdesc_unknown_register_ftype unk_reg_cb)
int tdesc_has_registers(const struct target_desc *target_desc)
void set_tdesc_pseudo_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype *pseudo_type)
int tdesc_numbered_register_choices(const struct tdesc_feature *feature, struct tdesc_arch_data *data, int regno, const char *const names[])
int tdesc_register_bitsize(const struct tdesc_feature *feature, const char *name)
const char * tdesc_register_name(struct gdbarch *gdbarch, int regno)
void set_tdesc_pseudo_register_reggroup_p(struct gdbarch *gdbarch, gdbarch_register_reggroup_p_ftype *pseudo_reggroup_p)
std::unique_ptr< tdesc_arch_data, tdesc_arch_data_deleter > tdesc_arch_data_up
void target_float_convert(const gdb_byte *from, const struct type *from_type, gdb_byte *to, const struct type *to_type)
scoped_restore_tmpl< int > make_scoped_restore_show_memory_breakpoints(int show)
LONGEST target_read(struct target_ops *ops, enum target_object object, const char *annex, gdb_byte *buf, ULONGEST offset, LONGEST len)
int target_read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
trad_frame_saved_reg * trad_frame_alloc_saved_regs(struct gdbarch *gdbarch)
struct value * trad_frame_get_prev_register(frame_info_ptr this_frame, trad_frame_saved_reg this_saved_regs[], int regnum)
int user_reg_map_name_to_regnum(struct gdbarch *gdbarch, const char *name, int len)
const char * paddress(struct gdbarch *gdbarch, CORE_ADDR addr)
void gdb_printf(struct ui_file *stream, const char *format,...)