43#include "opcode/nds32.h"
49#define CHOP_BITS(insn, n) (insn & ~__MASK (n))
50#define N32_LSMW_ENABLE4(insn) (((insn) >> 6) & 0xf)
52 N32_TYPE4 (LSMW, 0, 0, 0, 1, (N32_LSMW_ADM << 2) | N32_LSMW_LSMW)
54 N32_TYPE4 (LSMW, 0, 0, 0, 0, (N32_LSMW_BIM << 2) | N32_LSMW_LSMW)
56 N32_TYPE2 (LDC, 0, REG_SP, 0)
82 "r0",
"r1",
"r2",
"r3",
"r4",
"r5",
"r6",
"r7",
83 "r8",
"r9",
"r10",
"r11",
"r12",
"r13",
"r14",
"r15",
84 "r16",
"r17",
"r18",
"r19",
"r20",
"r21",
"r22",
"r23",
85 "r24",
"r25",
"r26",
"r27",
"fp",
"gp",
"lp",
"sp",
92 "fd0",
"fd1",
"fd2",
"fd3",
"fd4",
"fd5",
"fd6",
"fd7",
93 "fd8",
"fd9",
"fd10",
"fd11",
"fd12",
"fd13",
"fd14",
"fd15",
94 "fd16",
"fd17",
"fd18",
"fd19",
"fd20",
"fd21",
"fd22",
"fd23",
95 "fd24",
"fd25",
"fd26",
"fd27",
"fd28",
"fd29",
"fd30",
"fd31"
100 "fs0",
"fs1",
"fs2",
"fs3",
"fs4",
"fs5",
"fs6",
"fs7",
101 "fs8",
"fs9",
"fs10",
"fs11",
"fs12",
"fs13",
"fs14",
"fs15",
102 "fs16",
"fs17",
"fs18",
"fs19",
"fs20",
"fs21",
"fs22",
"fs23",
103 "fs24",
"fs25",
"fs26",
"fs27",
"fs28",
"fs29",
"fs30",
"fs31"
131 {
"cr6",
"fucop_exist"},
148 {
"ir14",
"int_mask"},
149 {
"ir15",
"int_pend"},
153 {
"ir19",
"int_ctrl"},
155 {
"ir21",
"sp_priv1"},
157 {
"ir23",
"sp_priv2"},
159 {
"ir25",
"sp_priv3"},
160 {
"ir26",
"int_mask2"},
161 {
"ir27",
"int_pend2"},
162 {
"ir28",
"int_pri2"},
163 {
"ir29",
"int_trigger"},
173 {
"mr8",
"cache_ctl"},
174 {
"mr9",
"hsmp_saddr"},
175 {
"mr10",
"hsmp_eaddr"},
176 {
"mr11",
"bg_region"},
227 {
"hspr0",
"hsp_ctl"},
228 {
"hspr1",
"sp_bound"},
229 {
"hspr2",
"sp_bound_priv"},
237 {
"dmar0",
"dma_cfg"},
238 {
"dmar1",
"dma_gcsw"},
239 {
"dmar2",
"dma_chnsel"},
240 {
"dmar3",
"dma_act"},
241 {
"dmar4",
"dma_setup"},
242 {
"dmar5",
"dma_isaddr"},
243 {
"dmar6",
"dma_esaddr"},
244 {
"dmar7",
"dma_tcnt"},
245 {
"dmar8",
"dma_status"},
246 {
"dmar9",
"dma_2dset"},
247 {
"dmar10",
"dma_2dsctl"},
248 {
"dmar11",
"dma_rcnt"},
249 {
"dmar12",
"dma_hstatus"},
251 {
"racr0",
"prusr_acc_ctl"},
252 {
"fucpr",
"fucop_ctl"},
255 {
"idr1",
"misc_ctl"},
256 {
"idr2",
"ecc_misc"},
261 {
"secur3",
"p_isign"},
279 return align_down (sp, 8);
294 const int FDR = FSR + 32;
296 if (num >= 0 && num < 32)
301 else if (num >= FSR && num < FSR + 32)
306 else if (num >= FDR && num < FDR + 32)
365 const char *reg_name;
366 const char *group_name;
394 return !strncmp (reg_name, group_name, strlen (group_name));
412 warning (_(
"Unknown nds32 pseudo register %d."),
regnum);
430static enum register_status
437 int offset, fdr_regnum;
438 enum register_status
status;
452 offset = (
regnum & 1) ? 4 : 0;
454 offset = (
regnum & 1) ? 0 : 4;
459 memcpy (buf, reg_buf + offset, 4);
464 gdb_assert_not_reached (
"invalid pseudo register number");
476 int offset, fdr_regnum;
490 offset = (
regnum & 1) ? 4 : 0;
492 offset = (
regnum & 1) ? 0 : 4;
496 memcpy (reg_buf + offset, buf, 4);
501 gdb_assert_not_reached (
"invalid pseudo register number");
510 return elf_abi == E_NDS_ABI_V2FP_PLUS;
519 return elf_abi == E_NDS_ABI_AABI;
522#define NDS32_NUM_SAVED_REGS (NDS32_LP_REGNUM + 1)
579 for (i = 1; i <= 3; i++)
581 if ((enable4 >> i) & 0x1)
589 if ((rb < REG_FP) && (re < REG_FP))
591 for (i = re; i >= rb; i--)
614 int in_prologue_bb = 0;
616 uint32_t insn, insn_len;
618 for (;
pc < limit_pc;
pc += insn_len)
622 if ((insn & 0x80000000) == 0)
627 if (
CHOP_BITS (insn, 15) == N32_TYPE2 (ADDI, REG_SP, REG_SP, 0))
630 int imm15s = N32_IMM15S (insn);
641 else if (
CHOP_BITS (insn, 15) == N32_TYPE2 (ADDI, REG_FP, REG_SP, 0))
644 int imm15s = N32_IMM15S (insn);
655 else if ((insn & ~(__MASK (19) << 6)) ==
N32_SMW_ADM
656 && N32_RA5 (insn) == REG_SP)
666 else if (insn == N32_ALU1 (
ADD, REG_SP, REG_SP, REG_TA)
667 || insn == N32_ALU1 (
ADD, REG_SP, REG_TA, REG_SP))
680 else if (
CHOP_BITS (insn, 20) == N32_TYPE1 (MOVI, REG_TA, 0))
684 val_ta = N32_IMM20S (insn);
688 else if (
CHOP_BITS (insn, 20) == N32_TYPE1 (SETHI, REG_TA, 0))
692 val_ta = N32_IMM20U (insn) << 12;
696 else if (
CHOP_BITS (insn, 15) == N32_TYPE2 (ORI, REG_TA, REG_TA, 0))
700 val_ta |= N32_IMM15U (insn);
704 else if (
CHOP_BITS (insn, 15) == N32_TYPE2 (ADDI, REG_TA, REG_TA, 0))
708 val_ta += N32_IMM15S (insn);
712 if (insn == N32_ALU1 (
ADD, REG_GP, REG_TA, REG_GP)
713 || insn == N32_ALU1 (
ADD, REG_GP, REG_GP, REG_TA))
720 else if (
CHOP_BITS (insn, 20) == N32_TYPE1 (MOVI, REG_GP, 0))
726 else if (
CHOP_BITS (insn, 20) == N32_TYPE1 (SETHI, REG_GP, 0))
732 else if (
CHOP_BITS (insn, 15) == N32_TYPE2 (ORI, REG_GP, REG_GP, 0))
742 if (in_prologue_bb == 1)
744 int op = N32_OP6 (insn);
747 || op == N32_OP6_JREG
750 || op == N32_OP6_BR3)
755 if (abi_use_fpr && N32_OP6 (insn) == N32_OP6_SDC
756 && __GF (insn, 12, 3) == 0)
762 if (N32_RA5 (insn) == REG_SP)
782 if (
CHOP_BITS (insn, 10) == N16_TYPE10 (ADDI10S, 0))
785 int imm10s = N16_IMM10S (insn);
796 else if (__GF (insn, 7, 8) == N16_T25_PUSH25)
801 int imm8u = (insn & 0x1f) << 3;
802 int re = (insn >> 5) & 0x3;
803 const int reg_map[] = { 6, 8, 10, 14 };
815 else if (insn == N16_TYPE5 (ADD5PC, REG_GP))
821 else if (
CHOP_BITS (insn, 5) == N16_TYPE55 (MOVI55, REG_GP, 0))
831 if (in_prologue_bb == 1)
837 if (insn5 == N16_TYPE5 (JR5, 0)
838 || insn5 == N16_TYPE5 (JRAL5, 0)
839 || insn5 == N16_TYPE5 (RET5, 0)
840 || insn8 == N16_TYPE8 (J8, 0)
841 || insn8 == N16_TYPE8 (BEQZS8, 0)
842 || insn8 == N16_TYPE8 (BNEZS8, 0)
843 || insn38 == N16_TYPE38 (BEQZ38, 0, 0)
844 || insn38 == N16_TYPE38 (BNEZ38, 0, 0)
845 || insn38 == N16_TYPE38 (BEQS38, 0, 0)
846 || insn38 == N16_TYPE38 (BNES38, 0, 0))
872 CORE_ADDR func_addr, limit_pc;
879 CORE_ADDR post_prologue_pc
881 if (post_prologue_pc != 0)
882 return std::max (
pc, post_prologue_pc);
908 CORE_ADDR current_pc;
938 cache->
base = this_base;
956 void **this_cache,
struct frame_id *this_id)
1029 if ((rb < REG_FP) && (re < REG_FP))
1031 for (i = rb; i <= re; i++)
1039 for (i = 3; i >= 1; i--)
1041 if ((enable4 >> i) & 0x1)
1067 if (
CHOP_BITS (insn, 15) == N32_TYPE2 (ADDI, REG_SP, REG_SP, 0)
1068 && N32_IMM15S (insn) > 0)
1071 else if (
CHOP_BITS (insn, 15) == N32_TYPE2 (ADDI, REG_SP, REG_FP, 0)
1072 && N32_IMM15S (insn) < 0)
1075 else if ((insn & ~(__MASK (19) << 6)) ==
N32_LMW_BIM
1076 && N32_RA5 (insn) == REG_SP)
1085 else if (insn == N32_JREG (JR, 0, REG_LP, 0, 1))
1088 else if (insn == N32_ALU1 (
ADD, REG_SP, REG_SP, REG_TA)
1089 || insn == N32_ALU1 (
ADD, REG_SP, REG_TA, REG_SP))
1093 else if (abi_use_fpr
1094 && (insn & ~(__MASK (5) << 20 | __MASK (13))) ==
N32_FLDI_SP)
1096 if (__GF (insn, 12, 1) == 0)
1102 int offset = N32_IMM12S (insn) << 2;
1104 if (offset == 8 || offset == 12)
1123 if (insn == N16_TYPE5 (RET5, REG_LP))
1126 else if (
CHOP_BITS (insn, 10) == N16_TYPE10 (ADDI10S, 0))
1129 int imm10s = N16_IMM10S (insn);
1139 else if (__GF (insn, 7, 8) == N16_T25_POP25)
1144 int imm8u = (insn & 0x1f) << 3;
1145 int re = (insn >> 5) & 0x3;
1146 const int reg_map[] = { 6, 8, 10, 14 };
1175 uint32_t insn, insn_len;
1183 for (; pc < limit_pc; pc += insn_len)
1187 if ((insn & 0x80000000) == 0)
1231 if ((insn & 0x80000000) == 0)
1260 if ((insn & 0x80000000) != 0)
1274 if ((insn & 0x80000000) == 0)
1309 CORE_ADDR current_pc, current_sp;
1316 *this_cache = cache;
1338 void **this_cache,
struct frame_id *this_id)
1352static struct value *
1354 void **this_cache,
int regnum)
1399 typecode = t->
code ();
1400 if (typecode != TYPE_CODE_STRUCT)
1408 return typecode == TYPE_CODE_FLT;
1416 int nargs,
struct value **args, CORE_ADDR sp,
1418 CORE_ADDR struct_addr)
1446 for (i = 0; i < nargs; i++)
1448 struct type *
type = args[i]->type ();
1457 sp = align_down (sp, align);
1461 sp = align_down (sp, 8);
1464 for (i = 0; i < nargs; i++)
1466 const gdb_byte *val;
1469 int calling_use_fpr;
1472 type = args[i]->type ();
1476 val = args[i]->contents ().data ();
1481 len = align_up (len, 4);
1492 if (abi_use_fpr &&
func_type->has_varargs ()
1499 use_fpr = abi_use_fpr && calling_use_fpr;
1507 if ((align >> 2) > 0)
1508 foff = align_up (foff, align >> 2);
1524 internal_error (
"Do not know how to handle %d-byte double.\n",
1561 if ((align >> 2) > 0)
1562 goff = align_up (goff, align >> 2);
1564 if (len <= (REND - goff) * 4)
1618 soff = align_up (soff, align);
1622 int rlen = (len > 4) ? 4 : len;
1624 if (byte_order == BFD_ENDIAN_BIG)
1643 error (_(
"Fail to call. FPU registers are required."));
1656 int calling_use_fpr;
1662 if (abi_use_fpr && calling_use_fpr)
1669 internal_error (_(
"Cannot extract return value of %d bytes "
1670 "long floating-point."), len);
1718 len1 = byte_order == BFD_ENDIAN_BIG ? len - 4 : 4;
1745 int calling_use_fpr;
1751 if (abi_use_fpr && calling_use_fpr)
1758 internal_error (_(
"Cannot store return value of %d bytes "
1759 "long floating-point."), len);
1778 len1 = byte_order == BFD_ENDIAN_BIG ? len - 4 : 4;
1807 gdb_byte *readbuf,
const gdb_byte *writebuf)
1815 if (readbuf != NULL)
1817 if (writebuf != NULL)
1850 int *fpu_freg,
int *use_pseudo_fsrs)
1852 const struct tdesc_feature *feature;
1856 if (feature == NULL)
1882 if (feature != NULL)
1884 int num_fdr_regs, num_fsr_regs, fs0_regnum, num_listed_fsr;
1905 for (i = 0; i < num_fdr_regs; i++)
1916 for (i = 0; i < num_fsr_regs; i++)
1921 if (num_listed_fsr == 0)
1924 *use_pseudo_fsrs = 1;
1925 else if (num_listed_fsr == num_fsr_regs)
1927 *use_pseudo_fsrs = 0;
1948 const struct target_desc *tdesc = info.target_desc;
1949 int elf_abi = E_NDS_ABI_AABI;
1951 int use_pseudo_fsrs = 0;
1952 int i, num_regs, maxregs;
1955 if (info.abfd && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
1956 elf_abi = elf_elfheader (info.abfd)->e_flags & EF_NDS_ABI;
1964 = gdbarch_tdep<nds32_gdbarch_tdep> (best_arch->
gdbarch);
1973 if (best_arch != NULL)
2000 else if (use_pseudo_fsrs == 1)
2029 for (j = 0; j < maxregs; j++)
2069 nds32_breakpoint::kind_from_pc);
2071 nds32_breakpoint::bp_from_kind);
void gdbarch_register(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init, gdbarch_dump_tdep_ftype *dump_tdep, gdbarch_supports_arch_info_ftype *supports_arch_info)
static std::vector< const char * > arches
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
#define BP_MANIPULATION(BREAK_INSN)
bool find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr, const struct block **block)
enum register_status raw_read(int regnum, gdb_byte *buf)
enum register_status cooked_read(int regnum, gdb_byte *buf)
void cooked_write(int regnum, const gdb_byte *buf)
void raw_write(int regnum, const gdb_byte *buf)
void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
ULONGEST read_memory_unsigned_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
static void store_unsigned_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, ULONGEST val)
static ULONGEST extract_unsigned_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
@ RETURN_VALUE_REGISTER_CONVENTION
@ RETURN_VALUE_STRUCT_CONVENTION
void dwarf2_append_unwinders(struct gdbarch *gdbarch)
struct value * value_of_register(int regnum, frame_info_ptr frame)
void frame_base_set_default(struct gdbarch *gdbarch, const struct frame_base *default_base)
int default_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
struct value * frame_unwind_got_memory(frame_info_ptr frame, int regnum, CORE_ADDR addr)
struct value * frame_unwind_got_register(frame_info_ptr frame, int regnum, int new_regnum)
enum unwind_stop_reason default_frame_unwind_stop_reason(frame_info_ptr this_frame, void **this_cache)
struct value * frame_unwind_got_constant(frame_info_ptr frame, int regnum, ULONGEST val)
void frame_unwind_append_unwinder(struct gdbarch *gdbarch, const struct frame_unwind *unwinder)
int frame_relative_level(frame_info_ptr fi)
ULONGEST get_frame_register_unsigned(frame_info_ptr frame, int regnum)
CORE_ADDR get_frame_pc(frame_info_ptr frame)
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
struct gdbarch * get_frame_arch(frame_info_ptr this_frame)
CORE_ADDR get_frame_func(frame_info_ptr this_frame)
#define FRAME_OBSTACK_ZALLOC(TYPE)
enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
void set_gdbarch_breakpoint_kind_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_kind_from_pc_ftype *breakpoint_kind_from_pc)
const char * gdbarch_register_name(struct gdbarch *gdbarch, int regnr)
void set_gdbarch_frame_align(struct gdbarch *gdbarch, gdbarch_frame_align_ftype *frame_align)
void set_gdbarch_get_longjmp_target(struct gdbarch *gdbarch, gdbarch_get_longjmp_target_ftype *get_longjmp_target)
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype *skip_prologue)
void set_gdbarch_wchar_bit(struct gdbarch *gdbarch, int wchar_bit)
void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype *return_value)
void set_gdbarch_wchar_signed(struct gdbarch *gdbarch, int wchar_signed)
int gdbarch_num_regs(struct gdbarch *gdbarch)
void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype *inner_than)
void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
void set_gdbarch_register_reggroup_p(struct gdbarch *gdbarch, gdbarch_register_reggroup_p_ftype *register_reggroup_p)
void set_gdbarch_pc_regnum(struct gdbarch *gdbarch, int pc_regnum)
int gdbarch_num_pseudo_regs(struct gdbarch *gdbarch)
void set_gdbarch_stack_frame_destroyed_p(struct gdbarch *gdbarch, gdbarch_stack_frame_destroyed_p_ftype *stack_frame_destroyed_p)
void set_gdbarch_pseudo_register_write(struct gdbarch *gdbarch, gdbarch_pseudo_register_write_ftype *pseudo_register_write)
void set_gdbarch_num_pseudo_regs(struct gdbarch *gdbarch, int num_pseudo_regs)
void set_gdbarch_dwarf2_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_dwarf2_reg_to_regnum_ftype *dwarf2_reg_to_regnum)
void set_gdbarch_pseudo_register_read(struct gdbarch *gdbarch, gdbarch_pseudo_register_read_ftype *pseudo_register_read)
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
void set_gdbarch_sw_breakpoint_from_kind(struct gdbarch *gdbarch, gdbarch_sw_breakpoint_from_kind_ftype *sw_breakpoint_from_kind)
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype *push_dummy_call)
struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, gdbarch_tdep_up tdep)
std::unique_ptr< gdbarch_tdep_base > gdbarch_tdep_up
static int gdbarch_num_cooked_regs(gdbarch *arch)
function_call_return_method
const struct floatformat * floatformats_ieee_single[BFD_ENDIAN_UNKNOWN]
struct type * init_float_type(type_allocator &alloc, int bit, const char *name, const struct floatformat **floatformats, enum bfd_endian byte_order)
unsigned type_align(struct type *type)
struct type * check_typedef(struct type *type)
mach_port_t mach_port_t name mach_port_t mach_port_t name kern_return_t int status
static struct value * nds32_epilogue_frame_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
static int nds32_abi_use_fpr(int elf_abi)
static CORE_ADDR nds32_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
static const char *const nds32_fdr_register_names[]
static void nds32_store_return_value(struct gdbarch *gdbarch, struct type *type, struct regcache *regcache, const gdb_byte *valbuf)
static const struct frame_unwind nds32_frame_unwind
static const reggroup * nds32_hspr_reggroup
static int nds32_analyze_epilogue_insn32(int abi_use_fpr, uint32_t insn, struct nds32_frame_cache *cache)
static int nds32_validate_tdesc_p(const struct target_desc *tdesc, struct tdesc_arch_data *tdesc_data, int *fpu_freg, int *use_pseudo_fsrs)
static int nds32_abi_split(int elf_abi)
static int nds32_check_calling_use_fpr(struct type *type)
static void nds32_pop_multiple_words(struct nds32_frame_cache *cache, int rb, int re, int enable4)
static struct nds32_frame_cache * nds32_frame_cache(frame_info_ptr this_frame, void **this_cache)
static CORE_ADDR nds32_frame_align(struct gdbarch *gdbarch, CORE_ADDR sp)
static struct nds32_frame_cache * nds32_epilogue_frame_cache(frame_info_ptr this_frame, void **this_cache)
static int nds32_stack_frame_destroyed_p(struct gdbarch *gdbarch, CORE_ADDR addr)
static void nds32_extract_return_value(struct gdbarch *gdbarch, struct type *type, struct regcache *regcache, gdb_byte *valbuf)
static int nds32_analyze_epilogue(struct gdbarch *gdbarch, CORE_ADDR pc, struct nds32_frame_cache *cache)
static struct value * nds32_frame_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
static const reggroup * nds32_dr_reggroup
static void nds32_push_multiple_words(struct nds32_frame_cache *cache, int rb, int re, int enable4)
static const struct @139 nds32_register_aliases[]
static struct type * nds32_pseudo_register_type(struct gdbarch *gdbarch, int regnum)
constexpr gdb_byte nds32_break_insn[]
static const reggroup * nds32_mr_reggroup
static enum register_status nds32_pseudo_register_read(struct gdbarch *gdbarch, readable_regcache *regcache, int regnum, gdb_byte *buf)
static struct value * value_of_nds32_reg(frame_info_ptr frame, const void *baton)
void _initialize_nds32_tdep()
static int nds32_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *reggroup)
static const reggroup * nds32_idr_reggroup
static void nds32_add_reggroups(struct gdbarch *gdbarch)
static enum return_value_convention nds32_return_value(struct gdbarch *gdbarch, struct value *func_type, struct type *type, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
static const struct frame_unwind nds32_epilogue_frame_unwind
static CORE_ADDR nds32_skip_prologue(struct gdbarch *gdbarch, CORE_ADDR pc)
#define N32_LSMW_ENABLE4(insn)
static const reggroup * nds32_ir_reggroup
static const char *const nds32_fsr_register_names[]
static void nds32_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
static void nds32_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int regnum, const gdb_byte *buf)
#define CHOP_BITS(insn, n)
static const struct frame_base nds32_frame_base
static CORE_ADDR nds32_frame_base_address(frame_info_ptr this_frame, void **this_cache)
static const reggroup * nds32_pfr_reggroup
static CORE_ADDR nds32_analyze_prologue(struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR limit_pc, struct nds32_frame_cache *cache)
static const reggroup * nds32_secur_reggroup
static int nds32_analyze_epilogue_insn16(uint32_t insn, struct nds32_frame_cache *cache)
#define NDS32_NUM_SAVED_REGS
static void nds32_epilogue_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
static struct gdbarch * nds32_gdbarch_init(struct gdbarch_info info, struct gdbarch_list *arches)
static const reggroup * nds32_cr_reggroup
static const char *const nds32_register_names[]
static const reggroup * nds32_dmar_reggroup
static int nds32_get_longjmp_target(frame_info_ptr frame, CORE_ADDR *pc)
static void nds32_init_reggroups(void)
static int nds32_epilogue_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_cache)
static const char * nds32_pseudo_register_name(struct gdbarch *gdbarch, int regnum)
static const reggroup * nds32_racr_reggroup
static struct nds32_frame_cache * nds32_alloc_frame_cache(void)
static void initialize_tdesc_nds32(void)
const struct target_desc * tdesc_nds32
void gdbarch_init_osabi(struct gdbarch_info info, struct gdbarch *gdbarch)
enum register_status regcache_cooked_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
void regcache_cooked_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
const reggroup *const general_reggroup
int default_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *group)
const reggroup * reggroup_new(const char *name, enum reggroup_type type)
const reggroup *const system_reggroup
const reggroup *const float_reggroup
const reggroup *const save_reggroup
const reggroup *const all_reggroup
void reggroup_add(struct gdbarch *gdbarch, const reggroup *group)
const reggroup *const restore_reggroup
struct type * type() const
struct gdbarch_list * next
CORE_ADDR saved_regs[NDS32_NUM_SAVED_REGS]
const char * name() const
struct field & field(int idx) const
unsigned int num_fields() const
struct type * type() const
CORE_ADDR skip_prologue_using_sal(struct gdbarch *gdbarch, CORE_ADDR func_addr)
tdesc_arch_data_up tdesc_data_alloc(void)
const struct tdesc_feature * tdesc_find_feature(const struct target_desc *target_desc, const char *name)
int tdesc_numbered_register(const struct tdesc_feature *feature, struct tdesc_arch_data *data, int regno, const char *name)
static const registry< gdbarch >::key< tdesc_arch_data > tdesc_data
void tdesc_use_registers(struct gdbarch *gdbarch, const struct target_desc *target_desc, tdesc_arch_data_up &&early_data, tdesc_unknown_register_ftype unk_reg_cb)
void set_tdesc_pseudo_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype *pseudo_name)
int tdesc_has_registers(const struct target_desc *target_desc)
void set_tdesc_pseudo_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype *pseudo_type)
int tdesc_unnumbered_register(const struct tdesc_feature *feature, const char *name)
int tdesc_register_in_reggroup_p(struct gdbarch *gdbarch, int regno, const struct reggroup *reggroup)
std::unique_ptr< tdesc_arch_data, tdesc_arch_data_deleter > tdesc_arch_data_up
int target_read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
void user_reg_add(struct gdbarch *gdbarch, const char *name, user_reg_read_ftype *xread, const void *baton)
int user_reg_map_name_to_regnum(struct gdbarch *gdbarch, const char *name, int len)