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riscv-linux-tdep.c
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1/* Target-dependent code for GNU/Linux on RISC-V processors.
2 Copyright (C) 2018-2023 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
18
19#include "defs.h"
20#include "riscv-tdep.h"
21#include "osabi.h"
22#include "glibc-tdep.h"
23#include "linux-tdep.h"
24#include "solib-svr4.h"
25#include "regset.h"
26#include "tramp-frame.h"
27#include "trad-frame.h"
28#include "gdbarch.h"
29
30/* The following value is derived from __NR_rt_sigreturn in
31 <include/uapi/asm-generic/unistd.h> from the Linux source tree. */
32
33#define RISCV_NR_rt_sigreturn 139
34
35/* Define the general register mapping. The kernel puts the PC at offset 0,
36 gdb puts it at offset 32. Register x0 is always 0 and can be ignored.
37 Registers x1 to x31 are in the same place. */
38
40{
41 { 1, RISCV_PC_REGNUM, 0 },
42 { 31, RISCV_RA_REGNUM, 0 }, /* x1 to x31 */
43 { 0 }
44};
45
46/* Define the FP register mapping. The kernel puts the 32 FP regs first, and
47 then FCSR. */
48
50{
51 { 32, RISCV_FIRST_FP_REGNUM, 0 },
52 { 1, RISCV_CSR_FCSR_REGNUM, 0 },
53 { 0 }
54};
55
56/* Define the general register regset. */
57
62
63/* Define the FP register regset. */
64
69
70/* Define hook for core file support. */
71
72static void
75 void *cb_data,
76 const struct regcache *regcache)
77{
78 cb (".reg", (32 * riscv_isa_xlen (gdbarch)), (32 * riscv_isa_xlen (gdbarch)),
79 &riscv_linux_gregset, NULL, cb_data);
80 /* The kernel is adding 8 bytes for FCSR. */
81 cb (".reg2", (32 * riscv_isa_flen (gdbarch)) + 8,
82 (32 * riscv_isa_flen (gdbarch)) + 8,
83 &riscv_linux_fregset, NULL, cb_data);
84}
85
86/* Signal trampoline support. */
87
88static void riscv_linux_sigframe_init (const struct tramp_frame *self,
89 frame_info_ptr this_frame,
90 struct trad_frame_cache *this_cache,
91 CORE_ADDR func);
92
93#define RISCV_INST_LI_A7_SIGRETURN 0x08b00893
94#define RISCV_INST_ECALL 0x00000073
95
96static const struct tramp_frame riscv_linux_sigframe = {
98 4,
99 {
100 { RISCV_INST_LI_A7_SIGRETURN, ULONGEST_MAX },
101 { RISCV_INST_ECALL, ULONGEST_MAX },
103 },
105 NULL
106};
107
108/* Runtime signal frames look like this:
109 struct rt_sigframe {
110 struct siginfo info;
111 struct ucontext uc;
112 };
113
114 struct ucontext {
115 unsigned long __uc_flags;
116 struct ucontext *uclink;
117 stack_t uc_stack;
118 sigset_t uc_sigmask;
119 char __glibc_reserved[1024 / 8 - sizeof (sigset_t)];
120 mcontext_t uc_mcontext;
121 }; */
122
123#define SIGFRAME_SIGINFO_SIZE 128
124#define UCONTEXT_MCONTEXT_OFFSET 176
125
126static void
128 frame_info_ptr this_frame,
129 struct trad_frame_cache *this_cache,
130 CORE_ADDR func)
131{
132 struct gdbarch *gdbarch = get_frame_arch (this_frame);
133 int xlen = riscv_isa_xlen (gdbarch);
134 int flen = riscv_isa_flen (gdbarch);
135 CORE_ADDR frame_sp = get_frame_sp (this_frame);
136 CORE_ADDR mcontext_base;
137 CORE_ADDR regs_base;
138
139 mcontext_base = frame_sp + SIGFRAME_SIGINFO_SIZE + UCONTEXT_MCONTEXT_OFFSET;
140
141 /* Handle the integer registers. The first one is PC, followed by x1
142 through x31. */
143 regs_base = mcontext_base;
144 trad_frame_set_reg_addr (this_cache, RISCV_PC_REGNUM, regs_base);
145 for (int i = 1; i < 32; i++)
147 regs_base + (i * xlen));
148
149 /* Handle the FP registers. First comes the 32 FP registers, followed by
150 fcsr. */
151 regs_base += 32 * xlen;
152 for (int i = 0; i < 32; i++)
154 regs_base + (i * flen));
155 regs_base += 32 * flen;
156 trad_frame_set_reg_addr (this_cache, RISCV_CSR_FCSR_REGNUM, regs_base);
157
158 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
159 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
160}
161
162/* When FRAME is at a syscall instruction (ECALL), return the PC of the next
163 instruction to be executed. */
164
165static CORE_ADDR
167{
168 const CORE_ADDR pc = get_frame_pc (frame);
169 const ULONGEST a7 = get_frame_register_unsigned (frame, RISCV_A7_REGNUM);
170
171 if (a7 == RISCV_NR_rt_sigreturn)
172 return frame_unwind_caller_pc (frame);
173
174 return pc + 4 /* Length of the ECALL insn. */;
175}
176
177/* Initialize RISC-V Linux ABI info. */
178
179static void
210
211/* Initialize RISC-V Linux target support. */
212
214void
ULONGEST get_frame_register_unsigned(frame_info_ptr frame, int regnum)
Definition frame.c:1399
CORE_ADDR frame_unwind_caller_pc(frame_info_ptr this_frame)
Definition frame.c:1042
CORE_ADDR get_frame_pc(frame_info_ptr frame)
Definition frame.c:2712
CORE_ADDR get_frame_sp(frame_info_ptr this_frame)
Definition frame.c:3115
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
Definition frame.c:736
struct gdbarch * get_frame_arch(frame_info_ptr this_frame)
Definition frame.c:3027
@ SIGTRAMP_FRAME
Definition frame.h:198
void set_gdbarch_software_single_step(struct gdbarch *gdbarch, gdbarch_software_single_step_ftype *software_single_step)
void set_gdbarch_skip_trampoline_code(struct gdbarch *gdbarch, gdbarch_skip_trampoline_code_ftype *skip_trampoline_code)
void set_gdbarch_fetch_tls_load_module_address(struct gdbarch *gdbarch, gdbarch_fetch_tls_load_module_address_ftype *fetch_tls_load_module_address)
void set_gdbarch_skip_solib_resolver(struct gdbarch *gdbarch, gdbarch_skip_solib_resolver_ftype *skip_solib_resolver)
void set_gdbarch_iterate_over_regset_sections(struct gdbarch *gdbarch, gdbarch_iterate_over_regset_sections_ftype *iterate_over_regset_sections)
void iterate_over_regset_sections_cb(const char *sect_name, int supply_size, int collect_size, const struct regset *regset, const char *human_name, void *cb_data)
Definition gdbarch.h:104
CORE_ADDR glibc_skip_solib_resolver(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition glibc-tdep.c:38
link_map_offsets * linux_lp64_fetch_link_map_offsets()
link_map_offsets * linux_ilp32_fetch_link_map_offsets()
void linux_init_abi(struct gdbarch_info info, struct gdbarch *gdbarch, int num_disp_step_buffers)
CORE_ADDR find_solib_trampoline_target(frame_info_ptr frame, CORE_ADDR pc)
Definition minsyms.c:1554
info(Component c)
Definition gdbarch.py:41
void gdbarch_register_osabi(enum bfd_architecture arch, unsigned long machine, enum gdb_osabi osabi, void(*init_osabi)(struct gdbarch_info, struct gdbarch *))
Definition osabi.c:146
@ GDB_OSABI_LINUX
Definition osabi.h:32
void regcache_collect_regset(const struct regset *regset, const struct regcache *regcache, int regnum, void *buf, size_t size)
Definition regcache.c:1273
void(* func)(remote_target *remote, char *)
static const struct tramp_frame riscv_linux_sigframe
static void riscv_linux_init_abi(struct gdbarch_info info, struct gdbarch *gdbarch)
#define SIGFRAME_SIGINFO_SIZE
#define RISCV_INST_LI_A7_SIGRETURN
static CORE_ADDR riscv_linux_syscall_next_pc(frame_info_ptr frame)
#define RISCV_INST_ECALL
static const struct regset riscv_linux_fregset
static void riscv_linux_sigframe_init(const struct tramp_frame *self, frame_info_ptr this_frame, struct trad_frame_cache *this_cache, CORE_ADDR func)
static const struct regcache_map_entry riscv_linux_gregmap[]
static const struct regcache_map_entry riscv_linux_fregmap[]
#define RISCV_NR_rt_sigreturn
static void riscv_linux_iterate_over_regset_sections(struct gdbarch *gdbarch, iterate_over_regset_sections_cb *cb, void *cb_data, const struct regcache *regcache)
void _initialize_riscv_linux_tdep()
#define UCONTEXT_MCONTEXT_OFFSET
static const struct regset riscv_linux_gregset
void riscv_supply_regset(const struct regset *regset, struct regcache *regcache, int regnum, const void *regs, size_t len)
int riscv_isa_xlen(struct gdbarch *gdbarch)
Definition riscv-tdep.c:765
int riscv_isa_flen(struct gdbarch *gdbarch)
Definition riscv-tdep.c:783
std::vector< CORE_ADDR > riscv_software_single_step(struct regcache *regcache)
@ RISCV_RA_REGNUM
Definition riscv-tdep.h:31
@ RISCV_FIRST_FP_REGNUM
Definition riscv-tdep.h:43
@ RISCV_ZERO_REGNUM
Definition riscv-tdep.h:30
@ RISCV_A7_REGNUM
Definition riscv-tdep.h:38
@ RISCV_PC_REGNUM
Definition riscv-tdep.h:39
void set_solib_svr4_fetch_link_map_offsets(struct gdbarch *gdbarch, struct link_map_offsets *(*flmo)(void))
CORE_ADDR svr4_fetch_objfile_link_map(struct objfile *objfile)
Definition regcache.h:111
CORE_ADDR(* syscall_next_pc)(frame_info_ptr frame)
Definition riscv-tdep.h:115
void trad_frame_set_reg_addr(struct trad_frame_cache *this_trad_cache, int regnum, CORE_ADDR addr)
Definition trad-frame.c:110
void trad_frame_set_id(struct trad_frame_cache *this_trad_cache, struct frame_id this_id)
Definition trad-frame.c:220
void tramp_frame_prepend_unwinder(struct gdbarch *gdbarch, const struct tramp_frame *tramp_frame)
#define TRAMP_SENTINEL_INSN
Definition tramp-frame.h:44