GDB (xrefs)
Loading...
Searching...
No Matches
loongarch-tdep.c
Go to the documentation of this file.
1/* Target-dependent code for the LoongArch architecture, for GDB.
2
3 Copyright (C) 2022-2023 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20#include "defs.h"
21#include "arch-utils.h"
22#include "dwarf2/frame.h"
23#include "elf-bfd.h"
24#include "frame-unwind.h"
25#include "gdbcore.h"
26#include "loongarch-tdep.h"
27#include "reggroups.h"
28#include "target.h"
29#include "target-descriptions.h"
30#include "trad-frame.h"
31#include "user-regs.h"
32
33/* Fetch the instruction at PC. */
34
35static insn_t
37{
38 size_t insn_len = loongarch_insn_length (0);
39 gdb_byte buf[insn_len];
40 int err;
41
42 err = target_read_memory (pc, buf, insn_len);
43 if (err)
45
46 return extract_unsigned_integer (buf, insn_len, BFD_ENDIAN_LITTLE);
47}
48
49/* Return TRUE if INSN is a unconditional branch instruction, otherwise return FALSE. */
50
51static bool
53{
54 if ((insn & 0xfc000000) == 0x4c000000 /* jirl */
55 || (insn & 0xfc000000) == 0x50000000 /* b */
56 || (insn & 0xfc000000) == 0x54000000) /* bl */
57 return true;
58 return false;
59}
60
61/* Return TRUE if INSN is a conditional branch instruction, otherwise return FALSE. */
62
63static bool
65{
66 if ((insn & 0xfc000000) == 0x58000000 /* beq */
67 || (insn & 0xfc000000) == 0x5c000000 /* bne */
68 || (insn & 0xfc000000) == 0x60000000 /* blt */
69 || (insn & 0xfc000000) == 0x64000000 /* bge */
70 || (insn & 0xfc000000) == 0x68000000 /* bltu */
71 || (insn & 0xfc000000) == 0x6c000000 /* bgeu */
72 || (insn & 0xfc000000) == 0x40000000 /* beqz */
73 || (insn & 0xfc000000) == 0x44000000) /* bnez */
74 return true;
75 return false;
76}
77
78/* Return TRUE if INSN is a branch instruction, otherwise return FALSE. */
79
80static bool
82{
83 bool is_uncond = loongarch_insn_is_uncond_branch (insn);
84 bool is_cond = loongarch_insn_is_cond_branch (insn);
85
86 return (is_uncond || is_cond);
87}
88
89/* Return TRUE if INSN is a Load Linked instruction, otherwise return FALSE. */
90
91static bool
93{
94 if ((insn & 0xff000000) == 0x20000000 /* ll.w */
95 || (insn & 0xff000000) == 0x22000000) /* ll.d */
96 return true;
97 return false;
98}
99
100/* Return TRUE if INSN is a Store Conditional instruction, otherwise return FALSE. */
101
102static bool
104{
105 if ((insn & 0xff000000) == 0x21000000 /* sc.w */
106 || (insn & 0xff000000) == 0x23000000) /* sc.d */
107 return true;
108 return false;
109}
110
111/* Analyze the function prologue from START_PC to LIMIT_PC.
112 Return the address of the first instruction past the prologue. */
113
114static CORE_ADDR
115loongarch_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc,
116 CORE_ADDR limit_pc, frame_info_ptr this_frame,
117 struct trad_frame_cache *this_cache)
118{
119 CORE_ADDR cur_pc = start_pc, prologue_end = 0;
120 int32_t sp = LOONGARCH_SP_REGNUM;
121 int32_t fp = LOONGARCH_FP_REGNUM;
122 int32_t reg_value[32] = {0};
123 int32_t reg_used[32] = {1, 0};
124
125 while (cur_pc < limit_pc)
126 {
127 insn_t insn = loongarch_fetch_instruction (cur_pc);
128 size_t insn_len = loongarch_insn_length (insn);
129 int32_t rd = loongarch_decode_imm ("0:5", insn, 0);
130 int32_t rj = loongarch_decode_imm ("5:5", insn, 0);
131 int32_t rk = loongarch_decode_imm ("10:5", insn, 0);
132 int32_t si12 = loongarch_decode_imm ("10:12", insn, 1);
133 int32_t si20 = loongarch_decode_imm ("5:20", insn, 1);
134
135 if ((insn & 0xffc00000) == 0x02c00000 /* addi.d sp,sp,si12 */
136 && rd == sp && rj == sp && si12 < 0)
137 {
138 prologue_end = cur_pc + insn_len;
139 }
140 else if ((insn & 0xffc00000) == 0x02c00000 /* addi.d fp,sp,si12 */
141 && rd == fp && rj == sp && si12 > 0)
142 {
143 prologue_end = cur_pc + insn_len;
144 }
145 else if ((insn & 0xffc00000) == 0x29c00000 /* st.d rd,sp,si12 */
146 && rj == sp)
147 {
148 prologue_end = cur_pc + insn_len;
149 }
150 else if ((insn & 0xff000000) == 0x27000000 /* stptr.d rd,sp,si14 */
151 && rj == sp)
152 {
153 prologue_end = cur_pc + insn_len;
154 }
155 else if ((insn & 0xfe000000) == 0x14000000) /* lu12i.w rd,si20 */
156 {
157 reg_value[rd] = si20 << 12;
158 reg_used[rd] = 1;
159 }
160 else if ((insn & 0xffc00000) == 0x03800000) /* ori rd,rj,si12 */
161 {
162 if (reg_used[rj])
163 {
164 reg_value[rd] = reg_value[rj] | (si12 & 0xfff);
165 reg_used[rd] = 1;
166 }
167 }
168 else if ((insn & 0xffff8000) == 0x00108000 /* add.d sp,sp,rk */
169 && rd == sp && rj == sp)
170 {
171 if (reg_used[rk] == 1 && reg_value[rk] < 0)
172 {
173 prologue_end = cur_pc + insn_len;
174 break;
175 }
176 }
177 else if (loongarch_insn_is_branch (insn))
178 {
179 break;
180 }
181
182 cur_pc += insn_len;
183 }
184
185 if (prologue_end == 0)
186 prologue_end = cur_pc;
187
188 return prologue_end;
189}
190
191/* Implement the loongarch_skip_prologue gdbarch method. */
192
193static CORE_ADDR
195{
196 CORE_ADDR func_addr;
197
198 /* See if we can determine the end of the prologue via the symbol table.
199 If so, then return either PC, or the PC after the prologue, whichever
200 is greater. */
201 if (find_pc_partial_function (pc, nullptr, &func_addr, nullptr))
202 {
203 CORE_ADDR post_prologue_pc
204 = skip_prologue_using_sal (gdbarch, func_addr);
205 if (post_prologue_pc != 0)
206 return std::max (pc, post_prologue_pc);
207 }
208
209 /* Can't determine prologue from the symbol table, need to examine
210 instructions. */
211
212 /* Find an upper limit on the function prologue using the debug
213 information. If the debug information could not be used to provide
214 that bound, then use an arbitrary large number as the upper bound. */
215 CORE_ADDR limit_pc = skip_prologue_using_sal (gdbarch, pc);
216 if (limit_pc == 0)
217 limit_pc = pc + 100; /* Arbitrary large number. */
218
219 return loongarch_scan_prologue (gdbarch, pc, limit_pc, nullptr, nullptr);
220}
221
222/* Decode the current instruction and determine the address of the
223 next instruction. */
224
225static CORE_ADDR
226loongarch_next_pc (struct regcache *regcache, CORE_ADDR cur_pc)
227{
228 struct gdbarch *gdbarch = regcache->arch ();
229 loongarch_gdbarch_tdep *tdep = gdbarch_tdep<loongarch_gdbarch_tdep> (gdbarch);
230 insn_t insn = loongarch_fetch_instruction (cur_pc);
231 size_t insn_len = loongarch_insn_length (insn);
232 CORE_ADDR next_pc = cur_pc + insn_len;
233
234 if ((insn & 0xfc000000) == 0x4c000000) /* jirl rd, rj, offs16 */
235 {
236 LONGEST rj = regcache_raw_get_signed (regcache,
237 loongarch_decode_imm ("5:5", insn, 0));
238 next_pc = rj + loongarch_decode_imm ("10:16<<2", insn, 1);
239 }
240 else if ((insn & 0xfc000000) == 0x50000000 /* b offs26 */
241 || (insn & 0xfc000000) == 0x54000000) /* bl offs26 */
242 {
243 next_pc = cur_pc + loongarch_decode_imm ("0:10|10:16<<2", insn, 1);
244 }
245 else if ((insn & 0xfc000000) == 0x58000000) /* beq rj, rd, offs16 */
246 {
247 LONGEST rj = regcache_raw_get_signed (regcache,
248 loongarch_decode_imm ("5:5", insn, 0));
249 LONGEST rd = regcache_raw_get_signed (regcache,
250 loongarch_decode_imm ("0:5", insn, 0));
251 if (rj == rd)
252 next_pc = cur_pc + loongarch_decode_imm ("10:16<<2", insn, 1);
253 }
254 else if ((insn & 0xfc000000) == 0x5c000000) /* bne rj, rd, offs16 */
255 {
256 LONGEST rj = regcache_raw_get_signed (regcache,
257 loongarch_decode_imm ("5:5", insn, 0));
258 LONGEST rd = regcache_raw_get_signed (regcache,
259 loongarch_decode_imm ("0:5", insn, 0));
260 if (rj != rd)
261 next_pc = cur_pc + loongarch_decode_imm ("10:16<<2", insn, 1);
262 }
263 else if ((insn & 0xfc000000) == 0x60000000) /* blt rj, rd, offs16 */
264 {
265 LONGEST rj = regcache_raw_get_signed (regcache,
266 loongarch_decode_imm ("5:5", insn, 0));
267 LONGEST rd = regcache_raw_get_signed (regcache,
268 loongarch_decode_imm ("0:5", insn, 0));
269 if (rj < rd)
270 next_pc = cur_pc + loongarch_decode_imm ("10:16<<2", insn, 1);
271 }
272 else if ((insn & 0xfc000000) == 0x64000000) /* bge rj, rd, offs16 */
273 {
274 LONGEST rj = regcache_raw_get_signed (regcache,
275 loongarch_decode_imm ("5:5", insn, 0));
276 LONGEST rd = regcache_raw_get_signed (regcache,
277 loongarch_decode_imm ("0:5", insn, 0));
278 if (rj >= rd)
279 next_pc = cur_pc + loongarch_decode_imm ("10:16<<2", insn, 1);
280 }
281 else if ((insn & 0xfc000000) == 0x68000000) /* bltu rj, rd, offs16 */
282 {
283 ULONGEST rj = regcache_raw_get_unsigned (regcache,
284 loongarch_decode_imm ("5:5", insn, 0));
285 ULONGEST rd = regcache_raw_get_unsigned (regcache,
286 loongarch_decode_imm ("0:5", insn, 0));
287 if (rj < rd)
288 next_pc = cur_pc + loongarch_decode_imm ("10:16<<2", insn, 1);
289 }
290 else if ((insn & 0xfc000000) == 0x6c000000) /* bgeu rj, rd, offs16 */
291 {
292 ULONGEST rj = regcache_raw_get_unsigned (regcache,
293 loongarch_decode_imm ("5:5", insn, 0));
294 ULONGEST rd = regcache_raw_get_unsigned (regcache,
295 loongarch_decode_imm ("0:5", insn, 0));
296 if (rj >= rd)
297 next_pc = cur_pc + loongarch_decode_imm ("10:16<<2", insn, 1);
298 }
299 else if ((insn & 0xfc000000) == 0x40000000) /* beqz rj, offs21 */
300 {
301 LONGEST rj = regcache_raw_get_signed (regcache,
302 loongarch_decode_imm ("5:5", insn, 0));
303 if (rj == 0)
304 next_pc = cur_pc + loongarch_decode_imm ("0:5|10:16<<2", insn, 1);
305 }
306 else if ((insn & 0xfc000000) == 0x44000000) /* bnez rj, offs21 */
307 {
308 LONGEST rj = regcache_raw_get_signed (regcache,
309 loongarch_decode_imm ("5:5", insn, 0));
310 if (rj != 0)
311 next_pc = cur_pc + loongarch_decode_imm ("0:5|10:16<<2", insn, 1);
312 }
313 else if ((insn & 0xffff8000) == 0x002b0000) /* syscall */
314 {
315 if (tdep->syscall_next_pc != nullptr)
316 next_pc = tdep->syscall_next_pc (get_current_frame ());
317 }
318
319 return next_pc;
320}
321
322/* We can't put a breakpoint in the middle of a ll/sc atomic sequence,
323 so look for the end of the sequence and put the breakpoint there. */
324
325static std::vector<CORE_ADDR>
327{
328 CORE_ADDR next_pc;
329 std::vector<CORE_ADDR> next_pcs;
330 insn_t insn = loongarch_fetch_instruction (cur_pc);
331 size_t insn_len = loongarch_insn_length (insn);
332 const int atomic_sequence_length = 16;
333 bool found_atomic_sequence_endpoint = false;
334
335 /* Look for a Load Linked instruction which begins the atomic sequence. */
336 if (!loongarch_insn_is_ll (insn))
337 return {};
338
339 /* Assume that no atomic sequence is longer than "atomic_sequence_length" instructions. */
340 for (int insn_count = 0; insn_count < atomic_sequence_length; ++insn_count)
341 {
342 cur_pc += insn_len;
343 insn = loongarch_fetch_instruction (cur_pc);
344
345 /* Look for a unconditional branch instruction, fallback to the standard code. */
347 {
348 return {};
349 }
350 /* Look for a conditional branch instruction, put a breakpoint in its destination address. */
351 else if (loongarch_insn_is_cond_branch (insn))
352 {
353 next_pc = loongarch_next_pc (regcache, cur_pc);
354 next_pcs.push_back (next_pc);
355 }
356 /* Look for a Store Conditional instruction which closes the atomic sequence. */
357 else if (loongarch_insn_is_sc (insn))
358 {
359 found_atomic_sequence_endpoint = true;
360 next_pc = cur_pc + insn_len;
361 next_pcs.push_back (next_pc);
362 break;
363 }
364 }
365
366 /* We didn't find a closing Store Conditional instruction, fallback to the standard code. */
367 if (!found_atomic_sequence_endpoint)
368 return {};
369
370 return next_pcs;
371}
372
373/* Implement the software_single_step gdbarch method */
374
375static std::vector<CORE_ADDR>
377{
378 CORE_ADDR cur_pc = regcache_read_pc (regcache);
379 std::vector<CORE_ADDR> next_pcs
381
382 if (!next_pcs.empty ())
383 return next_pcs;
384
385 CORE_ADDR next_pc = loongarch_next_pc (regcache, cur_pc);
386
387 return {next_pc};
388}
389
390/* Callback function for user_reg_add. */
391
392static struct value *
394{
395 return value_of_register ((long long) baton, frame);
396}
397
398/* Implement the frame_align gdbarch method. */
399
400static CORE_ADDR
401loongarch_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
402{
403 return align_down (addr, 16);
404}
405
406/* Generate, or return the cached frame cache for frame unwinder. */
407
408static struct trad_frame_cache *
410{
411 struct trad_frame_cache *cache;
412 CORE_ADDR pc;
413
414 if (*this_cache != nullptr)
415 return (struct trad_frame_cache *) *this_cache;
416
418 *this_cache = cache;
419
421
424
425 return cache;
426}
427
428/* Implement the this_id callback for frame unwinder. */
429
430static void
432 struct frame_id *this_id)
433{
434 struct trad_frame_cache *info;
435
436 info = loongarch_frame_cache (this_frame, prologue_cache);
438}
439
440/* Implement the prev_register callback for frame unwinder. */
441
442static struct value *
444 void **prologue_cache, int regnum)
445{
446 struct trad_frame_cache *info;
447
448 info = loongarch_frame_cache (this_frame, prologue_cache);
450}
451
453 "loongarch prologue",
454 /*.type =*/NORMAL_FRAME,
455 /*.stop_reason =*/default_frame_unwind_stop_reason,
456 /*.this_id =*/loongarch_frame_this_id,
457 /*.prev_register =*/loongarch_frame_prev_register,
458 /*.unwind_data =*/nullptr,
459 /*.sniffer =*/default_frame_sniffer,
460 /*.dealloc_cache =*/nullptr,
461 /*.prev_arch =*/nullptr,
462};
463
464/* Write the contents of buffer VAL into the general-purpose argument
465 register defined by GAR in REGCACHE. GAR indicates the available
466 general-purpose argument registers which should be a value in the
467 range 1 to 8 (LOONGARCH_ARG_REGNUM), which correspond to registers
468 a7 and a0 respectively, that is to say, regnum is a7 if GAR is 1,
469 regnum is a6 if GAR is 2, regnum is a5 if GAR is 3, regnum is a4
470 if GAR is 4, regnum is a3 if GAR is 5, regnum is a2 if GAR is 6,
471 regnum is a1 if GAR is 7, regnum is a0 if GAR is 8. */
472
473static void
474pass_in_gar (struct regcache *regcache, unsigned int gar, const gdb_byte *val)
475{
476 unsigned int regnum = LOONGARCH_ARG_REGNUM - gar + LOONGARCH_A0_REGNUM;
478}
479
480/* Write the contents of buffer VAL into the floating-point argument
481 register defined by FAR in REGCACHE. FAR indicates the available
482 floating-point argument registers which should be a value in the
483 range 1 to 8 (LOONGARCH_ARG_REGNUM), which correspond to registers
484 f7 and f0 respectively, that is to say, regnum is f7 if FAR is 1,
485 regnum is f6 if FAR is 2, regnum is f5 if FAR is 3, regnum is f4
486 if FAR is 4, regnum is f3 if FAR is 5, regnum is f2 if FAR is 6,
487 regnum is f1 if FAR is 7, regnum is f0 if FAR is 8. */
488
489static void
490pass_in_far (struct regcache *regcache, unsigned int far, const gdb_byte *val)
491{
494}
495
496/* Pass a value on the stack. */
497
498static void
499pass_on_stack (struct regcache *regcache, const gdb_byte *val,
500 size_t len, int align, gdb_byte **addr)
501{
502 align = align_up (align, 8);
503 if (align > 16)
504 align = 16;
505
506 CORE_ADDR align_addr = (CORE_ADDR) (*addr);
507 align_addr = align_up (align_addr, align);
508 *addr = (gdb_byte *) align_addr;
509 memcpy (*addr, val, len);
510 *addr += len;
511}
512
513/* Compute the numbers of struct member. */
514
515static void
517 unsigned int *fixed_point_members,
518 unsigned int *floating_point_members,
519 bool *first_member_is_fixed_point)
520{
521 for (int i = 0; i < type->num_fields (); i++)
522 {
523 /* Ignore any static fields. */
524 if (type->field (i).is_static ())
525 continue;
526
527 struct type *field_type = check_typedef (type->field (i).type ());
528
529 if (field_type->code () == TYPE_CODE_INT
530 || field_type->code () == TYPE_CODE_BOOL
531 || field_type->code () == TYPE_CODE_CHAR
532 || field_type->code () == TYPE_CODE_RANGE
533 || field_type->code () == TYPE_CODE_ENUM
534 || field_type->code () == TYPE_CODE_PTR)
535 {
536 (*fixed_point_members)++;
537
538 if (*floating_point_members == 0)
539 *first_member_is_fixed_point = true;
540 }
541 else if (field_type->code () == TYPE_CODE_FLT)
542 (*floating_point_members)++;
543 else if (field_type->code () == TYPE_CODE_STRUCT)
544 compute_struct_member (field_type,
545 fixed_point_members,
546 floating_point_members,
547 first_member_is_fixed_point);
548 else if (field_type->code () == TYPE_CODE_COMPLEX)
549 (*floating_point_members) += 2;
550 }
551}
552
553/* Implement the push_dummy_call gdbarch method. */
554
555static CORE_ADDR
557 struct value *function,
558 struct regcache *regcache,
559 CORE_ADDR bp_addr,
560 int nargs,
561 struct value **args,
562 CORE_ADDR sp,
563 function_call_return_method return_method,
564 CORE_ADDR struct_addr)
565{
566 int regsize = register_size (gdbarch, 0);
567 unsigned int gar = LOONGARCH_ARG_REGNUM;
568 unsigned int far = LOONGARCH_ARG_REGNUM;
569 unsigned int fixed_point_members;
570 unsigned int floating_point_members;
571 bool first_member_is_fixed_point;
572 gdb_byte buf[1024] = { 0 };
573 gdb_byte *addr = buf;
574
575 if (return_method != return_method_normal)
576 pass_in_gar (regcache, gar--, (gdb_byte *) &struct_addr);
577
578 for (int i = 0; i < nargs; i++)
579 {
580 struct value *arg = args[i];
581 const gdb_byte *val = arg->contents ().data ();
582 struct type *type = check_typedef (arg->type ());
583 size_t len = type->length ();
584 int align = type_align (type);
585 enum type_code code = type->code ();
586 struct type *func_type = check_typedef (function->type ());
587 bool varargs = (func_type->has_varargs () && i >= func_type->num_fields ());
588
589 switch (code)
590 {
591 case TYPE_CODE_INT:
592 case TYPE_CODE_BOOL:
593 case TYPE_CODE_CHAR:
594 case TYPE_CODE_RANGE:
595 case TYPE_CODE_ENUM:
596 case TYPE_CODE_PTR:
597 {
598 /* integer or pointer type is passed in GAR.
599 If no GAR is available, it's passed on the stack.
600 When passed in registers or on the stack,
601 the unsigned integer scalars are zero-extended to GRLEN bits,
602 and the signed integer scalars are sign-extended. */
603 if (type->is_unsigned ())
604 {
605 ULONGEST data = extract_unsigned_integer (val, len, BFD_ENDIAN_LITTLE);
606 if (gar > 0)
607 pass_in_gar (regcache, gar--, (gdb_byte *) &data);
608 else
609 pass_on_stack (regcache, (gdb_byte *) &data, len, align, &addr);
610 }
611 else
612 {
613 LONGEST data = extract_signed_integer (val, len, BFD_ENDIAN_LITTLE);
614 if (gar > 0)
615 pass_in_gar (regcache, gar--, (gdb_byte *) &data);
616 else
617 pass_on_stack (regcache, (gdb_byte *) &data, len, align, &addr);
618 }
619 }
620 break;
621 case TYPE_CODE_FLT:
622 if (len == 2 * regsize)
623 {
624 if (!varargs)
625 {
626 /* long double type is passed in a pair of GAR,
627 with the low-order GRLEN bits in the lower-numbered register
628 and the high-order GRLEN bits in the higher-numbered register.
629 If exactly one register is available,
630 the low-order GRLEN bits are passed in the register
631 and the high-order GRLEN bits are passed on the stack.
632 If no GAR is available, it's passed on the stack. */
633 if (gar >= 2)
634 {
635 pass_in_gar (regcache, gar--, val);
636 pass_in_gar (regcache, gar--, val + regsize);
637 }
638 else if (gar == 1)
639 {
640 pass_in_gar (regcache, gar--, val);
641 pass_on_stack (regcache, val + regsize, len - regsize, align, &addr);
642 }
643 else
644 {
645 pass_on_stack (regcache, val, len, align, &addr);
646 }
647 }
648 else
649 {
650 /* Variadic arguments are passed in GARs
651 in the same manner as named arguments.
652 And after a variadic argument has been passed on the stack,
653 all future arguments will also be passed on the stack,
654 i.e., the last argument register may be left unused
655 due to the aligned register pair rule.
656 long double data type is passed in an aligned GAR pair,
657 the first register in the pair is even-numbered. */
658 if (gar >= 2)
659 {
660 if (gar % 2 == 0)
661 {
662 pass_in_gar (regcache, gar--, val);
663 pass_in_gar (regcache, gar--, val + regsize);
664 }
665 else
666 {
667 gar--;
668 pass_in_gar (regcache, gar--, val);
669 pass_in_gar (regcache, gar--, val + regsize);
670 }
671 }
672 else if (gar == 1)
673 {
674 gar--;
675 pass_on_stack (regcache, val, len, align, &addr);
676 }
677 else
678 {
679 pass_on_stack (regcache, val, len, align, &addr);
680 }
681 }
682 }
683 else
684 {
685 /* The other floating-point type is passed in FAR.
686 If no FAR is available, it's passed in GAR.
687 If no GAR is available, it's passed on the stack. */
688 if (!varargs && far > 0)
689 pass_in_far (regcache, far--, val);
690 else if (gar > 0)
691 pass_in_gar (regcache, gar--, val);
692 else
693 pass_on_stack (regcache, val, len, align, &addr);
694 }
695 break;
696 case TYPE_CODE_STRUCT:
697 {
698 fixed_point_members = 0;
699 floating_point_members = 0;
700 first_member_is_fixed_point = false;
702 &fixed_point_members,
703 &floating_point_members,
704 &first_member_is_fixed_point);
705
706 if (len > 0 && len <= regsize)
707 {
708 /* The structure has only fixed-point members. */
709 if (fixed_point_members > 0 && floating_point_members == 0)
710 {
711 /* If there is an available GAR,
712 the structure is passed through the GAR by value passing;
713 If no GAR is available, it's passed on the stack. */
714 if (gar > 0)
715 pass_in_gar (regcache, gar--, val);
716 else
717 pass_on_stack (regcache, val, len, align, &addr);
718 }
719 /* The structure has only floating-point members. */
720 else if (fixed_point_members == 0 && floating_point_members > 0)
721 {
722 /* The structure has one floating-point member.
723 The argument is passed in a FAR.
724 If no FAR is available, the value is passed in a GAR.
725 if no GAR is available, the value is passed on the stack. */
726 if (floating_point_members == 1)
727 {
728 if (!varargs && far > 0)
729 pass_in_far (regcache, far--, val);
730 else if (gar > 0)
731 pass_in_gar (regcache, gar--, val);
732 else
733 pass_on_stack (regcache, val, len, align, &addr);
734 }
735 /* The structure has two floating-point members.
736 The argument is passed in a pair of available FAR,
737 with the low-order float member bits in the lower-numbered FAR
738 and the high-order float member bits in the higher-numbered FAR.
739 If the number of available FAR is less than 2, it's passed in a GAR,
740 and passed on the stack if no GAR is available. */
741 else if (floating_point_members == 2)
742 {
743 if (!varargs && far >= 2)
744 {
745 pass_in_far (regcache, far--, val);
746 pass_in_far (regcache, far--, val + align);
747 }
748 else if (gar > 0)
749 {
750 pass_in_gar (regcache, gar--, val);
751 }
752 else
753 {
754 pass_on_stack (regcache, val, len, align, &addr);
755 }
756 }
757 }
758 /* The structure has both fixed-point and floating-point members. */
759 else if (fixed_point_members > 0 && floating_point_members > 0)
760 {
761 /* The structure has one float member and multiple fixed-point members.
762 If there are available GAR, the structure is passed in a GAR,
763 and passed on the stack if no GAR is available. */
764 if (floating_point_members == 1 && fixed_point_members > 1)
765 {
766 if (gar > 0)
767 pass_in_gar (regcache, gar--, val);
768 else
769 pass_on_stack (regcache, val, len, align, &addr);
770 }
771 /* The structure has one float member and one fixed-point member.
772 If one FAR and one GAR are available,
773 the floating-point member of the structure is passed in the FAR,
774 and the fixed-point member of the structure is passed in the GAR.
775 If no floating-point register but one GAR is available, it's passed in GAR;
776 If no GAR is available, it's passed on the stack. */
777 else if (floating_point_members == 1 && fixed_point_members == 1)
778 {
779 if (!varargs && far > 0 && gar > 0)
780 {
781 if (first_member_is_fixed_point == false)
782 {
783 pass_in_far (regcache, far--, val);
784 pass_in_gar (regcache, gar--, val + align);
785 }
786 else
787 {
788 pass_in_gar (regcache, gar--, val);
789 pass_in_far (regcache, far--, val + align);
790 }
791 }
792 else
793 {
794 if (gar > 0)
795 pass_in_gar (regcache, gar--, val);
796 else
797 pass_on_stack (regcache, val, len, align, &addr);
798 }
799 }
800 }
801 }
802 else if (len > regsize && len <= 2 * regsize)
803 {
804 /* The structure has only fixed-point members. */
805 if (fixed_point_members > 0 && floating_point_members == 0)
806 {
807 /* The argument is passed in a pair of available GAR,
808 with the low-order bits in the lower-numbered GAR
809 and the high-order bits in the higher-numbered GAR.
810 If only one GAR is available,
811 the low-order bits are in the GAR
812 and the high-order bits are on the stack,
813 and passed on the stack if no GAR is available. */
814 if (gar >= 2)
815 {
816 pass_in_gar (regcache, gar--, val);
817 pass_in_gar (regcache, gar--, val + regsize);
818 }
819 else if (gar == 1)
820 {
821 pass_in_gar (regcache, gar--, val);
822 pass_on_stack (regcache, val + regsize, len - regsize, align, &addr);
823 }
824 else
825 {
826 pass_on_stack (regcache, val, len, align, &addr);
827 }
828 }
829 /* The structure has only floating-point members. */
830 else if (fixed_point_members == 0 && floating_point_members > 0)
831 {
832 /* The structure has one long double member
833 or one double member and two adjacent float members
834 or 3-4 float members.
835 The argument is passed in a pair of available GAR,
836 with the low-order bits in the lower-numbered GAR
837 and the high-order bits in the higher-numbered GAR.
838 If only one GAR is available,
839 the low-order bits are in the GAR
840 and the high-order bits are on the stack,
841 and passed on the stack if no GAR is available. */
842 if ((len == 16 && floating_point_members == 1)
843 || (len == 16 && floating_point_members == 3)
844 || (len == 12 && floating_point_members == 3)
845 || (len == 16 && floating_point_members == 4))
846 {
847 if (gar >= 2)
848 {
849 pass_in_gar (regcache, gar--, val);
850 pass_in_gar (regcache, gar--, val + regsize);
851 }
852 else if (gar == 1)
853 {
854 if (!varargs)
855 {
856 pass_in_gar (regcache, gar--, val);
857 pass_on_stack (regcache, val + regsize, len - regsize, align, &addr);
858 }
859 else
860 {
861 gar--;
862 pass_on_stack (regcache, val, len, align, &addr);
863 }
864 }
865 else
866 {
867 pass_on_stack (regcache, val, len, align, &addr);
868 }
869 }
870 /* The structure has two double members
871 or one double member and one float member.
872 The argument is passed in a pair of available FAR,
873 with the low-order bits in the lower-numbered FAR
874 and the high-order bits in the higher-numbered FAR.
875 If no a pair of available FAR,
876 it's passed in a pair of available GAR,
877 with the low-order bits in the lower-numbered GAR
878 and the high-order bits in the higher-numbered GAR.
879 If only one GAR is available,
880 the low-order bits are in the GAR
881 and the high-order bits are on stack,
882 and passed on the stack if no GAR is available. */
883 else if ((len == 16 && floating_point_members == 2)
884 || (len == 12 && floating_point_members == 2))
885 {
886 if (!varargs && far >= 2)
887 {
888 pass_in_far (regcache, far--, val);
889 pass_in_far (regcache, far--, val + regsize);
890 }
891 else if (gar >= 2)
892 {
893 pass_in_gar (regcache, gar--, val);
894 pass_in_gar (regcache, gar--, val + regsize);
895 }
896 else if (gar == 1)
897 {
898 pass_in_gar (regcache, gar--, val);
899 pass_on_stack (regcache, val + regsize, len - regsize, align, &addr);
900 }
901 else
902 {
903 pass_on_stack (regcache, val, len, align, &addr);
904 }
905 }
906 }
907 /* The structure has both fixed-point and floating-point members. */
908 else if (fixed_point_members > 0 && floating_point_members > 0)
909 {
910 /* The structure has one floating-point member and one fixed-point member. */
911 if (floating_point_members == 1 && fixed_point_members == 1)
912 {
913 /* If one FAR and one GAR are available,
914 the floating-point member of the structure is passed in the FAR,
915 and the fixed-point member of the structure is passed in the GAR;
916 If no floating-point registers but two GARs are available,
917 it's passed in the two GARs;
918 If only one GAR is available,
919 the low-order bits are in the GAR
920 and the high-order bits are on the stack;
921 And it's passed on the stack if no GAR is available. */
922 if (!varargs && far > 0 && gar > 0)
923 {
924 if (first_member_is_fixed_point == false)
925 {
926 pass_in_far (regcache, far--, val);
927 pass_in_gar (regcache, gar--, val + regsize);
928 }
929 else
930 {
931 pass_in_gar (regcache, gar--, val);
932 pass_in_far (regcache, far--, val + regsize);
933 }
934 }
935 else if ((!varargs && far == 0 && gar >= 2) || (varargs && gar >= 2))
936 {
937 pass_in_gar (regcache, gar--, val);
938 pass_in_gar (regcache, gar--, val + regsize);
939 }
940 else if ((!varargs && far == 0 && gar == 1) || (varargs && gar == 1))
941 {
942 pass_in_gar (regcache, gar--, val);
943 pass_on_stack (regcache, val + regsize, len - regsize, align, &addr);
944 }
945 else if ((!varargs && far == 0 && gar == 0) || (varargs && gar == 0))
946 {
947 pass_on_stack (regcache, val, len, align, &addr);
948 }
949 }
950 else
951 {
952 /* The argument is passed in a pair of available GAR,
953 with the low-order bits in the lower-numbered GAR
954 and the high-order bits in the higher-numbered GAR.
955 If only one GAR is available,
956 the low-order bits are in the GAR
957 and the high-order bits are on the stack,
958 and passed on the stack if no GAR is available. */
959 if (gar >= 2)
960 {
961 pass_in_gar (regcache, gar--, val);
962 pass_in_gar (regcache, gar--, val + regsize);
963 }
964 else if (gar == 1)
965 {
966 pass_in_gar (regcache, gar--, val);
967 pass_on_stack (regcache, val + regsize, len - regsize, align, &addr);
968 }
969 else
970 {
971 pass_on_stack (regcache, val, len, align, &addr);
972 }
973 }
974 }
975 }
976 else if (len > 2 * regsize)
977 {
978 /* It's passed by reference and are replaced in the argument list with the address.
979 If there is an available GAR, the reference is passed in the GAR,
980 and passed on the stack if no GAR is available. */
981 sp = align_down (sp - len, 16);
982 write_memory (sp, val, len);
983
984 if (gar > 0)
985 pass_in_gar (regcache, gar--, (const gdb_byte *) &sp);
986 else
987 pass_on_stack (regcache, (const gdb_byte*) &sp, len, regsize, &addr);
988 }
989 }
990 break;
991 case TYPE_CODE_UNION:
992 /* Union is passed in GAR or stack. */
993 if (len > 0 && len <= regsize)
994 {
995 /* The argument is passed in a GAR,
996 or on the stack by value if no GAR is available. */
997 if (gar > 0)
998 pass_in_gar (regcache, gar--, val);
999 else
1000 pass_on_stack (regcache, val, len, align, &addr);
1001 }
1002 else if (len > regsize && len <= 2 * regsize)
1003 {
1004 /* The argument is passed in a pair of available GAR,
1005 with the low-order bits in the lower-numbered GAR
1006 and the high-order bits in the higher-numbered GAR.
1007 If only one GAR is available,
1008 the low-order bits are in the GAR
1009 and the high-order bits are on the stack.
1010 The arguments are passed on the stack when no GAR is available. */
1011 if (gar >= 2)
1012 {
1013 pass_in_gar (regcache, gar--, val);
1014 pass_in_gar (regcache, gar--, val + regsize);
1015 }
1016 else if (gar == 1)
1017 {
1018 pass_in_gar (regcache, gar--, val);
1019 pass_on_stack (regcache, val + regsize, len - regsize, align, &addr);
1020 }
1021 else
1022 {
1023 pass_on_stack (regcache, val, len, align, &addr);
1024 }
1025 }
1026 else if (len > 2 * regsize)
1027 {
1028 /* It's passed by reference and are replaced in the argument list with the address.
1029 If there is an available GAR, the reference is passed in the GAR,
1030 and passed on the stack if no GAR is available. */
1031 sp = align_down (sp - len, 16);
1032 write_memory (sp, val, len);
1033
1034 if (gar > 0)
1035 pass_in_gar (regcache, gar--, (const gdb_byte *) &sp);
1036 else
1037 pass_on_stack (regcache, (const gdb_byte*) &sp, len, regsize, &addr);
1038 }
1039 break;
1040 case TYPE_CODE_COMPLEX:
1041 {
1043 size_t target_len = target_type->length ();
1044
1045 if (target_len < regsize)
1046 {
1047 /* The complex with two float members
1048 is passed in a pair of available FAR,
1049 with the low-order float member bits in the lower-numbered FAR
1050 and the high-order float member bits in the higher-numbered FAR.
1051 If the number of available FAR is less than 2, it's passed in a GAR,
1052 and passed on the stack if no GAR is available. */
1053 if (!varargs && far >= 2)
1054 {
1055 pass_in_far (regcache, far--, val);
1056 pass_in_far (regcache, far--, val + align);
1057 }
1058 else if (gar > 0)
1059 {
1060 pass_in_gar (regcache, gar--, val);
1061 }
1062 else
1063 {
1064 pass_on_stack (regcache, val, len, align, &addr);
1065 }
1066 }
1067 else if (target_len == regsize)
1068 {
1069 /* The complex with two double members
1070 is passed in a pair of available FAR,
1071 with the low-order bits in the lower-numbered FAR
1072 and the high-order bits in the higher-numbered FAR.
1073 If no a pair of available FAR,
1074 it's passed in a pair of available GAR,
1075 with the low-order bits in the lower-numbered GAR
1076 and the high-order bits in the higher-numbered GAR.
1077 If only one GAR is available,
1078 the low-order bits are in the GAR
1079 and the high-order bits are on stack,
1080 and passed on the stack if no GAR is available. */
1081 {
1082 if (!varargs && far >= 2)
1083 {
1084 pass_in_far (regcache, far--, val);
1085 pass_in_far (regcache, far--, val + align);
1086 }
1087 else if (gar >= 2)
1088 {
1089 pass_in_gar (regcache, gar--, val);
1090 pass_in_gar (regcache, gar--, val + align);
1091 }
1092 else if (gar == 1)
1093 {
1094 pass_in_gar (regcache, gar--, val);
1095 pass_on_stack (regcache, val + align, len - align, align, &addr);
1096 }
1097 else
1098 {
1099 pass_on_stack (regcache, val, len, align, &addr);
1100 }
1101 }
1102 }
1103 else if (target_len == 2 * regsize)
1104 {
1105 /* The complex with two long double members
1106 is passed by reference and are replaced in the argument list with the address.
1107 If there is an available GAR, the reference is passed in the GAR,
1108 and passed on the stack if no GAR is available. */
1109 sp = align_down (sp - len, 16);
1110 write_memory (sp, val, len);
1111
1112 if (gar > 0)
1113 pass_in_gar (regcache, gar--, (const gdb_byte *) &sp);
1114 else
1115 pass_on_stack (regcache, (const gdb_byte*) &sp, regsize, regsize, &addr);
1116 }
1117 }
1118 break;
1119 default:
1120 break;
1121 }
1122 }
1123
1124 if (addr > buf)
1125 {
1126 sp -= addr - buf;
1127 sp = align_down (sp, 16);
1128 write_memory (sp, buf, addr - buf);
1129 }
1130
1133
1134 return sp;
1135}
1136
1137/* Partial transfer of a cooked register. */
1138
1139static void
1141 int regnum, int len, gdb_byte *readbuf,
1142 const gdb_byte *writebuf, size_t offset)
1143{
1144 if (readbuf)
1145 regcache->cooked_read_part (regnum, 0, len, readbuf + offset);
1146 if (writebuf)
1147 regcache->cooked_write_part (regnum, 0, len, writebuf + offset);
1148}
1149
1150/* Implement the return_value gdbarch method. */
1151
1152static enum return_value_convention
1153loongarch_return_value (struct gdbarch *gdbarch, struct value *function,
1154 struct type *type, struct regcache *regcache,
1155 gdb_byte *readbuf, const gdb_byte *writebuf)
1156{
1157 int regsize = register_size (gdbarch, 0);
1158 enum type_code code = type->code ();
1159 size_t len = type->length ();
1160 unsigned int fixed_point_members;
1161 unsigned int floating_point_members;
1162 bool first_member_is_fixed_point;
1163 int a0 = LOONGARCH_A0_REGNUM;
1164 int a1 = LOONGARCH_A0_REGNUM + 1;
1166 int f1 = LOONGARCH_FIRST_FP_REGNUM + 1;
1167
1168 if (len > 2 * regsize)
1170
1171 switch (code)
1172 {
1173 case TYPE_CODE_INT:
1174 case TYPE_CODE_BOOL:
1175 case TYPE_CODE_CHAR:
1176 case TYPE_CODE_RANGE:
1177 case TYPE_CODE_ENUM:
1178 case TYPE_CODE_PTR:
1179 {
1180 /* integer or pointer type.
1181 The return value is passed in a0,
1182 the unsigned integer scalars are zero-extended to GRLEN bits,
1183 and the signed integer scalars are sign-extended. */
1184 if (writebuf)
1185 {
1186 gdb_byte buf[regsize];
1187 if (type->is_unsigned ())
1188 {
1189 ULONGEST data = extract_unsigned_integer (writebuf, len, BFD_ENDIAN_LITTLE);
1190 store_unsigned_integer (buf, regsize, BFD_ENDIAN_LITTLE, data);
1191 }
1192 else
1193 {
1194 LONGEST data = extract_signed_integer (writebuf, len, BFD_ENDIAN_LITTLE);
1195 store_signed_integer (buf, regsize, BFD_ENDIAN_LITTLE, data);
1196 }
1197 loongarch_xfer_reg (regcache, a0, regsize, nullptr, buf, 0);
1198 }
1199 else
1200 loongarch_xfer_reg (regcache, a0, len, readbuf, nullptr, 0);
1201 }
1202 break;
1203 case TYPE_CODE_FLT:
1204 /* long double type.
1205 The return value is passed in a0 and a1. */
1206 if (len == 2 * regsize)
1207 {
1208 loongarch_xfer_reg (regcache, a0, regsize, readbuf, writebuf, 0);
1209 loongarch_xfer_reg (regcache, a1, len - regsize, readbuf, writebuf, regsize);
1210 }
1211 /* float or double type.
1212 The return value is passed in f0. */
1213 else
1214 {
1215 loongarch_xfer_reg (regcache, f0, len, readbuf, writebuf, 0);
1216 }
1217 break;
1218 case TYPE_CODE_STRUCT:
1219 {
1220 fixed_point_members = 0;
1221 floating_point_members = 0;
1222 first_member_is_fixed_point = false;
1224 &fixed_point_members,
1225 &floating_point_members,
1226 &first_member_is_fixed_point);
1227
1228 if (len > 0 && len <= regsize)
1229 {
1230 /* The structure has only fixed-point members. */
1231 if (fixed_point_members > 0 && floating_point_members == 0)
1232 {
1233 /* The return value is passed in a0. */
1234 loongarch_xfer_reg (regcache, a0, len, readbuf, writebuf, 0);
1235 }
1236 /* The structure has only floating-point members. */
1237 else if (fixed_point_members == 0 && floating_point_members > 0)
1238 {
1239 /* The structure has one floating-point member.
1240 The return value is passed in f0. */
1241 if (floating_point_members == 1)
1242 {
1243 loongarch_xfer_reg (regcache, f0, len, readbuf, writebuf, 0);
1244 }
1245 /* The structure has two floating-point members.
1246 The return value is passed in f0 and f1. */
1247 else if (floating_point_members == 2)
1248 {
1249 loongarch_xfer_reg (regcache, f0, len / 2, readbuf, writebuf, 0);
1250 loongarch_xfer_reg (regcache, f1, len / 2, readbuf, writebuf, len / 2);
1251 }
1252 }
1253 /* The structure has both fixed-point and floating-point members. */
1254 else if (fixed_point_members > 0 && floating_point_members > 0)
1255 {
1256 /* The structure has one float member and multiple fixed-point members.
1257 The return value is passed in a0. */
1258 if (floating_point_members == 1 && fixed_point_members > 1)
1259 {
1260 loongarch_xfer_reg (regcache, a0, len, readbuf, writebuf, 0);
1261 }
1262 /* The structure has one float member and one fixed-point member. */
1263 else if (floating_point_members == 1 && fixed_point_members == 1)
1264 {
1265 /* The return value is passed in f0 and a0 if the first member is floating-point. */
1266 if (first_member_is_fixed_point == false)
1267 {
1268 loongarch_xfer_reg (regcache, f0, regsize / 2, readbuf, writebuf, 0);
1269 loongarch_xfer_reg (regcache, a0, regsize / 2, readbuf, writebuf, regsize / 2);
1270 }
1271 /* The return value is passed in a0 and f0 if the first member is fixed-point. */
1272 else
1273 {
1274 loongarch_xfer_reg (regcache, a0, regsize / 2, readbuf, writebuf, 0);
1275 loongarch_xfer_reg (regcache, f0, regsize / 2, readbuf, writebuf, regsize / 2);
1276 }
1277 }
1278 }
1279 }
1280 else if (len > regsize && len <= 2 * regsize)
1281 {
1282 /* The structure has only fixed-point members. */
1283 if (fixed_point_members > 0 && floating_point_members == 0)
1284 {
1285 /* The return value is passed in a0 and a1. */
1286 loongarch_xfer_reg (regcache, a0, regsize, readbuf, writebuf, 0);
1287 loongarch_xfer_reg (regcache, a1, len - regsize, readbuf, writebuf, regsize);
1288 }
1289 /* The structure has only floating-point members. */
1290 else if (fixed_point_members == 0 && floating_point_members > 0)
1291 {
1292 /* The structure has one long double member
1293 or one double member and two adjacent float members
1294 or 3-4 float members.
1295 The return value is passed in a0 and a1. */
1296 if ((len == 16 && floating_point_members == 1)
1297 || (len == 16 && floating_point_members == 3)
1298 || (len == 12 && floating_point_members == 3)
1299 || (len == 16 && floating_point_members == 4))
1300 {
1301 loongarch_xfer_reg (regcache, a0, regsize, readbuf, writebuf, 0);
1302 loongarch_xfer_reg (regcache, a1, len - regsize, readbuf, writebuf, regsize);
1303 }
1304 /* The structure has two double members
1305 or one double member and one float member.
1306 The return value is passed in f0 and f1. */
1307 else if ((len == 16 && floating_point_members == 2)
1308 || (len == 12 && floating_point_members == 2))
1309 {
1310 loongarch_xfer_reg (regcache, f0, regsize, readbuf, writebuf, 0);
1311 loongarch_xfer_reg (regcache, f1, len - regsize, readbuf, writebuf, regsize);
1312 }
1313 }
1314 /* The structure has both fixed-point and floating-point members. */
1315 else if (fixed_point_members > 0 && floating_point_members > 0)
1316 {
1317 /* The structure has one floating-point member and one fixed-point member. */
1318 if (floating_point_members == 1 && fixed_point_members == 1)
1319 {
1320 /* The return value is passed in f0 and a0 if the first member is floating-point. */
1321 if (first_member_is_fixed_point == false)
1322 {
1323 loongarch_xfer_reg (regcache, f0, regsize, readbuf, writebuf, 0);
1324 loongarch_xfer_reg (regcache, a0, len - regsize, readbuf, writebuf, regsize);
1325 }
1326 /* The return value is passed in a0 and f0 if the first member is fixed-point. */
1327 else
1328 {
1329 loongarch_xfer_reg (regcache, a0, regsize, readbuf, writebuf, 0);
1330 loongarch_xfer_reg (regcache, f0, len - regsize, readbuf, writebuf, regsize);
1331 }
1332 }
1333 else
1334 {
1335 /* The return value is passed in a0 and a1. */
1336 loongarch_xfer_reg (regcache, a0, regsize, readbuf, writebuf, 0);
1337 loongarch_xfer_reg (regcache, a1, len - regsize, readbuf, writebuf, regsize);
1338 }
1339 }
1340 }
1341 }
1342 break;
1343 case TYPE_CODE_UNION:
1344 if (len > 0 && len <= regsize)
1345 {
1346 /* The return value is passed in a0. */
1347 loongarch_xfer_reg (regcache, a0, len, readbuf, writebuf, 0);
1348 }
1349 else if (len > regsize && len <= 2 * regsize)
1350 {
1351 /* The return value is passed in a0 and a1. */
1352 loongarch_xfer_reg (regcache, a0, regsize, readbuf, writebuf, 0);
1353 loongarch_xfer_reg (regcache, a1, len - regsize, readbuf, writebuf, regsize);
1354 }
1355 break;
1356 case TYPE_CODE_COMPLEX:
1357 {
1358 /* The return value is passed in f0 and f1. */
1359 loongarch_xfer_reg (regcache, f0, len / 2, readbuf, writebuf, 0);
1360 loongarch_xfer_reg (regcache, f1, len / 2, readbuf, writebuf, len / 2);
1361 }
1362 break;
1363 default:
1364 break;
1365 }
1366
1368}
1369
1370/* Implement the dwarf2_reg_to_regnum gdbarch method. */
1371
1372static int
1374{
1375 if (regnum >= 0 && regnum < 32)
1376 return regnum;
1377 else if (regnum >= 32 && regnum < 66)
1378 return LOONGARCH_FIRST_FP_REGNUM + regnum - 32;
1379 else
1380 return -1;
1381}
1382
1383static constexpr gdb_byte loongarch_default_breakpoint[] = {0x05, 0x00, 0x2a, 0x00};
1384typedef BP_MANIPULATION (loongarch_default_breakpoint) loongarch_breakpoint;
1385
1386/* Extract a set of required target features out of ABFD. If ABFD is nullptr
1387 then a LOONGARCH_GDBARCH_FEATURES is returned in its default state. */
1388
1389static struct loongarch_gdbarch_features
1390loongarch_features_from_bfd (const bfd *abfd)
1391{
1392 struct loongarch_gdbarch_features features;
1393
1394 /* Now try to improve on the defaults by looking at the binary we are
1395 going to execute. We assume the user knows what they are doing and
1396 that the target will match the binary. Remember, this code path is
1397 only used at all if the target hasn't given us a description, so this
1398 is really a last ditched effort to do something sane before giving
1399 up. */
1400 if (abfd != nullptr && bfd_get_flavour (abfd) == bfd_target_elf_flavour)
1401 {
1402 unsigned char eclass = elf_elfheader (abfd)->e_ident[EI_CLASS];
1403 int e_flags = elf_elfheader (abfd)->e_flags;
1404
1405 if (eclass == ELFCLASS32)
1406 features.xlen = 4;
1407 else if (eclass == ELFCLASS64)
1408 features.xlen = 8;
1409 else
1410 internal_error (_("unknown ELF header class %d"), eclass);
1411
1412 if (EF_LOONGARCH_IS_SINGLE_FLOAT (e_flags))
1413 features.fputype = SINGLE_FLOAT;
1414 else if (EF_LOONGARCH_IS_DOUBLE_FLOAT (e_flags))
1415 features.fputype = DOUBLE_FLOAT;
1416 }
1417
1418 return features;
1419}
1420
1421/* Find a suitable default target description. Use the contents of INFO,
1422 specifically the bfd object being executed, to guide the selection of a
1423 suitable default target description. */
1424
1425static const struct target_desc *
1427{
1428 /* Extract desired feature set from INFO. */
1429 struct loongarch_gdbarch_features features
1430 = loongarch_features_from_bfd (info.abfd);
1431
1432 /* If the XLEN field is still 0 then we got nothing useful from INFO.BFD,
1433 maybe there was no bfd object. In this case we fall back to a minimal
1434 useful target, the x-register size is selected based on the architecture
1435 from INFO. */
1436 if (features.xlen == 0)
1437 features.xlen = info.bfd_arch_info->bits_per_address == 32 ? 4 : 8;
1438
1439 /* If the FPUTYPE field is still 0 then we got nothing useful from INFO.BFD,
1440 maybe there was no bfd object. In this case we fall back to a usual useful
1441 target with double float. */
1442 if (features.fputype == 0)
1443 features.fputype = DOUBLE_FLOAT;
1444
1445 /* Now build a target description based on the feature set. */
1446 return loongarch_lookup_target_description (features);
1447}
1448
1449static int
1451 const struct reggroup *group)
1452{
1453 if (gdbarch_register_name (gdbarch, regnum) == NULL
1454 || *gdbarch_register_name (gdbarch, regnum) == '\0')
1455 return 0;
1456
1457 int raw_p = regnum < gdbarch_num_regs (gdbarch);
1458
1459 if (group == save_reggroup || group == restore_reggroup)
1460 return raw_p;
1461
1462 if (group == all_reggroup)
1463 return 1;
1464
1465 if (0 <= regnum && regnum <= LOONGARCH_BADV_REGNUM)
1466 return group == general_reggroup;
1467
1468 /* Only ORIG_A0, PC, BADV in general_reggroup */
1469 if (group == general_reggroup)
1470 return 0;
1471
1473 return group == float_reggroup;
1474
1475 /* Only $fx / $fccx / $fcsr in float_reggroup */
1476 if (group == float_reggroup)
1477 return 0;
1478
1479 int ret = tdesc_register_in_reggroup_p (gdbarch, regnum, group);
1480 if (ret != -1)
1481 return ret;
1482
1484}
1485
1486/* Initialize the current architecture based on INFO */
1487
1488static struct gdbarch *
1490{
1491 size_t regnum = 0;
1492 struct loongarch_gdbarch_features features;
1494 const struct target_desc *tdesc = info.target_desc;
1495
1496 /* Ensure we always have a target description. */
1497 if (!tdesc_has_registers (tdesc))
1499
1500 const struct tdesc_feature *feature_cpu
1501 = tdesc_find_feature (tdesc, "org.gnu.gdb.loongarch.base");
1502 if (feature_cpu == nullptr)
1503 return nullptr;
1504
1505
1506 /* Validate the description provides the mandatory base registers
1507 and allocate their numbers. */
1508 bool valid_p = true;
1509 for (int i = 0; i < 32; i++)
1510 valid_p &= tdesc_numbered_register (feature_cpu, tdesc_data.get (), regnum++,
1511 loongarch_r_normal_name[i] + 1);
1512 valid_p &= tdesc_numbered_register (feature_cpu, tdesc_data.get (), regnum++, "orig_a0");
1513 valid_p &= tdesc_numbered_register (feature_cpu, tdesc_data.get (), regnum++, "pc");
1514 valid_p &= tdesc_numbered_register (feature_cpu, tdesc_data.get (), regnum++, "badv");
1515 if (!valid_p)
1516 return nullptr;
1517
1518 const struct tdesc_feature *feature_fpu
1519 = tdesc_find_feature (tdesc, "org.gnu.gdb.loongarch.fpu");
1520 if (feature_fpu == nullptr)
1521 return nullptr;
1522
1523 /* Validate the description provides the fpu registers and
1524 allocate their numbers. */
1526 for (int i = 0; i < LOONGARCH_LINUX_NUM_FPREGSET; i++)
1527 valid_p &= tdesc_numbered_register (feature_fpu, tdesc_data.get (), regnum++,
1528 loongarch_f_normal_name[i] + 1);
1529 for (int i = 0; i < LOONGARCH_LINUX_NUM_FCC; i++)
1530 valid_p &= tdesc_numbered_register (feature_fpu, tdesc_data.get (), regnum++,
1531 loongarch_c_normal_name[i] + 1);
1532 valid_p &= tdesc_numbered_register (feature_fpu, tdesc_data.get (), regnum++, "fcsr");
1533 if (!valid_p)
1534 return nullptr;
1535
1536 /* LoongArch code is always little-endian. */
1537 info.byte_order_for_code = BFD_ENDIAN_LITTLE;
1538
1539 /* Have a look at what the supplied (if any) bfd object requires of the
1540 target, then check that this matches with what the target is
1541 providing. */
1542 struct loongarch_gdbarch_features abi_features
1543 = loongarch_features_from_bfd (info.abfd);
1544
1545 /* If the ABI_FEATURES xlen or fputype is 0 then this indicates we got
1546 no useful abi features from the INFO object. In this case we just
1547 treat the hardware features as defining the abi. */
1548 if (abi_features.xlen == 0)
1549 {
1550 int xlen_bitsize = tdesc_register_bitsize (feature_cpu, "pc");
1551 features.xlen = (xlen_bitsize / 8);
1552 features.fputype = abi_features.fputype;
1553 abi_features = features;
1554 }
1555 if (abi_features.fputype == 0)
1556 {
1557 features.xlen = abi_features.xlen;
1558 features.fputype = DOUBLE_FLOAT;
1559 abi_features = features;
1560 }
1561
1562 /* Find a candidate among the list of pre-declared architectures. */
1564 arches != nullptr;
1565 arches = gdbarch_list_lookup_by_info (arches->next, &info))
1566 {
1567 /* Check that the feature set of the ARCHES matches the feature set
1568 we are looking for. If it doesn't then we can't reuse this
1569 gdbarch. */
1570 loongarch_gdbarch_tdep *candidate_tdep
1571 = gdbarch_tdep<loongarch_gdbarch_tdep> (arches->gdbarch);
1572
1573 if (candidate_tdep->abi_features != abi_features)
1574 continue;
1575
1576 break;
1577 }
1578
1579 if (arches != nullptr)
1580 return arches->gdbarch;
1581
1582 /* None found, so create a new architecture from the information provided. */
1585 loongarch_gdbarch_tdep *tdep = gdbarch_tdep<loongarch_gdbarch_tdep> (gdbarch);
1586
1587 tdep->abi_features = abi_features;
1588
1589 /* Target data types. */
1592 set_gdbarch_long_bit (gdbarch, info.bfd_arch_info->bits_per_address);
1598 set_gdbarch_ptr_bit (gdbarch, info.bfd_arch_info->bits_per_address);
1600
1601 info.target_desc = tdesc;
1602 info.tdesc_data = tdesc_data.get ();
1603
1604 for (int i = 0; i < ARRAY_SIZE (loongarch_r_lp64_name); ++i)
1605 if (loongarch_r_lp64_name[i][0] != '\0')
1606 user_reg_add (gdbarch, loongarch_r_lp64_name[i] + 1,
1607 value_of_loongarch_user_reg, (void *) (size_t) i);
1608
1609 for (int i = 0; i < ARRAY_SIZE (loongarch_f_lp64_name); ++i)
1610 {
1611 if (loongarch_f_lp64_name[i][0] != '\0')
1612 user_reg_add (gdbarch, loongarch_f_lp64_name[i] + 1,
1614 (void *) (size_t) (LOONGARCH_FIRST_FP_REGNUM + i));
1615 }
1616
1617 /* Information about registers. */
1621
1622 /* Finalise the target description registers. */
1623 tdesc_use_registers (gdbarch, tdesc, std::move (tdesc_data));
1624
1625 /* Functions handling dummy frames. */
1627
1628 /* Return value info */
1630
1631 /* Advance PC across function entry code. */
1633
1634 /* Stack grows downward. */
1636
1637 /* Frame info. */
1639
1640 /* Breakpoint manipulation. */
1642 set_gdbarch_breakpoint_kind_from_pc (gdbarch, loongarch_breakpoint::kind_from_pc);
1643 set_gdbarch_sw_breakpoint_from_kind (gdbarch, loongarch_breakpoint::bp_from_kind);
1644
1645 /* Frame unwinders. Use DWARF debug info if available, otherwise use our own unwinder. */
1649
1650 /* Hook in OS ABI-specific overrides, if they have been registered. */
1653
1654 return gdbarch;
1655}
1656
1658void
1660{
1661 gdbarch_register (bfd_arch_loongarch, loongarch_gdbarch_init, nullptr);
1662}
int regnum
int code
Definition ada-lex.l:670
void gdbarch_register(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init, gdbarch_dump_tdep_ftype *dump_tdep, gdbarch_supports_arch_info_ftype *supports_arch_info)
static std::vector< const char * > arches
Definition arch-utils.c:685
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
Definition arch-utils.c:177
struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
#define BP_MANIPULATION(BREAK_INSN)
Definition arch-utils.h:70
bool find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr, const struct block **block)
Definition blockframe.c:373
enum register_status cooked_read_part(int regnum, int offset, int len, gdb_byte *buf)
Definition regcache.c:1042
gdbarch * arch() const
Definition regcache.c:231
void cooked_write(int regnum, const gdb_byte *buf)
Definition regcache.c:870
void cooked_write_part(int regnum, int offset, int len, const gdb_byte *buf)
Definition regcache.c:1052
void * get(unsigned key)
Definition registry.h:211
void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
Definition corefile.c:347
void memory_error(enum target_xfer_status err, CORE_ADDR memaddr)
Definition corefile.c:186
static void store_signed_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, LONGEST val)
Definition defs.h:508
static void store_unsigned_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, ULONGEST val)
Definition defs.h:515
static LONGEST extract_signed_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
Definition defs.h:465
static ULONGEST extract_unsigned_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
Definition defs.h:480
return_value_convention
Definition defs.h:257
@ RETURN_VALUE_REGISTER_CONVENTION
Definition defs.h:260
@ RETURN_VALUE_STRUCT_CONVENTION
Definition defs.h:267
void dwarf2_append_unwinders(struct gdbarch *gdbarch)
Definition frame.c:1369
struct value * value_of_register(int regnum, frame_info_ptr frame)
Definition findvar.c:253
int default_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
enum unwind_stop_reason default_frame_unwind_stop_reason(frame_info_ptr this_frame, void **this_cache)
void frame_unwind_append_unwinder(struct gdbarch *gdbarch, const struct frame_unwind *unwinder)
struct frame_id frame_id_build_unavailable_stack(CORE_ADDR code_addr)
Definition frame.c:709
frame_info_ptr get_current_frame(void)
Definition frame.c:1670
CORE_ADDR get_frame_address_in_block(frame_info_ptr this_frame)
Definition frame.c:2742
@ NORMAL_FRAME
Definition frame.h:187
void set_gdbarch_long_long_bit(struct gdbarch *gdbarch, int long_long_bit)
Definition gdbarch.c:1493
void set_gdbarch_char_signed(struct gdbarch *gdbarch, int char_signed)
Definition gdbarch.c:1786
void set_gdbarch_breakpoint_kind_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_kind_from_pc_ftype *breakpoint_kind_from_pc)
const char * gdbarch_register_name(struct gdbarch *gdbarch, int regnr)
Definition gdbarch.c:2173
void set_gdbarch_software_single_step(struct gdbarch *gdbarch, gdbarch_software_single_step_ftype *software_single_step)
void set_gdbarch_frame_align(struct gdbarch *gdbarch, gdbarch_frame_align_ftype *frame_align)
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype *skip_prologue)
void set_gdbarch_int_bit(struct gdbarch *gdbarch, int int_bit)
Definition gdbarch.c:1459
void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype *return_value)
int gdbarch_num_regs(struct gdbarch *gdbarch)
Definition gdbarch.c:1930
void set_gdbarch_double_bit(struct gdbarch *gdbarch, int double_bit)
Definition gdbarch.c:1612
void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype *inner_than)
void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
Definition gdbarch.c:2047
void set_gdbarch_register_reggroup_p(struct gdbarch *gdbarch, gdbarch_register_reggroup_p_ftype *register_reggroup_p)
void set_gdbarch_long_double_format(struct gdbarch *gdbarch, const struct floatformat **long_double_format)
Definition gdbarch.c:1663
void set_gdbarch_pc_regnum(struct gdbarch *gdbarch, int pc_regnum)
Definition gdbarch.c:2064
void set_gdbarch_float_bit(struct gdbarch *gdbarch, int float_bit)
Definition gdbarch.c:1578
void set_gdbarch_short_bit(struct gdbarch *gdbarch, int short_bit)
Definition gdbarch.c:1442
void set_gdbarch_dwarf2_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_dwarf2_reg_to_regnum_ftype *dwarf2_reg_to_regnum)
void set_gdbarch_long_bit(struct gdbarch *gdbarch, int long_bit)
Definition gdbarch.c:1476
void set_gdbarch_ptr_bit(struct gdbarch *gdbarch, int ptr_bit)
Definition gdbarch.c:1732
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
Definition gdbarch.c:1941
void set_gdbarch_long_double_bit(struct gdbarch *gdbarch, int long_double_bit)
Definition gdbarch.c:1646
void set_gdbarch_sw_breakpoint_from_kind(struct gdbarch *gdbarch, gdbarch_sw_breakpoint_from_kind_ftype *sw_breakpoint_from_kind)
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype *push_dummy_call)
struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, gdbarch_tdep_up tdep)
Definition gdbarch.c:266
std::unique_ptr< gdbarch_tdep_base > gdbarch_tdep_up
Definition gdbarch.h:73
function_call_return_method
Definition gdbarch.h:114
@ return_method_normal
Definition gdbarch.h:116
const struct floatformat * floatformats_ieee_quad[BFD_ENDIAN_UNKNOWN]
Definition gdbtypes.c:93
unsigned type_align(struct type *type)
Definition gdbtypes.c:3527
struct type * check_typedef(struct type *type)
Definition gdbtypes.c:2966
type_code
Definition gdbtypes.h:82
mach_port_t mach_port_t name mach_port_t mach_port_t name kern_return_t err
Definition gnu-nat.c:1789
static CORE_ADDR loongarch_scan_prologue(struct gdbarch *gdbarch, CORE_ADDR start_pc, CORE_ADDR limit_pc, frame_info_ptr this_frame, struct trad_frame_cache *this_cache)
static int loongarch_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *group)
static void loongarch_frame_this_id(frame_info_ptr this_frame, void **prologue_cache, struct frame_id *this_id)
static void loongarch_xfer_reg(struct regcache *regcache, int regnum, int len, gdb_byte *readbuf, const gdb_byte *writebuf, size_t offset)
static struct value * loongarch_frame_prev_register(frame_info_ptr this_frame, void **prologue_cache, int regnum)
static bool loongarch_insn_is_branch(insn_t insn)
static CORE_ADDR loongarch_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
static void pass_in_far(struct regcache *regcache, unsigned int far, const gdb_byte *val)
static void pass_in_gar(struct regcache *regcache, unsigned int gar, const gdb_byte *val)
static constexpr gdb_byte loongarch_default_breakpoint[]
static std::vector< CORE_ADDR > loongarch_deal_with_atomic_sequence(struct regcache *regcache, CORE_ADDR cur_pc)
static void compute_struct_member(struct type *type, unsigned int *fixed_point_members, unsigned int *floating_point_members, bool *first_member_is_fixed_point)
static struct value * value_of_loongarch_user_reg(frame_info_ptr frame, const void *baton)
static enum return_value_convention loongarch_return_value(struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
static struct trad_frame_cache * loongarch_frame_cache(frame_info_ptr this_frame, void **this_cache)
static bool loongarch_insn_is_uncond_branch(insn_t insn)
void _initialize_loongarch_tdep()
static int loongarch_dwarf2_reg_to_regnum(struct gdbarch *gdbarch, int regnum)
static bool loongarch_insn_is_sc(insn_t insn)
static const struct target_desc * loongarch_find_default_target_description(const struct gdbarch_info info)
static CORE_ADDR loongarch_skip_prologue(struct gdbarch *gdbarch, CORE_ADDR pc)
static void pass_on_stack(struct regcache *regcache, const gdb_byte *val, size_t len, int align, gdb_byte **addr)
static CORE_ADDR loongarch_next_pc(struct regcache *regcache, CORE_ADDR cur_pc)
static bool loongarch_insn_is_ll(insn_t insn)
static bool loongarch_insn_is_cond_branch(insn_t insn)
static struct gdbarch * loongarch_gdbarch_init(struct gdbarch_info info, struct gdbarch_list *arches)
static const struct frame_unwind loongarch_frame_unwind
static insn_t loongarch_fetch_instruction(CORE_ADDR pc)
static CORE_ADDR loongarch_frame_align(struct gdbarch *gdbarch, CORE_ADDR addr)
static std::vector< CORE_ADDR > loongarch_software_single_step(struct regcache *regcache)
const target_desc * loongarch_lookup_target_description(const struct loongarch_gdbarch_features features)
Definition loongarch.c:88
@ DOUBLE_FLOAT
Definition loongarch.h:49
@ SINGLE_FLOAT
Definition loongarch.h:48
@ LOONGARCH_LINUX_NUM_FPREGSET
Definition loongarch.h:40
@ LOONGARCH_LINUX_NUM_FCC
Definition loongarch.h:42
@ LOONGARCH_RA_REGNUM
Definition loongarch.h:28
@ LOONGARCH_FP_REGNUM
Definition loongarch.h:32
@ LOONGARCH_FIRST_FP_REGNUM
Definition loongarch.h:39
@ LOONGARCH_PC_REGNUM
Definition loongarch.h:34
@ LOONGARCH_ARG_REGNUM
Definition loongarch.h:37
@ LOONGARCH_FCSR_REGNUM
Definition loongarch.h:43
@ LOONGARCH_A0_REGNUM
Definition loongarch.h:30
@ LOONGARCH_SP_REGNUM
Definition loongarch.h:29
@ LOONGARCH_BADV_REGNUM
Definition loongarch.h:35
info(Component c)
Definition gdbarch.py:41
void gdbarch_init_osabi(struct gdbarch_info info, struct gdbarch *gdbarch)
Definition osabi.c:382
CORE_ADDR regcache_read_pc(struct regcache *regcache)
Definition regcache.c:1333
int register_size(struct gdbarch *gdbarch, int regnum)
Definition regcache.c:170
LONGEST regcache_raw_get_signed(struct regcache *regcache, int regnum)
Definition regcache.c:685
void regcache_cooked_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
Definition regcache.c:825
const reggroup *const general_reggroup
Definition reggroups.c:251
int default_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *group)
Definition reggroups.c:147
const reggroup *const float_reggroup
Definition reggroups.c:252
const reggroup *const save_reggroup
Definition reggroups.c:256
const reggroup *const all_reggroup
Definition reggroups.c:255
const reggroup *const restore_reggroup
Definition reggroups.c:257
struct type * type() const
Definition gdbtypes.h:547
bool is_static() const
Definition gdbtypes.h:593
struct loongarch_gdbarch_features abi_features
CORE_ADDR(* syscall_next_pc)(frame_info_ptr frame)
struct frame_id this_id
Definition trad-frame.c:35
frame_info_ptr this_frame
Definition trad-frame.c:32
struct type * target_type() const
Definition gdbtypes.h:1037
type_code code() const
Definition gdbtypes.h:956
ULONGEST length() const
Definition gdbtypes.h:983
struct field & field(int idx) const
Definition gdbtypes.h:1012
bool is_unsigned() const
Definition gdbtypes.h:1100
unsigned int num_fields() const
Definition gdbtypes.h:994
Definition value.h:130
gdb::array_view< const gdb_byte > contents()
Definition value.c:1262
struct type * type() const
Definition value.h:180
CORE_ADDR skip_prologue_using_sal(struct gdbarch *gdbarch, CORE_ADDR func_addr)
Definition symtab.c:3963
tdesc_arch_data_up tdesc_data_alloc(void)
const struct tdesc_feature * tdesc_find_feature(const struct target_desc *target_desc, const char *name)
int tdesc_numbered_register(const struct tdesc_feature *feature, struct tdesc_arch_data *data, int regno, const char *name)
static const registry< gdbarch >::key< tdesc_arch_data > tdesc_data
void tdesc_use_registers(struct gdbarch *gdbarch, const struct target_desc *target_desc, tdesc_arch_data_up &&early_data, tdesc_unknown_register_ftype unk_reg_cb)
int tdesc_has_registers(const struct target_desc *target_desc)
int tdesc_register_bitsize(const struct tdesc_feature *feature, const char *name)
int tdesc_register_in_reggroup_p(struct gdbarch *gdbarch, int regno, const struct reggroup *reggroup)
std::unique_ptr< tdesc_arch_data, tdesc_arch_data_deleter > tdesc_arch_data_up
int target_read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition target.c:1785
@ TARGET_XFER_E_IO
Definition target.h:232
void trad_frame_set_reg_realreg(struct trad_frame_cache *this_trad_cache, int regnum, int realreg)
Definition trad-frame.c:103
struct trad_frame_cache * trad_frame_cache_zalloc(frame_info_ptr this_frame)
Definition trad-frame.c:39
void trad_frame_get_id(struct trad_frame_cache *this_trad_cache, struct frame_id *this_id)
Definition trad-frame.c:227
void trad_frame_set_id(struct trad_frame_cache *this_trad_cache, struct frame_id this_id)
Definition trad-frame.c:220
struct value * trad_frame_get_register(struct trad_frame_cache *this_trad_cache, frame_info_ptr this_frame, int regnum)
Definition trad-frame.c:211
void user_reg_add(struct gdbarch *gdbarch, const char *name, user_reg_read_ftype *xread, const void *baton)
Definition user-regs.c:122