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alpha-tdep.c
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1/* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
2
3 Copyright (C) 1993-2023 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20#include "defs.h"
21#include "frame.h"
22#include "frame-unwind.h"
23#include "frame-base.h"
24#include "dwarf2/frame.h"
25#include "inferior.h"
26#include "symtab.h"
27#include "value.h"
28#include "gdbcmd.h"
29#include "gdbcore.h"
30#include "dis-asm.h"
31#include "symfile.h"
32#include "objfiles.h"
33#include "linespec.h"
34#include "regcache.h"
35#include "reggroups.h"
36#include "arch-utils.h"
37#include "osabi.h"
38#include "infcall.h"
39#include "trad-frame.h"
40
41#include "elf-bfd.h"
42
43#include "alpha-tdep.h"
44#include <algorithm>
45
46/* Instruction decoding. The notations for registers, immediates and
47 opcodes are the same as the one used in Compaq's Alpha architecture
48 handbook. */
49
50#define INSN_OPCODE(insn) ((insn & 0xfc000000) >> 26)
51
52/* Memory instruction format */
53#define MEM_RA(insn) ((insn & 0x03e00000) >> 21)
54#define MEM_RB(insn) ((insn & 0x001f0000) >> 16)
55#define MEM_DISP(insn) \
56 (((insn & 0x8000) == 0) ? (insn & 0xffff) : -((-insn) & 0xffff))
57
58static const int lda_opcode = 0x08;
59static const int stq_opcode = 0x2d;
60
61/* Branch instruction format */
62#define BR_RA(insn) MEM_RA(insn)
63
64static const int br_opcode = 0x30;
65static const int bne_opcode = 0x3d;
66
67/* Operate instruction format */
68#define OPR_FUNCTION(insn) ((insn & 0xfe0) >> 5)
69#define OPR_HAS_IMMEDIATE(insn) ((insn & 0x1000) == 0x1000)
70#define OPR_RA(insn) MEM_RA(insn)
71#define OPR_RC(insn) ((insn & 0x1f))
72#define OPR_LIT(insn) ((insn & 0x1fe000) >> 13)
73
74static const int subq_opcode = 0x10;
75static const int subq_function = 0x29;
76
77
78/* Return the name of the REGNO register.
79
80 An empty name corresponds to a register number that used to
81 be used for a virtual register. That virtual register has
82 been removed, but the index is still reserved to maintain
83 compatibility with existing remote alpha targets. */
84
85static const char *
87{
88 static const char * const register_names[] =
89 {
90 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
91 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
92 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
93 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
94 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
95 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
96 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
97 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
98 "pc", "", "unique"
99 };
100
101 gdb_static_assert (ALPHA_NUM_REGS == ARRAY_SIZE (register_names));
102 return register_names[regno];
103}
104
105static int
107{
108 return (strlen (alpha_register_name (gdbarch, regno)) == 0);
109}
110
111static int
113{
114 return (regno == ALPHA_ZERO_REGNUM
115 || strlen (alpha_register_name (gdbarch, regno)) == 0);
116}
117
118static struct type *
120{
121 if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM)
123 if (regno == ALPHA_PC_REGNUM)
125
126 /* Don't need to worry about little vs big endian until
127 some jerk tries to port to alpha-unicosmk. */
128 if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31)
130
132}
133
134/* Is REGNUM a member of REGGROUP? */
135
136static int
138 const struct reggroup *group)
139{
140 /* Filter out any registers eliminated, but whose regnum is
141 reserved for backward compatibility, e.g. the vfp. */
142 if (*gdbarch_register_name (gdbarch, regnum) == '\0')
143 return 0;
144
145 if (group == all_reggroup)
146 return 1;
147
148 /* Zero should not be saved or restored. Technically it is a general
149 register (just as $f31 would be a float if we represented it), but
150 there's no point displaying it during "info regs", so leave it out
151 of all groups except for "all". */
153 return 0;
154
155 /* All other registers are saved and restored. */
156 if (group == save_reggroup || group == restore_reggroup)
157 return 1;
158
159 /* All other groups are non-overlapping. */
160
161 /* Since this is really a PALcode memory slot... */
163 return group == system_reggroup;
164
165 /* Force the FPCR to be considered part of the floating point state. */
167 return group == float_reggroup;
168
170 return group == float_reggroup;
171 else
172 return group == general_reggroup;
173}
174
175/* The following represents exactly the conversion performed by
176 the LDS instruction. This applies to both single-precision
177 floating point and 32-bit integers. */
178
179static void
180alpha_lds (struct gdbarch *gdbarch, void *out, const void *in)
181{
182 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
183 ULONGEST mem
184 = extract_unsigned_integer ((const gdb_byte *) in, 4, byte_order);
185 ULONGEST frac = (mem >> 0) & 0x7fffff;
186 ULONGEST sign = (mem >> 31) & 1;
187 ULONGEST exp_msb = (mem >> 30) & 1;
188 ULONGEST exp_low = (mem >> 23) & 0x7f;
189 ULONGEST exp, reg;
190
191 exp = (exp_msb << 10) | exp_low;
192 if (exp_msb)
193 {
194 if (exp_low == 0x7f)
195 exp = 0x7ff;
196 }
197 else
198 {
199 if (exp_low != 0x00)
200 exp |= 0x380;
201 }
202
203 reg = (sign << 63) | (exp << 52) | (frac << 29);
204 store_unsigned_integer ((gdb_byte *) out, 8, byte_order, reg);
205}
206
207/* Similarly, this represents exactly the conversion performed by
208 the STS instruction. */
209
210static void
211alpha_sts (struct gdbarch *gdbarch, void *out, const void *in)
212{
213 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
214 ULONGEST reg, mem;
215
216 reg = extract_unsigned_integer ((const gdb_byte *) in, 8, byte_order);
217 mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff);
218 store_unsigned_integer ((gdb_byte *) out, 4, byte_order, mem);
219}
220
221/* The alpha needs a conversion between register and memory format if the
222 register is a floating point register and memory format is float, as the
223 register format must be double or memory format is an integer with 4
224 bytes, as the representation of integers in floating point
225 registers is different. */
226
227static int
229 struct type *type)
230{
231 return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31
232 && type->length () == 4);
233}
234
235static int
237 struct type *valtype, gdb_byte *out,
238 int *optimizedp, int *unavailablep)
239{
240 struct gdbarch *gdbarch = get_frame_arch (frame);
241 struct value *value = get_frame_register_value (frame, regnum);
242
243 gdb_assert (value != NULL);
244 *optimizedp = value->optimized_out ();
245 *unavailablep = !value->entirely_available ();
246
247 if (*optimizedp || *unavailablep)
248 {
250 return 0;
251 }
252
253 /* Convert to VALTYPE. */
254
255 gdb_assert (valtype->length () == 4);
256 alpha_sts (gdbarch, out, value->contents_all ().data ());
257
259 return 1;
260}
261
262static void
264 struct type *valtype, const gdb_byte *in)
265{
266 gdb_byte out[ALPHA_REGISTER_SIZE];
267
268 gdb_assert (valtype->length () == 4);
269 gdb_assert (register_size (get_frame_arch (frame), regnum)
271 alpha_lds (get_frame_arch (frame), out, in);
272
273 put_frame_register (frame, regnum, out);
274}
275
276
277/* The alpha passes the first six arguments in the registers, the rest on
278 the stack. The register arguments are stored in ARG_REG_BUFFER, and
279 then moved into the register file; this simplifies the passing of a
280 large struct which extends from the registers to the stack, plus avoids
281 three ptrace invocations per word.
282
283 We don't bother tracking which register values should go in integer
284 regs or fp regs; we load the same values into both.
285
286 If the called function is returning a structure, the address of the
287 structure to be returned is passed as a hidden first argument. */
288
289static CORE_ADDR
290alpha_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
291 struct regcache *regcache, CORE_ADDR bp_addr,
292 int nargs, struct value **args, CORE_ADDR sp,
293 function_call_return_method return_method,
294 CORE_ADDR struct_addr)
295{
296 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
297 int i;
298 int accumulate_size = (return_method == return_method_struct) ? 8 : 0;
299 struct alpha_arg
300 {
301 const gdb_byte *contents;
302 int len;
303 int offset;
304 };
305 struct alpha_arg *alpha_args = XALLOCAVEC (struct alpha_arg, nargs);
306 struct alpha_arg *m_arg;
307 gdb_byte arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS];
308 int required_arg_regs;
309 CORE_ADDR func_addr = find_function_addr (function, NULL);
310
311 /* The ABI places the address of the called function in T12. */
313
314 /* Set the return address register to point to the entry point
315 of the program, where a breakpoint lies in wait. */
317
318 /* Lay out the arguments in memory. */
319 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++)
320 {
321 struct value *arg = args[i];
322 struct type *arg_type = check_typedef (arg->type ());
323
324 /* Cast argument to long if necessary as the compiler does it too. */
325 switch (arg_type->code ())
326 {
327 case TYPE_CODE_INT:
328 case TYPE_CODE_BOOL:
329 case TYPE_CODE_CHAR:
330 case TYPE_CODE_RANGE:
331 case TYPE_CODE_ENUM:
332 if (arg_type->length () == 4)
333 {
334 /* 32-bit values must be sign-extended to 64 bits
335 even if the base data type is unsigned. */
336 arg_type = builtin_type (gdbarch)->builtin_int32;
337 arg = value_cast (arg_type, arg);
338 }
339 if (arg_type->length () < ALPHA_REGISTER_SIZE)
340 {
341 arg_type = builtin_type (gdbarch)->builtin_int64;
342 arg = value_cast (arg_type, arg);
343 }
344 break;
345
346 case TYPE_CODE_FLT:
347 /* "float" arguments loaded in registers must be passed in
348 register format, aka "double". */
349 if (accumulate_size < sizeof (arg_reg_buffer)
350 && arg_type->length () == 4)
351 {
352 arg_type = builtin_type (gdbarch)->builtin_double;
353 arg = value_cast (arg_type, arg);
354 }
355 /* Tru64 5.1 has a 128-bit long double, and passes this by
356 invisible reference. No one else uses this data type. */
357 else if (arg_type->length () == 16)
358 {
359 /* Allocate aligned storage. */
360 sp = (sp & -16) - 16;
361
362 /* Write the real data into the stack. */
363 write_memory (sp, arg->contents ().data (), 16);
364
365 /* Construct the indirection. */
366 arg_type = lookup_pointer_type (arg_type);
367 arg = value_from_pointer (arg_type, sp);
368 }
369 break;
370
371 case TYPE_CODE_COMPLEX:
372 /* ??? The ABI says that complex values are passed as two
373 separate scalar values. This distinction only matters
374 for complex float. However, GCC does not implement this. */
375
376 /* Tru64 5.1 has a 128-bit long double, and passes this by
377 invisible reference. */
378 if (arg_type->length () == 32)
379 {
380 /* Allocate aligned storage. */
381 sp = (sp & -16) - 16;
382
383 /* Write the real data into the stack. */
384 write_memory (sp, arg->contents ().data (), 32);
385
386 /* Construct the indirection. */
387 arg_type = lookup_pointer_type (arg_type);
388 arg = value_from_pointer (arg_type, sp);
389 }
390 break;
391
392 default:
393 break;
394 }
395 m_arg->len = arg_type->length ();
396 m_arg->offset = accumulate_size;
397 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
398 m_arg->contents = arg->contents ().data ();
399 }
400
401 /* Determine required argument register loads, loading an argument register
402 is expensive as it uses three ptrace calls. */
403 required_arg_regs = accumulate_size / 8;
404 if (required_arg_regs > ALPHA_NUM_ARG_REGS)
405 required_arg_regs = ALPHA_NUM_ARG_REGS;
406
407 /* Make room for the arguments on the stack. */
408 if (accumulate_size < sizeof(arg_reg_buffer))
409 accumulate_size = 0;
410 else
411 accumulate_size -= sizeof(arg_reg_buffer);
412 sp -= accumulate_size;
413
414 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
415 sp &= ~15;
416
417 /* `Push' arguments on the stack. */
418 for (i = nargs; m_arg--, --i >= 0;)
419 {
420 const gdb_byte *contents = m_arg->contents;
421 int offset = m_arg->offset;
422 int len = m_arg->len;
423
424 /* Copy the bytes destined for registers into arg_reg_buffer. */
425 if (offset < sizeof(arg_reg_buffer))
426 {
427 if (offset + len <= sizeof(arg_reg_buffer))
428 {
429 memcpy (arg_reg_buffer + offset, contents, len);
430 continue;
431 }
432 else
433 {
434 int tlen = sizeof(arg_reg_buffer) - offset;
435 memcpy (arg_reg_buffer + offset, contents, tlen);
436 offset += tlen;
437 contents += tlen;
438 len -= tlen;
439 }
440 }
441
442 /* Everything else goes to the stack. */
443 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
444 }
445 if (return_method == return_method_struct)
447 byte_order, struct_addr);
448
449 /* Load the argument registers. */
450 for (i = 0; i < required_arg_regs; i++)
451 {
453 arg_reg_buffer + i * ALPHA_REGISTER_SIZE);
455 arg_reg_buffer + i * ALPHA_REGISTER_SIZE);
456 }
457
458 /* Finally, update the stack pointer. */
460
461 return sp;
462}
463
464/* Extract from REGCACHE the value about to be returned from a function
465 and copy it into VALBUF. */
466
467static void
469 gdb_byte *valbuf)
470{
471 struct gdbarch *gdbarch = regcache->arch ();
472 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
473 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
474 ULONGEST l;
475
476 switch (valtype->code ())
477 {
478 case TYPE_CODE_FLT:
479 switch (valtype->length ())
480 {
481 case 4:
483 alpha_sts (gdbarch, valbuf, raw_buffer);
484 break;
485
486 case 8:
488 break;
489
490 case 16:
492 read_memory (l, valbuf, 16);
493 break;
494
495 default:
496 internal_error (_("unknown floating point width"));
497 }
498 break;
499
500 case TYPE_CODE_COMPLEX:
501 switch (valtype->length ())
502 {
503 case 8:
504 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
506 break;
507
508 case 16:
510 regcache->cooked_read (ALPHA_FP0_REGNUM + 1, valbuf + 8);
511 break;
512
513 case 32:
515 read_memory (l, valbuf, 32);
516 break;
517
518 default:
519 internal_error (_("unknown floating point width"));
520 }
521 break;
522
523 default:
524 /* Assume everything else degenerates to an integer. */
526 store_unsigned_integer (valbuf, valtype->length (), byte_order, l);
527 break;
528 }
529}
530
531/* Insert the given value into REGCACHE as if it was being
532 returned by a function. */
533
534static void
536 const gdb_byte *valbuf)
537{
538 struct gdbarch *gdbarch = regcache->arch ();
539 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
540 ULONGEST l;
541
542 switch (valtype->code ())
543 {
544 case TYPE_CODE_FLT:
545 switch (valtype->length ())
546 {
547 case 4:
548 alpha_lds (gdbarch, raw_buffer, valbuf);
550 break;
551
552 case 8:
554 break;
555
556 case 16:
557 /* FIXME: 128-bit long doubles are returned like structures:
558 by writing into indirect storage provided by the caller
559 as the first argument. */
560 error (_("Cannot set a 128-bit long double return value."));
561
562 default:
563 internal_error (_("unknown floating point width"));
564 }
565 break;
566
567 case TYPE_CODE_COMPLEX:
568 switch (valtype->length ())
569 {
570 case 8:
571 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
573 break;
574
575 case 16:
577 regcache->cooked_write (ALPHA_FP0_REGNUM + 1, valbuf + 8);
578 break;
579
580 case 32:
581 /* FIXME: 128-bit long doubles are returned like structures:
582 by writing into indirect storage provided by the caller
583 as the first argument. */
584 error (_("Cannot set a 128-bit long double return value."));
585
586 default:
587 internal_error (_("unknown floating point width"));
588 }
589 break;
590
591 default:
592 /* Assume everything else degenerates to an integer. */
593 /* 32-bit values must be sign-extended to 64 bits
594 even if the base data type is unsigned. */
595 if (valtype->length () == 4)
597 l = unpack_long (valtype, valbuf);
599 break;
600 }
601}
602
603static enum return_value_convention
604alpha_return_value (struct gdbarch *gdbarch, struct value *function,
605 struct type *type, struct regcache *regcache,
606 gdb_byte *readbuf, const gdb_byte *writebuf)
607{
608 enum type_code code = type->code ();
609 alpha_gdbarch_tdep *tdep = gdbarch_tdep<alpha_gdbarch_tdep> (gdbarch);
610
611 if ((code == TYPE_CODE_STRUCT
612 || code == TYPE_CODE_UNION
613 || code == TYPE_CODE_ARRAY)
614 && tdep->return_in_memory (type))
615 {
616 if (readbuf)
617 {
618 ULONGEST addr;
620 read_memory (addr, readbuf, type->length ());
621 }
622
624 }
625
626 if (readbuf)
628 if (writebuf)
630
632}
633
634static int
636{
637 return 1;
638}
639
640
641constexpr gdb_byte alpha_break_insn[] = { 0x80, 0, 0, 0 }; /* call_pal bpt */
642
643typedef BP_MANIPULATION (alpha_break_insn) alpha_breakpoint;
644
645
646/* This returns the PC of the first insn after the prologue.
647 If we can't find the prologue, then return 0. */
648
649CORE_ADDR
650alpha_after_prologue (CORE_ADDR pc)
651{
652 struct symtab_and_line sal;
653 CORE_ADDR func_addr, func_end;
654
655 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
656 return 0;
657
658 sal = find_pc_line (func_addr, 0);
659 if (sal.end < func_end)
660 return sal.end;
661
662 /* The line after the prologue is after the end of the function. In this
663 case, tell the caller to find the prologue the hard way. */
664 return 0;
665}
666
667/* Read an instruction from memory at PC, looking through breakpoints. */
668
669unsigned int
670alpha_read_insn (struct gdbarch *gdbarch, CORE_ADDR pc)
671{
672 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
673 gdb_byte buf[ALPHA_INSN_SIZE];
674 int res;
675
676 res = target_read_memory (pc, buf, sizeof (buf));
677 if (res != 0)
679 return extract_unsigned_integer (buf, sizeof (buf), byte_order);
680}
681
682/* To skip prologues, I use this predicate. Returns either PC itself
683 if the code at PC does not look like a function prologue; otherwise
684 returns an address that (if we're lucky) follows the prologue. If
685 LENIENT, then we must skip everything which is involved in setting
686 up the frame (it's OK to skip more, just so long as we don't skip
687 anything which might clobber the registers which are being saved. */
688
689static CORE_ADDR
691{
692 unsigned long inst;
693 int offset;
694 CORE_ADDR post_prologue_pc;
695 gdb_byte buf[ALPHA_INSN_SIZE];
696
697 /* Silently return the unaltered pc upon memory errors.
698 This could happen on OSF/1 if decode_line_1 tries to skip the
699 prologue for quickstarted shared library functions when the
700 shared library is not yet mapped in.
701 Reading target memory is slow over serial lines, so we perform
702 this check only if the target has shared libraries (which all
703 Alpha targets do). */
704 if (target_read_memory (pc, buf, sizeof (buf)))
705 return pc;
706
707 /* See if we can determine the end of the prologue via the symbol table.
708 If so, then return either PC, or the PC after the prologue, whichever
709 is greater. */
710
711 post_prologue_pc = alpha_after_prologue (pc);
712 if (post_prologue_pc != 0)
713 return std::max (pc, post_prologue_pc);
714
715 /* Can't determine prologue from the symbol table, need to examine
716 instructions. */
717
718 /* Skip the typical prologue instructions. These are the stack adjustment
719 instruction and the instructions that save registers on the stack
720 or in the gcc frame. */
721 for (offset = 0; offset < 100; offset += ALPHA_INSN_SIZE)
722 {
723 inst = alpha_read_insn (gdbarch, pc + offset);
724
725 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
726 continue;
727 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
728 continue;
729 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
730 continue;
731 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
732 continue;
733
734 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
735 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
736 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */
737 continue;
738
739 if (inst == 0x47de040f) /* bis sp,sp,fp */
740 continue;
741 if (inst == 0x47fe040f) /* bis zero,sp,fp */
742 continue;
743
744 break;
745 }
746 return pc + offset;
747}
748
749
750static const int ldl_l_opcode = 0x2a;
751static const int ldq_l_opcode = 0x2b;
752static const int stl_c_opcode = 0x2e;
753static const int stq_c_opcode = 0x2f;
754
755/* Checks for an atomic sequence of instructions beginning with a LDL_L/LDQ_L
756 instruction and ending with a STL_C/STQ_C instruction. If such a sequence
757 is found, attempt to step through it. A breakpoint is placed at the end of
758 the sequence. */
759
760static std::vector<CORE_ADDR>
762{
763 CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
764 CORE_ADDR loc = pc;
765 CORE_ADDR closing_insn; /* Instruction that closes the atomic sequence. */
766 unsigned int insn = alpha_read_insn (gdbarch, loc);
767 int insn_count;
768 int index;
769 int last_breakpoint = 0; /* Defaults to 0 (no breakpoints placed). */
770 const int atomic_sequence_length = 16; /* Instruction sequence length. */
771 int bc_insn_count = 0; /* Conditional branch instruction count. */
772
773 /* Assume all atomic sequences start with a LDL_L/LDQ_L instruction. */
774 if (INSN_OPCODE (insn) != ldl_l_opcode
775 && INSN_OPCODE (insn) != ldq_l_opcode)
776 return {};
777
778 /* Assume that no atomic sequence is longer than "atomic_sequence_length"
779 instructions. */
780 for (insn_count = 0; insn_count < atomic_sequence_length; ++insn_count)
781 {
783 insn = alpha_read_insn (gdbarch, loc);
784
785 /* Assume that there is at most one branch in the atomic
786 sequence. If a branch is found, put a breakpoint in
787 its destination address. */
788 if (INSN_OPCODE (insn) >= br_opcode)
789 {
790 int immediate = (insn & 0x001fffff) << 2;
791
792 immediate = (immediate ^ 0x400000) - 0x400000;
793
794 if (bc_insn_count >= 1)
795 return {}; /* More than one branch found, fallback
796 to the standard single-step code. */
797
798 breaks[1] = loc + ALPHA_INSN_SIZE + immediate;
799
800 bc_insn_count++;
801 last_breakpoint++;
802 }
803
804 if (INSN_OPCODE (insn) == stl_c_opcode
805 || INSN_OPCODE (insn) == stq_c_opcode)
806 break;
807 }
808
809 /* Assume that the atomic sequence ends with a STL_C/STQ_C instruction. */
810 if (INSN_OPCODE (insn) != stl_c_opcode
811 && INSN_OPCODE (insn) != stq_c_opcode)
812 return {};
813
814 closing_insn = loc;
816
817 /* Insert a breakpoint right after the end of the atomic sequence. */
818 breaks[0] = loc;
819
820 /* Check for duplicated breakpoints. Check also for a breakpoint
821 placed (branch instruction's destination) anywhere in sequence. */
822 if (last_breakpoint
823 && (breaks[1] == breaks[0]
824 || (breaks[1] >= pc && breaks[1] <= closing_insn)))
825 last_breakpoint = 0;
826
827 std::vector<CORE_ADDR> next_pcs;
828
829 for (index = 0; index <= last_breakpoint; index++)
830 next_pcs.push_back (breaks[index]);
831
832 return next_pcs;
833}
834
835
836/* Figure out where the longjmp will land.
837 We expect the first arg to be a pointer to the jmp_buf structure from
838 which we extract the PC (JB_PC) that we will land at. The PC is copied
839 into the "pc". This routine returns true on success. */
840
841static int
843{
844 struct gdbarch *gdbarch = get_frame_arch (frame);
845 alpha_gdbarch_tdep *tdep = gdbarch_tdep<alpha_gdbarch_tdep> (gdbarch);
846 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
847 CORE_ADDR jb_addr;
848 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
849
851
852 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size),
853 raw_buffer, tdep->jb_elt_size))
854 return 0;
855
856 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size, byte_order);
857 return 1;
858}
859
860
861/* Frame unwinder for signal trampolines. We use alpha tdep bits that
862 describe the location and shape of the sigcontext structure. After
863 that, all registers are in memory, so it's easy. */
864/* ??? Shouldn't we be able to do this generically, rather than with
865 OSABI data specific to Alpha? */
866
871
872static struct alpha_sigtramp_unwind_cache *
874 void **this_prologue_cache)
875{
876 struct alpha_sigtramp_unwind_cache *info;
877
878 if (*this_prologue_cache)
879 return (struct alpha_sigtramp_unwind_cache *) *this_prologue_cache;
880
882 *this_prologue_cache = info;
883
884 gdbarch *arch = get_frame_arch (this_frame);
885 alpha_gdbarch_tdep *tdep = gdbarch_tdep<alpha_gdbarch_tdep> (arch);
886 info->sigcontext_addr = tdep->sigcontext_addr (this_frame);
887
888 return info;
889}
890
891/* Return the address of REGNUM in a sigtramp frame. Since this is
892 all arithmetic, it doesn't seem worthwhile to cache it. */
893
894static CORE_ADDR
896 CORE_ADDR sigcontext_addr, int regnum)
897{
898 alpha_gdbarch_tdep *tdep = gdbarch_tdep<alpha_gdbarch_tdep> (gdbarch);
899
900 if (regnum >= 0 && regnum < 32)
901 return sigcontext_addr + tdep->sc_regs_offset + regnum * 8;
902 else if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 32)
903 return sigcontext_addr + tdep->sc_fpregs_offset + regnum * 8;
904 else if (regnum == ALPHA_PC_REGNUM)
905 return sigcontext_addr + tdep->sc_pc_offset;
906
907 return 0;
908}
909
910/* Given a GDB frame, determine the address of the calling function's
911 frame. This will be used to create a new GDB frame struct. */
912
913static void
915 void **this_prologue_cache,
916 struct frame_id *this_id)
917{
918 struct gdbarch *gdbarch = get_frame_arch (this_frame);
919 alpha_gdbarch_tdep *tdep = gdbarch_tdep<alpha_gdbarch_tdep> (gdbarch);
920 struct alpha_sigtramp_unwind_cache *info
921 = alpha_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
922 CORE_ADDR stack_addr, code_addr;
923
924 /* If the OSABI couldn't locate the sigcontext, give up. */
925 if (info->sigcontext_addr == 0)
926 return;
927
928 /* If we have dynamic signal trampolines, find their start.
929 If we do not, then we must assume there is a symbol record
930 that can provide the start address. */
931 if (tdep->dynamic_sigtramp_offset)
932 {
933 int offset;
934 code_addr = get_frame_pc (this_frame);
935 offset = tdep->dynamic_sigtramp_offset (gdbarch, code_addr);
936 if (offset >= 0)
937 code_addr -= offset;
938 else
939 code_addr = 0;
940 }
941 else
942 code_addr = get_frame_func (this_frame);
943
944 /* The stack address is trivially read from the sigcontext. */
945 stack_addr = alpha_sigtramp_register_address (gdbarch, info->sigcontext_addr,
947 stack_addr = get_frame_memory_unsigned (this_frame, stack_addr,
949
950 *this_id = frame_id_build (stack_addr, code_addr);
951}
952
953/* Retrieve the value of REGNUM in FRAME. Don't give up! */
954
955static struct value *
957 void **this_prologue_cache, int regnum)
958{
959 struct alpha_sigtramp_unwind_cache *info
960 = alpha_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
961 CORE_ADDR addr;
962
963 if (info->sigcontext_addr != 0)
964 {
965 /* All integer and fp registers are stored in memory. */
967 info->sigcontext_addr, regnum);
968 if (addr != 0)
969 return frame_unwind_got_memory (this_frame, regnum, addr);
970 }
971
972 /* This extra register may actually be in the sigcontext, but our
973 current description of it in alpha_sigtramp_frame_unwind_cache
974 doesn't include it. Too bad. Fall back on whatever's in the
975 outer frame. */
976 return frame_unwind_got_register (this_frame, regnum, regnum);
977}
978
979static int
981 frame_info_ptr this_frame,
982 void **this_prologue_cache)
983{
984 struct gdbarch *gdbarch = get_frame_arch (this_frame);
985 CORE_ADDR pc = get_frame_pc (this_frame);
986 const char *name;
987
988 /* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead
989 look at tramp-frame.h and other simpler per-architecture
990 sigtramp unwinders. */
991
992 /* We shouldn't even bother to try if the OSABI didn't register a
993 sigcontext_addr handler or pc_in_sigtramp handler. */
994 alpha_gdbarch_tdep *tdep = gdbarch_tdep<alpha_gdbarch_tdep> (gdbarch);
995 if (tdep->sigcontext_addr == NULL)
996 return 0;
997
998 if (tdep->pc_in_sigtramp == NULL)
999 return 0;
1000
1001 /* Otherwise we should be in a signal frame. */
1002 find_pc_partial_function (pc, &name, NULL, NULL);
1003 if (tdep->pc_in_sigtramp (gdbarch, pc, name))
1004 return 1;
1005
1006 return 0;
1007}
1008
1019
1020
1021
1022/* Heuristic_proc_start may hunt through the text section for a long
1023 time across a 2400 baud serial line. Allows the user to limit this
1024 search. */
1026
1027/* Attempt to locate the start of the function containing PC. We assume that
1028 the previous function ends with an about_to_return insn. Not foolproof by
1029 any means, since gcc is happy to put the epilogue in the middle of a
1030 function. But we're guessing anyway... */
1031
1032static CORE_ADDR
1034{
1035 alpha_gdbarch_tdep *tdep = gdbarch_tdep<alpha_gdbarch_tdep> (gdbarch);
1036 CORE_ADDR last_non_nop = pc;
1037 CORE_ADDR fence = pc - heuristic_fence_post;
1038 CORE_ADDR orig_pc = pc;
1039 CORE_ADDR func;
1040 struct inferior *inf;
1041
1042 if (pc == 0)
1043 return 0;
1044
1045 /* First see if we can find the start of the function from minimal
1046 symbol information. This can succeed with a binary that doesn't
1047 have debug info, but hasn't been stripped. */
1049 if (func)
1050 return func;
1051
1052 if (heuristic_fence_post == -1
1053 || fence < tdep->vm_min_address)
1054 fence = tdep->vm_min_address;
1055
1056 /* Search back for previous return; also stop at a 0, which might be
1057 seen for instance before the start of a code section. Don't include
1058 nops, since this usually indicates padding between functions. */
1059 for (pc -= ALPHA_INSN_SIZE; pc >= fence; pc -= ALPHA_INSN_SIZE)
1060 {
1061 unsigned int insn = alpha_read_insn (gdbarch, pc);
1062 switch (insn)
1063 {
1064 case 0: /* invalid insn */
1065 case 0x6bfa8001: /* ret $31,($26),1 */
1066 return last_non_nop;
1067
1068 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
1069 case 0x47ff041f: /* nop: bis $31,$31,$31 */
1070 break;
1071
1072 default:
1073 last_non_nop = pc;
1074 break;
1075 }
1076 }
1077
1078 inf = current_inferior ();
1079
1080 /* It's not clear to me why we reach this point when stopping quietly,
1081 but with this test, at least we don't print out warnings for every
1082 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
1083 if (inf->control.stop_soon == NO_STOP_QUIETLY)
1084 {
1085 static int blurb_printed = 0;
1086
1087 if (fence == tdep->vm_min_address)
1088 warning (_("Hit beginning of text section without finding \
1089enclosing function for address %s"), paddress (gdbarch, orig_pc));
1090 else
1091 warning (_("Hit heuristic-fence-post without finding \
1092enclosing function for address %s"), paddress (gdbarch, orig_pc));
1093
1094 if (!blurb_printed)
1095 {
1096 gdb_printf (_("\
1097This warning occurs if you are debugging a function without any symbols\n\
1098(for example, in a stripped executable). In that case, you may wish to\n\
1099increase the size of the search with the `set heuristic-fence-post' command.\n\
1100\n\
1101Otherwise, you told GDB there was a function where there isn't one, or\n\
1102(more likely) you have encountered a bug in GDB.\n"));
1103 blurb_printed = 1;
1104 }
1105 }
1106
1107 return 0;
1108}
1109
1110/* Fallback alpha frame unwinder. Uses instruction scanning and knows
1111 something about the traditional layout of alpha stack frames. */
1112
1120
1121/* If a probing loop sequence starts at PC, simulate it and compute
1122 FRAME_SIZE and PC after its execution. Otherwise, return with PC and
1123 FRAME_SIZE unchanged. */
1124
1125static void
1127 int *frame_size)
1128{
1129 CORE_ADDR cur_pc = *pc;
1130 int cur_frame_size = *frame_size;
1131 int nb_of_iterations, reg_index, reg_probe;
1132 unsigned int insn;
1133
1134 /* The following pattern is recognized as a probing loop:
1135
1136 lda REG_INDEX,NB_OF_ITERATIONS
1137 lda REG_PROBE,<immediate>(sp)
1138
1139 LOOP_START:
1140 stq zero,<immediate>(REG_PROBE)
1141 subq REG_INDEX,0x1,REG_INDEX
1142 lda REG_PROBE,<immediate>(REG_PROBE)
1143 bne REG_INDEX, LOOP_START
1144
1145 lda sp,<immediate>(REG_PROBE)
1146
1147 If anything different is found, the function returns without
1148 changing PC and FRAME_SIZE. Otherwise, PC will point immediately
1149 after this sequence, and FRAME_SIZE will be updated. */
1150
1151 /* lda REG_INDEX,NB_OF_ITERATIONS */
1152
1153 insn = alpha_read_insn (gdbarch, cur_pc);
1154 if (INSN_OPCODE (insn) != lda_opcode)
1155 return;
1156 reg_index = MEM_RA (insn);
1157 nb_of_iterations = MEM_DISP (insn);
1158
1159 /* lda REG_PROBE,<immediate>(sp) */
1160
1161 cur_pc += ALPHA_INSN_SIZE;
1162 insn = alpha_read_insn (gdbarch, cur_pc);
1163 if (INSN_OPCODE (insn) != lda_opcode
1164 || MEM_RB (insn) != ALPHA_SP_REGNUM)
1165 return;
1166 reg_probe = MEM_RA (insn);
1167 cur_frame_size -= MEM_DISP (insn);
1168
1169 /* stq zero,<immediate>(REG_PROBE) */
1170
1171 cur_pc += ALPHA_INSN_SIZE;
1172 insn = alpha_read_insn (gdbarch, cur_pc);
1173 if (INSN_OPCODE (insn) != stq_opcode
1174 || MEM_RA (insn) != 0x1f
1175 || MEM_RB (insn) != reg_probe)
1176 return;
1177
1178 /* subq REG_INDEX,0x1,REG_INDEX */
1179
1180 cur_pc += ALPHA_INSN_SIZE;
1181 insn = alpha_read_insn (gdbarch, cur_pc);
1182 if (INSN_OPCODE (insn) != subq_opcode
1183 || !OPR_HAS_IMMEDIATE (insn)
1184 || OPR_FUNCTION (insn) != subq_function
1185 || OPR_LIT(insn) != 1
1186 || OPR_RA (insn) != reg_index
1187 || OPR_RC (insn) != reg_index)
1188 return;
1189
1190 /* lda REG_PROBE,<immediate>(REG_PROBE) */
1191
1192 cur_pc += ALPHA_INSN_SIZE;
1193 insn = alpha_read_insn (gdbarch, cur_pc);
1194 if (INSN_OPCODE (insn) != lda_opcode
1195 || MEM_RA (insn) != reg_probe
1196 || MEM_RB (insn) != reg_probe)
1197 return;
1198 cur_frame_size -= MEM_DISP (insn) * nb_of_iterations;
1199
1200 /* bne REG_INDEX, LOOP_START */
1201
1202 cur_pc += ALPHA_INSN_SIZE;
1203 insn = alpha_read_insn (gdbarch, cur_pc);
1204 if (INSN_OPCODE (insn) != bne_opcode
1205 || MEM_RA (insn) != reg_index)
1206 return;
1207
1208 /* lda sp,<immediate>(REG_PROBE) */
1209
1210 cur_pc += ALPHA_INSN_SIZE;
1211 insn = alpha_read_insn (gdbarch, cur_pc);
1212 if (INSN_OPCODE (insn) != lda_opcode
1213 || MEM_RA (insn) != ALPHA_SP_REGNUM
1214 || MEM_RB (insn) != reg_probe)
1215 return;
1216 cur_frame_size -= MEM_DISP (insn);
1217
1218 *pc = cur_pc;
1219 *frame_size = cur_frame_size;
1220}
1221
1222static struct alpha_heuristic_unwind_cache *
1224 void **this_prologue_cache,
1225 CORE_ADDR start_pc)
1226{
1227 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1228 struct alpha_heuristic_unwind_cache *info;
1229 ULONGEST val;
1230 CORE_ADDR limit_pc, cur_pc;
1231 int frame_reg, frame_size, return_reg, reg;
1232
1233 if (*this_prologue_cache)
1234 return (struct alpha_heuristic_unwind_cache *) *this_prologue_cache;
1235
1237 *this_prologue_cache = info;
1238 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1239
1240 limit_pc = get_frame_pc (this_frame);
1241 if (start_pc == 0)
1243 info->start_pc = start_pc;
1244
1245 frame_reg = ALPHA_SP_REGNUM;
1246 frame_size = 0;
1247 return_reg = -1;
1248
1249 /* If we've identified a likely place to start, do code scanning. */
1250 if (start_pc != 0)
1251 {
1252 /* Limit the forward search to 50 instructions. */
1253 if (start_pc + 200 < limit_pc)
1254 limit_pc = start_pc + 200;
1255
1256 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += ALPHA_INSN_SIZE)
1257 {
1258 unsigned int word = alpha_read_insn (gdbarch, cur_pc);
1259
1260 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
1261 {
1262 if (word & 0x8000)
1263 {
1264 /* Consider only the first stack allocation instruction
1265 to contain the static size of the frame. */
1266 if (frame_size == 0)
1267 frame_size = (-word) & 0xffff;
1268 }
1269 else
1270 {
1271 /* Exit loop if a positive stack adjustment is found, which
1272 usually means that the stack cleanup code in the function
1273 epilogue is reached. */
1274 break;
1275 }
1276 }
1277 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1278 {
1279 reg = (word & 0x03e00000) >> 21;
1280
1281 /* Ignore this instruction if we have already encountered
1282 an instruction saving the same register earlier in the
1283 function code. The current instruction does not tell
1284 us where the original value upon function entry is saved.
1285 All it says is that the function we are scanning reused
1286 that register for some computation of its own, and is now
1287 saving its result. */
1288 if (info->saved_regs[reg].is_addr ())
1289 continue;
1290
1291 if (reg == 31)
1292 continue;
1293
1294 /* Do not compute the address where the register was saved yet,
1295 because we don't know yet if the offset will need to be
1296 relative to $sp or $fp (we can not compute the address
1297 relative to $sp if $sp is updated during the execution of
1298 the current subroutine, for instance when doing some alloca).
1299 So just store the offset for the moment, and compute the
1300 address later when we know whether this frame has a frame
1301 pointer or not. */
1302 /* Hack: temporarily add one, so that the offset is non-zero
1303 and we can tell which registers have save offsets below. */
1304 info->saved_regs[reg].set_addr ((word & 0xffff) + 1);
1305
1306 /* Starting with OSF/1-3.2C, the system libraries are shipped
1307 without local symbols, but they still contain procedure
1308 descriptors without a symbol reference. GDB is currently
1309 unable to find these procedure descriptors and uses
1310 heuristic_proc_desc instead.
1311 As some low level compiler support routines (__div*, __add*)
1312 use a non-standard return address register, we have to
1313 add some heuristics to determine the return address register,
1314 or stepping over these routines will fail.
1315 Usually the return address register is the first register
1316 saved on the stack, but assembler optimization might
1317 rearrange the register saves.
1318 So we recognize only a few registers (t7, t9, ra) within
1319 the procedure prologue as valid return address registers.
1320 If we encounter a return instruction, we extract the
1321 return address register from it.
1322
1323 FIXME: Rewriting GDB to access the procedure descriptors,
1324 e.g. via the minimal symbol table, might obviate this
1325 hack. */
1326 if (return_reg == -1
1327 && cur_pc < (start_pc + 80)
1328 && (reg == ALPHA_T7_REGNUM
1329 || reg == ALPHA_T9_REGNUM
1330 || reg == ALPHA_RA_REGNUM))
1331 return_reg = reg;
1332 }
1333 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1334 return_reg = (word >> 16) & 0x1f;
1335 else if (word == 0x47de040f) /* bis sp,sp,fp */
1336 frame_reg = ALPHA_GCC_FP_REGNUM;
1337 else if (word == 0x47fe040f) /* bis zero,sp,fp */
1338 frame_reg = ALPHA_GCC_FP_REGNUM;
1339
1340 alpha_heuristic_analyze_probing_loop (gdbarch, &cur_pc, &frame_size);
1341 }
1342
1343 /* If we haven't found a valid return address register yet, keep
1344 searching in the procedure prologue. */
1345 if (return_reg == -1)
1346 {
1347 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
1348 {
1349 unsigned int word = alpha_read_insn (gdbarch, cur_pc);
1350
1351 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1352 {
1353 reg = (word & 0x03e00000) >> 21;
1354 if (reg == ALPHA_T7_REGNUM
1355 || reg == ALPHA_T9_REGNUM
1356 || reg == ALPHA_RA_REGNUM)
1357 {
1358 return_reg = reg;
1359 break;
1360 }
1361 }
1362 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1363 {
1364 return_reg = (word >> 16) & 0x1f;
1365 break;
1366 }
1367
1368 cur_pc += ALPHA_INSN_SIZE;
1369 }
1370 }
1371 }
1372
1373 /* Failing that, do default to the customary RA. */
1374 if (return_reg == -1)
1376 info->return_reg = return_reg;
1377
1378 val = get_frame_register_unsigned (this_frame, frame_reg);
1379 info->vfp = val + frame_size;
1380
1381 /* Convert offsets to absolute addresses. See above about adding
1382 one to the offsets to make all detected offsets non-zero. */
1383 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
1384 if (info->saved_regs[reg].is_addr ())
1385 info->saved_regs[reg].set_addr (info->saved_regs[reg].addr ()
1386 + val - 1);
1387
1388 /* The stack pointer of the previous frame is computed by popping
1389 the current stack frame. */
1390 if (!info->saved_regs[ALPHA_SP_REGNUM].is_addr ())
1391 info->saved_regs[ALPHA_SP_REGNUM].set_value (info->vfp);
1392
1393 return info;
1394}
1395
1396/* Given a GDB frame, determine the address of the calling function's
1397 frame. This will be used to create a new GDB frame struct. */
1398
1399static void
1401 void **this_prologue_cache,
1402 struct frame_id *this_id)
1403{
1404 struct alpha_heuristic_unwind_cache *info
1405 = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0);
1406
1407 *this_id = frame_id_build (info->vfp, info->start_pc);
1408}
1409
1410/* Retrieve the value of REGNUM in FRAME. Don't give up! */
1411
1412static struct value *
1414 void **this_prologue_cache, int regnum)
1415{
1416 struct alpha_heuristic_unwind_cache *info
1417 = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0);
1418
1419 /* The PC of the previous frame is stored in the link register of
1420 the current frame. Frob regnum so that we pull the value from
1421 the correct place. */
1422 if (regnum == ALPHA_PC_REGNUM)
1423 regnum = info->return_reg;
1424
1425 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
1426}
1427
1438
1439static CORE_ADDR
1441 void **this_prologue_cache)
1442{
1443 struct alpha_heuristic_unwind_cache *info
1444 = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0);
1445
1446 return info->vfp;
1447}
1448
1455
1456/* Just like reinit_frame_cache, but with the right arguments to be
1457 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
1458
1459static void
1461 int from_tty, struct cmd_list_element *c)
1462{
1464}
1465
1466/* Helper routines for alpha*-nat.c files to move register sets to and
1467 from core files. The UNIQUE pointer is allowed to be NULL, as most
1468 targets don't supply this value in their core files. */
1469
1470void
1472 const void *r0_r30, const void *pc, const void *unique)
1473{
1474 const gdb_byte *regs = (const gdb_byte *) r0_r30;
1475 int i;
1476
1477 for (i = 0; i < 31; ++i)
1478 if (regno == i || regno == -1)
1479 regcache->raw_supply (i, regs + i * 8);
1480
1481 if (regno == ALPHA_ZERO_REGNUM || regno == -1)
1482 {
1483 const gdb_byte zero[8] = { 0 };
1484
1486 }
1487
1488 if (regno == ALPHA_PC_REGNUM || regno == -1)
1490
1491 if (regno == ALPHA_UNIQUE_REGNUM || regno == -1)
1493}
1494
1495void
1497 int regno, void *r0_r30, void *pc, void *unique)
1498{
1499 gdb_byte *regs = (gdb_byte *) r0_r30;
1500 int i;
1501
1502 for (i = 0; i < 31; ++i)
1503 if (regno == i || regno == -1)
1504 regcache->raw_collect (i, regs + i * 8);
1505
1506 if (regno == ALPHA_PC_REGNUM || regno == -1)
1508
1509 if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1))
1511}
1512
1513void
1515 const void *f0_f30, const void *fpcr)
1516{
1517 const gdb_byte *regs = (const gdb_byte *) f0_f30;
1518 int i;
1519
1520 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1521 if (regno == i || regno == -1)
1522 regcache->raw_supply (i, regs + (i - ALPHA_FP0_REGNUM) * 8);
1523
1524 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
1526}
1527
1528void
1530 int regno, void *f0_f30, void *fpcr)
1531{
1532 gdb_byte *regs = (gdb_byte *) f0_f30;
1533 int i;
1534
1535 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1536 if (regno == i || regno == -1)
1537 regcache->raw_collect (i, regs + (i - ALPHA_FP0_REGNUM) * 8);
1538
1539 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
1541}
1542
1543
1544
1545/* Return nonzero if the G_floating register value in REG is equal to
1546 zero for FP control instructions. */
1547
1548static int
1550{
1551 /* Check that all bits except the sign bit are zero. */
1552 const LONGEST zero_mask = ((LONGEST) 1 << 63) ^ -1;
1553
1554 return ((reg & zero_mask) == 0);
1555}
1556
1557/* Return the value of the sign bit for the G_floating register
1558 value held in REG. */
1559
1560static int
1562{
1563 const LONGEST sign_mask = (LONGEST) 1 << 63;
1564
1565 return ((reg & sign_mask) != 0);
1566}
1567
1568/* alpha_software_single_step() is called just before we want to resume
1569 the inferior, if we want to single-step it but there is no hardware
1570 or kernel single-step support (NetBSD on Alpha, for example). We find
1571 the target of the coming instruction and breakpoint it. */
1572
1573static CORE_ADDR
1574alpha_next_pc (struct regcache *regcache, CORE_ADDR pc)
1575{
1576 struct gdbarch *gdbarch = regcache->arch ();
1577 unsigned int insn;
1578 unsigned int op;
1579 int regno;
1580 int offset;
1581 LONGEST rav;
1582
1583 insn = alpha_read_insn (gdbarch, pc);
1584
1585 /* Opcode is top 6 bits. */
1586 op = (insn >> 26) & 0x3f;
1587
1588 if (op == 0x1a)
1589 {
1590 /* Jump format: target PC is:
1591 RB & ~3 */
1592 return (regcache_raw_get_unsigned (regcache, (insn >> 16) & 0x1f) & ~3);
1593 }
1594
1595 if ((op & 0x30) == 0x30)
1596 {
1597 /* Branch format: target PC is:
1598 (new PC) + (4 * sext(displacement)) */
1599 if (op == 0x30 /* BR */
1600 || op == 0x34) /* BSR */
1601 {
1602 branch_taken:
1603 offset = (insn & 0x001fffff);
1604 if (offset & 0x00100000)
1605 offset |= 0xffe00000;
1606 offset *= ALPHA_INSN_SIZE;
1607 return (pc + ALPHA_INSN_SIZE + offset);
1608 }
1609
1610 /* Need to determine if branch is taken; read RA. */
1611 regno = (insn >> 21) & 0x1f;
1612 switch (op)
1613 {
1614 case 0x31: /* FBEQ */
1615 case 0x36: /* FBGE */
1616 case 0x37: /* FBGT */
1617 case 0x33: /* FBLE */
1618 case 0x32: /* FBLT */
1619 case 0x35: /* FBNE */
1620 regno += gdbarch_fp0_regnum (gdbarch);
1621 }
1622
1623 rav = regcache_raw_get_signed (regcache, regno);
1624
1625 switch (op)
1626 {
1627 case 0x38: /* BLBC */
1628 if ((rav & 1) == 0)
1629 goto branch_taken;
1630 break;
1631 case 0x3c: /* BLBS */
1632 if (rav & 1)
1633 goto branch_taken;
1634 break;
1635 case 0x39: /* BEQ */
1636 if (rav == 0)
1637 goto branch_taken;
1638 break;
1639 case 0x3d: /* BNE */
1640 if (rav != 0)
1641 goto branch_taken;
1642 break;
1643 case 0x3a: /* BLT */
1644 if (rav < 0)
1645 goto branch_taken;
1646 break;
1647 case 0x3b: /* BLE */
1648 if (rav <= 0)
1649 goto branch_taken;
1650 break;
1651 case 0x3f: /* BGT */
1652 if (rav > 0)
1653 goto branch_taken;
1654 break;
1655 case 0x3e: /* BGE */
1656 if (rav >= 0)
1657 goto branch_taken;
1658 break;
1659
1660 /* Floating point branches. */
1661
1662 case 0x31: /* FBEQ */
1663 if (fp_register_zero_p (rav))
1664 goto branch_taken;
1665 break;
1666 case 0x36: /* FBGE */
1667 if (fp_register_sign_bit (rav) == 0 || fp_register_zero_p (rav))
1668 goto branch_taken;
1669 break;
1670 case 0x37: /* FBGT */
1671 if (fp_register_sign_bit (rav) == 0 && ! fp_register_zero_p (rav))
1672 goto branch_taken;
1673 break;
1674 case 0x33: /* FBLE */
1675 if (fp_register_sign_bit (rav) == 1 || fp_register_zero_p (rav))
1676 goto branch_taken;
1677 break;
1678 case 0x32: /* FBLT */
1679 if (fp_register_sign_bit (rav) == 1 && ! fp_register_zero_p (rav))
1680 goto branch_taken;
1681 break;
1682 case 0x35: /* FBNE */
1683 if (! fp_register_zero_p (rav))
1684 goto branch_taken;
1685 break;
1686 }
1687 }
1688
1689 /* Not a branch or branch not taken; target PC is:
1690 pc + 4 */
1691 return (pc + ALPHA_INSN_SIZE);
1692}
1693
1694std::vector<CORE_ADDR>
1696{
1697 struct gdbarch *gdbarch = regcache->arch ();
1698
1699 CORE_ADDR pc = regcache_read_pc (regcache);
1700
1701 std::vector<CORE_ADDR> next_pcs
1703 if (!next_pcs.empty ())
1704 return next_pcs;
1705
1706 CORE_ADDR next_pc = alpha_next_pc (regcache, pc);
1707 return {next_pc};
1708}
1709
1710
1711/* Initialize the current architecture based on INFO. If possible, re-use an
1712 architecture from ARCHES, which is a list of architectures already created
1713 during this debugging session.
1714
1715 Called e.g. at program startup, when reading a core file, and when reading
1716 a binary file. */
1717
1718static struct gdbarch *
1720{
1721 /* Find a candidate among extant architectures. */
1723 if (arches != NULL)
1724 return arches->gdbarch;
1725
1728 alpha_gdbarch_tdep *tdep = gdbarch_tdep<alpha_gdbarch_tdep> (gdbarch);
1729
1730 /* Lowest text address. This is used by heuristic_proc_start()
1731 to decide when to stop looking. */
1732 tdep->vm_min_address = (CORE_ADDR) 0x120000000LL;
1733
1734 tdep->dynamic_sigtramp_offset = NULL;
1735 tdep->sigcontext_addr = NULL;
1736 tdep->sc_pc_offset = 2 * 8;
1737 tdep->sc_regs_offset = 4 * 8;
1738 tdep->sc_fpregs_offset = tdep->sc_regs_offset + 32 * 8 + 8;
1739
1740 tdep->jb_pc = -1; /* longjmp support not enabled by default. */
1741
1743
1744 /* Type sizes */
1755
1756 /* Register info */
1761
1764
1767
1771
1773
1774 /* Prologue heuristics. */
1776
1777 /* Call info. */
1778
1780
1781 /* Settings for calling functions in the inferior. */
1783
1786
1788 alpha_breakpoint::kind_from_pc);
1790 alpha_breakpoint::bp_from_kind);
1793
1794 /* Handles single stepping of atomic sequences. */
1796
1797 /* Hook in ABI-specific overrides, if they have been registered. */
1799
1800 /* Now that we have tuned the configuration, set a few final things
1801 based on what the OS ABI has told us. */
1802
1803 if (tdep->jb_pc >= 0)
1805
1808
1810
1811 return gdbarch;
1812}
1813
1814void
1820
1822void
1824{
1825
1826 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
1827
1828 /* Let the user set the fence post for heuristic_proc_start. */
1829
1830 /* We really would like to have both "0" and "unlimited" work, but
1831 command.c doesn't deal with that. So make it a var_zinteger
1832 because the user can always use "999999" or some such for unlimited. */
1833 /* We need to throw away the frame cache when we set this, since it
1834 might change our ability to get backtraces. */
1835 add_setshow_zinteger_cmd ("heuristic-fence-post", class_support,
1837Set the distance searched for the start of a function."), _("\
1838Show the distance searched for the start of a function."), _("\
1839If you are debugging a stripped executable, GDB needs to search through the\n\
1840program for the start of a function. This command sets the distance of the\n\
1841search. The only need to set it is when debugging a stripped executable."),
1843 NULL, /* FIXME: i18n: The distance searched for
1844 the start of a function is \"%d\". */
1845 &setlist, &showlist);
1846}
int regnum
const char *const name
int code
Definition ada-lex.l:670
gdb_static_assert(sizeof(splay_tree_key) >=sizeof(CORE_ADDR *))
unsigned int alpha_read_insn(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition alpha-tdep.c:670
static int alpha_sigtramp_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
Definition alpha-tdep.c:980
static int alpha_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *group)
Definition alpha-tdep.c:137
#define OPR_LIT(insn)
Definition alpha-tdep.c:72
void alpha_supply_int_regs(struct regcache *regcache, int regno, const void *r0_r30, const void *pc, const void *unique)
void alpha_supply_fp_regs(struct regcache *regcache, int regno, const void *f0_f30, const void *fpcr)
#define OPR_RC(insn)
Definition alpha-tdep.c:71
static const int bne_opcode
Definition alpha-tdep.c:65
static struct value * alpha_sigtramp_frame_prev_register(frame_info_ptr this_frame, void **this_prologue_cache, int regnum)
Definition alpha-tdep.c:956
static CORE_ADDR alpha_heuristic_proc_start(struct gdbarch *gdbarch, CORE_ADDR pc)
void alpha_dwarf2_init_abi(struct gdbarch_info info, struct gdbarch *gdbarch)
static void alpha_sts(struct gdbarch *gdbarch, void *out, const void *in)
Definition alpha-tdep.c:211
static const struct frame_base alpha_heuristic_frame_base
static const int ldl_l_opcode
Definition alpha-tdep.c:750
static struct alpha_heuristic_unwind_cache * alpha_heuristic_frame_unwind_cache(frame_info_ptr this_frame, void **this_prologue_cache, CORE_ADDR start_pc)
static struct value * alpha_heuristic_frame_prev_register(frame_info_ptr this_frame, void **this_prologue_cache, int regnum)
void alpha_fill_fp_regs(const struct regcache *regcache, int regno, void *f0_f30, void *fpcr)
static void alpha_value_to_register(frame_info_ptr frame, int regnum, struct type *valtype, const gdb_byte *in)
Definition alpha-tdep.c:263
static void alpha_heuristic_frame_this_id(frame_info_ptr this_frame, void **this_prologue_cache, struct frame_id *this_id)
static const int lda_opcode
Definition alpha-tdep.c:58
static int alpha_convert_register_p(struct gdbarch *gdbarch, int regno, struct type *type)
Definition alpha-tdep.c:228
#define OPR_RA(insn)
Definition alpha-tdep.c:70
constexpr gdb_byte alpha_break_insn[]
Definition alpha-tdep.c:641
#define OPR_FUNCTION(insn)
Definition alpha-tdep.c:68
static CORE_ADDR alpha_skip_prologue(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition alpha-tdep.c:690
static CORE_ADDR alpha_heuristic_frame_base_address(frame_info_ptr this_frame, void **this_prologue_cache)
static const int stq_opcode
Definition alpha-tdep.c:59
static struct type * alpha_register_type(struct gdbarch *gdbarch, int regno)
Definition alpha-tdep.c:119
static void alpha_extract_return_value(struct type *valtype, struct regcache *regcache, gdb_byte *valbuf)
Definition alpha-tdep.c:468
static CORE_ADDR alpha_next_pc(struct regcache *regcache, CORE_ADDR pc)
#define MEM_DISP(insn)
Definition alpha-tdep.c:55
static int fp_register_zero_p(LONGEST reg)
#define INSN_OPCODE(insn)
Definition alpha-tdep.c:50
static void alpha_sigtramp_frame_this_id(frame_info_ptr this_frame, void **this_prologue_cache, struct frame_id *this_id)
Definition alpha-tdep.c:914
void alpha_fill_int_regs(const struct regcache *regcache, int regno, void *r0_r30, void *pc, void *unique)
static const char * alpha_register_name(struct gdbarch *gdbarch, int regno)
Definition alpha-tdep.c:86
static CORE_ADDR alpha_sigtramp_register_address(struct gdbarch *gdbarch, CORE_ADDR sigcontext_addr, int regnum)
Definition alpha-tdep.c:895
void _initialize_alpha_tdep()
static const struct frame_unwind alpha_sigtramp_frame_unwind
#define MEM_RB(insn)
Definition alpha-tdep.c:54
static int alpha_get_longjmp_target(frame_info_ptr frame, CORE_ADDR *pc)
Definition alpha-tdep.c:842
static const int ldq_l_opcode
Definition alpha-tdep.c:751
static void alpha_store_return_value(struct type *valtype, struct regcache *regcache, const gdb_byte *valbuf)
Definition alpha-tdep.c:535
std::vector< CORE_ADDR > alpha_software_single_step(struct regcache *regcache)
static CORE_ADDR alpha_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
Definition alpha-tdep.c:290
static const int subq_function
Definition alpha-tdep.c:75
static int alpha_return_in_memory_always(struct type *type)
Definition alpha-tdep.c:635
static int fp_register_sign_bit(LONGEST reg)
static struct alpha_sigtramp_unwind_cache * alpha_sigtramp_frame_unwind_cache(frame_info_ptr this_frame, void **this_prologue_cache)
Definition alpha-tdep.c:873
static int alpha_register_to_value(frame_info_ptr frame, int regnum, struct type *valtype, gdb_byte *out, int *optimizedp, int *unavailablep)
Definition alpha-tdep.c:236
#define MEM_RA(insn)
Definition alpha-tdep.c:53
static const int stl_c_opcode
Definition alpha-tdep.c:752
static const int br_opcode
Definition alpha-tdep.c:64
#define OPR_HAS_IMMEDIATE(insn)
Definition alpha-tdep.c:69
static int heuristic_fence_post
static int alpha_cannot_store_register(struct gdbarch *gdbarch, int regno)
Definition alpha-tdep.c:112
static const int stq_c_opcode
Definition alpha-tdep.c:753
static const int subq_opcode
Definition alpha-tdep.c:74
static void reinit_frame_cache_sfunc(const char *args, int from_tty, struct cmd_list_element *c)
static int alpha_cannot_fetch_register(struct gdbarch *gdbarch, int regno)
Definition alpha-tdep.c:106
static void alpha_lds(struct gdbarch *gdbarch, void *out, const void *in)
Definition alpha-tdep.c:180
static const struct frame_unwind alpha_heuristic_frame_unwind
static std::vector< CORE_ADDR > alpha_deal_with_atomic_sequence(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition alpha-tdep.c:761
static enum return_value_convention alpha_return_value(struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
Definition alpha-tdep.c:604
static void alpha_heuristic_analyze_probing_loop(struct gdbarch *gdbarch, CORE_ADDR *pc, int *frame_size)
static struct gdbarch * alpha_gdbarch_init(struct gdbarch_info info, struct gdbarch_list *arches)
#define ALPHA_PC_REGNUM
Definition alpha-tdep.h:52
#define ALPHA_UNIQUE_REGNUM
Definition alpha-tdep.h:53
#define ALPHA_FPA0_REGNUM
Definition alpha-tdep.h:50
#define ALPHA_REGISTER_SIZE
Definition alpha-tdep.h:29
#define ALPHA_SP_REGNUM
Definition alpha-tdep.h:47
#define ALPHA_A0_REGNUM
Definition alpha-tdep.h:42
#define ALPHA_GP_REGNUM
Definition alpha-tdep.h:46
#define ALPHA_V0_REGNUM
Definition alpha-tdep.h:38
#define ALPHA_NUM_REGS
Definition alpha-tdep.h:32
#define ALPHA_FP0_REGNUM
Definition alpha-tdep.h:49
#define ALPHA_INSN_SIZE
Definition alpha-tdep.h:56
#define ALPHA_T9_REGNUM
Definition alpha-tdep.h:43
#define ALPHA_T12_REGNUM
Definition alpha-tdep.h:45
#define ALPHA_NUM_ARG_REGS
Definition alpha-tdep.h:70
CORE_ADDR alpha_after_prologue(CORE_ADDR pc)
#define ALPHA_T7_REGNUM
Definition alpha-tdep.h:39
#define ALPHA_RA_REGNUM
Definition alpha-tdep.h:44
#define ALPHA_FPCR_REGNUM
Definition alpha-tdep.h:51
#define ALPHA_GCC_FP_REGNUM
Definition alpha-tdep.h:41
#define ALPHA_ZERO_REGNUM
Definition alpha-tdep.h:48
void gdbarch_register(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init, gdbarch_dump_tdep_ftype *dump_tdep, gdbarch_supports_arch_info_ftype *supports_arch_info)
static std::vector< const char * > arches
Definition arch-utils.c:685
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
Definition arch-utils.c:177
struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
#define BP_MANIPULATION(BREAK_INSN)
Definition arch-utils.h:70
bool find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr, const struct block **block)
Definition blockframe.c:373
CORE_ADDR get_pc_function_start(CORE_ADDR pc)
Definition blockframe.c:86
enum register_status cooked_read(int regnum, gdb_byte *buf)
Definition regcache.c:698
gdbarch * arch() const
Definition regcache.c:231
void raw_collect(int regnum, void *buf) const override
Definition regcache.c:1127
void raw_supply(int regnum, const void *buf) override
Definition regcache.c:1062
void cooked_write(int regnum, const gdb_byte *buf)
Definition regcache.c:870
struct cmd_list_element * showlist
Definition cli-cmds.c:127
struct cmd_list_element * setlist
Definition cli-cmds.c:119
set_show_commands add_setshow_zinteger_cmd(const char *name, enum command_class theclass, int *var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
@ class_support
Definition command.h:58
void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
Definition corefile.c:347
void read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition corefile.c:238
void memory_error(enum target_xfer_status err, CORE_ADDR memaddr)
Definition corefile.c:186
static void store_unsigned_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, ULONGEST val)
Definition defs.h:515
static ULONGEST extract_unsigned_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
Definition defs.h:480
return_value_convention
Definition defs.h:257
@ RETURN_VALUE_ABI_RETURNS_ADDRESS
Definition defs.h:273
@ RETURN_VALUE_REGISTER_CONVENTION
Definition defs.h:260
void dwarf2_append_unwinders(struct gdbarch *gdbarch)
Definition frame.c:1369
const struct frame_base * dwarf2_frame_base_sniffer(frame_info_ptr this_frame)
Definition frame.c:1400
void frame_base_append_sniffer(struct gdbarch *gdbarch, frame_base_sniffer_ftype *sniffer)
Definition frame-base.c:81
void frame_base_set_default(struct gdbarch *gdbarch, const struct frame_base *default_base)
Definition frame-base.c:93
int default_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
struct value * frame_unwind_got_memory(frame_info_ptr frame, int regnum, CORE_ADDR addr)
struct value * frame_unwind_got_register(frame_info_ptr frame, int regnum, int new_regnum)
enum unwind_stop_reason default_frame_unwind_stop_reason(frame_info_ptr this_frame, void **this_cache)
void frame_unwind_append_unwinder(struct gdbarch *gdbarch, const struct frame_unwind *unwinder)
struct value * get_frame_register_value(frame_info_ptr frame, int regnum)
Definition frame.c:1333
ULONGEST get_frame_register_unsigned(frame_info_ptr frame, int regnum)
Definition frame.c:1399
CORE_ADDR get_frame_pc(frame_info_ptr frame)
Definition frame.c:2712
void reinit_frame_cache(void)
Definition frame.c:2107
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
Definition frame.c:736
struct gdbarch * get_frame_arch(frame_info_ptr this_frame)
Definition frame.c:3027
ULONGEST get_frame_memory_unsigned(frame_info_ptr this_frame, CORE_ADDR addr, int len)
Definition frame.c:3007
CORE_ADDR get_frame_func(frame_info_ptr this_frame)
Definition frame.c:1098
void put_frame_register(frame_info_ptr frame, int regnum, const gdb_byte *buf)
Definition frame.c:1426
@ SIGTRAMP_FRAME
Definition frame.h:198
@ NORMAL_FRAME
Definition frame.h:187
#define FRAME_OBSTACK_ZALLOC(TYPE)
Definition frame.h:825
void set_gdbarch_long_long_bit(struct gdbarch *gdbarch, int long_long_bit)
Definition gdbarch.c:1493
void set_gdbarch_register_to_value(struct gdbarch *gdbarch, gdbarch_register_to_value_ftype *register_to_value)
enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
Definition gdbarch.c:1396
void set_gdbarch_value_to_register(struct gdbarch *gdbarch, gdbarch_value_to_register_ftype *value_to_register)
void set_gdbarch_breakpoint_kind_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_kind_from_pc_ftype *breakpoint_kind_from_pc)
const char * gdbarch_register_name(struct gdbarch *gdbarch, int regnr)
Definition gdbarch.c:2173
void set_gdbarch_software_single_step(struct gdbarch *gdbarch, gdbarch_software_single_step_ftype *software_single_step)
void set_gdbarch_get_longjmp_target(struct gdbarch *gdbarch, gdbarch_get_longjmp_target_ftype *get_longjmp_target)
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype *skip_prologue)
void set_gdbarch_wchar_bit(struct gdbarch *gdbarch, int wchar_bit)
Definition gdbarch.c:1680
void set_gdbarch_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype *register_name)
void set_gdbarch_int_bit(struct gdbarch *gdbarch, int int_bit)
Definition gdbarch.c:1459
void set_gdbarch_skip_trampoline_code(struct gdbarch *gdbarch, gdbarch_skip_trampoline_code_ftype *skip_trampoline_code)
void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype *return_value)
void set_gdbarch_decr_pc_after_break(struct gdbarch *gdbarch, CORE_ADDR decr_pc_after_break)
Definition gdbarch.c:2913
void set_gdbarch_wchar_signed(struct gdbarch *gdbarch, int wchar_signed)
Definition gdbarch.c:1698
void set_gdbarch_fp0_regnum(struct gdbarch *gdbarch, int fp0_regnum)
Definition gdbarch.c:2098
void set_gdbarch_double_bit(struct gdbarch *gdbarch, int double_bit)
Definition gdbarch.c:1612
void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype *inner_than)
void set_gdbarch_cannot_step_breakpoint(struct gdbarch *gdbarch, int cannot_step_breakpoint)
Definition gdbarch.c:3557
void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
Definition gdbarch.c:2047
void set_gdbarch_register_reggroup_p(struct gdbarch *gdbarch, gdbarch_register_reggroup_p_ftype *register_reggroup_p)
void set_gdbarch_pc_regnum(struct gdbarch *gdbarch, int pc_regnum)
Definition gdbarch.c:2064
void set_gdbarch_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype *register_type)
void set_gdbarch_float_bit(struct gdbarch *gdbarch, int float_bit)
Definition gdbarch.c:1578
void set_gdbarch_short_bit(struct gdbarch *gdbarch, int short_bit)
Definition gdbarch.c:1442
void set_gdbarch_long_bit(struct gdbarch *gdbarch, int long_bit)
Definition gdbarch.c:1476
void set_gdbarch_ptr_bit(struct gdbarch *gdbarch, int ptr_bit)
Definition gdbarch.c:1732
void set_gdbarch_convert_register_p(struct gdbarch *gdbarch, gdbarch_convert_register_p_ftype *convert_register_p)
int gdbarch_fp0_regnum(struct gdbarch *gdbarch)
Definition gdbarch.c:2088
void set_gdbarch_cannot_store_register(struct gdbarch *gdbarch, gdbarch_cannot_store_register_ftype *cannot_store_register)
void set_gdbarch_cannot_fetch_register(struct gdbarch *gdbarch, gdbarch_cannot_fetch_register_ftype *cannot_fetch_register)
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
Definition gdbarch.c:1941
void set_gdbarch_long_double_bit(struct gdbarch *gdbarch, int long_double_bit)
Definition gdbarch.c:1646
void set_gdbarch_sw_breakpoint_from_kind(struct gdbarch *gdbarch, gdbarch_sw_breakpoint_from_kind_ftype *sw_breakpoint_from_kind)
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype *push_dummy_call)
struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, gdbarch_tdep_up tdep)
Definition gdbarch.c:266
std::unique_ptr< gdbarch_tdep_base > gdbarch_tdep_up
Definition gdbarch.h:73
function_call_return_method
Definition gdbarch.h:114
@ return_method_struct
Definition gdbarch.h:126
struct type * lookup_pointer_type(struct type *type)
Definition gdbtypes.c:430
const struct builtin_type * builtin_type(struct gdbarch *gdbarch)
Definition gdbtypes.c:6168
struct type * check_typedef(struct type *type)
Definition gdbtypes.c:2966
type_code
Definition gdbtypes.h:82
CORE_ADDR find_function_addr(struct value *function, struct type **retval_type, struct type **function_type)
Definition infcall.c:278
struct inferior * current_inferior(void)
Definition inferior.c:55
@ NO_STOP_QUIETLY
Definition inferior.h:294
CORE_ADDR find_solib_trampoline_target(frame_info_ptr frame, CORE_ADDR pc)
Definition minsyms.c:1554
info(Component c)
Definition gdbarch.py:41
void gdbarch_init_osabi(struct gdbarch_info info, struct gdbarch *gdbarch)
Definition osabi.c:382
CORE_ADDR regcache_read_pc(struct regcache *regcache)
Definition regcache.c:1333
enum register_status regcache_raw_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
Definition regcache.c:649
int register_size(struct gdbarch *gdbarch, int regnum)
Definition regcache.c:170
void regcache_cooked_write_signed(struct regcache *regcache, int regnum, LONGEST val)
Definition regcache.c:804
enum register_status regcache_cooked_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
Definition regcache.c:796
LONGEST regcache_raw_get_signed(struct regcache *regcache, int regnum)
Definition regcache.c:685
void regcache_cooked_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
Definition regcache.c:825
const reggroup *const general_reggroup
Definition reggroups.c:251
const reggroup *const system_reggroup
Definition reggroups.c:253
const reggroup *const float_reggroup
Definition reggroups.c:252
const reggroup *const save_reggroup
Definition reggroups.c:256
const reggroup *const all_reggroup
Definition reggroups.c:255
const reggroup *const restore_reggroup
Definition reggroups.c:257
void(* func)(remote_target *remote, char *)
CORE_ADDR(* sigcontext_addr)(frame_info_ptr)
Definition alpha-tdep.h:84
int(* pc_in_sigtramp)(struct gdbarch *gdbarch, CORE_ADDR pc, const char *name)
Definition alpha-tdep.h:90
LONGEST(* dynamic_sigtramp_offset)(struct gdbarch *, CORE_ADDR)
Definition alpha-tdep.h:80
int(* return_in_memory)(struct type *type)
Definition alpha-tdep.h:94
CORE_ADDR vm_min_address
Definition alpha-tdep.h:75
trad_frame_saved_reg * saved_regs
struct type * builtin_double
Definition gdbtypes.h:2090
struct type * builtin_func_ptr
Definition gdbtypes.h:2146
struct type * builtin_data_ptr
Definition gdbtypes.h:2135
struct type * builtin_int64
Definition gdbtypes.h:2121
struct type * builtin_int32
Definition gdbtypes.h:2119
Definition gnu-nat.c:153
CORE_ADDR pc
Definition symtab.h:2337
CORE_ADDR end
Definition symtab.h:2338
type_code code() const
Definition gdbtypes.h:956
ULONGEST length() const
Definition gdbtypes.h:983
Definition value.h:130
gdb::array_view< const gdb_byte > contents_all()
Definition value.c:1119
gdb::array_view< const gdb_byte > contents()
Definition value.c:1262
bool entirely_available()
Definition value.c:209
struct type * type() const
Definition value.h:180
bool optimized_out()
Definition value.c:1279
struct symtab_and_line find_pc_line(CORE_ADDR pc, int notcurrent)
Definition symtab.c:3295
int target_read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition target.c:1785
@ TARGET_XFER_E_IO
Definition target.h:232
trad_frame_saved_reg * trad_frame_alloc_saved_regs(struct gdbarch *gdbarch)
Definition trad-frame.c:62
struct value * trad_frame_get_prev_register(frame_info_ptr this_frame, trad_frame_saved_reg this_saved_regs[], int regnum)
Definition trad-frame.c:187
const char * paddress(struct gdbarch *gdbarch, CORE_ADDR addr)
Definition utils.c:3166
void gdb_printf(struct ui_file *stream, const char *format,...)
Definition utils.c:1886
struct value * value_cast(struct type *type, struct value *arg2)
Definition valops.c:403
struct value * value_from_pointer(struct type *type, CORE_ADDR addr)
Definition value.c:3500
value_ref_ptr release_value(struct value *val)
Definition value.c:1450
LONGEST unpack_long(struct type *type, const gdb_byte *valaddr)
Definition value.c:2753