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arm-linux-nat.c
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1/* GNU/Linux on ARM native support.
2 Copyright (C) 1999-2023 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
18
19#include "defs.h"
20#include "inferior.h"
21#include "gdbcore.h"
22#include "regcache.h"
23#include "target.h"
24#include "linux-nat.h"
25#include "target-descriptions.h"
26#include "auxv.h"
27#include "observable.h"
28#include "gdbthread.h"
29
30#include "aarch32-tdep.h"
31#include "arm-tdep.h"
32#include "arm-linux-tdep.h"
33#include "aarch32-linux-nat.h"
34
35#include <elf/common.h>
36#include <sys/user.h>
37#include "nat/gdb_ptrace.h"
38#include <sys/utsname.h>
39#include <sys/procfs.h>
40
41#include "nat/linux-ptrace.h"
42#include "linux-tdep.h"
43
44/* Prototypes for supply_gregset etc. */
45#include "gregset.h"
46
47/* Defines ps_err_e, struct ps_prochandle. */
48#include "gdb_proc_service.h"
49
50#ifndef PTRACE_GET_THREAD_AREA
51#define PTRACE_GET_THREAD_AREA 22
52#endif
53
54#ifndef PTRACE_GETWMMXREGS
55#define PTRACE_GETWMMXREGS 18
56#define PTRACE_SETWMMXREGS 19
57#endif
58
59#ifndef PTRACE_GETVFPREGS
60#define PTRACE_GETVFPREGS 27
61#define PTRACE_SETVFPREGS 28
62#endif
63
64#ifndef PTRACE_GETHBPREGS
65#define PTRACE_GETHBPREGS 29
66#define PTRACE_SETHBPREGS 30
67#endif
68
70{
71public:
72 /* Add our register access methods. */
73 void fetch_registers (struct regcache *, int) override;
74 void store_registers (struct regcache *, int) override;
75
76 /* Add our hardware breakpoint and watchpoint implementation. */
77 int can_use_hw_breakpoint (enum bptype, int, int) override;
78
79 int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
80
81 int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
82
83 int region_ok_for_hw_watchpoint (CORE_ADDR, int) override;
84
85 int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
86 struct expression *) override;
87
88 int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
89 struct expression *) override;
90 bool stopped_by_watchpoint () override;
91
92 bool stopped_data_address (CORE_ADDR *) override;
93
94 bool watchpoint_addr_within_range (CORE_ADDR, CORE_ADDR, int) override;
95
96 const struct target_desc *read_description () override;
97
98 /* Override linux_nat_target low methods. */
99
100 /* Handle thread creation and exit. */
101 void low_new_thread (struct lwp_info *lp) override;
102 void low_delete_thread (struct arch_lwp_info *lp) override;
103 void low_prepare_to_resume (struct lwp_info *lp) override;
104
105 /* Handle process creation and exit. */
106 void low_new_fork (struct lwp_info *parent, pid_t child_pid) override;
107 void low_forget_process (pid_t pid) override;
108};
109
111
112/* Get the whole floating point state of the process and store it
113 into regcache. */
114
115static void
117{
118 int ret, regno, tid;
119 gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
120
121 /* Get the thread id for the ptrace call. */
122 tid = regcache->ptid ().lwp ();
123
124 /* Read the floating point state. */
125 if (have_ptrace_getregset == TRIBOOL_TRUE)
126 {
127 struct iovec iov;
128
129 iov.iov_base = &fp;
130 iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
131
132 ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
133 }
134 else
135 ret = ptrace (PT_GETFPREGS, tid, 0, fp);
136
137 if (ret < 0)
138 perror_with_name (_("Unable to fetch the floating point registers"));
139
140 /* Fetch fpsr. */
142
143 /* Fetch the floating point registers. */
144 for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
145 supply_nwfpe_register (regcache, regno, fp);
146}
147
148/* Save the whole floating point state of the process using
149 the contents from regcache. */
150
151static void
153{
154 int ret, regno, tid;
155 gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
156
157 /* Get the thread id for the ptrace call. */
158 tid = regcache->ptid ().lwp ();
159
160 /* Read the floating point state. */
161 if (have_ptrace_getregset == TRIBOOL_TRUE)
162 {
163 elf_fpregset_t fpregs;
164 struct iovec iov;
165
166 iov.iov_base = &fpregs;
167 iov.iov_len = sizeof (fpregs);
168
169 ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
170 }
171 else
172 ret = ptrace (PT_GETFPREGS, tid, 0, fp);
173
174 if (ret < 0)
175 perror_with_name (_("Unable to fetch the floating point registers"));
176
177 /* Store fpsr. */
178 if (REG_VALID == regcache->get_register_status (ARM_FPS_REGNUM))
180
181 /* Store the floating point registers. */
182 for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
183 if (REG_VALID == regcache->get_register_status (regno))
184 collect_nwfpe_register (regcache, regno, fp);
185
186 if (have_ptrace_getregset == TRIBOOL_TRUE)
187 {
188 struct iovec iov;
189
190 iov.iov_base = &fp;
191 iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
192
193 ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iov);
194 }
195 else
196 ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
197
198 if (ret < 0)
199 perror_with_name (_("Unable to store floating point registers"));
200}
201
202/* Fetch all general registers of the process and store into
203 regcache. */
204
205static void
207{
208 int ret, tid;
209 elf_gregset_t regs;
210
211 /* Get the thread id for the ptrace call. */
212 tid = regcache->ptid ().lwp ();
213
214 if (have_ptrace_getregset == TRIBOOL_TRUE)
215 {
216 struct iovec iov;
217
218 iov.iov_base = &regs;
219 iov.iov_len = sizeof (regs);
220
221 ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
222 }
223 else
224 ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
225
226 if (ret < 0)
227 perror_with_name (_("Unable to fetch general registers"));
228
229 aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, arm_apcs_32);
230}
231
232static void
234{
235 int ret, tid;
236 elf_gregset_t regs;
237
238 /* Get the thread id for the ptrace call. */
239 tid = regcache->ptid ().lwp ();
240
241 /* Fetch the general registers. */
242 if (have_ptrace_getregset == TRIBOOL_TRUE)
243 {
244 struct iovec iov;
245
246 iov.iov_base = &regs;
247 iov.iov_len = sizeof (regs);
248
249 ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
250 }
251 else
252 ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
253
254 if (ret < 0)
255 perror_with_name (_("Unable to fetch general registers"));
256
258
259 if (have_ptrace_getregset == TRIBOOL_TRUE)
260 {
261 struct iovec iov;
262
263 iov.iov_base = &regs;
264 iov.iov_len = sizeof (regs);
265
266 ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iov);
267 }
268 else
269 ret = ptrace (PTRACE_SETREGS, tid, 0, &regs);
270
271 if (ret < 0)
272 perror_with_name (_("Unable to store general registers"));
273}
274
275/* Fetch all WMMX registers of the process and store into
276 regcache. */
277
278static void
280{
281 char regbuf[IWMMXT_REGS_SIZE];
282 int ret, regno, tid;
283
284 /* Get the thread id for the ptrace call. */
285 tid = regcache->ptid ().lwp ();
286
287 ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
288 if (ret < 0)
289 perror_with_name (_("Unable to fetch WMMX registers"));
290
291 for (regno = 0; regno < 16; regno++)
292 regcache->raw_supply (regno + ARM_WR0_REGNUM, &regbuf[regno * 8]);
293
294 for (regno = 0; regno < 2; regno++)
296 &regbuf[16 * 8 + regno * 4]);
297
298 for (regno = 0; regno < 4; regno++)
300 &regbuf[16 * 8 + 2 * 4 + regno * 4]);
301}
302
303static void
305{
306 char regbuf[IWMMXT_REGS_SIZE];
307 int ret, regno, tid;
308
309 /* Get the thread id for the ptrace call. */
310 tid = regcache->ptid ().lwp ();
311
312 ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
313 if (ret < 0)
314 perror_with_name (_("Unable to fetch WMMX registers"));
315
316 for (regno = 0; regno < 16; regno++)
317 if (REG_VALID == regcache->get_register_status (regno + ARM_WR0_REGNUM))
318 regcache->raw_collect (regno + ARM_WR0_REGNUM, &regbuf[regno * 8]);
319
320 for (regno = 0; regno < 2; regno++)
321 if (REG_VALID == regcache->get_register_status (regno + ARM_WCSSF_REGNUM))
323 &regbuf[16 * 8 + regno * 4]);
324
325 for (regno = 0; regno < 4; regno++)
326 if (REG_VALID == regcache->get_register_status (regno + ARM_WCGR0_REGNUM))
328 &regbuf[16 * 8 + 2 * 4 + regno * 4]);
329
330 ret = ptrace (PTRACE_SETWMMXREGS, tid, 0, regbuf);
331
332 if (ret < 0)
333 perror_with_name (_("Unable to store WMMX registers"));
334}
335
336static void
338{
339 gdb_byte regbuf[ARM_VFP3_REGS_SIZE];
340 int ret, tid;
341 struct gdbarch *gdbarch = regcache->arch ();
342 arm_gdbarch_tdep *tdep = gdbarch_tdep<arm_gdbarch_tdep> (gdbarch);
343
344 /* Get the thread id for the ptrace call. */
345 tid = regcache->ptid ().lwp ();
346
347 if (have_ptrace_getregset == TRIBOOL_TRUE)
348 {
349 struct iovec iov;
350
351 iov.iov_base = regbuf;
352 iov.iov_len = ARM_VFP3_REGS_SIZE;
353 ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
354 }
355 else
356 ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
357
358 if (ret < 0)
359 perror_with_name (_("Unable to fetch VFP registers"));
360
362 tdep->vfp_register_count);
363}
364
365static void
367{
368 gdb_byte regbuf[ARM_VFP3_REGS_SIZE];
369 int ret, tid;
370 struct gdbarch *gdbarch = regcache->arch ();
371 arm_gdbarch_tdep *tdep = gdbarch_tdep<arm_gdbarch_tdep> (gdbarch);
372
373 /* Get the thread id for the ptrace call. */
374 tid = regcache->ptid ().lwp ();
375
376 if (have_ptrace_getregset == TRIBOOL_TRUE)
377 {
378 struct iovec iov;
379
380 iov.iov_base = regbuf;
381 iov.iov_len = ARM_VFP3_REGS_SIZE;
382 ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
383 }
384 else
385 ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
386
387 if (ret < 0)
388 perror_with_name (_("Unable to fetch VFP registers (for update)"));
389
391 tdep->vfp_register_count);
392
393 if (have_ptrace_getregset == TRIBOOL_TRUE)
394 {
395 struct iovec iov;
396
397 iov.iov_base = regbuf;
398 iov.iov_len = ARM_VFP3_REGS_SIZE;
399 ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iov);
400 }
401 else
402 ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
403
404 if (ret < 0)
405 perror_with_name (_("Unable to store VFP registers"));
406}
407
408/* Fetch registers from the child process. Fetch all registers if
409 regno == -1, otherwise fetch all general registers or all floating
410 point registers depending upon the value of regno. */
411
412void
414{
415 struct gdbarch *gdbarch = regcache->arch ();
416 arm_gdbarch_tdep *tdep = gdbarch_tdep<arm_gdbarch_tdep> (gdbarch);
417
418 if (-1 == regno)
419 {
421 if (tdep->have_wmmx_registers)
423 if (tdep->vfp_register_count > 0)
425 if (tdep->have_fpa_registers)
427 }
428 else
429 {
430 if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
432 else if (regno >= ARM_F0_REGNUM && regno <= ARM_FPS_REGNUM)
434 else if (tdep->have_wmmx_registers
435 && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
437 else if (tdep->vfp_register_count > 0
438 && regno >= ARM_D0_REGNUM
439 && (regno < ARM_D0_REGNUM + tdep->vfp_register_count
440 || regno == ARM_FPSCR_REGNUM))
442 }
443}
444
445/* Store registers back into the inferior. Store all registers if
446 regno == -1, otherwise store all general registers or all floating
447 point registers depending upon the value of regno. */
448
449void
451{
452 struct gdbarch *gdbarch = regcache->arch ();
453 arm_gdbarch_tdep *tdep = gdbarch_tdep<arm_gdbarch_tdep> (gdbarch);
454
455 if (-1 == regno)
456 {
458 if (tdep->have_wmmx_registers)
460 if (tdep->vfp_register_count > 0)
462 if (tdep->have_fpa_registers)
464 }
465 else
466 {
467 if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
469 else if ((regno >= ARM_F0_REGNUM) && (regno <= ARM_FPS_REGNUM))
471 else if (tdep->have_wmmx_registers
472 && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
474 else if (tdep->vfp_register_count > 0
475 && regno >= ARM_D0_REGNUM
476 && (regno < ARM_D0_REGNUM + tdep->vfp_register_count
477 || regno == ARM_FPSCR_REGNUM))
479 }
480}
481
482/* Wrapper functions for the standard regset handling, used by
483 thread debugging. */
484
485void
487 gdb_gregset_t *gregsetp, int regno)
488{
489 arm_linux_collect_gregset (NULL, regcache, regno, gregsetp, 0);
490}
491
492void
494{
495 arm_linux_supply_gregset (NULL, regcache, -1, gregsetp, 0);
496}
497
498void
500 gdb_fpregset_t *fpregsetp, int regno)
501{
502 arm_linux_collect_nwfpe (NULL, regcache, regno, fpregsetp, 0);
503}
504
505/* Fill GDB's register array with the floating-point register values
506 in *fpregsetp. */
507
508void
510{
511 arm_linux_supply_nwfpe (NULL, regcache, -1, fpregsetp, 0);
512}
513
514/* Fetch the thread-local storage pointer for libthread_db. */
515
516ps_err_e
518 lwpid_t lwpid, int idx, void **base)
519{
520 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
521 return PS_ERR;
522
523 /* IDX is the bias from the thread pointer to the beginning of the
524 thread descriptor. It has to be subtracted due to implementation
525 quirks in libthread_db. */
526 *base = (void *) ((char *)*base - idx);
527
528 return PS_OK;
529}
530
531const struct target_desc *
533{
534 if (inferior_ptid == null_ptid)
535 return this->beneath ()->read_description ();
536
537 CORE_ADDR arm_hwcap = linux_get_hwcap ();
538
539 if (have_ptrace_getregset == TRIBOOL_UNKNOWN)
540 {
541 elf_gregset_t gpregs;
542 struct iovec iov;
543 int tid = inferior_ptid.pid ();
544
545 iov.iov_base = &gpregs;
546 iov.iov_len = sizeof (gpregs);
547
548 /* Check if PTRACE_GETREGSET works. */
549 if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) < 0)
550 have_ptrace_getregset = TRIBOOL_FALSE;
551 else
552 have_ptrace_getregset = TRIBOOL_TRUE;
553 }
554
555 if (arm_hwcap & HWCAP_IWMMXT)
557
558 if (arm_hwcap & HWCAP_VFP)
559 {
560 /* Make sure that the kernel supports reading VFP registers. Support was
561 added in 2.6.30. */
562 int pid = inferior_ptid.pid ();
563 errno = 0;
564 char *buf = (char *) alloca (ARM_VFP3_REGS_SIZE);
565 if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0 && errno == EIO)
566 return nullptr;
567
568 /* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support
569 Neon with VFPv3-D32. */
570 if (arm_hwcap & HWCAP_NEON)
571 return aarch32_read_description ();
572 else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
574
576 }
577
578 return this->beneath ()->read_description ();
579}
580
581/* Information describing the hardware breakpoint capabilities. */
583{
584 gdb_byte arch;
586 gdb_byte wp_count;
587 gdb_byte bp_count;
588};
589
590/* Since we cannot dynamically allocate subfields of arm_linux_process_info,
591 assume a maximum number of supported break-/watchpoints. */
592#define MAX_BPTS 16
593#define MAX_WPTS 16
594
595/* Get hold of the Hardware Breakpoint information for the target we are
596 attached to. Returns NULL if the kernel doesn't support Hardware
597 breakpoints at all, or a pointer to the information structure. */
598static const struct arm_linux_hwbp_cap *
600{
601 /* The info structure we return. */
602 static struct arm_linux_hwbp_cap info;
603
604 /* Is INFO in a good state? -1 means that no attempt has been made to
605 initialize INFO; 0 means an attempt has been made, but it failed; 1
606 means INFO is in an initialized state. */
607 static int available = -1;
608
609 if (available == -1)
610 {
611 int tid;
612 unsigned int val;
613
614 tid = inferior_ptid.lwp ();
615 if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0)
616 available = 0;
617 else
618 {
619 info.arch = (gdb_byte)((val >> 24) & 0xff);
620 info.max_wp_length = (gdb_byte)((val >> 16) & 0xff);
621 info.wp_count = (gdb_byte)((val >> 8) & 0xff);
622 info.bp_count = (gdb_byte)(val & 0xff);
623
624 if (info.wp_count > MAX_WPTS)
625 {
626 warning (_("arm-linux-gdb supports %d hardware watchpoints but target \
627 supports %d"), MAX_WPTS, info.wp_count);
628 info.wp_count = MAX_WPTS;
629 }
630
631 if (info.bp_count > MAX_BPTS)
632 {
633 warning (_("arm-linux-gdb supports %d hardware breakpoints but target \
634 supports %d"), MAX_BPTS, info.bp_count);
635 info.bp_count = MAX_BPTS;
636 }
637 available = (info.arch != 0);
638 }
639 }
640
641 return available == 1 ? &info : NULL;
642}
643
644/* How many hardware breakpoints are available? */
645static int
647{
648 const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
649 return cap != NULL ? cap->bp_count : 0;
650}
651
652/* How many hardware watchpoints are available? */
653static int
655{
656 const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
657 return cap != NULL ? cap->wp_count : 0;
658}
659
660/* Have we got a free break-/watch-point available for use? Returns -1 if
661 there is not an appropriate resource available, otherwise returns 1. */
662int
664 int cnt, int ot)
665{
668 {
670
671 if (count == 0)
672 return 0;
673 else if (cnt + ot > count)
674 return -1;
675 }
676 else if (type == bp_hardware_breakpoint)
677 {
679
680 if (count == 0)
681 return 0;
682 else if (cnt > count)
683 return -1;
684 }
685 else
686 gdb_assert_not_reached ("unknown breakpoint type");
687
688 return 1;
689}
690
691/* Enum describing the different types of ARM hardware break-/watch-points. */
699
700/* Type describing an ARM Hardware Breakpoint Control register value. */
701typedef unsigned int arm_hwbp_control_t;
702
703/* Structure used to keep track of hardware break-/watch-points. */
705{
706 /* Address to break on, or being watched. */
707 unsigned int address;
708 /* Control register for break-/watch- point. */
710};
711
712/* Structure containing arrays of per process hardware break-/watchpoints
713 for caching address and control information.
714
715 The Linux ptrace interface to hardware break-/watch-points presents the
716 values in a vector centred around 0 (which is used fo generic information).
717 Positive indicies refer to breakpoint addresses/control registers, negative
718 indices to watchpoint addresses/control registers.
719
720 The Linux vector is indexed as follows:
721 -((i << 1) + 2): Control register for watchpoint i.
722 -((i << 1) + 1): Address register for watchpoint i.
723 0: Information register.
724 ((i << 1) + 1): Address register for breakpoint i.
725 ((i << 1) + 2): Control register for breakpoint i.
726
727 This structure is used as a per-thread cache of the state stored by the
728 kernel, so that we don't need to keep calling into the kernel to find a
729 free breakpoint.
730
731 We treat break-/watch-points with their enable bit clear as being deleted.
732 */
734{
735 /* Hardware breakpoints for this process. */
737 /* Hardware watchpoints for this process. */
739};
740
741/* Per-process arch-specific data we want to keep. */
743{
744 /* Linked list. */
746 /* The process identifier. */
747 pid_t pid;
748 /* Hardware break-/watchpoints state information. */
750
751};
752
753/* Per-thread arch-specific data we want to keep. */
755{
756 /* Non-zero if our copy differs from what's recorded in the thread. */
759};
760
762
763/* Find process data for process PID. */
764
765static struct arm_linux_process_info *
767{
769
771 if (proc->pid == pid)
772 return proc;
773
774 return NULL;
775}
776
777/* Add process data for process PID. Returns newly allocated info
778 object. */
779
780static struct arm_linux_process_info *
782{
784
785 proc = XCNEW (struct arm_linux_process_info);
786 proc->pid = pid;
787
790
791 return proc;
792}
793
794/* Get data specific info for process PID, creating it if necessary.
795 Never returns NULL. */
796
797static struct arm_linux_process_info *
799{
801
803 if (proc == NULL)
805
806 return proc;
807}
808
809/* Called whenever GDB is no longer debugging process PID. It deletes
810 data structures that keep track of debug register state. */
811
812void
814{
815 struct arm_linux_process_info *proc, **proc_link;
816
818 proc_link = &arm_linux_process_list;
819
820 while (proc != NULL)
821 {
822 if (proc->pid == pid)
823 {
824 *proc_link = proc->next;
825
826 xfree (proc);
827 return;
828 }
829
830 proc_link = &proc->next;
831 proc = *proc_link;
832 }
833}
834
835/* Get hardware break-/watchpoint state for process PID. */
836
837static struct arm_linux_debug_reg_state *
842
843/* Initialize an ARM hardware break-/watch-point control register value.
844 BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
845 type of break-/watch-point; ENABLE indicates whether the point is enabled.
846 */
847static arm_hwbp_control_t
848arm_hwbp_control_initialize (unsigned byte_address_select,
849 arm_hwbp_type hwbp_type,
850 int enable)
851{
852 gdb_assert ((byte_address_select & ~0xffU) == 0);
853 gdb_assert (hwbp_type != arm_hwbp_break
854 || ((byte_address_select & 0xfU) != 0));
855
856 return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
857}
858
859/* Does the breakpoint control value CONTROL have the enable bit set? */
860static int
862{
863 return control & 0x1;
864}
865
866/* Change a breakpoint control word so that it is in the disabled state. */
869{
870 return control & ~0x1;
871}
872
873/* Initialise the hardware breakpoint structure P. The breakpoint will be
874 enabled, and will point to the placed address of BP_TGT. */
875static void
877 struct bp_target_info *bp_tgt,
878 struct arm_linux_hw_breakpoint *p)
879{
880 unsigned mask;
881 CORE_ADDR address = bp_tgt->placed_address = bp_tgt->reqstd_address;
882
883 /* We have to create a mask for the control register which says which bits
884 of the word pointed to by address to break on. */
885 if (arm_pc_is_thumb (gdbarch, address))
886 {
887 mask = 0x3;
888 address &= ~1;
889 }
890 else
891 {
892 mask = 0xf;
893 address &= ~3;
894 }
895
896 p->address = (unsigned int) address;
898}
899
900/* Get the ARM hardware breakpoint type from the TYPE value we're
901 given when asked to set a watchpoint. */
902static arm_hwbp_type
903arm_linux_get_hwbp_type (enum target_hw_bp_type type)
904{
905 if (type == hw_read)
906 return arm_hwbp_load;
907 else if (type == hw_write)
908 return arm_hwbp_store;
909 else
910 return arm_hwbp_access;
911}
912
913/* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
914 to LEN. The type of watchpoint is given in RW. */
915static void
916arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len,
917 enum target_hw_bp_type type,
918 struct arm_linux_hw_breakpoint *p)
919{
920 const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
921 unsigned mask;
922
923 gdb_assert (cap != NULL);
924 gdb_assert (cap->max_wp_length != 0);
925
926 mask = (1 << len) - 1;
927
928 p->address = (unsigned int) addr;
931}
932
933/* Are two break-/watch-points equal? */
934static int
936 const struct arm_linux_hw_breakpoint *p2)
937{
938 return p1->address == p2->address && p1->control == p2->control;
939}
940
941/* Callback to mark a watch-/breakpoint to be updated in all threads of
942 the current process. */
943
944static int
945update_registers_callback (struct lwp_info *lwp, int watch, int index)
946{
947 if (lwp->arch_private == NULL)
948 lwp->arch_private = XCNEW (struct arch_lwp_info);
949
950 /* The actual update is done later just before resuming the lwp,
951 we just mark that the registers need updating. */
952 if (watch)
953 lwp->arch_private->wpts_changed[index] = 1;
954 else
955 lwp->arch_private->bpts_changed[index] = 1;
956
957 /* If the lwp isn't stopped, force it to momentarily pause, so
958 we can update its breakpoint registers. */
959 if (!lwp->stopped)
960 linux_stop_lwp (lwp);
961
962 return 0;
963}
964
965/* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
966 =1) BPT for thread TID. */
967static void
969 int watchpoint)
970{
971 int pid;
972 ptid_t pid_ptid;
973 gdb_byte count, i;
974 struct arm_linux_hw_breakpoint* bpts;
975
976 pid = inferior_ptid.pid ();
977 pid_ptid = ptid_t (pid);
978
979 if (watchpoint)
980 {
983 }
984 else
985 {
988 }
989
990 for (i = 0; i < count; ++i)
992 {
993 bpts[i] = *bpt;
994 iterate_over_lwps (pid_ptid,
995 [=] (struct lwp_info *info)
996 {
998 i);
999 });
1000 break;
1001 }
1002
1003 gdb_assert (i != count);
1004}
1005
1006/* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint
1007 (WATCHPOINT = 1) BPT for thread TID. */
1008static void
1010 int watchpoint)
1011{
1012 int pid;
1013 gdb_byte count, i;
1014 ptid_t pid_ptid;
1015 struct arm_linux_hw_breakpoint* bpts;
1016
1017 pid = inferior_ptid.pid ();
1018 pid_ptid = ptid_t (pid);
1019
1020 if (watchpoint)
1021 {
1024 }
1025 else
1026 {
1029 }
1030
1031 for (i = 0; i < count; ++i)
1032 if (arm_linux_hw_breakpoint_equal (bpt, bpts + i))
1033 {
1034 bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
1035 iterate_over_lwps (pid_ptid,
1036 [=] (struct lwp_info *info)
1037 {
1039 i);
1040 });
1041 break;
1042 }
1043
1044 gdb_assert (i != count);
1045}
1046
1047/* Insert a Hardware breakpoint. */
1048int
1050 struct bp_target_info *bp_tgt)
1051{
1052 struct arm_linux_hw_breakpoint p;
1053
1055 return -1;
1056
1058
1060
1061 return 0;
1062}
1063
1064/* Remove a hardware breakpoint. */
1065int
1067 struct bp_target_info *bp_tgt)
1068{
1069 struct arm_linux_hw_breakpoint p;
1070
1072 return -1;
1073
1075
1077
1078 return 0;
1079}
1080
1081/* Are we able to use a hardware watchpoint for the LEN bytes starting at
1082 ADDR? */
1083int
1085{
1086 const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
1087 CORE_ADDR max_wp_length, aligned_addr;
1088
1089 /* Can not set watchpoints for zero or negative lengths. */
1090 if (len <= 0)
1091 return 0;
1092
1093 /* Need to be able to use the ptrace interface. */
1094 if (cap == NULL || cap->wp_count == 0)
1095 return 0;
1096
1097 /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
1098 range covered by a watchpoint. */
1099 max_wp_length = (CORE_ADDR)cap->max_wp_length;
1100 aligned_addr = addr & ~(max_wp_length - 1);
1101
1102 if (aligned_addr + max_wp_length < addr + len)
1103 return 0;
1104
1105 /* The current ptrace interface can only handle watchpoints that are a
1106 power of 2. */
1107 if ((len & (len - 1)) != 0)
1108 return 0;
1109
1110 /* All tests passed so we must be able to set a watchpoint. */
1111 return 1;
1112}
1113
1114/* Insert a Hardware breakpoint. */
1115int
1117 enum target_hw_bp_type rw,
1118 struct expression *cond)
1119{
1120 struct arm_linux_hw_breakpoint p;
1121
1123 return -1;
1124
1125 arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1126
1128
1129 return 0;
1130}
1131
1132/* Remove a hardware breakpoint. */
1133int
1135 int len, enum target_hw_bp_type rw,
1136 struct expression *cond)
1137{
1138 struct arm_linux_hw_breakpoint p;
1139
1141 return -1;
1142
1143 arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1144
1146
1147 return 0;
1148}
1149
1150/* What was the data address the target was stopped on accessing. */
1151bool
1153{
1154 siginfo_t siginfo;
1155 int slot;
1156
1157 if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
1158 return false;
1159
1160 /* This must be a hardware breakpoint. */
1161 if (siginfo.si_signo != SIGTRAP
1162 || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
1163 return false;
1164
1165 /* We must be able to set hardware watchpoints. */
1167 return 0;
1168
1169 slot = siginfo.si_errno;
1170
1171 /* If we are in a positive slot then we're looking at a breakpoint and not
1172 a watchpoint. */
1173 if (slot >= 0)
1174 return false;
1175
1176 *addr_p = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
1177 return true;
1178}
1179
1180/* Has the target been stopped by hitting a watchpoint? */
1181bool
1183{
1184 CORE_ADDR addr;
1185 return stopped_data_address (&addr);
1186}
1187
1188bool
1190 CORE_ADDR start,
1191 int length)
1192{
1193 return start <= addr && start + length - 1 >= addr;
1194}
1195
1196/* Handle thread creation. We need to copy the breakpoints and watchpoints
1197 in the parent thread to the child thread. */
1198void
1200{
1201 int i;
1202 struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
1203
1204 /* Mark that all the hardware breakpoint/watchpoint register pairs
1205 for this thread need to be initialized. */
1206
1207 for (i = 0; i < MAX_BPTS; i++)
1208 {
1209 info->bpts_changed[i] = 1;
1210 info->wpts_changed[i] = 1;
1211 }
1212
1213 lp->arch_private = info;
1214}
1215
1216/* Function to call when a thread is being deleted. */
1217
1218void
1220{
1221 xfree (arch_lwp);
1222}
1223
1224/* Called when resuming a thread.
1225 The hardware debug registers are updated when there is any change. */
1226
1227void
1229{
1230 int pid, i;
1231 struct arm_linux_hw_breakpoint *bpts, *wpts;
1232 struct arch_lwp_info *arm_lwp_info = lwp->arch_private;
1233
1234 pid = lwp->ptid.lwp ();
1235 bpts = arm_linux_get_debug_reg_state (lwp->ptid.pid ())->bpts;
1236 wpts = arm_linux_get_debug_reg_state (lwp->ptid.pid ())->wpts;
1237
1238 /* NULL means this is the main thread still going through the shell,
1239 or, no watchpoint has been set yet. In that case, there's
1240 nothing to do. */
1241 if (arm_lwp_info == NULL)
1242 return;
1243
1244 for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
1245 if (arm_lwp_info->bpts_changed[i])
1246 {
1247 errno = 0;
1248 if (arm_hwbp_control_is_enabled (bpts[i].control))
1250 (PTRACE_TYPE_ARG3) ((i << 1) + 1), &bpts[i].address) < 0)
1251 perror_with_name (_("Unexpected error setting breakpoint"));
1252
1253 if (bpts[i].control != 0)
1255 (PTRACE_TYPE_ARG3) ((i << 1) + 2), &bpts[i].control) < 0)
1256 perror_with_name (_("Unexpected error setting breakpoint"));
1257
1258 arm_lwp_info->bpts_changed[i] = 0;
1259 }
1260
1261 for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
1262 if (arm_lwp_info->wpts_changed[i])
1263 {
1264 errno = 0;
1265 if (arm_hwbp_control_is_enabled (wpts[i].control))
1267 (PTRACE_TYPE_ARG3) -((i << 1) + 1), &wpts[i].address) < 0)
1268 perror_with_name (_("Unexpected error setting watchpoint"));
1269
1270 if (wpts[i].control != 0)
1272 (PTRACE_TYPE_ARG3) -((i << 1) + 2), &wpts[i].control) < 0)
1273 perror_with_name (_("Unexpected error setting watchpoint"));
1274
1275 arm_lwp_info->wpts_changed[i] = 0;
1276 }
1277}
1278
1279/* linux_nat_new_fork hook. */
1280
1281void
1282arm_linux_nat_target::low_new_fork (struct lwp_info *parent, pid_t child_pid)
1283{
1284 pid_t parent_pid;
1285 struct arm_linux_debug_reg_state *parent_state;
1286 struct arm_linux_debug_reg_state *child_state;
1287
1288 /* NULL means no watchpoint has ever been set in the parent. In
1289 that case, there's nothing to do. */
1290 if (parent->arch_private == NULL)
1291 return;
1292
1293 /* GDB core assumes the child inherits the watchpoints/hw
1294 breakpoints of the parent, and will remove them all from the
1295 forked off process. Copy the debug registers mirrors into the
1296 new process so that all breakpoints and watchpoints can be
1297 removed together. */
1298
1299 parent_pid = parent->ptid.pid ();
1300 parent_state = arm_linux_get_debug_reg_state (parent_pid);
1301 child_state = arm_linux_get_debug_reg_state (child_pid);
1302 *child_state = *parent_state;
1303}
1304
1306void
void aarch32_gp_regcache_collect(const struct regcache *regcache, uint32_t *regs, int arm_apcs_32)
void aarch32_gp_regcache_supply(struct regcache *regcache, uint32_t *regs, int arm_apcs_32)
void aarch32_vfp_regcache_collect(const struct regcache *regcache, gdb_byte *regs, const int vfp_register_count)
void aarch32_vfp_regcache_supply(struct regcache *regcache, gdb_byte *regs, const int vfp_register_count)
const target_desc * aarch32_read_description()
void xfree(void *)
#define HWCAP_NEON
#define HWCAP_VFP
#define HWCAP_VFPv3
#define PTRACE_GET_THREAD_AREA
static int arm_linux_get_hw_watchpoint_count(void)
#define MAX_WPTS
void _initialize_arm_linux_nat()
static int arm_linux_hw_breakpoint_equal(const struct arm_linux_hw_breakpoint *p1, const struct arm_linux_hw_breakpoint *p2)
void supply_gregset(struct regcache *regcache, const gdb_gregset_t *gregsetp)
static void fetch_wmmx_regs(struct regcache *regcache)
static struct arm_linux_process_info * arm_linux_add_process(pid_t pid)
static void store_fpregs(const struct regcache *regcache)
unsigned int arm_hwbp_control_t
static void fetch_vfp_regs(struct regcache *regcache)
static arm_linux_nat_target the_arm_linux_nat_target
#define PTRACE_SETHBPREGS
static void fetch_fpregs(struct regcache *regcache)
static void store_wmmx_regs(const struct regcache *regcache)
void fill_gregset(const struct regcache *regcache, gdb_gregset_t *gregsetp, int regno)
static void fetch_regs(struct regcache *regcache)
static arm_hwbp_type arm_linux_get_hwbp_type(enum target_hw_bp_type type)
#define PTRACE_GETWMMXREGS
void supply_fpregset(struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
ps_err_e ps_get_thread_area(struct ps_prochandle *ph, lwpid_t lwpid, int idx, void **base)
static arm_hwbp_control_t arm_hwbp_control_initialize(unsigned byte_address_select, arm_hwbp_type hwbp_type, int enable)
#define MAX_BPTS
static int update_registers_callback(struct lwp_info *lwp, int watch, int index)
#define PTRACE_SETWMMXREGS
static void arm_linux_remove_hw_breakpoint1(const struct arm_linux_hw_breakpoint *bpt, int watchpoint)
static void arm_linux_hw_breakpoint_initialize(struct gdbarch *gdbarch, struct bp_target_info *bp_tgt, struct arm_linux_hw_breakpoint *p)
static void arm_linux_insert_hw_breakpoint1(const struct arm_linux_hw_breakpoint *bpt, int watchpoint)
static void store_regs(const struct regcache *regcache)
static arm_hwbp_control_t arm_hwbp_control_disable(arm_hwbp_control_t control)
#define PTRACE_GETVFPREGS
static void store_vfp_regs(const struct regcache *regcache)
static struct arm_linux_process_info * arm_linux_find_process_pid(pid_t pid)
arm_hwbp_type
@ arm_hwbp_store
@ arm_hwbp_break
@ arm_hwbp_load
@ arm_hwbp_access
void fill_fpregset(const struct regcache *regcache, gdb_fpregset_t *fpregsetp, int regno)
static void arm_linux_hw_watchpoint_initialize(CORE_ADDR addr, int len, enum target_hw_bp_type type, struct arm_linux_hw_breakpoint *p)
#define PTRACE_GETHBPREGS
static struct arm_linux_process_info * arm_linux_process_list
static struct arm_linux_process_info * arm_linux_process_info_get(pid_t pid)
#define PTRACE_SETVFPREGS
static int arm_hwbp_control_is_enabled(arm_hwbp_control_t control)
static struct arm_linux_debug_reg_state * arm_linux_get_debug_reg_state(pid_t pid)
static const struct arm_linux_hwbp_cap * arm_linux_get_hwbp_cap(void)
static int arm_linux_get_hw_breakpoint_count(void)
void arm_linux_supply_gregset(const struct regset *regset, struct regcache *regcache, int regnum, const void *gregs_buf, size_t len)
void arm_linux_supply_nwfpe(const struct regset *regset, struct regcache *regcache, int regnum, const void *regs_buf, size_t len)
void supply_nwfpe_register(struct regcache *regcache, int regno, const gdb_byte *regs)
void arm_linux_collect_nwfpe(const struct regset *regset, const struct regcache *regcache, int regnum, void *regs_buf, size_t len)
void collect_nwfpe_register(const struct regcache *regcache, int regno, gdb_byte *regs)
void arm_linux_collect_gregset(const struct regset *regset, const struct regcache *regcache, int regnum, void *gregs_buf, size_t len)
#define ARM_LINUX_SIZEOF_NWFPE
#define HWCAP_VFPv3D16
#define HWCAP_IWMMXT
#define NWFPE_FPSR_OFFSET
bool arm_apcs_32
Definition arm-tdep.c:598
int arm_pc_is_thumb(struct gdbarch *gdbarch, CORE_ADDR memaddr)
Definition arm-tdep.c:713
const target_desc * arm_read_description(arm_fp_type fp_type, bool tls)
Definition arm-tdep.c:14927
#define ARM_VFP3_REGS_SIZE
Definition arm.h:170
#define IWMMXT_REGS_SIZE
Definition arm.h:172
@ ARM_FPSCR_REGNUM
Definition arm.h:64
@ ARM_PS_REGNUM
Definition arm.h:52
@ ARM_WCGR7_REGNUM
Definition arm.h:61
@ ARM_WR0_REGNUM
Definition arm.h:53
@ ARM_D0_REGNUM
Definition arm.h:62
@ ARM_F7_REGNUM
Definition arm.h:50
@ ARM_F0_REGNUM
Definition arm.h:48
@ ARM_WCSSF_REGNUM
Definition arm.h:56
@ ARM_WCGR0_REGNUM
Definition arm.h:59
@ ARM_FPS_REGNUM
Definition arm.h:51
@ ARM_FP_TYPE_IWMMXT
Definition arm.h:98
@ ARM_FP_TYPE_VFPV2
Definition arm.h:96
@ ARM_FP_TYPE_VFPV3
Definition arm.h:97
bptype
Definition breakpoint.h:84
@ bp_watchpoint
Definition breakpoint.h:91
@ bp_hardware_breakpoint
Definition breakpoint.h:87
@ bp_read_watchpoint
Definition breakpoint.h:93
@ bp_access_watchpoint
Definition breakpoint.h:94
@ bp_hardware_watchpoint
Definition breakpoint.h:92
int remove_hw_breakpoint(struct gdbarch *, struct bp_target_info *) override
int region_ok_for_hw_watchpoint(CORE_ADDR, int) override
int insert_watchpoint(CORE_ADDR, int, enum target_hw_bp_type, struct expression *) override
void low_new_fork(struct lwp_info *parent, pid_t child_pid) override
bool stopped_data_address(CORE_ADDR *) override
void low_new_thread(struct lwp_info *lp) override
void low_delete_thread(struct arch_lwp_info *lp) override
void store_registers(struct regcache *, int) override
bool stopped_by_watchpoint() override
int can_use_hw_breakpoint(enum bptype, int, int) override
const struct target_desc * read_description() override
bool watchpoint_addr_within_range(CORE_ADDR, CORE_ADDR, int) override
void fetch_registers(struct regcache *, int) override
int remove_watchpoint(CORE_ADDR, int, enum target_hw_bp_type, struct expression *) override
void low_forget_process(pid_t pid) override
int insert_hw_breakpoint(struct gdbarch *, struct bp_target_info *) override
void low_prepare_to_resume(struct lwp_info *lp) override
const target_info & info() const override
Definition inf-child.c:49
gdbarch * arch() const
Definition regcache.c:231
void raw_collect(int regnum, void *buf) const override
Definition regcache.c:1127
void raw_supply(int regnum, const void *buf) override
Definition regcache.c:1062
enum register_status get_register_status(int regnum) const override
Definition regcache.c:304
ptid_t ptid() const
Definition regcache.h:408
#define ptrace(request, pid, addr, data)
Definition gdb_ptrace.h:141
mach_port_t mach_port_t name mach_port_t mach_port_t name kern_return_t int int rusage_t pid_t pid
Definition gnu-nat.c:1791
unsigned available
Definition go32-nat.c:7
GDB_FPREGSET_T gdb_fpregset_t
Definition gregset.h:35
GDB_GREGSET_T gdb_gregset_t
Definition gregset.h:34
void add_inf_child_target(inf_child_target *target)
Definition inf-child.c:418
ptid_t inferior_ptid
Definition infcmd.c:74
void linux_stop_lwp(struct lwp_info *lwp)
Definition linux-nat.c:2204
bool linux_nat_get_siginfo(ptid_t ptid, siginfo_t *siginfo)
Definition linux-nat.c:4479
struct lwp_info * iterate_over_lwps(ptid_t filter, gdb::function_view< iterate_over_lwps_ftype > callback)
Definition linux-nat.c:860
struct linux_nat_target * linux_target
Definition linux-nat.c:189
enum tribool have_ptrace_getregset
Definition linux-nat.c:192
#define PTRACE_TYPE_ARG3
#define PTRACE_SETREGSET
#define PTRACE_GETREGSET
CORE_ADDR linux_get_hwcap()
#define PTRACE_GETREGS
#define PTRACE_SETREGS
#define PTRACE_SETFPREGS
#define enable()
Definition ser-go32.c:239
char bpts_changed[MAX_BPTS]
char wpts_changed[MAX_WPTS]
bool have_wmmx_registers
Definition arm-tdep.h:99
bool have_fpa_registers
Definition arm-tdep.h:98
struct arm_linux_hw_breakpoint wpts[MAX_WPTS]
struct arm_linux_hw_breakpoint bpts[MAX_BPTS]
arm_hwbp_control_t control
struct arm_linux_debug_reg_state state
struct arm_linux_process_info * next
CORE_ADDR placed_address
Definition breakpoint.h:266
CORE_ADDR reqstd_address
Definition breakpoint.h:269
ptid_t ptid
Definition linux-nat.h:211
int stopped
Definition linux-nat.h:222
struct arch_lwp_info * arch_private
Definition linux-nat.h:282
Definition gnu-nat.h:58
struct proc * next
Definition gnu-nat.h:88
target_ops * beneath() const
Definition target.c:3041
virtual const struct target_desc * read_description() TARGET_DEFAULT_RETURN(NULL)