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frv-tdep.c
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1/* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger.
2
3 Copyright (C) 2002-2023 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20#include "defs.h"
21#include "inferior.h"
22#include "gdbcore.h"
23#include "arch-utils.h"
24#include "regcache.h"
25#include "frame.h"
26#include "frame-unwind.h"
27#include "frame-base.h"
28#include "trad-frame.h"
29#include "dis-asm.h"
30#include "sim-regno.h"
31#include "sim/sim-frv.h"
32#include "symtab.h"
33#include "elf-bfd.h"
34#include "elf/frv.h"
35#include "osabi.h"
36#include "infcall.h"
37#include "solib.h"
38#include "frv-tdep.h"
39#include "objfiles.h"
40#include "gdbarch.h"
41
42/* Make cgen names unique to prevent ODR conflicts with other targets. */
43#define GDB_CGEN_REMAP_PREFIX frv
44#include "cgen-remap.h"
45#include "opcodes/frv-desc.h"
46
47struct frv_unwind_cache /* was struct frame_extra_info */
48 {
49 /* The previous frame's inner-most stack address. Used as this
50 frame ID's stack_addr. */
51 CORE_ADDR prev_sp;
52
53 /* The frame's base, optionally used by the high-level debug info. */
54 CORE_ADDR base;
55
56 /* Table indicating the location of each and every register. */
58 };
59
60/* A structure describing a particular variant of the FRV.
61 We allocate and initialize one of these structures when we create
62 the gdbarch object for a variant.
63
64 At the moment, all the FR variants we support differ only in which
65 registers are present; the portable code of GDB knows that
66 registers whose names are the empty string don't exist, so the
67 `register_names' array captures all the per-variant information we
68 need.
69
70 in the future, if we need to have per-variant maps for raw size,
71 virtual type, etc., we should replace register_names with an array
72 of structures, each of which gives all the necessary info for one
73 register. Don't stick parallel arrays in here --- that's so
74 Fortran. */
76{
77 /* Which ABI is in use? */
78 enum frv_abi frv_abi {};
79
80 /* How many general-purpose registers does this variant have? */
81 int num_gprs = 0;
82
83 /* How many floating-point registers does this variant have? */
84 int num_fprs = 0;
85
86 /* How many hardware watchpoints can it support? */
88
89 /* How many hardware breakpoints can it support? */
91
92 /* Register names. */
93 const char **register_names = nullptr;
94};
95
96using frv_gdbarch_tdep_up = std::unique_ptr<frv_gdbarch_tdep>;
97
98/* Return the FR-V ABI associated with GDBARCH. */
99enum frv_abi
101{
102 frv_gdbarch_tdep *tdep = gdbarch_tdep<frv_gdbarch_tdep> (gdbarch);
103 return tdep->frv_abi;
104}
105
106/* Fetch the interpreter and executable loadmap addresses (for shared
107 library support) for the FDPIC ABI. Return 0 if successful, -1 if
108 not. (E.g, -1 will be returned if the ABI isn't the FDPIC ABI.) */
109int
110frv_fdpic_loadmap_addresses (struct gdbarch *gdbarch, CORE_ADDR *interp_addr,
111 CORE_ADDR *exec_addr)
112{
114 return -1;
115 else
116 {
118
119 if (interp_addr != NULL)
120 {
121 ULONGEST val;
124 *interp_addr = val;
125 }
126 if (exec_addr != NULL)
127 {
128 ULONGEST val;
131 *exec_addr = val;
132 }
133 return 0;
134 }
135}
136
137/* Allocate a new variant structure, and set up default values for all
138 the fields. */
141{
142 int r;
143
145
146 var->frv_abi = FRV_ABI_EABI;
147 var->num_gprs = 64;
148 var->num_fprs = 64;
149 var->num_hw_watchpoints = 0;
150 var->num_hw_breakpoints = 0;
151
152 /* By default, don't supply any general-purpose or floating-point
153 register names. */
154 var->register_names
155 = (const char **) xmalloc ((frv_num_regs + frv_num_pseudo_regs)
156 * sizeof (const char *));
157 for (r = 0; r < frv_num_regs + frv_num_pseudo_regs; r++)
158 var->register_names[r] = "";
159
160 /* Do, however, supply default names for the known special-purpose
161 registers. */
162
163 var->register_names[pc_regnum] = "pc";
164 var->register_names[lr_regnum] = "lr";
165 var->register_names[lcr_regnum] = "lcr";
166
167 var->register_names[psr_regnum] = "psr";
168 var->register_names[ccr_regnum] = "ccr";
169 var->register_names[cccr_regnum] = "cccr";
170 var->register_names[tbr_regnum] = "tbr";
171
172 /* Debug registers. */
173 var->register_names[brr_regnum] = "brr";
174 var->register_names[dbar0_regnum] = "dbar0";
175 var->register_names[dbar1_regnum] = "dbar1";
176 var->register_names[dbar2_regnum] = "dbar2";
177 var->register_names[dbar3_regnum] = "dbar3";
178
179 /* iacc0 (Only found on MB93405.) */
180 var->register_names[iacc0h_regnum] = "iacc0h";
181 var->register_names[iacc0l_regnum] = "iacc0l";
182 var->register_names[iacc0_regnum] = "iacc0";
183
184 /* fsr0 (Found on FR555 and FR501.) */
185 var->register_names[fsr0_regnum] = "fsr0";
186
187 /* acc0 - acc7. The architecture provides for the possibility of many
188 more (up to 64 total), but we don't want to make that big of a hole
189 in the G packet. If we need more in the future, we'll add them
190 elsewhere. */
191 for (r = acc0_regnum; r <= acc7_regnum; r++)
192 var->register_names[r]
193 = xstrprintf ("acc%d", r - acc0_regnum).release ();
194
195 /* accg0 - accg7: These are one byte registers. The remote protocol
196 provides the raw values packed four into a slot. accg0123 and
197 accg4567 correspond to accg0 - accg3 and accg4-accg7 respectively.
198 We don't provide names for accg0123 and accg4567 since the user will
199 likely not want to see these raw values. */
200
201 for (r = accg0_regnum; r <= accg7_regnum; r++)
202 var->register_names[r]
203 = xstrprintf ("accg%d", r - accg0_regnum).release ();
204
205 /* msr0 and msr1. */
206
207 var->register_names[msr0_regnum] = "msr0";
208 var->register_names[msr1_regnum] = "msr1";
209
210 /* gner and fner registers. */
211 var->register_names[gner0_regnum] = "gner0";
212 var->register_names[gner1_regnum] = "gner1";
213 var->register_names[fner0_regnum] = "fner0";
214 var->register_names[fner1_regnum] = "fner1";
215
216 return var;
217}
218
219
220/* Indicate that the variant VAR has NUM_GPRS general-purpose
221 registers, and fill in the names array appropriately. */
222static void
224{
225 int r;
226
227 var->num_gprs = num_gprs;
228
229 for (r = 0; r < num_gprs; ++r)
230 {
231 char buf[20];
232
233 xsnprintf (buf, sizeof (buf), "gr%d", r);
234 var->register_names[first_gpr_regnum + r] = xstrdup (buf);
235 }
236}
237
238
239/* Indicate that the variant VAR has NUM_FPRS floating-point
240 registers, and fill in the names array appropriately. */
241static void
243{
244 int r;
245
246 var->num_fprs = num_fprs;
247
248 for (r = 0; r < num_fprs; ++r)
249 {
250 char buf[20];
251
252 xsnprintf (buf, sizeof (buf), "fr%d", r);
253 var->register_names[first_fpr_regnum + r] = xstrdup (buf);
254 }
255}
256
257static void
259{
260 var->frv_abi = FRV_ABI_FDPIC;
261 var->register_names[fdpic_loadmap_exec_regnum] = xstrdup ("loadmap_exec");
263 = xstrdup ("loadmap_interp");
264}
265
266static void
268{
269 var->register_names[scr0_regnum] = xstrdup ("scr0");
270 var->register_names[scr1_regnum] = xstrdup ("scr1");
271 var->register_names[scr2_regnum] = xstrdup ("scr2");
272 var->register_names[scr3_regnum] = xstrdup ("scr3");
273}
274
275static const char *
277{
278 frv_gdbarch_tdep *tdep = gdbarch_tdep<frv_gdbarch_tdep> (gdbarch);
279 return tdep->register_names[reg];
280}
281
282
283static struct type *
285{
286 if (reg >= first_fpr_regnum && reg <= last_fpr_regnum)
288 else if (reg == iacc0_regnum)
290 else
292}
293
294static enum register_status
296 int reg, gdb_byte *buffer)
297{
298 enum register_status status;
299
300 if (reg == iacc0_regnum)
301 {
303 if (status == REG_VALID)
304 status = regcache->raw_read (iacc0l_regnum, (bfd_byte *) buffer + 4);
305 }
306 else if (accg0_regnum <= reg && reg <= accg7_regnum)
307 {
308 /* The accg raw registers have four values in each slot with the
309 lowest register number occupying the first byte. */
310
311 int raw_regnum = accg0123_regnum + (reg - accg0_regnum) / 4;
312 int byte_num = (reg - accg0_regnum) % 4;
313 gdb_byte buf[4];
314
315 status = regcache->raw_read (raw_regnum, buf);
316 if (status == REG_VALID)
317 {
318 memset (buffer, 0, 4);
319 /* FR-V is big endian, so put the requested byte in the
320 first byte of the buffer allocated to hold the
321 pseudo-register. */
322 buffer[0] = buf[byte_num];
323 }
324 }
325 else
326 gdb_assert_not_reached ("invalid pseudo register number");
327
328 return status;
329}
330
331static void
333 int reg, const gdb_byte *buffer)
334{
335 if (reg == iacc0_regnum)
336 {
338 regcache->raw_write (iacc0l_regnum, (bfd_byte *) buffer + 4);
339 }
340 else if (accg0_regnum <= reg && reg <= accg7_regnum)
341 {
342 /* The accg raw registers have four values in each slot with the
343 lowest register number occupying the first byte. */
344
345 int raw_regnum = accg0123_regnum + (reg - accg0_regnum) / 4;
346 int byte_num = (reg - accg0_regnum) % 4;
347 gdb_byte buf[4];
348
349 regcache->raw_read (raw_regnum, buf);
350 buf[byte_num] = ((bfd_byte *) buffer)[0];
351 regcache->raw_write (raw_regnum, buf);
352 }
353}
354
355static int
357{
358 static const int spr_map[] =
359 {
360 H_SPR_PSR, /* psr_regnum */
361 H_SPR_CCR, /* ccr_regnum */
362 H_SPR_CCCR, /* cccr_regnum */
363 -1, /* fdpic_loadmap_exec_regnum */
364 -1, /* fdpic_loadmap_interp_regnum */
365 -1, /* 134 */
366 H_SPR_TBR, /* tbr_regnum */
367 H_SPR_BRR, /* brr_regnum */
368 H_SPR_DBAR0, /* dbar0_regnum */
369 H_SPR_DBAR1, /* dbar1_regnum */
370 H_SPR_DBAR2, /* dbar2_regnum */
371 H_SPR_DBAR3, /* dbar3_regnum */
372 H_SPR_SCR0, /* scr0_regnum */
373 H_SPR_SCR1, /* scr1_regnum */
374 H_SPR_SCR2, /* scr2_regnum */
375 H_SPR_SCR3, /* scr3_regnum */
376 H_SPR_LR, /* lr_regnum */
377 H_SPR_LCR, /* lcr_regnum */
378 H_SPR_IACC0H, /* iacc0h_regnum */
379 H_SPR_IACC0L, /* iacc0l_regnum */
380 H_SPR_FSR0, /* fsr0_regnum */
381 /* FIXME: Add infrastructure for fetching/setting ACC and ACCG regs. */
382 -1, /* acc0_regnum */
383 -1, /* acc1_regnum */
384 -1, /* acc2_regnum */
385 -1, /* acc3_regnum */
386 -1, /* acc4_regnum */
387 -1, /* acc5_regnum */
388 -1, /* acc6_regnum */
389 -1, /* acc7_regnum */
390 -1, /* acc0123_regnum */
391 -1, /* acc4567_regnum */
392 H_SPR_MSR0, /* msr0_regnum */
393 H_SPR_MSR1, /* msr1_regnum */
394 H_SPR_GNER0, /* gner0_regnum */
395 H_SPR_GNER1, /* gner1_regnum */
396 H_SPR_FNER0, /* fner0_regnum */
397 H_SPR_FNER1, /* fner1_regnum */
398 };
399
400 gdb_assert (reg >= 0 && reg < gdbarch_num_regs (gdbarch));
401
402 if (first_gpr_regnum <= reg && reg <= last_gpr_regnum)
403 return reg - first_gpr_regnum + SIM_FRV_GR0_REGNUM;
404 else if (first_fpr_regnum <= reg && reg <= last_fpr_regnum)
405 return reg - first_fpr_regnum + SIM_FRV_FR0_REGNUM;
406 else if (pc_regnum == reg)
407 return SIM_FRV_PC_REGNUM;
408 else if (reg >= first_spr_regnum
409 && reg < first_spr_regnum + sizeof (spr_map) / sizeof (spr_map[0]))
410 {
411 int spr_reg_offset = spr_map[reg - first_spr_regnum];
412
413 if (spr_reg_offset < 0)
415 else
416 return SIM_FRV_SPR0_REGNUM + spr_reg_offset;
417 }
418
419 internal_error (_("Bad register number %d"), reg);
420}
421
422constexpr gdb_byte frv_break_insn[] = {0xc0, 0x70, 0x00, 0x01};
423
424typedef BP_MANIPULATION (frv_break_insn) frv_breakpoint;
425
426/* Define the maximum number of instructions which may be packed into a
427 bundle (VLIW instruction). */
428static const int max_instrs_per_bundle = 8;
429
430/* Define the size (in bytes) of an FR-V instruction. */
431static const int frv_instr_size = 4;
432
433/* Adjust a breakpoint's address to account for the FR-V architecture's
434 constraint that a break instruction must not appear as any but the
435 first instruction in the bundle. */
436static CORE_ADDR
437frv_adjust_breakpoint_address (struct gdbarch *gdbarch, CORE_ADDR bpaddr)
438{
439 int count = max_instrs_per_bundle;
440 CORE_ADDR addr = bpaddr - frv_instr_size;
441 CORE_ADDR func_start = get_pc_function_start (bpaddr);
442
443 /* Find the end of the previous packing sequence. This will be indicated
444 by either attempting to access some inaccessible memory or by finding
445 an instruction word whose packing bit is set to one. */
446 while (count-- > 0 && addr >= func_start)
447 {
448 gdb_byte instr[frv_instr_size];
449 int status;
450
451 status = target_read_memory (addr, instr, sizeof instr);
452
453 if (status != 0)
454 break;
455
456 /* This is a big endian architecture, so byte zero will have most
457 significant byte. The most significant bit of this byte is the
458 packing bit. */
459 if (instr[0] & 0x80)
460 break;
461
462 addr -= frv_instr_size;
463 }
464
465 if (count > 0)
466 bpaddr = addr + frv_instr_size;
467
468 return bpaddr;
469}
470
471
472/* Return true if REG is a caller-saves ("scratch") register,
473 false otherwise. */
474static int
476{
477 return ((4 <= reg && reg <= 7)
478 || (14 <= reg && reg <= 15)
479 || (32 <= reg && reg <= 47));
480}
481
482
483/* Return true if REG is a callee-saves register, false otherwise. */
484static int
486{
487 return ((16 <= reg && reg <= 31)
488 || (48 <= reg && reg <= 63));
489}
490
491
492/* Return true if REG is an argument register, false otherwise. */
493static int
495{
496 return (8 <= reg && reg <= 13);
497}
498
499/* Scan an FR-V prologue, starting at PC, until frame->PC.
500 If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
501 We assume FRAME's saved_regs array has already been allocated and cleared.
502 Return the first PC value after the prologue.
503
504 Note that, for unoptimized code, we almost don't need this function
505 at all; all arguments and locals live on the stack, so we just need
506 the FP to find everything. The catch: structures passed by value
507 have their addresses living in registers; they're never spilled to
508 the stack. So if you ever want to be able to get to these
509 arguments in any frame but the top, you'll need to do this serious
510 prologue analysis. */
511static CORE_ADDR
512frv_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc,
513 frame_info_ptr this_frame,
514 struct frv_unwind_cache *info)
515{
516 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
517
518 /* When writing out instruction bitpatterns, we use the following
519 letters to label instruction fields:
520 P - The parallel bit. We don't use this.
521 J - The register number of GRj in the instruction description.
522 K - The register number of GRk in the instruction description.
523 I - The register number of GRi.
524 S - a signed immediate offset.
525 U - an unsigned immediate offset.
526
527 The dots below the numbers indicate where hex digit boundaries
528 fall, to make it easier to check the numbers. */
529
530 /* Non-zero iff we've seen the instruction that initializes the
531 frame pointer for this function's frame. */
532 int fp_set = 0;
533
534 /* If fp_set is non_zero, then this is the distance from
535 the stack pointer to frame pointer: fp = sp + fp_offset. */
536 int fp_offset = 0;
537
538 /* Total size of frame prior to any alloca operations. */
539 int framesize = 0;
540
541 /* Flag indicating if lr has been saved on the stack. */
542 int lr_saved_on_stack = 0;
543
544 /* The number of the general-purpose register we saved the return
545 address ("link register") in, or -1 if we haven't moved it yet. */
546 int lr_save_reg = -1;
547
548 /* Offset (from sp) at which lr has been saved on the stack. */
549
550 int lr_sp_offset = 0;
551
552 /* If gr_saved[i] is non-zero, then we've noticed that general
553 register i has been saved at gr_sp_offset[i] from the stack
554 pointer. */
555 char gr_saved[64];
556 int gr_sp_offset[64];
557
558 /* The address of the most recently scanned prologue instruction. */
559 CORE_ADDR last_prologue_pc;
560
561 /* The address of the next instruction. */
562 CORE_ADDR next_pc;
563
564 /* The upper bound to of the pc values to scan. */
565 CORE_ADDR lim_pc;
566
567 memset (gr_saved, 0, sizeof (gr_saved));
568
569 last_prologue_pc = pc;
570
571 /* Try to compute an upper limit (on how far to scan) based on the
572 line number info. */
573 lim_pc = skip_prologue_using_sal (gdbarch, pc);
574 /* If there's no line number info, lim_pc will be 0. In that case,
575 set the limit to be 100 instructions away from pc. Hopefully, this
576 will be far enough away to account for the entire prologue. Don't
577 worry about overshooting the end of the function. The scan loop
578 below contains some checks to avoid scanning unreasonably far. */
579 if (lim_pc == 0)
580 lim_pc = pc + 400;
581
582 /* If we have a frame, we don't want to scan past the frame's pc. This
583 will catch those cases where the pc is in the prologue. */
584 if (this_frame)
585 {
586 CORE_ADDR frame_pc = get_frame_pc (this_frame);
587 if (frame_pc < lim_pc)
588 lim_pc = frame_pc;
589 }
590
591 /* Scan the prologue. */
592 while (pc < lim_pc)
593 {
594 gdb_byte buf[frv_instr_size];
595 LONGEST op;
596
597 if (target_read_memory (pc, buf, sizeof buf) != 0)
598 break;
599 op = extract_signed_integer (buf, byte_order);
600
601 next_pc = pc + 4;
602
603 /* The tests in this chain of ifs should be in order of
604 decreasing selectivity, so that more particular patterns get
605 to fire before less particular patterns. */
606
607 /* Some sort of control transfer instruction: stop scanning prologue.
608 Integer Conditional Branch:
609 X XXXX XX 0000110 XX XXXXXXXXXXXXXXXX
610 Floating-point / media Conditional Branch:
611 X XXXX XX 0000111 XX XXXXXXXXXXXXXXXX
612 LCR Conditional Branch to LR
613 X XXXX XX 0001110 XX XX 001 X XXXXXXXXXX
614 Integer conditional Branches to LR
615 X XXXX XX 0001110 XX XX 010 X XXXXXXXXXX
616 X XXXX XX 0001110 XX XX 011 X XXXXXXXXXX
617 Floating-point/Media Branches to LR
618 X XXXX XX 0001110 XX XX 110 X XXXXXXXXXX
619 X XXXX XX 0001110 XX XX 111 X XXXXXXXXXX
620 Jump and Link
621 X XXXXX X 0001100 XXXXXX XXXXXX XXXXXX
622 X XXXXX X 0001101 XXXXXX XXXXXX XXXXXX
623 Call
624 X XXXXXX 0001111 XXXXXXXXXXXXXXXXXX
625 Return from Trap
626 X XXXXX X 0000101 XXXXXX XXXXXX XXXXXX
627 Integer Conditional Trap
628 X XXXX XX 0000100 XXXXXX XXXX 00 XXXXXX
629 X XXXX XX 0011100 XXXXXX XXXXXXXXXXXX
630 Floating-point /media Conditional Trap
631 X XXXX XX 0000100 XXXXXX XXXX 01 XXXXXX
632 X XXXX XX 0011101 XXXXXX XXXXXXXXXXXX
633 Break
634 X XXXX XX 0000100 XXXXXX XXXX 11 XXXXXX
635 Media Trap
636 X XXXX XX 0000100 XXXXXX XXXX 10 XXXXXX */
637 if ((op & 0x01d80000) == 0x00180000 /* Conditional branches and Call */
638 || (op & 0x01f80000) == 0x00300000 /* Jump and Link */
639 || (op & 0x01f80000) == 0x00100000 /* Return from Trap, Trap */
640 || (op & 0x01f80000) == 0x00700000) /* Trap immediate */
641 {
642 /* Stop scanning; not in prologue any longer. */
643 break;
644 }
645
646 /* Loading something from memory into fp probably means that
647 we're in the epilogue. Stop scanning the prologue.
648 ld @(GRi, GRk), fp
649 X 000010 0000010 XXXXXX 000100 XXXXXX
650 ldi @(GRi, d12), fp
651 X 000010 0110010 XXXXXX XXXXXXXXXXXX */
652 else if ((op & 0x7ffc0fc0) == 0x04080100
653 || (op & 0x7ffc0000) == 0x04c80000)
654 {
655 break;
656 }
657
658 /* Setting the FP from the SP:
659 ori sp, 0, fp
660 P 000010 0100010 000001 000000000000 = 0x04881000
661 0 111111 1111111 111111 111111111111 = 0x7fffffff
662 . . . . . . . .
663 We treat this as part of the prologue. */
664 else if ((op & 0x7fffffff) == 0x04881000)
665 {
666 fp_set = 1;
667 fp_offset = 0;
668 last_prologue_pc = next_pc;
669 }
670
671 /* Move the link register to the scratch register grJ, before saving:
672 movsg lr, grJ
673 P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0
674 0 111111 1111111 111111 111111 000000 = 0x7fffffc0
675 . . . . . . . .
676 We treat this as part of the prologue. */
677 else if ((op & 0x7fffffc0) == 0x080d01c0)
678 {
679 int gr_j = op & 0x3f;
680
681 /* If we're moving it to a scratch register, that's fine. */
682 if (is_caller_saves_reg (gr_j))
683 {
684 lr_save_reg = gr_j;
685 last_prologue_pc = next_pc;
686 }
687 }
688
689 /* To save multiple callee-saves registers on the stack, at
690 offset zero:
691
692 std grK,@(sp,gr0)
693 P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0
694 0 000000 1111111 111111 111111 111111 = 0x01ffffff
695
696 stq grK,@(sp,gr0)
697 P KKKKKK 0000011 000001 000100 000000 = 0x000c1100
698 0 000000 1111111 111111 111111 111111 = 0x01ffffff
699 . . . . . . . .
700 We treat this as part of the prologue, and record the register's
701 saved address in the frame structure. */
702 else if ((op & 0x01ffffff) == 0x000c10c0
703 || (op & 0x01ffffff) == 0x000c1100)
704 {
705 int gr_k = ((op >> 25) & 0x3f);
706 int ope = ((op >> 6) & 0x3f);
707 int count;
708 int i;
709
710 /* Is it an std or an stq? */
711 if (ope == 0x03)
712 count = 2;
713 else
714 count = 4;
715
716 /* Is it really a callee-saves register? */
717 if (is_callee_saves_reg (gr_k))
718 {
719 for (i = 0; i < count; i++)
720 {
721 gr_saved[gr_k + i] = 1;
722 gr_sp_offset[gr_k + i] = 4 * i;
723 }
724 last_prologue_pc = next_pc;
725 }
726 }
727
728 /* Adjusting the stack pointer. (The stack pointer is GR1.)
729 addi sp, S, sp
730 P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000
731 0 111111 1111111 111111 000000000000 = 0x7ffff000
732 . . . . . . . .
733 We treat this as part of the prologue. */
734 else if ((op & 0x7ffff000) == 0x02401000)
735 {
736 if (framesize == 0)
737 {
738 /* Sign-extend the twelve-bit field.
739 (Isn't there a better way to do this?) */
740 int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
741
742 framesize -= s;
743 last_prologue_pc = pc;
744 }
745 else
746 {
747 /* If the prologue is being adjusted again, we've
748 likely gone too far; i.e. we're probably in the
749 epilogue. */
750 break;
751 }
752 }
753
754 /* Setting the FP to a constant distance from the SP:
755 addi sp, S, fp
756 P 000010 0010000 000001 SSSSSSSSSSSS = 0x04401000
757 0 111111 1111111 111111 000000000000 = 0x7ffff000
758 . . . . . . . .
759 We treat this as part of the prologue. */
760 else if ((op & 0x7ffff000) == 0x04401000)
761 {
762 /* Sign-extend the twelve-bit field.
763 (Isn't there a better way to do this?) */
764 int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
765 fp_set = 1;
766 fp_offset = s;
767 last_prologue_pc = pc;
768 }
769
770 /* To spill an argument register to a scratch register:
771 ori GRi, 0, GRk
772 P KKKKKK 0100010 IIIIII 000000000000 = 0x00880000
773 0 000000 1111111 000000 111111111111 = 0x01fc0fff
774 . . . . . . . .
775 For the time being, we treat this as a prologue instruction,
776 assuming that GRi is an argument register. This one's kind
777 of suspicious, because it seems like it could be part of a
778 legitimate body instruction. But we only come here when the
779 source info wasn't helpful, so we have to do the best we can.
780 Hopefully once GCC and GDB agree on how to emit line number
781 info for prologues, then this code will never come into play. */
782 else if ((op & 0x01fc0fff) == 0x00880000)
783 {
784 int gr_i = ((op >> 12) & 0x3f);
785
786 /* Make sure that the source is an arg register; if it is, we'll
787 treat it as a prologue instruction. */
788 if (is_argument_reg (gr_i))
789 last_prologue_pc = next_pc;
790 }
791
792 /* To spill 16-bit values to the stack:
793 sthi GRk, @(fp, s)
794 P KKKKKK 1010001 000010 SSSSSSSSSSSS = 0x01442000
795 0 000000 1111111 111111 000000000000 = 0x01fff000
796 . . . . . . . .
797 And for 8-bit values, we use STB instructions.
798 stbi GRk, @(fp, s)
799 P KKKKKK 1010000 000010 SSSSSSSSSSSS = 0x01402000
800 0 000000 1111111 111111 000000000000 = 0x01fff000
801 . . . . . . . .
802 We check that GRk is really an argument register, and treat
803 all such as part of the prologue. */
804 else if ( (op & 0x01fff000) == 0x01442000
805 || (op & 0x01fff000) == 0x01402000)
806 {
807 int gr_k = ((op >> 25) & 0x3f);
808
809 /* Make sure that GRk is really an argument register; treat
810 it as a prologue instruction if so. */
811 if (is_argument_reg (gr_k))
812 last_prologue_pc = next_pc;
813 }
814
815 /* To save multiple callee-saves register on the stack, at a
816 non-zero offset:
817
818 stdi GRk, @(sp, s)
819 P KKKKKK 1010011 000001 SSSSSSSSSSSS = 0x014c1000
820 0 000000 1111111 111111 000000000000 = 0x01fff000
821 . . . . . . . .
822 stqi GRk, @(sp, s)
823 P KKKKKK 1010100 000001 SSSSSSSSSSSS = 0x01501000
824 0 000000 1111111 111111 000000000000 = 0x01fff000
825 . . . . . . . .
826 We treat this as part of the prologue, and record the register's
827 saved address in the frame structure. */
828 else if ((op & 0x01fff000) == 0x014c1000
829 || (op & 0x01fff000) == 0x01501000)
830 {
831 int gr_k = ((op >> 25) & 0x3f);
832 int count;
833 int i;
834
835 /* Is it a stdi or a stqi? */
836 if ((op & 0x01fff000) == 0x014c1000)
837 count = 2;
838 else
839 count = 4;
840
841 /* Is it really a callee-saves register? */
842 if (is_callee_saves_reg (gr_k))
843 {
844 /* Sign-extend the twelve-bit field.
845 (Isn't there a better way to do this?) */
846 int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
847
848 for (i = 0; i < count; i++)
849 {
850 gr_saved[gr_k + i] = 1;
851 gr_sp_offset[gr_k + i] = s + (4 * i);
852 }
853 last_prologue_pc = next_pc;
854 }
855 }
856
857 /* Storing any kind of integer register at any constant offset
858 from any other register.
859
860 st GRk, @(GRi, gr0)
861 P KKKKKK 0000011 IIIIII 000010 000000 = 0x000c0080
862 0 000000 1111111 000000 111111 111111 = 0x01fc0fff
863 . . . . . . . .
864 sti GRk, @(GRi, d12)
865 P KKKKKK 1010010 IIIIII SSSSSSSSSSSS = 0x01480000
866 0 000000 1111111 000000 000000000000 = 0x01fc0000
867 . . . . . . . .
868 These could be almost anything, but a lot of prologue
869 instructions fall into this pattern, so let's decode the
870 instruction once, and then work at a higher level. */
871 else if (((op & 0x01fc0fff) == 0x000c0080)
872 || ((op & 0x01fc0000) == 0x01480000))
873 {
874 int gr_k = ((op >> 25) & 0x3f);
875 int gr_i = ((op >> 12) & 0x3f);
876 int offset;
877
878 /* Are we storing with gr0 as an offset, or using an
879 immediate value? */
880 if ((op & 0x01fc0fff) == 0x000c0080)
881 offset = 0;
882 else
883 offset = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
884
885 /* If the address isn't relative to the SP or FP, it's not a
886 prologue instruction. */
887 if (gr_i != sp_regnum && gr_i != fp_regnum)
888 {
889 /* Do nothing; not a prologue instruction. */
890 }
891
892 /* Saving the old FP in the new frame (relative to the SP). */
893 else if (gr_k == fp_regnum && gr_i == sp_regnum)
894 {
895 gr_saved[fp_regnum] = 1;
896 gr_sp_offset[fp_regnum] = offset;
897 last_prologue_pc = next_pc;
898 }
899
900 /* Saving callee-saves register(s) on the stack, relative to
901 the SP. */
902 else if (gr_i == sp_regnum
903 && is_callee_saves_reg (gr_k))
904 {
905 gr_saved[gr_k] = 1;
906 if (gr_i == sp_regnum)
907 gr_sp_offset[gr_k] = offset;
908 else
909 gr_sp_offset[gr_k] = offset + fp_offset;
910 last_prologue_pc = next_pc;
911 }
912
913 /* Saving the scratch register holding the return address. */
914 else if (lr_save_reg != -1
915 && gr_k == lr_save_reg)
916 {
917 lr_saved_on_stack = 1;
918 if (gr_i == sp_regnum)
919 lr_sp_offset = offset;
920 else
921 lr_sp_offset = offset + fp_offset;
922 last_prologue_pc = next_pc;
923 }
924
925 /* Spilling int-sized arguments to the stack. */
926 else if (is_argument_reg (gr_k))
927 last_prologue_pc = next_pc;
928 }
929 pc = next_pc;
930 }
931
932 if (this_frame && info)
933 {
934 int i;
935 ULONGEST this_base;
936
937 /* If we know the relationship between the stack and frame
938 pointers, record the addresses of the registers we noticed.
939 Note that we have to do this as a separate step at the end,
940 because instructions may save relative to the SP, but we need
941 their addresses relative to the FP. */
942 if (fp_set)
943 this_base = get_frame_register_unsigned (this_frame, fp_regnum);
944 else
945 this_base = get_frame_register_unsigned (this_frame, sp_regnum);
946
947 for (i = 0; i < 64; i++)
948 if (gr_saved[i])
949 info->saved_regs[i].set_addr (this_base - fp_offset
950 + gr_sp_offset[i]);
951
952 info->prev_sp = this_base - fp_offset + framesize;
953 info->base = this_base;
954
955 /* If LR was saved on the stack, record its location. */
956 if (lr_saved_on_stack)
957 info->saved_regs[lr_regnum].set_addr (this_base - fp_offset
958 + lr_sp_offset);
959
960 /* The call instruction moves the caller's PC in the callee's LR.
961 Since this is an unwind, do the reverse. Copy the location of LR
962 into PC (the address / regnum) so that a request for PC will be
963 converted into a request for the LR. */
964 info->saved_regs[pc_regnum] = info->saved_regs[lr_regnum];
965
966 /* Save the previous frame's computed SP value. */
967 info->saved_regs[sp_regnum].set_value (info->prev_sp);
968 }
969
970 return last_prologue_pc;
971}
972
973
974static CORE_ADDR
975frv_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
976{
977 CORE_ADDR func_addr, func_end, new_pc;
978
979 new_pc = pc;
980
981 /* If the line table has entry for a line *within* the function
982 (i.e., not in the prologue, and not past the end), then that's
983 our location. */
984 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
985 {
986 struct symtab_and_line sal;
987
988 sal = find_pc_line (func_addr, 0);
989
990 if (sal.line != 0 && sal.end < func_end)
991 {
992 new_pc = sal.end;
993 }
994 }
995
996 /* The FR-V prologue is at least five instructions long (twenty bytes).
997 If we didn't find a real source location past that, then
998 do a full analysis of the prologue. */
999 if (new_pc < pc + 20)
1000 new_pc = frv_analyze_prologue (gdbarch, pc, 0, 0);
1001
1002 return new_pc;
1003}
1004
1005
1006/* Examine the instruction pointed to by PC. If it corresponds to
1007 a call to __main, return the address of the next instruction.
1008 Otherwise, return PC. */
1009
1010static CORE_ADDR
1012{
1013 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1014 gdb_byte buf[4];
1015 unsigned long op;
1016 CORE_ADDR orig_pc = pc;
1017
1018 if (target_read_memory (pc, buf, 4))
1019 return pc;
1020 op = extract_unsigned_integer (buf, 4, byte_order);
1021
1022 /* In PIC code, GR15 may be loaded from some offset off of FP prior
1023 to the call instruction.
1024
1025 Skip over this instruction if present. It won't be present in
1026 non-PIC code, and even in PIC code, it might not be present.
1027 (This is due to the fact that GR15, the FDPIC register, already
1028 contains the correct value.)
1029
1030 The general form of the LDI is given first, followed by the
1031 specific instruction with the GRi and GRk filled in as FP and
1032 GR15.
1033
1034 ldi @(GRi, d12), GRk
1035 P KKKKKK 0110010 IIIIII SSSSSSSSSSSS = 0x00c80000
1036 0 000000 1111111 000000 000000000000 = 0x01fc0000
1037 . . . . . . . .
1038 ldi @(FP, d12), GR15
1039 P KKKKKK 0110010 IIIIII SSSSSSSSSSSS = 0x1ec82000
1040 0 001111 1111111 000010 000000000000 = 0x7ffff000
1041 . . . . . . . . */
1042
1043 if ((op & 0x7ffff000) == 0x1ec82000)
1044 {
1045 pc += 4;
1046 if (target_read_memory (pc, buf, 4))
1047 return orig_pc;
1048 op = extract_unsigned_integer (buf, 4, byte_order);
1049 }
1050
1051 /* The format of an FRV CALL instruction is as follows:
1052
1053 call label24
1054 P HHHHHH 0001111 LLLLLLLLLLLLLLLLLL = 0x003c0000
1055 0 000000 1111111 000000000000000000 = 0x01fc0000
1056 . . . . . . . .
1057
1058 where label24 is constructed by concatenating the H bits with the
1059 L bits. The call target is PC + (4 * sign_ext(label24)). */
1060
1061 if ((op & 0x01fc0000) == 0x003c0000)
1062 {
1063 LONGEST displ;
1064 CORE_ADDR call_dest;
1065 struct bound_minimal_symbol s;
1066
1067 displ = ((op & 0xfe000000) >> 7) | (op & 0x0003ffff);
1068 if ((displ & 0x00800000) != 0)
1069 displ |= ~((LONGEST) 0x00ffffff);
1070
1071 call_dest = pc + 4 * displ;
1072 s = lookup_minimal_symbol_by_pc (call_dest);
1073
1074 if (s.minsym != NULL
1075 && s.minsym->linkage_name () != NULL
1076 && strcmp (s.minsym->linkage_name (), "__main") == 0)
1077 {
1078 pc += 4;
1079 return pc;
1080 }
1081 }
1082 return orig_pc;
1083}
1084
1085
1086static struct frv_unwind_cache *
1088 void **this_prologue_cache)
1089{
1090 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1091 struct frv_unwind_cache *info;
1092
1093 if ((*this_prologue_cache))
1094 return (struct frv_unwind_cache *) (*this_prologue_cache);
1095
1096 info = FRAME_OBSTACK_ZALLOC (struct frv_unwind_cache);
1097 (*this_prologue_cache) = info;
1098 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1099
1100 /* Prologue analysis does the rest... */
1102 get_frame_func (this_frame), this_frame, info);
1103
1104 return info;
1105}
1106
1107static void
1109 gdb_byte *valbuf)
1110{
1111 struct gdbarch *gdbarch = regcache->arch ();
1112 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1113 int len = type->length ();
1114
1115 if (len <= 4)
1116 {
1117 ULONGEST gpr8_val;
1119 store_unsigned_integer (valbuf, len, byte_order, gpr8_val);
1120 }
1121 else if (len == 8)
1122 {
1123 ULONGEST regval;
1124
1126 store_unsigned_integer (valbuf, 4, byte_order, regval);
1128 store_unsigned_integer ((bfd_byte *) valbuf + 4, 4, byte_order, regval);
1129 }
1130 else
1131 internal_error (_("Illegal return value length: %d"), len);
1132}
1133
1134static CORE_ADDR
1135frv_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
1136{
1137 /* Require dword alignment. */
1138 return align_down (sp, 8);
1139}
1140
1141static CORE_ADDR
1142find_func_descr (struct gdbarch *gdbarch, CORE_ADDR entry_point)
1143{
1144 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1145 CORE_ADDR descr;
1146 gdb_byte valbuf[4];
1147 CORE_ADDR start_addr;
1148
1149 /* If we can't find the function in the symbol table, then we assume
1150 that the function address is already in descriptor form. */
1151 if (!find_pc_partial_function (entry_point, NULL, &start_addr, NULL)
1152 || entry_point != start_addr)
1153 return entry_point;
1154
1155 descr = frv_fdpic_find_canonical_descriptor (entry_point);
1156
1157 if (descr != 0)
1158 return descr;
1159
1160 /* Construct a non-canonical descriptor from space allocated on
1161 the stack. */
1162
1164 store_unsigned_integer (valbuf, 4, byte_order, entry_point);
1165 write_memory (descr, valbuf, 4);
1166 store_unsigned_integer (valbuf, 4, byte_order,
1167 frv_fdpic_find_global_pointer (entry_point));
1168 write_memory (descr + 4, valbuf, 4);
1169 return descr;
1170}
1171
1172static CORE_ADDR
1174 struct target_ops *targ)
1175{
1176 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1177 CORE_ADDR entry_point;
1178 CORE_ADDR got_address;
1179
1180 entry_point = get_target_memory_unsigned (targ, addr, 4, byte_order);
1181 got_address = get_target_memory_unsigned (targ, addr + 4, 4, byte_order);
1182
1183 if (got_address == frv_fdpic_find_global_pointer (entry_point))
1184 return entry_point;
1185 else
1186 return addr;
1187}
1188
1189static CORE_ADDR
1190frv_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1191 struct regcache *regcache, CORE_ADDR bp_addr,
1192 int nargs, struct value **args, CORE_ADDR sp,
1193 function_call_return_method return_method,
1194 CORE_ADDR struct_addr)
1195{
1196 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1197 int argreg;
1198 int argnum;
1199 const gdb_byte *val;
1200 gdb_byte valbuf[4];
1201 struct value *arg;
1202 struct type *arg_type;
1203 int len;
1204 enum type_code typecode;
1205 CORE_ADDR regval;
1206 int stack_space;
1207 int stack_offset;
1208 enum frv_abi abi = frv_abi (gdbarch);
1209 CORE_ADDR func_addr = find_function_addr (function, NULL);
1210
1211#if 0
1212 printf("Push %d args at sp = %x, struct_return=%d (%x)\n",
1213 nargs, (int) sp, struct_return, struct_addr);
1214#endif
1215
1216 stack_space = 0;
1217 for (argnum = 0; argnum < nargs; ++argnum)
1218 stack_space += align_up (args[argnum]->type ()->length (), 4);
1219
1220 stack_space -= (6 * 4);
1221 if (stack_space > 0)
1222 sp -= stack_space;
1223
1224 /* Make sure stack is dword aligned. */
1225 sp = align_down (sp, 8);
1226
1227 stack_offset = 0;
1228
1229 argreg = 8;
1230
1231 if (return_method == return_method_struct)
1233 struct_addr);
1234
1235 for (argnum = 0; argnum < nargs; ++argnum)
1236 {
1237 arg = args[argnum];
1238 arg_type = check_typedef (arg->type ());
1239 len = arg_type->length ();
1240 typecode = arg_type->code ();
1241
1242 if (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)
1243 {
1244 store_unsigned_integer (valbuf, 4, byte_order,
1245 arg->address ());
1246 typecode = TYPE_CODE_PTR;
1247 len = 4;
1248 val = valbuf;
1249 }
1250 else if (abi == FRV_ABI_FDPIC
1251 && len == 4
1252 && typecode == TYPE_CODE_PTR
1253 && arg_type->target_type ()->code () == TYPE_CODE_FUNC)
1254 {
1255 /* The FDPIC ABI requires function descriptors to be passed instead
1256 of entry points. */
1257 CORE_ADDR addr = extract_unsigned_integer
1258 (arg->contents ().data (), 4, byte_order);
1259 addr = find_func_descr (gdbarch, addr);
1260 store_unsigned_integer (valbuf, 4, byte_order, addr);
1261 typecode = TYPE_CODE_PTR;
1262 len = 4;
1263 val = valbuf;
1264 }
1265 else
1266 {
1267 val = arg->contents ().data ();
1268 }
1269
1270 while (len > 0)
1271 {
1272 int partial_len = (len < 4 ? len : 4);
1273
1274 if (argreg < 14)
1275 {
1276 regval = extract_unsigned_integer (val, partial_len, byte_order);
1277#if 0
1278 printf(" Argnum %d data %x -> reg %d\n",
1279 argnum, (int) regval, argreg);
1280#endif
1281 regcache_cooked_write_unsigned (regcache, argreg, regval);
1282 ++argreg;
1283 }
1284 else
1285 {
1286#if 0
1287 printf(" Argnum %d data %x -> offset %d (%x)\n",
1288 argnum, *((int *)val), stack_offset,
1289 (int) (sp + stack_offset));
1290#endif
1291 write_memory (sp + stack_offset, val, partial_len);
1292 stack_offset += align_up (partial_len, 4);
1293 }
1294 len -= partial_len;
1295 val += partial_len;
1296 }
1297 }
1298
1299 /* Set the return address. For the frv, the return breakpoint is
1300 always at BP_ADDR. */
1302
1303 if (abi == FRV_ABI_FDPIC)
1304 {
1305 /* Set the GOT register for the FDPIC ABI. */
1308 frv_fdpic_find_global_pointer (func_addr));
1309 }
1310
1311 /* Finally, update the SP register. */
1313
1314 return sp;
1315}
1316
1317static void
1319 const gdb_byte *valbuf)
1320{
1321 int len = type->length ();
1322
1323 if (len <= 4)
1324 {
1325 bfd_byte val[4];
1326 memset (val, 0, sizeof (val));
1327 memcpy (val + (4 - len), valbuf, len);
1328 regcache->cooked_write (8, val);
1329 }
1330 else if (len == 8)
1331 {
1332 regcache->cooked_write (8, valbuf);
1333 regcache->cooked_write (9, (bfd_byte *) valbuf + 4);
1334 }
1335 else
1336 internal_error (_("Don't know how to return a %d-byte value."), len);
1337}
1338
1339static enum return_value_convention
1340frv_return_value (struct gdbarch *gdbarch, struct value *function,
1341 struct type *valtype, struct regcache *regcache,
1342 gdb_byte *readbuf, const gdb_byte *writebuf)
1343{
1344 int struct_return = valtype->code () == TYPE_CODE_STRUCT
1345 || valtype->code () == TYPE_CODE_UNION
1346 || valtype->code () == TYPE_CODE_ARRAY;
1347
1348 if (writebuf != NULL)
1349 {
1350 gdb_assert (!struct_return);
1351 frv_store_return_value (valtype, regcache, writebuf);
1352 }
1353
1354 if (readbuf != NULL)
1355 {
1356 gdb_assert (!struct_return);
1357 frv_extract_return_value (valtype, regcache, readbuf);
1358 }
1359
1360 if (struct_return)
1362 else
1364}
1365
1366/* Given a GDB frame, determine the address of the calling function's
1367 frame. This will be used to create a new GDB frame struct. */
1368
1369static void
1371 void **this_prologue_cache, struct frame_id *this_id)
1372{
1373 struct frv_unwind_cache *info
1374 = frv_frame_unwind_cache (this_frame, this_prologue_cache);
1375 CORE_ADDR base;
1376 CORE_ADDR func;
1377 struct bound_minimal_symbol msym_stack;
1378 struct frame_id id;
1379
1380 /* The FUNC is easy. */
1381 func = get_frame_func (this_frame);
1382
1383 /* Check if the stack is empty. */
1384 msym_stack = lookup_minimal_symbol ("_stack", NULL, NULL);
1385 if (msym_stack.minsym && info->base == msym_stack.value_address ())
1386 return;
1387
1388 /* Hopefully the prologue analysis either correctly determined the
1389 frame's base (which is the SP from the previous frame), or set
1390 that base to "NULL". */
1391 base = info->prev_sp;
1392 if (base == 0)
1393 return;
1394
1395 id = frame_id_build (base, func);
1396 (*this_id) = id;
1397}
1398
1399static struct value *
1401 void **this_prologue_cache, int regnum)
1402{
1403 struct frv_unwind_cache *info
1404 = frv_frame_unwind_cache (this_frame, this_prologue_cache);
1405 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
1406}
1407
1408static const struct frame_unwind frv_frame_unwind = {
1409 "frv prologue",
1414 NULL,
1416};
1417
1418static CORE_ADDR
1419frv_frame_base_address (frame_info_ptr this_frame, void **this_cache)
1420{
1421 struct frv_unwind_cache *info
1422 = frv_frame_unwind_cache (this_frame, this_cache);
1423 return info->base;
1424}
1425
1432
1433static struct gdbarch *
1435{
1436 int elf_flags = 0;
1437
1438 /* Check to see if we've already built an appropriate architecture
1439 object for this executable. */
1441 if (arches)
1442 return arches->gdbarch;
1443
1444 /* Select the right tdep structure for this variant. */
1446 frv_gdbarch_tdep *var = gdbarch_tdep<frv_gdbarch_tdep> (gdbarch);
1447
1448 switch (info.bfd_arch_info->mach)
1449 {
1450 case bfd_mach_frv:
1451 case bfd_mach_frvsimple:
1452 case bfd_mach_fr300:
1453 case bfd_mach_fr500:
1454 case bfd_mach_frvtomcat:
1455 case bfd_mach_fr550:
1456 set_variant_num_gprs (var, 64);
1457 set_variant_num_fprs (var, 64);
1458 break;
1459
1460 case bfd_mach_fr400:
1461 case bfd_mach_fr450:
1462 set_variant_num_gprs (var, 32);
1463 set_variant_num_fprs (var, 32);
1464 break;
1465
1466 default:
1467 /* Never heard of this variant. */
1468 return 0;
1469 }
1470
1471 /* Extract the ELF flags, if available. */
1472 if (info.abfd && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
1473 elf_flags = elf_elfheader (info.abfd)->e_flags;
1474
1475 if (elf_flags & EF_FRV_FDPIC)
1477
1478 if (elf_flags & EF_FRV_CPU_FR450)
1480
1489
1492
1496
1500
1503
1506 set_gdbarch_breakpoint_kind_from_pc (gdbarch, frv_breakpoint::kind_from_pc);
1507 set_gdbarch_sw_breakpoint_from_kind (gdbarch, frv_breakpoint::bp_from_kind);
1509 (gdbarch, frv_adjust_breakpoint_address);
1510
1512
1513 /* Frame stuff. */
1516 /* We set the sniffer lower down after the OSABI hooks have been
1517 established. */
1518
1519 /* Settings for calling functions in the inferior. */
1521
1522 /* Settings that should be unnecessary. */
1524
1525 /* Hardware watchpoint / breakpoint support. */
1526 switch (info.bfd_arch_info->mach)
1527 {
1528 case bfd_mach_frv:
1529 case bfd_mach_frvsimple:
1530 case bfd_mach_fr300:
1531 case bfd_mach_fr500:
1532 case bfd_mach_frvtomcat:
1533 /* fr500-style hardware debugging support. */
1534 var->num_hw_watchpoints = 4;
1535 var->num_hw_breakpoints = 4;
1536 break;
1537
1538 case bfd_mach_fr400:
1539 case bfd_mach_fr450:
1540 /* fr400-style hardware debugging support. */
1541 var->num_hw_watchpoints = 2;
1542 var->num_hw_breakpoints = 4;
1543 break;
1544
1545 default:
1546 /* Otherwise, assume we don't have hardware debugging support. */
1547 var->num_hw_watchpoints = 0;
1548 var->num_hw_breakpoints = 0;
1549 break;
1550 }
1551
1552 if (frv_abi (gdbarch) == FRV_ABI_FDPIC)
1555
1557
1558 /* Hook in ABI-specific overrides, if they have been registered. */
1560
1561 /* Set the fallback (prologue based) frame sniffer. */
1563
1564 /* Enable TLS support. */
1567
1568 return gdbarch;
1569}
1570
1571void _initialize_frv_tdep ();
1572void
1574{
1575 gdbarch_register (bfd_arch_frv, frv_gdbarch_init);
1576}
int regnum
void * xmalloc(YYSIZE_T)
void gdbarch_register(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init, gdbarch_dump_tdep_ftype *dump_tdep, gdbarch_supports_arch_info_ftype *supports_arch_info)
static std::vector< const char * > arches
Definition arch-utils.c:685
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
Definition arch-utils.c:177
struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
#define BP_MANIPULATION(BREAK_INSN)
Definition arch-utils.h:70
struct_return
Definition arm-tdep.h:84
bool find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr, const struct block **block)
Definition blockframe.c:373
CORE_ADDR get_pc_function_start(CORE_ADDR pc)
Definition blockframe.c:86
enum register_status raw_read(int regnum, gdb_byte *buf)
Definition regcache.c:611
gdbarch * arch() const
Definition regcache.c:231
void cooked_write(int regnum, const gdb_byte *buf)
Definition regcache.c:870
void raw_write(int regnum, const gdb_byte *buf)
Definition regcache.c:833
void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
Definition corefile.c:347
static void store_unsigned_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, ULONGEST val)
Definition defs.h:515
static LONGEST extract_signed_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
Definition defs.h:465
static ULONGEST extract_unsigned_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
Definition defs.h:480
return_value_convention
Definition defs.h:257
@ RETURN_VALUE_REGISTER_CONVENTION
Definition defs.h:260
@ RETURN_VALUE_STRUCT_CONVENTION
Definition defs.h:267
void frame_base_set_default(struct gdbarch *gdbarch, const struct frame_base *default_base)
Definition frame-base.c:93
int default_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
enum unwind_stop_reason default_frame_unwind_stop_reason(frame_info_ptr this_frame, void **this_cache)
void frame_unwind_append_unwinder(struct gdbarch *gdbarch, const struct frame_unwind *unwinder)
ULONGEST get_frame_register_unsigned(frame_info_ptr frame, int regnum)
Definition frame.c:1399
CORE_ADDR get_frame_pc(frame_info_ptr frame)
Definition frame.c:2712
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
Definition frame.c:736
struct gdbarch * get_frame_arch(frame_info_ptr this_frame)
Definition frame.c:3027
CORE_ADDR get_frame_func(frame_info_ptr this_frame)
Definition frame.c:1098
@ NORMAL_FRAME
Definition frame.h:187
#define FRAME_OBSTACK_ZALLOC(TYPE)
Definition frame.h:825
static const int frv_instr_size
static struct type * frv_register_type(struct gdbarch *gdbarch, int reg)
Definition frv-tdep.c:284
static const char * frv_register_name(struct gdbarch *gdbarch, int reg)
Definition frv-tdep.c:276
constexpr gdb_byte frv_break_insn[]
Definition frv-tdep.c:422
static void frv_store_return_value(struct type *type, struct regcache *regcache, const gdb_byte *valbuf)
Definition frv-tdep.c:1318
static CORE_ADDR frv_skip_prologue(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition frv-tdep.c:975
static CORE_ADDR frv_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
Definition frv-tdep.c:1190
static void set_variant_num_gprs(frv_gdbarch_tdep *var, int num_gprs)
Definition frv-tdep.c:223
int frv_fdpic_loadmap_addresses(struct gdbarch *gdbarch, CORE_ADDR *interp_addr, CORE_ADDR *exec_addr)
Definition frv-tdep.c:110
static void set_variant_num_fprs(frv_gdbarch_tdep *var, int num_fprs)
Definition frv-tdep.c:242
static const struct frame_base frv_frame_base
Definition frv-tdep.c:1426
static CORE_ADDR frv_frame_base_address(frame_info_ptr this_frame, void **this_cache)
Definition frv-tdep.c:1419
static CORE_ADDR find_func_descr(struct gdbarch *gdbarch, CORE_ADDR entry_point)
Definition frv-tdep.c:1142
static struct gdbarch * frv_gdbarch_init(struct gdbarch_info info, struct gdbarch_list *arches)
Definition frv-tdep.c:1434
static enum return_value_convention frv_return_value(struct gdbarch *gdbarch, struct value *function, struct type *valtype, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
Definition frv-tdep.c:1340
static void frv_extract_return_value(struct type *type, struct regcache *regcache, gdb_byte *valbuf)
Definition frv-tdep.c:1108
static const struct frame_unwind frv_frame_unwind
Definition frv-tdep.c:1408
static enum register_status frv_pseudo_register_read(struct gdbarch *gdbarch, readable_regcache *regcache, int reg, gdb_byte *buffer)
Definition frv-tdep.c:295
static int is_caller_saves_reg(int reg)
Definition frv-tdep.c:475
static int is_argument_reg(int reg)
Definition frv-tdep.c:494
static struct value * frv_frame_prev_register(frame_info_ptr this_frame, void **this_prologue_cache, int regnum)
Definition frv-tdep.c:1400
static CORE_ADDR frv_frame_align(struct gdbarch *gdbarch, CORE_ADDR sp)
Definition frv-tdep.c:1135
void _initialize_frv_tdep()
Definition frv-tdep.c:1573
static void frv_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int reg, const gdb_byte *buffer)
Definition frv-tdep.c:332
std::unique_ptr< frv_gdbarch_tdep > frv_gdbarch_tdep_up
Definition frv-tdep.c:96
static void set_variant_scratch_registers(frv_gdbarch_tdep *var)
Definition frv-tdep.c:267
static CORE_ADDR frv_convert_from_func_ptr_addr(struct gdbarch *gdbarch, CORE_ADDR addr, struct target_ops *targ)
Definition frv-tdep.c:1173
static struct frv_unwind_cache * frv_frame_unwind_cache(frame_info_ptr this_frame, void **this_prologue_cache)
Definition frv-tdep.c:1087
static frv_gdbarch_tdep_up new_variant()
Definition frv-tdep.c:140
static CORE_ADDR frv_analyze_prologue(struct gdbarch *gdbarch, CORE_ADDR pc, frame_info_ptr this_frame, struct frv_unwind_cache *info)
Definition frv-tdep.c:512
static void set_variant_abi_fdpic(frv_gdbarch_tdep *var)
Definition frv-tdep.c:258
static int is_callee_saves_reg(int reg)
Definition frv-tdep.c:485
static CORE_ADDR frv_skip_main_prologue(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition frv-tdep.c:1011
static void frv_frame_this_id(frame_info_ptr this_frame, void **this_prologue_cache, struct frame_id *this_id)
Definition frv-tdep.c:1370
static int frv_register_sim_regno(struct gdbarch *gdbarch, int reg)
Definition frv-tdep.c:356
CORE_ADDR frv_fetch_objfile_link_map(struct objfile *objfile)
Definition solib-frv.c:1066
CORE_ADDR frv_fdpic_find_global_pointer(CORE_ADDR addr)
Definition solib-frv.c:867
CORE_ADDR frv_fdpic_find_canonical_descriptor(CORE_ADDR entry_point)
Definition solib-frv.c:897
@ scr0_regnum
Definition frv-tdep.h:62
@ frv_num_regs
Definition frv-tdep.h:84
@ accg0_regnum
Definition frv-tdep.h:91
@ fp_regnum
Definition frv-tdep.h:36
@ msr1_regnum
Definition frv-tdep.h:76
@ first_fpr_regnum
Definition frv-tdep.h:42
@ acc0_regnum
Definition frv-tdep.h:71
@ dbar2_regnum
Definition frv-tdep.h:60
@ acc7_regnum
Definition frv-tdep.h:72
@ fner0_regnum
Definition frv-tdep.h:79
@ fsr0_regnum
Definition frv-tdep.h:70
@ iacc0l_regnum
Definition frv-tdep.h:69
@ iacc0_regnum
Definition frv-tdep.h:90
@ lr_regnum
Definition frv-tdep.h:66
@ fdpic_loadmap_interp_regnum
Definition frv-tdep.h:55
@ cccr_regnum
Definition frv-tdep.h:53
@ gner1_regnum
Definition frv-tdep.h:78
@ last_gpr_regnum
Definition frv-tdep.h:38
@ psr_regnum
Definition frv-tdep.h:51
@ scr1_regnum
Definition frv-tdep.h:63
@ fner1_regnum
Definition frv-tdep.h:80
@ scr2_regnum
Definition frv-tdep.h:64
@ dbar0_regnum
Definition frv-tdep.h:58
@ lcr_regnum
Definition frv-tdep.h:67
@ ccr_regnum
Definition frv-tdep.h:52
@ accg7_regnum
Definition frv-tdep.h:92
@ msr0_regnum
Definition frv-tdep.h:75
@ tbr_regnum
Definition frv-tdep.h:56
@ first_gpr_regnum
Definition frv-tdep.h:34
@ dbar1_regnum
Definition frv-tdep.h:59
@ sp_regnum
Definition frv-tdep.h:35
@ scr3_regnum
Definition frv-tdep.h:65
@ accg0123_regnum
Definition frv-tdep.h:73
@ pc_regnum
Definition frv-tdep.h:46
@ first_spr_regnum
Definition frv-tdep.h:50
@ dbar3_regnum
Definition frv-tdep.h:61
@ last_fpr_regnum
Definition frv-tdep.h:43
@ fdpic_loadmap_exec_regnum
Definition frv-tdep.h:54
@ struct_return_regnum
Definition frv-tdep.h:37
@ gner0_regnum
Definition frv-tdep.h:77
@ frv_num_pseudo_regs
Definition frv-tdep.h:95
@ brr_regnum
Definition frv-tdep.h:57
@ iacc0h_regnum
Definition frv-tdep.h:68
const struct target_so_ops frv_so_ops
Definition solib-frv.c:1090
frv_abi
Definition frv-tdep.h:24
@ FRV_ABI_FDPIC
Definition frv-tdep.h:26
@ FRV_ABI_EABI
Definition frv-tdep.h:25
void set_gdbarch_long_long_bit(struct gdbarch *gdbarch, int long_long_bit)
Definition gdbarch.c:1493
void set_gdbarch_convert_from_func_ptr_addr(struct gdbarch *gdbarch, gdbarch_convert_from_func_ptr_addr_ftype *convert_from_func_ptr_addr)
enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
Definition gdbarch.c:1396
void set_gdbarch_breakpoint_kind_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_kind_from_pc_ftype *breakpoint_kind_from_pc)
void set_gdbarch_register_sim_regno(struct gdbarch *gdbarch, gdbarch_register_sim_regno_ftype *register_sim_regno)
void set_gdbarch_frame_align(struct gdbarch *gdbarch, gdbarch_frame_align_ftype *frame_align)
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype *skip_prologue)
void set_gdbarch_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype *register_name)
void set_gdbarch_int_bit(struct gdbarch *gdbarch, int int_bit)
Definition gdbarch.c:1459
void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype *return_value)
int gdbarch_num_regs(struct gdbarch *gdbarch)
Definition gdbarch.c:1930
void set_gdbarch_double_bit(struct gdbarch *gdbarch, int double_bit)
Definition gdbarch.c:1612
void set_gdbarch_skip_main_prologue(struct gdbarch *gdbarch, gdbarch_skip_main_prologue_ftype *skip_main_prologue)
void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype *inner_than)
void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
Definition gdbarch.c:2047
void set_gdbarch_pc_regnum(struct gdbarch *gdbarch, int pc_regnum)
Definition gdbarch.c:2064
void set_gdbarch_adjust_breakpoint_address(struct gdbarch *gdbarch, gdbarch_adjust_breakpoint_address_ftype *adjust_breakpoint_address)
void set_gdbarch_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype *register_type)
void set_gdbarch_float_bit(struct gdbarch *gdbarch, int float_bit)
Definition gdbarch.c:1578
void set_gdbarch_short_bit(struct gdbarch *gdbarch, int short_bit)
Definition gdbarch.c:1442
void set_gdbarch_pseudo_register_write(struct gdbarch *gdbarch, gdbarch_pseudo_register_write_ftype *pseudo_register_write)
void set_gdbarch_num_pseudo_regs(struct gdbarch *gdbarch, int num_pseudo_regs)
Definition gdbarch.c:1958
void set_gdbarch_long_bit(struct gdbarch *gdbarch, int long_bit)
Definition gdbarch.c:1476
void set_gdbarch_ptr_bit(struct gdbarch *gdbarch, int ptr_bit)
Definition gdbarch.c:1732
void set_gdbarch_fetch_tls_load_module_address(struct gdbarch *gdbarch, gdbarch_fetch_tls_load_module_address_ftype *fetch_tls_load_module_address)
void set_gdbarch_pseudo_register_read(struct gdbarch *gdbarch, gdbarch_pseudo_register_read_ftype *pseudo_register_read)
void set_gdbarch_deprecated_fp_regnum(struct gdbarch *gdbarch, int deprecated_fp_regnum)
Definition gdbarch.c:2238
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
Definition gdbarch.c:1941
void set_gdbarch_long_double_bit(struct gdbarch *gdbarch, int long_double_bit)
Definition gdbarch.c:1646
void set_gdbarch_sw_breakpoint_from_kind(struct gdbarch *gdbarch, gdbarch_sw_breakpoint_from_kind_ftype *sw_breakpoint_from_kind)
void set_gdbarch_so_ops(struct gdbarch *gdbarch, const struct target_so_ops *so_ops)
Definition gdbarch.c:3380
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype *push_dummy_call)
struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, gdbarch_tdep_up tdep)
Definition gdbarch.c:266
function_call_return_method
Definition gdbarch.h:114
@ return_method_struct
Definition gdbarch.h:126
const struct builtin_type * builtin_type(struct gdbarch *gdbarch)
Definition gdbtypes.c:6168
struct type * check_typedef(struct type *type)
Definition gdbtypes.c:2966
type_code
Definition gdbtypes.h:82
mach_port_t mach_port_t name mach_port_t mach_port_t name kern_return_t int status
Definition gnu-nat.c:1790
CORE_ADDR find_function_addr(struct value *function, struct type **retval_type, struct type **function_type)
Definition infcall.c:278
struct bound_minimal_symbol lookup_minimal_symbol(const char *name, const char *sfile, struct objfile *objf)
Definition minsyms.c:363
struct bound_minimal_symbol lookup_minimal_symbol_by_pc(CORE_ADDR pc)
Definition minsyms.c:996
info(Component c)
Definition gdbarch.py:41
void gdbarch_init_osabi(struct gdbarch_info info, struct gdbarch *gdbarch)
Definition osabi.c:382
enum register_status regcache_cooked_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
Definition regcache.c:796
struct regcache * get_current_regcache(void)
Definition regcache.c:429
void regcache_cooked_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
Definition regcache.c:825
void(* func)(remote_target *remote, char *)
@ SIM_REGNO_DOES_NOT_EXIST
Definition sim-regno.h:33
CORE_ADDR value_address() const
Definition minsyms.h:41
struct minimal_symbol * minsym
Definition minsyms.h:49
struct type * builtin_int64
Definition gdbtypes.h:2121
struct type * builtin_int32
Definition gdbtypes.h:2119
struct type * builtin_float
Definition gdbtypes.h:2089
int num_hw_watchpoints
Definition frv-tdep.c:87
int num_hw_breakpoints
Definition frv-tdep.c:90
const char ** register_names
Definition frv-tdep.c:93
CORE_ADDR prev_sp
Definition frv-tdep.c:51
trad_frame_saved_reg * saved_regs
Definition frv-tdep.c:57
CORE_ADDR base
Definition frv-tdep.c:54
const char * linkage_name() const
Definition symtab.h:460
CORE_ADDR pc
Definition symtab.h:2337
CORE_ADDR end
Definition symtab.h:2338
struct type * target_type() const
Definition gdbtypes.h:1037
type_code code() const
Definition gdbtypes.h:956
ULONGEST length() const
Definition gdbtypes.h:983
Definition value.h:130
gdb::array_view< const gdb_byte > contents()
Definition value.c:1262
struct type * type() const
Definition value.h:180
CORE_ADDR address
Definition value.h:658
CORE_ADDR skip_prologue_using_sal(struct gdbarch *gdbarch, CORE_ADDR func_addr)
Definition symtab.c:3963
struct symtab_and_line find_pc_line(CORE_ADDR pc, int notcurrent)
Definition symtab.c:3295
int target_read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition target.c:1785
ULONGEST get_target_memory_unsigned(struct target_ops *ops, CORE_ADDR addr, int len, enum bfd_endian byte_order)
Definition target.c:2363
trad_frame_saved_reg * trad_frame_alloc_saved_regs(struct gdbarch *gdbarch)
Definition trad-frame.c:62
struct value * trad_frame_get_prev_register(frame_info_ptr this_frame, trad_frame_saved_reg this_saved_regs[], int regnum)
Definition trad-frame.c:187
struct value * value_allocate_space_in_inferior(int len)
Definition valops.c:175
LONGEST value_as_long(struct value *val)
Definition value.c:2554