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i386-tdep.c
Go to the documentation of this file.
1/* Intel 386 target-dependent stuff.
2
3 Copyright (C) 1988-2023 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20#include "defs.h"
21#include "opcode/i386.h"
22#include "arch-utils.h"
23#include "command.h"
24#include "dummy-frame.h"
25#include "dwarf2/frame.h"
26#include "frame.h"
27#include "frame-base.h"
28#include "frame-unwind.h"
29#include "inferior.h"
30#include "infrun.h"
31#include "gdbcmd.h"
32#include "gdbcore.h"
33#include "gdbtypes.h"
34#include "objfiles.h"
35#include "osabi.h"
36#include "regcache.h"
37#include "reggroups.h"
38#include "regset.h"
39#include "symfile.h"
40#include "symtab.h"
41#include "target.h"
42#include "target-float.h"
43#include "value.h"
44#include "dis-asm.h"
45#include "disasm.h"
46#include "remote.h"
47#include "i386-tdep.h"
48#include "i387-tdep.h"
49#include "gdbsupport/x86-xstate.h"
50#include "x86-tdep.h"
51#include "expop.h"
52
53#include "record.h"
54#include "record-full.h"
55#include "target-descriptions.h"
56#include "arch/i386.h"
57
58#include "ax.h"
59#include "ax-gdb.h"
60
61#include "stap-probe.h"
62#include "user-regs.h"
63#include "cli/cli-utils.h"
64#include "expression.h"
65#include "parser-defs.h"
66#include <ctype.h>
67#include <algorithm>
68#include <unordered_set>
69#include "producer.h"
70#include "infcall.h"
71#include "maint.h"
72
73/* Register names. */
74
75static const char * const i386_register_names[] =
76{
77 "eax", "ecx", "edx", "ebx",
78 "esp", "ebp", "esi", "edi",
79 "eip", "eflags", "cs", "ss",
80 "ds", "es", "fs", "gs",
81 "st0", "st1", "st2", "st3",
82 "st4", "st5", "st6", "st7",
83 "fctrl", "fstat", "ftag", "fiseg",
84 "fioff", "foseg", "fooff", "fop",
85 "xmm0", "xmm1", "xmm2", "xmm3",
86 "xmm4", "xmm5", "xmm6", "xmm7",
87 "mxcsr"
88};
89
90static const char * const i386_zmm_names[] =
91{
92 "zmm0", "zmm1", "zmm2", "zmm3",
93 "zmm4", "zmm5", "zmm6", "zmm7"
94};
95
96static const char * const i386_zmmh_names[] =
97{
98 "zmm0h", "zmm1h", "zmm2h", "zmm3h",
99 "zmm4h", "zmm5h", "zmm6h", "zmm7h"
100};
101
102static const char * const i386_k_names[] =
103{
104 "k0", "k1", "k2", "k3",
105 "k4", "k5", "k6", "k7"
106};
107
108static const char * const i386_ymm_names[] =
109{
110 "ymm0", "ymm1", "ymm2", "ymm3",
111 "ymm4", "ymm5", "ymm6", "ymm7",
112};
113
114static const char * const i386_ymmh_names[] =
115{
116 "ymm0h", "ymm1h", "ymm2h", "ymm3h",
117 "ymm4h", "ymm5h", "ymm6h", "ymm7h",
118};
119
120static const char * const i386_mpx_names[] =
121{
122 "bnd0raw", "bnd1raw", "bnd2raw", "bnd3raw", "bndcfgu", "bndstatus"
123};
124
125static const char * const i386_pkeys_names[] =
126{
127 "pkru"
128};
129
130/* Register names for MPX pseudo-registers. */
131
132static const char * const i386_bnd_names[] =
133{
134 "bnd0", "bnd1", "bnd2", "bnd3"
135};
136
137/* Register names for MMX pseudo-registers. */
138
139static const char * const i386_mmx_names[] =
140{
141 "mm0", "mm1", "mm2", "mm3",
142 "mm4", "mm5", "mm6", "mm7"
143};
144
145/* Register names for byte pseudo-registers. */
146
147static const char * const i386_byte_names[] =
148{
149 "al", "cl", "dl", "bl",
150 "ah", "ch", "dh", "bh"
151};
152
153/* Register names for word pseudo-registers. */
154
155static const char * const i386_word_names[] =
156{
157 "ax", "cx", "dx", "bx",
158 "", "bp", "si", "di"
159};
160
161/* Constant used for reading/writing pseudo registers. In 64-bit mode, we have
162 16 lower ZMM regs that extend corresponding xmm/ymm registers. In addition,
163 we have 16 upper ZMM regs that have to be handled differently. */
164
165const int num_lower_zmm_regs = 16;
166
167/* MMX register? */
168
169static int
171{
172 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
173 int mm0_regnum = tdep->mm0_regnum;
174
175 if (mm0_regnum < 0)
176 return 0;
177
178 regnum -= mm0_regnum;
179 return regnum >= 0 && regnum < tdep->num_mmx_regs;
180}
181
182/* Byte register? */
183
184int
186{
187 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
188
189 regnum -= tdep->al_regnum;
190 return regnum >= 0 && regnum < tdep->num_byte_regs;
191}
192
193/* Word register? */
194
195int
197{
198 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
199
200 regnum -= tdep->ax_regnum;
201 return regnum >= 0 && regnum < tdep->num_word_regs;
202}
203
204/* Dword register? */
205
206int
208{
209 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
210 int eax_regnum = tdep->eax_regnum;
211
212 if (eax_regnum < 0)
213 return 0;
214
215 regnum -= eax_regnum;
216 return regnum >= 0 && regnum < tdep->num_dword_regs;
217}
218
219/* AVX512 register? */
220
221int
223{
224 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
225 int zmm0h_regnum = tdep->zmm0h_regnum;
226
227 if (zmm0h_regnum < 0)
228 return 0;
229
230 regnum -= zmm0h_regnum;
231 return regnum >= 0 && regnum < tdep->num_zmm_regs;
232}
233
234int
236{
237 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
238 int zmm0_regnum = tdep->zmm0_regnum;
239
240 if (zmm0_regnum < 0)
241 return 0;
242
243 regnum -= zmm0_regnum;
244 return regnum >= 0 && regnum < tdep->num_zmm_regs;
245}
246
247int
249{
250 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
251 int k0_regnum = tdep->k0_regnum;
252
253 if (k0_regnum < 0)
254 return 0;
255
256 regnum -= k0_regnum;
257 return regnum >= 0 && regnum < I387_NUM_K_REGS;
258}
259
260static int
262{
263 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
264 int ymm0h_regnum = tdep->ymm0h_regnum;
265
266 if (ymm0h_regnum < 0)
267 return 0;
268
269 regnum -= ymm0h_regnum;
270 return regnum >= 0 && regnum < tdep->num_ymm_regs;
271}
272
273/* AVX register? */
274
275int
277{
278 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
279 int ymm0_regnum = tdep->ymm0_regnum;
280
281 if (ymm0_regnum < 0)
282 return 0;
283
284 regnum -= ymm0_regnum;
285 return regnum >= 0 && regnum < tdep->num_ymm_regs;
286}
287
288static int
290{
291 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
292 int ymm16h_regnum = tdep->ymm16h_regnum;
293
294 if (ymm16h_regnum < 0)
295 return 0;
296
297 regnum -= ymm16h_regnum;
298 return regnum >= 0 && regnum < tdep->num_ymm_avx512_regs;
299}
300
301int
303{
304 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
305 int ymm16_regnum = tdep->ymm16_regnum;
306
307 if (ymm16_regnum < 0)
308 return 0;
309
310 regnum -= ymm16_regnum;
311 return regnum >= 0 && regnum < tdep->num_ymm_avx512_regs;
312}
313
314/* BND register? */
315
316int
318{
319 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
320 int bnd0_regnum = tdep->bnd0_regnum;
321
322 if (bnd0_regnum < 0)
323 return 0;
324
325 regnum -= bnd0_regnum;
326 return regnum >= 0 && regnum < I387_NUM_BND_REGS;
327}
328
329/* SSE register? */
330
331int
333{
334 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
335 int num_xmm_regs = I387_NUM_XMM_REGS (tdep);
336
337 if (num_xmm_regs == 0)
338 return 0;
339
340 regnum -= I387_XMM0_REGNUM (tdep);
341 return regnum >= 0 && regnum < num_xmm_regs;
342}
343
344/* XMM_512 register? */
345
346int
348{
349 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
350 int num_xmm_avx512_regs = I387_NUM_XMM_AVX512_REGS (tdep);
351
352 if (num_xmm_avx512_regs == 0)
353 return 0;
354
355 regnum -= I387_XMM16_REGNUM (tdep);
356 return regnum >= 0 && regnum < num_xmm_avx512_regs;
357}
358
359static int
361{
362 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
363
364 if (I387_NUM_XMM_REGS (tdep) == 0)
365 return 0;
366
367 return (regnum == I387_MXCSR_REGNUM (tdep));
368}
369
370/* FP register? */
371
372int
374{
375 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
376
377 if (I387_ST0_REGNUM (tdep) < 0)
378 return 0;
379
380 return (I387_ST0_REGNUM (tdep) <= regnum
381 && regnum < I387_FCTRL_REGNUM (tdep));
382}
383
384int
386{
387 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
388
389 if (I387_ST0_REGNUM (tdep) < 0)
390 return 0;
391
392 return (I387_FCTRL_REGNUM (tdep) <= regnum
393 && regnum < I387_XMM0_REGNUM (tdep));
394}
395
396/* BNDr (raw) register? */
397
398static int
400{
401 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
402
403 if (I387_BND0R_REGNUM (tdep) < 0)
404 return 0;
405
406 regnum -= tdep->bnd0r_regnum;
407 return regnum >= 0 && regnum < I387_NUM_BND_REGS;
408}
409
410/* BND control register? */
411
412static int
414{
415 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
416
417 if (I387_BNDCFGU_REGNUM (tdep) < 0)
418 return 0;
419
420 regnum -= I387_BNDCFGU_REGNUM (tdep);
421 return regnum >= 0 && regnum < I387_NUM_MPX_CTRL_REGS;
422}
423
424/* PKRU register? */
425
426bool
428{
429 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
430 int pkru_regnum = tdep->pkru_regnum;
431
432 if (pkru_regnum < 0)
433 return false;
434
435 regnum -= pkru_regnum;
436 return regnum >= 0 && regnum < I387_NUM_PKEYS_REGS;
437}
438
439/* Return the name of register REGNUM, or the empty string if it is
440 an anonymous register. */
441
442static const char *
444{
445 /* Hide the upper YMM registers. */
447 return "";
448
449 /* Hide the upper YMM16-31 registers. */
451 return "";
452
453 /* Hide the upper ZMM registers. */
455 return "";
456
458}
459
460/* Return the name of register REGNUM. */
461
462const char *
464{
465 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
467 return i386_bnd_names[regnum - tdep->bnd0_regnum];
469 return i386_mmx_names[regnum - I387_MM0_REGNUM (tdep)];
470 else if (i386_ymm_regnum_p (gdbarch, regnum))
471 return i386_ymm_names[regnum - tdep->ymm0_regnum];
472 else if (i386_zmm_regnum_p (gdbarch, regnum))
473 return i386_zmm_names[regnum - tdep->zmm0_regnum];
475 return i386_byte_names[regnum - tdep->al_regnum];
477 return i386_word_names[regnum - tdep->ax_regnum];
478
479 internal_error (_("invalid regnum"));
480}
481
482/* Convert a dbx register number REG to the appropriate register
483 number used by GDB. */
484
485static int
487{
488 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
489
490 /* This implements what GCC calls the "default" register map
491 (dbx_register_map[]). */
492
493 if (reg >= 0 && reg <= 7)
494 {
495 /* General-purpose registers. The debug info calls %ebp
496 register 4, and %esp register 5. */
497 if (reg == 4)
498 return 5;
499 else if (reg == 5)
500 return 4;
501 else return reg;
502 }
503 else if (reg >= 12 && reg <= 19)
504 {
505 /* Floating-point registers. */
506 return reg - 12 + I387_ST0_REGNUM (tdep);
507 }
508 else if (reg >= 21 && reg <= 28)
509 {
510 /* SSE registers. */
511 int ymm0_regnum = tdep->ymm0_regnum;
512
513 if (ymm0_regnum >= 0
514 && i386_xmm_regnum_p (gdbarch, reg))
515 return reg - 21 + ymm0_regnum;
516 else
517 return reg - 21 + I387_XMM0_REGNUM (tdep);
518 }
519 else if (reg >= 29 && reg <= 36)
520 {
521 /* MMX registers. */
522 return reg - 29 + I387_MM0_REGNUM (tdep);
523 }
524
525 /* This will hopefully provoke a warning. */
527}
528
529/* Convert SVR4 DWARF register number REG to the appropriate register number
530 used by GDB. */
531
532static int
534{
535 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
536
537 /* This implements the GCC register map that tries to be compatible
538 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
539
540 /* The SVR4 register numbering includes %eip and %eflags, and
541 numbers the floating point registers differently. */
542 if (reg >= 0 && reg <= 9)
543 {
544 /* General-purpose registers. */
545 return reg;
546 }
547 else if (reg >= 11 && reg <= 18)
548 {
549 /* Floating-point registers. */
550 return reg - 11 + I387_ST0_REGNUM (tdep);
551 }
552 else if (reg >= 21 && reg <= 36)
553 {
554 /* The SSE and MMX registers have the same numbers as with dbx. */
555 return i386_dbx_reg_to_regnum (gdbarch, reg);
556 }
557
558 switch (reg)
559 {
560 case 37: return I387_FCTRL_REGNUM (tdep);
561 case 38: return I387_FSTAT_REGNUM (tdep);
562 case 39: return I387_MXCSR_REGNUM (tdep);
563 case 40: return I386_ES_REGNUM;
564 case 41: return I386_CS_REGNUM;
565 case 42: return I386_SS_REGNUM;
566 case 43: return I386_DS_REGNUM;
567 case 44: return I386_FS_REGNUM;
568 case 45: return I386_GS_REGNUM;
569 }
570
571 return -1;
572}
573
574/* Wrapper on i386_svr4_dwarf_reg_to_regnum to return
575 num_regs + num_pseudo_regs for other debug formats. */
576
577int
579{
581
582 if (regnum == -1)
584 return regnum;
585}
586
587
588
589/* This is the variable that is set with "set disassembly-flavor", and
590 its legitimate values. */
591static const char att_flavor[] = "att";
592static const char intel_flavor[] = "intel";
593static const char *const valid_flavors[] =
594{
597 NULL
598};
599static const char *disassembly_flavor = att_flavor;
600
601
602/* Use the program counter to determine the contents and size of a
603 breakpoint instruction. Return a pointer to a string of bytes that
604 encode a breakpoint instruction, store the length of the string in
605 *LEN and optionally adjust *PC to point to the correct memory
606 location for inserting the breakpoint.
607
608 On the i386 we have a single breakpoint that fits in a single byte
609 and can be inserted anywhere.
610
611 This function is 64-bit safe. */
612
613constexpr gdb_byte i386_break_insn[] = { 0xcc }; /* int 3 */
614
615typedef BP_MANIPULATION (i386_break_insn) i386_breakpoint;
616
617
618/* Displaced instruction handling. */
619
620/* Skip the legacy instruction prefixes in INSN.
621 Not all prefixes are valid for any particular insn
622 but we needn't care, the insn will fault if it's invalid.
623 The result is a pointer to the first opcode byte,
624 or NULL if we run off the end of the buffer. */
625
626static gdb_byte *
627i386_skip_prefixes (gdb_byte *insn, size_t max_len)
628{
629 gdb_byte *end = insn + max_len;
630
631 while (insn < end)
632 {
633 switch (*insn)
634 {
635 case DATA_PREFIX_OPCODE:
636 case ADDR_PREFIX_OPCODE:
637 case CS_PREFIX_OPCODE:
638 case DS_PREFIX_OPCODE:
639 case ES_PREFIX_OPCODE:
640 case FS_PREFIX_OPCODE:
641 case GS_PREFIX_OPCODE:
642 case SS_PREFIX_OPCODE:
643 case LOCK_PREFIX_OPCODE:
644 case REPE_PREFIX_OPCODE:
645 case REPNE_PREFIX_OPCODE:
646 ++insn;
647 continue;
648 default:
649 return insn;
650 }
651 }
652
653 return NULL;
654}
655
656static int
657i386_absolute_jmp_p (const gdb_byte *insn)
658{
659 /* jmp far (absolute address in operand). */
660 if (insn[0] == 0xea)
661 return 1;
662
663 if (insn[0] == 0xff)
664 {
665 /* jump near, absolute indirect (/4). */
666 if ((insn[1] & 0x38) == 0x20)
667 return 1;
668
669 /* jump far, absolute indirect (/5). */
670 if ((insn[1] & 0x38) == 0x28)
671 return 1;
672 }
673
674 return 0;
675}
676
677/* Return non-zero if INSN is a jump, zero otherwise. */
678
679static int
680i386_jmp_p (const gdb_byte *insn)
681{
682 /* jump short, relative. */
683 if (insn[0] == 0xeb)
684 return 1;
685
686 /* jump near, relative. */
687 if (insn[0] == 0xe9)
688 return 1;
689
690 return i386_absolute_jmp_p (insn);
691}
692
693static int
694i386_absolute_call_p (const gdb_byte *insn)
695{
696 /* call far, absolute. */
697 if (insn[0] == 0x9a)
698 return 1;
699
700 if (insn[0] == 0xff)
701 {
702 /* Call near, absolute indirect (/2). */
703 if ((insn[1] & 0x38) == 0x10)
704 return 1;
705
706 /* Call far, absolute indirect (/3). */
707 if ((insn[1] & 0x38) == 0x18)
708 return 1;
709 }
710
711 return 0;
712}
713
714static int
715i386_ret_p (const gdb_byte *insn)
716{
717 switch (insn[0])
718 {
719 case 0xc2: /* ret near, pop N bytes. */
720 case 0xc3: /* ret near */
721 case 0xca: /* ret far, pop N bytes. */
722 case 0xcb: /* ret far */
723 case 0xcf: /* iret */
724 return 1;
725
726 default:
727 return 0;
728 }
729}
730
731static int
732i386_call_p (const gdb_byte *insn)
733{
734 if (i386_absolute_call_p (insn))
735 return 1;
736
737 /* call near, relative. */
738 if (insn[0] == 0xe8)
739 return 1;
740
741 return 0;
742}
743
744/* Return non-zero if INSN is a system call, and set *LENGTHP to its
745 length in bytes. Otherwise, return zero. */
746
747static int
748i386_syscall_p (const gdb_byte *insn, int *lengthp)
749{
750 /* Is it 'int $0x80'? */
751 if ((insn[0] == 0xcd && insn[1] == 0x80)
752 /* Or is it 'sysenter'? */
753 || (insn[0] == 0x0f && insn[1] == 0x34)
754 /* Or is it 'syscall'? */
755 || (insn[0] == 0x0f && insn[1] == 0x05))
756 {
757 *lengthp = 2;
758 return 1;
759 }
760
761 return 0;
762}
763
764/* The gdbarch insn_is_call method. */
765
766static int
767i386_insn_is_call (struct gdbarch *gdbarch, CORE_ADDR addr)
768{
769 gdb_byte buf[I386_MAX_INSN_LEN], *insn;
770
771 read_code (addr, buf, I386_MAX_INSN_LEN);
772 insn = i386_skip_prefixes (buf, I386_MAX_INSN_LEN);
773
774 return i386_call_p (insn);
775}
776
777/* The gdbarch insn_is_ret method. */
778
779static int
780i386_insn_is_ret (struct gdbarch *gdbarch, CORE_ADDR addr)
781{
782 gdb_byte buf[I386_MAX_INSN_LEN], *insn;
783
784 read_code (addr, buf, I386_MAX_INSN_LEN);
785 insn = i386_skip_prefixes (buf, I386_MAX_INSN_LEN);
786
787 return i386_ret_p (insn);
788}
789
790/* The gdbarch insn_is_jump method. */
791
792static int
793i386_insn_is_jump (struct gdbarch *gdbarch, CORE_ADDR addr)
794{
795 gdb_byte buf[I386_MAX_INSN_LEN], *insn;
796
797 read_code (addr, buf, I386_MAX_INSN_LEN);
798 insn = i386_skip_prefixes (buf, I386_MAX_INSN_LEN);
799
800 return i386_jmp_p (insn);
801}
802
803/* Some kernels may run one past a syscall insn, so we have to cope. */
804
807 CORE_ADDR from, CORE_ADDR to,
808 struct regcache *regs)
809{
810 size_t len = gdbarch_max_insn_length (gdbarch);
811 std::unique_ptr<i386_displaced_step_copy_insn_closure> closure
813 gdb_byte *buf = closure->buf.data ();
814
815 read_memory (from, buf, len);
816
817 /* GDB may get control back after the insn after the syscall.
818 Presumably this is a kernel bug.
819 If this is a syscall, make sure there's a nop afterwards. */
820 {
821 int syscall_length;
822 gdb_byte *insn;
823
824 insn = i386_skip_prefixes (buf, len);
825 if (insn != NULL && i386_syscall_p (insn, &syscall_length))
826 insn[syscall_length] = NOP_OPCODE;
827 }
828
829 write_memory (to, buf, len);
830
831 displaced_debug_printf ("%s->%s: %s",
832 paddress (gdbarch, from), paddress (gdbarch, to),
833 bytes_to_string (buf, len).c_str ());
834
835 /* This is a work around for a problem with g++ 4.8. */
836 return displaced_step_copy_insn_closure_up (closure.release ());
837}
838
839/* Fix up the state of registers and memory after having single-stepped
840 a displaced instruction. */
841
842void
844 struct displaced_step_copy_insn_closure *closure_,
845 CORE_ADDR from, CORE_ADDR to,
846 struct regcache *regs, bool completed_p)
847{
848 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
849
850 /* The offset we applied to the instruction's address.
851 This could well be negative (when viewed as a signed 32-bit
852 value), but ULONGEST won't reflect that, so take care when
853 applying it. */
854 ULONGEST insn_offset = to - from;
855
858 gdb_byte *insn = closure->buf.data ();
859 /* The start of the insn, needed in case we see some prefixes. */
860 gdb_byte *insn_start = insn;
861
862 displaced_debug_printf ("fixup (%s, %s), insn = 0x%02x 0x%02x ...",
863 paddress (gdbarch, from), paddress (gdbarch, to),
864 insn[0], insn[1]);
865
866 /* The list of issues to contend with here is taken from
867 resume_execution in arch/i386/kernel/kprobes.c, Linux 2.6.20.
868 Yay for Free Software! */
869
870 /* Relocate the %eip, if necessary. */
871
872 /* The instruction recognizers we use assume any leading prefixes
873 have been skipped. */
874 {
875 /* This is the size of the buffer in closure. */
876 size_t max_insn_len = gdbarch_max_insn_length (gdbarch);
877 gdb_byte *opcode = i386_skip_prefixes (insn, max_insn_len);
878 /* If there are too many prefixes, just ignore the insn.
879 It will fault when run. */
880 if (opcode != NULL)
881 insn = opcode;
882 }
883
884 /* Except in the case of absolute or indirect jump or call
885 instructions, or a return instruction, the new eip is relative to
886 the displaced instruction; make it relative. Well, signal
887 handler returns don't need relocation either, but we use the
888 value of %eip to recognize those; see below. */
889 if (!completed_p
890 || (!i386_absolute_jmp_p (insn)
891 && !i386_absolute_call_p (insn)
892 && !i386_ret_p (insn)))
893 {
894 int insn_len;
895
896 CORE_ADDR pc = regcache_read_pc (regs);
897
898 /* A signal trampoline system call changes the %eip, resuming
899 execution of the main program after the signal handler has
900 returned. That makes them like 'return' instructions; we
901 shouldn't relocate %eip.
902
903 But most system calls don't, and we do need to relocate %eip.
904
905 Our heuristic for distinguishing these cases: if stepping
906 over the system call instruction left control directly after
907 the instruction, the we relocate --- control almost certainly
908 doesn't belong in the displaced copy. Otherwise, we assume
909 the instruction has put control where it belongs, and leave
910 it unrelocated. Goodness help us if there are PC-relative
911 system calls. */
912 if (i386_syscall_p (insn, &insn_len)
913 && pc != to + (insn - insn_start) + insn_len
914 /* GDB can get control back after the insn after the syscall.
915 Presumably this is a kernel bug.
916 i386_displaced_step_copy_insn ensures it's a nop,
917 we add one to the length for it. */
918 && pc != to + (insn - insn_start) + insn_len + 1)
919 displaced_debug_printf ("syscall changed %%eip; not relocating");
920 else
921 {
922 ULONGEST eip = (pc - insn_offset) & 0xffffffffUL;
923
924 /* If we just stepped over a breakpoint insn, we don't backup
925 the pc on purpose; this is to match behaviour without
926 stepping. */
927
928 regcache_write_pc (regs, eip);
929
930 displaced_debug_printf ("relocated %%eip from %s to %s",
931 paddress (gdbarch, pc),
932 paddress (gdbarch, eip));
933 }
934 }
935
936 /* If the instruction was PUSHFL, then the TF bit will be set in the
937 pushed value, and should be cleared. We'll leave this for later,
938 since GDB already messes up the TF flag when stepping over a
939 pushfl. */
940
941 /* If the instruction was a call, the return address now atop the
942 stack is the address following the copied instruction. We need
943 to make it the address following the original instruction. */
944 if (completed_p && i386_call_p (insn))
945 {
946 ULONGEST esp;
947 ULONGEST retaddr;
948 const ULONGEST retaddr_len = 4;
949
951 retaddr = read_memory_unsigned_integer (esp, retaddr_len, byte_order);
952 retaddr = (retaddr - insn_offset) & 0xffffffffUL;
953 write_memory_unsigned_integer (esp, retaddr_len, byte_order, retaddr);
954
955 displaced_debug_printf ("relocated return addr at %s to %s",
956 paddress (gdbarch, esp),
957 paddress (gdbarch, retaddr));
958 }
959}
960
961static void
962append_insns (CORE_ADDR *to, ULONGEST len, const gdb_byte *buf)
963{
964 target_write_memory (*to, buf, len);
965 *to += len;
966}
967
968static void
970 CORE_ADDR *to, CORE_ADDR oldloc)
971{
972 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
973 gdb_byte buf[I386_MAX_INSN_LEN];
974 int offset = 0, rel32, newrel;
975 int insn_length;
976 gdb_byte *insn = buf;
977
978 read_memory (oldloc, buf, I386_MAX_INSN_LEN);
979
980 insn_length = gdb_buffered_insn_length (gdbarch, insn,
981 I386_MAX_INSN_LEN, oldloc);
982
983 /* Get past the prefixes. */
984 insn = i386_skip_prefixes (insn, I386_MAX_INSN_LEN);
985
986 /* Adjust calls with 32-bit relative addresses as push/jump, with
987 the address pushed being the location where the original call in
988 the user program would return to. */
989 if (insn[0] == 0xe8)
990 {
991 gdb_byte push_buf[16];
992 unsigned int ret_addr;
993
994 /* Where "ret" in the original code will return to. */
995 ret_addr = oldloc + insn_length;
996 push_buf[0] = 0x68; /* pushq $... */
997 store_unsigned_integer (&push_buf[1], 4, byte_order, ret_addr);
998 /* Push the push. */
999 append_insns (to, 5, push_buf);
1000
1001 /* Convert the relative call to a relative jump. */
1002 insn[0] = 0xe9;
1003
1004 /* Adjust the destination offset. */
1005 rel32 = extract_signed_integer (insn + 1, 4, byte_order);
1006 newrel = (oldloc - *to) + rel32;
1007 store_signed_integer (insn + 1, 4, byte_order, newrel);
1008
1009 displaced_debug_printf ("adjusted insn rel32=%s at %s to rel32=%s at %s",
1010 hex_string (rel32), paddress (gdbarch, oldloc),
1011 hex_string (newrel), paddress (gdbarch, *to));
1012
1013 /* Write the adjusted jump into its displaced location. */
1014 append_insns (to, 5, insn);
1015 return;
1016 }
1017
1018 /* Adjust jumps with 32-bit relative addresses. Calls are already
1019 handled above. */
1020 if (insn[0] == 0xe9)
1021 offset = 1;
1022 /* Adjust conditional jumps. */
1023 else if (insn[0] == 0x0f && (insn[1] & 0xf0) == 0x80)
1024 offset = 2;
1025
1026 if (offset)
1027 {
1028 rel32 = extract_signed_integer (insn + offset, 4, byte_order);
1029 newrel = (oldloc - *to) + rel32;
1030 store_signed_integer (insn + offset, 4, byte_order, newrel);
1031 displaced_debug_printf ("adjusted insn rel32=%s at %s to rel32=%s at %s",
1032 hex_string (rel32), paddress (gdbarch, oldloc),
1033 hex_string (newrel), paddress (gdbarch, *to));
1034 }
1035
1036 /* Write the adjusted instructions into their displaced
1037 location. */
1038 append_insns (to, insn_length, buf);
1039}
1040
1041
1042#ifdef I386_REGNO_TO_SYMMETRY
1043#error "The Sequent Symmetry is no longer supported."
1044#endif
1045
1046/* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
1047 and %esp "belong" to the calling function. Therefore these
1048 registers should be saved if they're going to be modified. */
1049
1050/* The maximum number of saved registers. This should include all
1051 registers mentioned above, and %eip. */
1052#define I386_NUM_SAVED_REGS I386_NUM_GREGS
1053
1055{
1056 /* Base address. */
1057 CORE_ADDR base;
1059 LONGEST sp_offset;
1060 CORE_ADDR pc;
1061
1062 /* Saved registers. */
1064 CORE_ADDR saved_sp;
1067
1068 /* Stack space reserved for local variables. */
1070};
1071
1072/* Allocate and initialize a frame cache. */
1073
1074static struct i386_frame_cache *
1076{
1077 struct i386_frame_cache *cache;
1078 int i;
1079
1080 cache = FRAME_OBSTACK_ZALLOC (struct i386_frame_cache);
1081
1082 /* Base address. */
1083 cache->base_p = 0;
1084 cache->base = 0;
1085 cache->sp_offset = -4;
1086 cache->pc = 0;
1087
1088 /* Saved registers. We initialize these to -1 since zero is a valid
1089 offset (that's where %ebp is supposed to be stored). */
1090 for (i = 0; i < I386_NUM_SAVED_REGS; i++)
1091 cache->saved_regs[i] = -1;
1092 cache->saved_sp = 0;
1093 cache->saved_sp_reg = -1;
1094 cache->pc_in_eax = 0;
1095
1096 /* Frameless until proven otherwise. */
1097 cache->locals = -1;
1098
1099 return cache;
1100}
1101
1102/* If the instruction at PC is a jump, return the address of its
1103 target. Otherwise, return PC. */
1104
1105static CORE_ADDR
1107{
1108 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1109 gdb_byte op;
1110 long delta = 0;
1111 int data16 = 0;
1112
1113 if (target_read_code (pc, &op, 1))
1114 return pc;
1115
1116 if (op == 0x66)
1117 {
1118 data16 = 1;
1119
1120 op = read_code_unsigned_integer (pc + 1, 1, byte_order);
1121 }
1122
1123 switch (op)
1124 {
1125 case 0xe9:
1126 /* Relative jump: if data16 == 0, disp32, else disp16. */
1127 if (data16)
1128 {
1129 delta = read_memory_integer (pc + 2, 2, byte_order);
1130
1131 /* Include the size of the jmp instruction (including the
1132 0x66 prefix). */
1133 delta += 4;
1134 }
1135 else
1136 {
1137 delta = read_memory_integer (pc + 1, 4, byte_order);
1138
1139 /* Include the size of the jmp instruction. */
1140 delta += 5;
1141 }
1142 break;
1143 case 0xeb:
1144 /* Relative jump, disp8 (ignore data16). */
1145 delta = read_memory_integer (pc + data16 + 1, 1, byte_order);
1146
1147 delta += data16 + 2;
1148 break;
1149 }
1150
1151 return pc + delta;
1152}
1153
1154/* Check whether PC points at a prologue for a function returning a
1155 structure or union. If so, it updates CACHE and returns the
1156 address of the first instruction after the code sequence that
1157 removes the "hidden" argument from the stack or CURRENT_PC,
1158 whichever is smaller. Otherwise, return PC. */
1159
1160static CORE_ADDR
1161i386_analyze_struct_return (CORE_ADDR pc, CORE_ADDR current_pc,
1162 struct i386_frame_cache *cache)
1163{
1164 /* Functions that return a structure or union start with:
1165
1166 popl %eax 0x58
1167 xchgl %eax, (%esp) 0x87 0x04 0x24
1168 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
1169
1170 (the System V compiler puts out the second `xchg' instruction,
1171 and the assembler doesn't try to optimize it, so the 'sib' form
1172 gets generated). This sequence is used to get the address of the
1173 return buffer for a function that returns a structure. */
1174 static gdb_byte proto1[3] = { 0x87, 0x04, 0x24 };
1175 static gdb_byte proto2[4] = { 0x87, 0x44, 0x24, 0x00 };
1176 gdb_byte buf[4];
1177 gdb_byte op;
1178
1179 if (current_pc <= pc)
1180 return pc;
1181
1182 if (target_read_code (pc, &op, 1))
1183 return pc;
1184
1185 if (op != 0x58) /* popl %eax */
1186 return pc;
1187
1188 if (target_read_code (pc + 1, buf, 4))
1189 return pc;
1190
1191 if (memcmp (buf, proto1, 3) != 0 && memcmp (buf, proto2, 4) != 0)
1192 return pc;
1193
1194 if (current_pc == pc)
1195 {
1196 cache->sp_offset += 4;
1197 return current_pc;
1198 }
1199
1200 if (current_pc == pc + 1)
1201 {
1202 cache->pc_in_eax = 1;
1203 return current_pc;
1204 }
1205
1206 if (buf[1] == proto1[1])
1207 return pc + 4;
1208 else
1209 return pc + 5;
1210}
1211
1212static CORE_ADDR
1214{
1215 /* A function may start with
1216
1217 pushl constant
1218 call _probe
1219 addl $4, %esp
1220
1221 followed by
1222
1223 pushl %ebp
1224
1225 etc. */
1226 gdb_byte buf[8];
1227 gdb_byte op;
1228
1229 if (target_read_code (pc, &op, 1))
1230 return pc;
1231
1232 if (op == 0x68 || op == 0x6a)
1233 {
1234 int delta;
1235
1236 /* Skip past the `pushl' instruction; it has either a one-byte or a
1237 four-byte operand, depending on the opcode. */
1238 if (op == 0x68)
1239 delta = 5;
1240 else
1241 delta = 2;
1242
1243 /* Read the following 8 bytes, which should be `call _probe' (6
1244 bytes) followed by `addl $4,%esp' (2 bytes). */
1245 read_memory (pc + delta, buf, sizeof (buf));
1246 if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4)
1247 pc += delta + sizeof (buf);
1248 }
1249
1250 return pc;
1251}
1252
1253/* GCC 4.1 and later, can put code in the prologue to realign the
1254 stack pointer. Check whether PC points to such code, and update
1255 CACHE accordingly. Return the first instruction after the code
1256 sequence or CURRENT_PC, whichever is smaller. If we don't
1257 recognize the code, return PC. */
1258
1259static CORE_ADDR
1260i386_analyze_stack_align (CORE_ADDR pc, CORE_ADDR current_pc,
1261 struct i386_frame_cache *cache)
1262{
1263 /* There are 2 code sequences to re-align stack before the frame
1264 gets set up:
1265
1266 1. Use a caller-saved saved register:
1267
1268 leal 4(%esp), %reg
1269 andl $-XXX, %esp
1270 pushl -4(%reg)
1271
1272 2. Use a callee-saved saved register:
1273
1274 pushl %reg
1275 leal 8(%esp), %reg
1276 andl $-XXX, %esp
1277 pushl -4(%reg)
1278
1279 "andl $-XXX, %esp" can be either 3 bytes or 6 bytes:
1280
1281 0x83 0xe4 0xf0 andl $-16, %esp
1282 0x81 0xe4 0x00 0xff 0xff 0xff andl $-256, %esp
1283 */
1284
1285 gdb_byte buf[14];
1286 int reg;
1287 int offset, offset_and;
1288 static int regnums[8] = {
1289 I386_EAX_REGNUM, /* %eax */
1290 I386_ECX_REGNUM, /* %ecx */
1291 I386_EDX_REGNUM, /* %edx */
1292 I386_EBX_REGNUM, /* %ebx */
1293 I386_ESP_REGNUM, /* %esp */
1294 I386_EBP_REGNUM, /* %ebp */
1295 I386_ESI_REGNUM, /* %esi */
1296 I386_EDI_REGNUM /* %edi */
1297 };
1298
1299 if (target_read_code (pc, buf, sizeof buf))
1300 return pc;
1301
1302 /* Check caller-saved saved register. The first instruction has
1303 to be "leal 4(%esp), %reg". */
1304 if (buf[0] == 0x8d && buf[2] == 0x24 && buf[3] == 0x4)
1305 {
1306 /* MOD must be binary 10 and R/M must be binary 100. */
1307 if ((buf[1] & 0xc7) != 0x44)
1308 return pc;
1309
1310 /* REG has register number. */
1311 reg = (buf[1] >> 3) & 7;
1312 offset = 4;
1313 }
1314 else
1315 {
1316 /* Check callee-saved saved register. The first instruction
1317 has to be "pushl %reg". */
1318 if ((buf[0] & 0xf8) != 0x50)
1319 return pc;
1320
1321 /* Get register. */
1322 reg = buf[0] & 0x7;
1323
1324 /* The next instruction has to be "leal 8(%esp), %reg". */
1325 if (buf[1] != 0x8d || buf[3] != 0x24 || buf[4] != 0x8)
1326 return pc;
1327
1328 /* MOD must be binary 10 and R/M must be binary 100. */
1329 if ((buf[2] & 0xc7) != 0x44)
1330 return pc;
1331
1332 /* REG has register number. Registers in pushl and leal have to
1333 be the same. */
1334 if (reg != ((buf[2] >> 3) & 7))
1335 return pc;
1336
1337 offset = 5;
1338 }
1339
1340 /* Rigister can't be %esp nor %ebp. */
1341 if (reg == 4 || reg == 5)
1342 return pc;
1343
1344 /* The next instruction has to be "andl $-XXX, %esp". */
1345 if (buf[offset + 1] != 0xe4
1346 || (buf[offset] != 0x81 && buf[offset] != 0x83))
1347 return pc;
1348
1349 offset_and = offset;
1350 offset += buf[offset] == 0x81 ? 6 : 3;
1351
1352 /* The next instruction has to be "pushl -4(%reg)". 8bit -4 is
1353 0xfc. REG must be binary 110 and MOD must be binary 01. */
1354 if (buf[offset] != 0xff
1355 || buf[offset + 2] != 0xfc
1356 || (buf[offset + 1] & 0xf8) != 0x70)
1357 return pc;
1358
1359 /* R/M has register. Registers in leal and pushl have to be the
1360 same. */
1361 if (reg != (buf[offset + 1] & 7))
1362 return pc;
1363
1364 if (current_pc > pc + offset_and)
1365 cache->saved_sp_reg = regnums[reg];
1366
1367 return std::min (pc + offset + 3, current_pc);
1368}
1369
1370/* Maximum instruction length we need to handle. */
1371#define I386_MAX_MATCHED_INSN_LEN 6
1372
1373/* Instruction description. */
1380
1381/* Return whether instruction at PC matches PATTERN. */
1382
1383static int
1384i386_match_pattern (CORE_ADDR pc, struct i386_insn pattern)
1385{
1386 gdb_byte op;
1387
1388 if (target_read_code (pc, &op, 1))
1389 return 0;
1390
1391 if ((op & pattern.mask[0]) == pattern.insn[0])
1392 {
1393 gdb_byte buf[I386_MAX_MATCHED_INSN_LEN - 1];
1394 int insn_matched = 1;
1395 size_t i;
1396
1397 gdb_assert (pattern.len > 1);
1398 gdb_assert (pattern.len <= I386_MAX_MATCHED_INSN_LEN);
1399
1400 if (target_read_code (pc + 1, buf, pattern.len - 1))
1401 return 0;
1402
1403 for (i = 1; i < pattern.len; i++)
1404 {
1405 if ((buf[i - 1] & pattern.mask[i]) != pattern.insn[i])
1406 insn_matched = 0;
1407 }
1408 return insn_matched;
1409 }
1410 return 0;
1411}
1412
1413/* Search for the instruction at PC in the list INSN_PATTERNS. Return
1414 the first instruction description that matches. Otherwise, return
1415 NULL. */
1416
1417static struct i386_insn *
1418i386_match_insn (CORE_ADDR pc, struct i386_insn *insn_patterns)
1419{
1420 struct i386_insn *pattern;
1421
1422 for (pattern = insn_patterns; pattern->len > 0; pattern++)
1423 {
1424 if (i386_match_pattern (pc, *pattern))
1425 return pattern;
1426 }
1427
1428 return NULL;
1429}
1430
1431/* Return whether PC points inside a sequence of instructions that
1432 matches INSN_PATTERNS. */
1433
1434static int
1435i386_match_insn_block (CORE_ADDR pc, struct i386_insn *insn_patterns)
1436{
1437 CORE_ADDR current_pc;
1438 int ix, i;
1439 struct i386_insn *insn;
1440
1441 insn = i386_match_insn (pc, insn_patterns);
1442 if (insn == NULL)
1443 return 0;
1444
1445 current_pc = pc;
1446 ix = insn - insn_patterns;
1447 for (i = ix - 1; i >= 0; i--)
1448 {
1449 current_pc -= insn_patterns[i].len;
1450
1451 if (!i386_match_pattern (current_pc, insn_patterns[i]))
1452 return 0;
1453 }
1454
1455 current_pc = pc + insn->len;
1456 for (insn = insn_patterns + ix + 1; insn->len > 0; insn++)
1457 {
1458 if (!i386_match_pattern (current_pc, *insn))
1459 return 0;
1460
1461 current_pc += insn->len;
1462 }
1463
1464 return 1;
1465}
1466
1467/* Some special instructions that might be migrated by GCC into the
1468 part of the prologue that sets up the new stack frame. Because the
1469 stack frame hasn't been setup yet, no registers have been saved
1470 yet, and only the scratch registers %eax, %ecx and %edx can be
1471 touched. */
1472
1474{
1475 /* Check for `movb imm8, r' and `movl imm32, r'.
1476
1477 ??? Should we handle 16-bit operand-sizes here? */
1478
1479 /* `movb imm8, %al' and `movb imm8, %ah' */
1480 /* `movb imm8, %cl' and `movb imm8, %ch' */
1481 { 2, { 0xb0, 0x00 }, { 0xfa, 0x00 } },
1482 /* `movb imm8, %dl' and `movb imm8, %dh' */
1483 { 2, { 0xb2, 0x00 }, { 0xfb, 0x00 } },
1484 /* `movl imm32, %eax' and `movl imm32, %ecx' */
1485 { 5, { 0xb8 }, { 0xfe } },
1486 /* `movl imm32, %edx' */
1487 { 5, { 0xba }, { 0xff } },
1488
1489 /* Check for `mov imm32, r32'. Note that there is an alternative
1490 encoding for `mov m32, %eax'.
1491
1492 ??? Should we handle SIB addressing here?
1493 ??? Should we handle 16-bit operand-sizes here? */
1494
1495 /* `movl m32, %eax' */
1496 { 5, { 0xa1 }, { 0xff } },
1497 /* `movl m32, %eax' and `mov; m32, %ecx' */
1498 { 6, { 0x89, 0x05 }, {0xff, 0xf7 } },
1499 /* `movl m32, %edx' */
1500 { 6, { 0x89, 0x15 }, {0xff, 0xff } },
1501
1502 /* Check for `xorl r32, r32' and the equivalent `subl r32, r32'.
1503 Because of the symmetry, there are actually two ways to encode
1504 these instructions; opcode bytes 0x29 and 0x2b for `subl' and
1505 opcode bytes 0x31 and 0x33 for `xorl'. */
1506
1507 /* `subl %eax, %eax' */
1508 { 2, { 0x29, 0xc0 }, { 0xfd, 0xff } },
1509 /* `subl %ecx, %ecx' */
1510 { 2, { 0x29, 0xc9 }, { 0xfd, 0xff } },
1511 /* `subl %edx, %edx' */
1512 { 2, { 0x29, 0xd2 }, { 0xfd, 0xff } },
1513 /* `xorl %eax, %eax' */
1514 { 2, { 0x31, 0xc0 }, { 0xfd, 0xff } },
1515 /* `xorl %ecx, %ecx' */
1516 { 2, { 0x31, 0xc9 }, { 0xfd, 0xff } },
1517 /* `xorl %edx, %edx' */
1518 { 2, { 0x31, 0xd2 }, { 0xfd, 0xff } },
1519 { 0 }
1520};
1521
1522/* Check whether PC points to an endbr32 instruction. */
1523static CORE_ADDR
1524i386_skip_endbr (CORE_ADDR pc)
1525{
1526 static const gdb_byte endbr32[] = { 0xf3, 0x0f, 0x1e, 0xfb };
1527
1528 gdb_byte buf[sizeof (endbr32)];
1529
1530 /* Stop there if we can't read the code */
1531 if (target_read_code (pc, buf, sizeof (endbr32)))
1532 return pc;
1533
1534 /* If the instruction isn't an endbr32, stop */
1535 if (memcmp (buf, endbr32, sizeof (endbr32)) != 0)
1536 return pc;
1537
1538 return pc + sizeof (endbr32);
1539}
1540
1541/* Check whether PC points to a no-op instruction. */
1542static CORE_ADDR
1543i386_skip_noop (CORE_ADDR pc)
1544{
1545 gdb_byte op;
1546 int check = 1;
1547
1548 if (target_read_code (pc, &op, 1))
1549 return pc;
1550
1551 while (check)
1552 {
1553 check = 0;
1554 /* Ignore `nop' instruction. */
1555 if (op == 0x90)
1556 {
1557 pc += 1;
1558 if (target_read_code (pc, &op, 1))
1559 return pc;
1560 check = 1;
1561 }
1562 /* Ignore no-op instruction `mov %edi, %edi'.
1563 Microsoft system dlls often start with
1564 a `mov %edi,%edi' instruction.
1565 The 5 bytes before the function start are
1566 filled with `nop' instructions.
1567 This pattern can be used for hot-patching:
1568 The `mov %edi, %edi' instruction can be replaced by a
1569 near jump to the location of the 5 `nop' instructions
1570 which can be replaced by a 32-bit jump to anywhere
1571 in the 32-bit address space. */
1572
1573 else if (op == 0x8b)
1574 {
1575 if (target_read_code (pc + 1, &op, 1))
1576 return pc;
1577
1578 if (op == 0xff)
1579 {
1580 pc += 2;
1581 if (target_read_code (pc, &op, 1))
1582 return pc;
1583
1584 check = 1;
1585 }
1586 }
1587 }
1588 return pc;
1589}
1590
1591/* Check whether PC points at a code that sets up a new stack frame.
1592 If so, it updates CACHE and returns the address of the first
1593 instruction after the sequence that sets up the frame or LIMIT,
1594 whichever is smaller. If we don't recognize the code, return PC. */
1595
1596static CORE_ADDR
1598 CORE_ADDR pc, CORE_ADDR limit,
1599 struct i386_frame_cache *cache)
1600{
1601 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1602 struct i386_insn *insn;
1603 gdb_byte op;
1604 int skip = 0;
1605
1606 if (limit <= pc)
1607 return limit;
1608
1609 if (target_read_code (pc, &op, 1))
1610 return pc;
1611
1612 if (op == 0x55) /* pushl %ebp */
1613 {
1614 /* Take into account that we've executed the `pushl %ebp' that
1615 starts this instruction sequence. */
1616 cache->saved_regs[I386_EBP_REGNUM] = 0;
1617 cache->sp_offset += 4;
1618 pc++;
1619
1620 /* If that's all, return now. */
1621 if (limit <= pc)
1622 return limit;
1623
1624 /* Check for some special instructions that might be migrated by
1625 GCC into the prologue and skip them. At this point in the
1626 prologue, code should only touch the scratch registers %eax,
1627 %ecx and %edx, so while the number of possibilities is sheer,
1628 it is limited.
1629
1630 Make sure we only skip these instructions if we later see the
1631 `movl %esp, %ebp' that actually sets up the frame. */
1632 while (pc + skip < limit)
1633 {
1635 if (insn == NULL)
1636 break;
1637
1638 skip += insn->len;
1639 }
1640
1641 /* If that's all, return now. */
1642 if (limit <= pc + skip)
1643 return limit;
1644
1645 if (target_read_code (pc + skip, &op, 1))
1646 return pc + skip;
1647
1648 /* The i386 prologue looks like
1649
1650 push %ebp
1651 mov %esp,%ebp
1652 sub $0x10,%esp
1653
1654 and a different prologue can be generated for atom.
1655
1656 push %ebp
1657 lea (%esp),%ebp
1658 lea -0x10(%esp),%esp
1659
1660 We handle both of them here. */
1661
1662 switch (op)
1663 {
1664 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
1665 case 0x8b:
1666 if (read_code_unsigned_integer (pc + skip + 1, 1, byte_order)
1667 != 0xec)
1668 return pc;
1669 pc += (skip + 2);
1670 break;
1671 case 0x89:
1672 if (read_code_unsigned_integer (pc + skip + 1, 1, byte_order)
1673 != 0xe5)
1674 return pc;
1675 pc += (skip + 2);
1676 break;
1677 case 0x8d: /* Check for 'lea (%ebp), %ebp'. */
1678 if (read_code_unsigned_integer (pc + skip + 1, 2, byte_order)
1679 != 0x242c)
1680 return pc;
1681 pc += (skip + 3);
1682 break;
1683 default:
1684 return pc;
1685 }
1686
1687 /* OK, we actually have a frame. We just don't know how large
1688 it is yet. Set its size to zero. We'll adjust it if
1689 necessary. We also now commit to skipping the special
1690 instructions mentioned before. */
1691 cache->locals = 0;
1692
1693 /* If that's all, return now. */
1694 if (limit <= pc)
1695 return limit;
1696
1697 /* Check for stack adjustment
1698
1699 subl $XXX, %esp
1700 or
1701 lea -XXX(%esp),%esp
1702
1703 NOTE: You can't subtract a 16-bit immediate from a 32-bit
1704 reg, so we don't have to worry about a data16 prefix. */
1705 if (target_read_code (pc, &op, 1))
1706 return pc;
1707 if (op == 0x83)
1708 {
1709 /* `subl' with 8-bit immediate. */
1710 if (read_code_unsigned_integer (pc + 1, 1, byte_order) != 0xec)
1711 /* Some instruction starting with 0x83 other than `subl'. */
1712 return pc;
1713
1714 /* `subl' with signed 8-bit immediate (though it wouldn't
1715 make sense to be negative). */
1716 cache->locals = read_code_integer (pc + 2, 1, byte_order);
1717 return pc + 3;
1718 }
1719 else if (op == 0x81)
1720 {
1721 /* Maybe it is `subl' with a 32-bit immediate. */
1722 if (read_code_unsigned_integer (pc + 1, 1, byte_order) != 0xec)
1723 /* Some instruction starting with 0x81 other than `subl'. */
1724 return pc;
1725
1726 /* It is `subl' with a 32-bit immediate. */
1727 cache->locals = read_code_integer (pc + 2, 4, byte_order);
1728 return pc + 6;
1729 }
1730 else if (op == 0x8d)
1731 {
1732 /* The ModR/M byte is 0x64. */
1733 if (read_code_unsigned_integer (pc + 1, 1, byte_order) != 0x64)
1734 return pc;
1735 /* 'lea' with 8-bit displacement. */
1736 cache->locals = -1 * read_code_integer (pc + 3, 1, byte_order);
1737 return pc + 4;
1738 }
1739 else
1740 {
1741 /* Some instruction other than `subl' nor 'lea'. */
1742 return pc;
1743 }
1744 }
1745 else if (op == 0xc8) /* enter */
1746 {
1747 cache->locals = read_code_unsigned_integer (pc + 1, 2, byte_order);
1748 return pc + 4;
1749 }
1750
1751 return pc;
1752}
1753
1754/* Check whether PC points at code that saves registers on the stack.
1755 If so, it updates CACHE and returns the address of the first
1756 instruction after the register saves or CURRENT_PC, whichever is
1757 smaller. Otherwise, return PC. */
1758
1759static CORE_ADDR
1760i386_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc,
1761 struct i386_frame_cache *cache)
1762{
1763 CORE_ADDR offset = 0;
1764 gdb_byte op;
1765 int i;
1766
1767 if (cache->locals > 0)
1768 offset -= cache->locals;
1769 for (i = 0; i < 8 && pc < current_pc; i++)
1770 {
1771 if (target_read_code (pc, &op, 1))
1772 return pc;
1773 if (op < 0x50 || op > 0x57)
1774 break;
1775
1776 offset -= 4;
1777 cache->saved_regs[op - 0x50] = offset;
1778 cache->sp_offset += 4;
1779 pc++;
1780 }
1781
1782 return pc;
1783}
1784
1785/* Do a full analysis of the prologue at PC and update CACHE
1786 accordingly. Bail out early if CURRENT_PC is reached. Return the
1787 address where the analysis stopped.
1788
1789 We handle these cases:
1790
1791 The startup sequence can be at the start of the function, or the
1792 function can start with a branch to startup code at the end.
1793
1794 %ebp can be set up with either the 'enter' instruction, or "pushl
1795 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
1796 once used in the System V compiler).
1797
1798 Local space is allocated just below the saved %ebp by either the
1799 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
1800 16-bit unsigned argument for space to allocate, and the 'addl'
1801 instruction could have either a signed byte, or 32-bit immediate.
1802
1803 Next, the registers used by this function are pushed. With the
1804 System V compiler they will always be in the order: %edi, %esi,
1805 %ebx (and sometimes a harmless bug causes it to also save but not
1806 restore %eax); however, the code below is willing to see the pushes
1807 in any order, and will handle up to 8 of them.
1808
1809 If the setup sequence is at the end of the function, then the next
1810 instruction will be a branch back to the start. */
1811
1812static CORE_ADDR
1814 CORE_ADDR pc, CORE_ADDR current_pc,
1815 struct i386_frame_cache *cache)
1816{
1817 pc = i386_skip_endbr (pc);
1818 pc = i386_skip_noop (pc);
1819 pc = i386_follow_jump (gdbarch, pc);
1820 pc = i386_analyze_struct_return (pc, current_pc, cache);
1821 pc = i386_skip_probe (pc);
1822 pc = i386_analyze_stack_align (pc, current_pc, cache);
1823 pc = i386_analyze_frame_setup (gdbarch, pc, current_pc, cache);
1824 return i386_analyze_register_saves (pc, current_pc, cache);
1825}
1826
1827/* Return PC of first real instruction. */
1828
1829static CORE_ADDR
1830i386_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc)
1831{
1832 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1833
1834 static gdb_byte pic_pat[6] =
1835 {
1836 0xe8, 0, 0, 0, 0, /* call 0x0 */
1837 0x5b, /* popl %ebx */
1838 };
1839 struct i386_frame_cache cache;
1840 CORE_ADDR pc;
1841 gdb_byte op;
1842 int i;
1843 CORE_ADDR func_addr;
1844
1845 if (find_pc_partial_function (start_pc, NULL, &func_addr, NULL))
1846 {
1847 CORE_ADDR post_prologue_pc
1848 = skip_prologue_using_sal (gdbarch, func_addr);
1849 struct compunit_symtab *cust = find_pc_compunit_symtab (func_addr);
1850
1851 /* LLVM backend (Clang/Flang) always emits a line note before the
1852 prologue and another one after. We trust clang and newer Intel
1853 compilers to emit usable line notes. */
1854 if (post_prologue_pc
1855 && (cust != NULL
1856 && cust->producer () != NULL
1857 && (producer_is_llvm (cust->producer ())
1858 || producer_is_icc_ge_19 (cust->producer ()))))
1859 return std::max (start_pc, post_prologue_pc);
1860 }
1861
1862 cache.locals = -1;
1863 pc = i386_analyze_prologue (gdbarch, start_pc, 0xffffffff, &cache);
1864 if (cache.locals < 0)
1865 return start_pc;
1866
1867 /* Found valid frame setup. */
1868
1869 /* The native cc on SVR4 in -K PIC mode inserts the following code
1870 to get the address of the global offset table (GOT) into register
1871 %ebx:
1872
1873 call 0x0
1874 popl %ebx
1875 movl %ebx,x(%ebp) (optional)
1876 addl y,%ebx
1877
1878 This code is with the rest of the prologue (at the end of the
1879 function), so we have to skip it to get to the first real
1880 instruction at the start of the function. */
1881
1882 for (i = 0; i < 6; i++)
1883 {
1884 if (target_read_code (pc + i, &op, 1))
1885 return pc;
1886
1887 if (pic_pat[i] != op)
1888 break;
1889 }
1890 if (i == 6)
1891 {
1892 int delta = 6;
1893
1894 if (target_read_code (pc + delta, &op, 1))
1895 return pc;
1896
1897 if (op == 0x89) /* movl %ebx, x(%ebp) */
1898 {
1899 op = read_code_unsigned_integer (pc + delta + 1, 1, byte_order);
1900
1901 if (op == 0x5d) /* One byte offset from %ebp. */
1902 delta += 3;
1903 else if (op == 0x9d) /* Four byte offset from %ebp. */
1904 delta += 6;
1905 else /* Unexpected instruction. */
1906 delta = 0;
1907
1908 if (target_read_code (pc + delta, &op, 1))
1909 return pc;
1910 }
1911
1912 /* addl y,%ebx */
1913 if (delta > 0 && op == 0x81
1914 && read_code_unsigned_integer (pc + delta + 1, 1, byte_order)
1915 == 0xc3)
1916 {
1917 pc += delta + 6;
1918 }
1919 }
1920
1921 /* If the function starts with a branch (to startup code at the end)
1922 the last instruction should bring us back to the first
1923 instruction of the real code. */
1924 if (i386_follow_jump (gdbarch, start_pc) != start_pc)
1925 pc = i386_follow_jump (gdbarch, pc);
1926
1927 return pc;
1928}
1929
1930/* Check that the code pointed to by PC corresponds to a call to
1931 __main, skip it if so. Return PC otherwise. */
1932
1933CORE_ADDR
1935{
1936 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1937 gdb_byte op;
1938
1939 if (target_read_code (pc, &op, 1))
1940 return pc;
1941 if (op == 0xe8)
1942 {
1943 gdb_byte buf[4];
1944
1945 if (target_read_code (pc + 1, buf, sizeof buf) == 0)
1946 {
1947 /* Make sure address is computed correctly as a 32bit
1948 integer even if CORE_ADDR is 64 bit wide. */
1949 struct bound_minimal_symbol s;
1950 CORE_ADDR call_dest;
1951
1952 call_dest = pc + 5 + extract_signed_integer (buf, 4, byte_order);
1953 call_dest = call_dest & 0xffffffffU;
1954 s = lookup_minimal_symbol_by_pc (call_dest);
1955 if (s.minsym != NULL
1956 && s.minsym->linkage_name () != NULL
1957 && strcmp (s.minsym->linkage_name (), "__main") == 0)
1958 pc += 5;
1959 }
1960 }
1961
1962 return pc;
1963}
1964
1965/* This function is 64-bit safe. */
1966
1967static CORE_ADDR
1969{
1970 gdb_byte buf[8];
1971
1972 frame_unwind_register (next_frame, gdbarch_pc_regnum (gdbarch), buf);
1973 return extract_typed_address (buf, builtin_type (gdbarch)->builtin_func_ptr);
1974}
1975
1976
1977/* Normal frames. */
1978
1979static void
1981 struct i386_frame_cache *cache)
1982{
1983 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1984 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1985 gdb_byte buf[4];
1986 int i;
1987
1988 cache->pc = get_frame_func (this_frame);
1989
1990 /* In principle, for normal frames, %ebp holds the frame pointer,
1991 which holds the base address for the current stack frame.
1992 However, for functions that don't need it, the frame pointer is
1993 optional. For these "frameless" functions the frame pointer is
1994 actually the frame pointer of the calling frame. Signal
1995 trampolines are just a special case of a "frameless" function.
1996 They (usually) share their frame pointer with the frame that was
1997 in progress when the signal occurred. */
1998
1999 get_frame_register (this_frame, I386_EBP_REGNUM, buf);
2000 cache->base = extract_unsigned_integer (buf, 4, byte_order);
2001 if (cache->base == 0)
2002 {
2003 cache->base_p = 1;
2004 return;
2005 }
2006
2007 /* For normal frames, %eip is stored at 4(%ebp). */
2008 cache->saved_regs[I386_EIP_REGNUM] = 4;
2009
2010 if (cache->pc != 0)
2011 i386_analyze_prologue (gdbarch, cache->pc, get_frame_pc (this_frame),
2012 cache);
2013
2014 if (cache->locals < 0)
2015 {
2016 /* We didn't find a valid frame, which means that CACHE->base
2017 currently holds the frame pointer for our calling frame. If
2018 we're at the start of a function, or somewhere half-way its
2019 prologue, the function's frame probably hasn't been fully
2020 setup yet. Try to reconstruct the base address for the stack
2021 frame by looking at the stack pointer. For truly "frameless"
2022 functions this might work too. */
2023
2024 if (cache->saved_sp_reg != -1)
2025 {
2026 /* Saved stack pointer has been saved. */
2027 get_frame_register (this_frame, cache->saved_sp_reg, buf);
2028 cache->saved_sp = extract_unsigned_integer (buf, 4, byte_order);
2029
2030 /* We're halfway aligning the stack. */
2031 cache->base = ((cache->saved_sp - 4) & 0xfffffff0) - 4;
2032 cache->saved_regs[I386_EIP_REGNUM] = cache->saved_sp - 4;
2033
2034 /* This will be added back below. */
2035 cache->saved_regs[I386_EIP_REGNUM] -= cache->base;
2036 }
2037 else if (cache->pc != 0
2038 || target_read_code (get_frame_pc (this_frame), buf, 1))
2039 {
2040 /* We're in a known function, but did not find a frame
2041 setup. Assume that the function does not use %ebp.
2042 Alternatively, we may have jumped to an invalid
2043 address; in that case there is definitely no new
2044 frame in %ebp. */
2045 get_frame_register (this_frame, I386_ESP_REGNUM, buf);
2046 cache->base = extract_unsigned_integer (buf, 4, byte_order)
2047 + cache->sp_offset;
2048 }
2049 else
2050 /* We're in an unknown function. We could not find the start
2051 of the function to analyze the prologue; our best option is
2052 to assume a typical frame layout with the caller's %ebp
2053 saved. */
2054 cache->saved_regs[I386_EBP_REGNUM] = 0;
2055 }
2056
2057 if (cache->saved_sp_reg != -1)
2058 {
2059 /* Saved stack pointer has been saved (but the SAVED_SP_REG
2060 register may be unavailable). */
2061 if (cache->saved_sp == 0
2062 && deprecated_frame_register_read (this_frame,
2063 cache->saved_sp_reg, buf))
2064 cache->saved_sp = extract_unsigned_integer (buf, 4, byte_order);
2065 }
2066 /* Now that we have the base address for the stack frame we can
2067 calculate the value of %esp in the calling frame. */
2068 else if (cache->saved_sp == 0)
2069 cache->saved_sp = cache->base + 8;
2070
2071 /* Adjust all the saved registers such that they contain addresses
2072 instead of offsets. */
2073 for (i = 0; i < I386_NUM_SAVED_REGS; i++)
2074 if (cache->saved_regs[i] != -1)
2075 cache->saved_regs[i] += cache->base;
2076
2077 cache->base_p = 1;
2078}
2079
2080static struct i386_frame_cache *
2081i386_frame_cache (frame_info_ptr this_frame, void **this_cache)
2082{
2083 struct i386_frame_cache *cache;
2084
2085 if (*this_cache)
2086 return (struct i386_frame_cache *) *this_cache;
2087
2088 cache = i386_alloc_frame_cache ();
2089 *this_cache = cache;
2090
2091 try
2092 {
2093 i386_frame_cache_1 (this_frame, cache);
2094 }
2095 catch (const gdb_exception_error &ex)
2096 {
2097 if (ex.error != NOT_AVAILABLE_ERROR)
2098 throw;
2099 }
2100
2101 return cache;
2102}
2103
2104static void
2105i386_frame_this_id (frame_info_ptr this_frame, void **this_cache,
2106 struct frame_id *this_id)
2107{
2108 struct i386_frame_cache *cache = i386_frame_cache (this_frame, this_cache);
2109
2110 if (!cache->base_p)
2111 (*this_id) = frame_id_build_unavailable_stack (cache->pc);
2112 else if (cache->base == 0)
2113 {
2114 /* This marks the outermost frame. */
2115 }
2116 else
2117 {
2118 /* See the end of i386_push_dummy_call. */
2119 (*this_id) = frame_id_build (cache->base + 8, cache->pc);
2120 }
2121}
2122
2123static enum unwind_stop_reason
2125 void **this_cache)
2126{
2127 struct i386_frame_cache *cache = i386_frame_cache (this_frame, this_cache);
2128
2129 if (!cache->base_p)
2130 return UNWIND_UNAVAILABLE;
2131
2132 /* This marks the outermost frame. */
2133 if (cache->base == 0)
2134 return UNWIND_OUTERMOST;
2135
2136 return UNWIND_NO_REASON;
2137}
2138
2139static struct value *
2140i386_frame_prev_register (frame_info_ptr this_frame, void **this_cache,
2141 int regnum)
2142{
2143 struct i386_frame_cache *cache = i386_frame_cache (this_frame, this_cache);
2144
2145 gdb_assert (regnum >= 0);
2146
2147 /* The System V ABI says that:
2148
2149 "The flags register contains the system flags, such as the
2150 direction flag and the carry flag. The direction flag must be
2151 set to the forward (that is, zero) direction before entry and
2152 upon exit from a function. Other user flags have no specified
2153 role in the standard calling sequence and are not preserved."
2154
2155 To guarantee the "upon exit" part of that statement we fake a
2156 saved flags register that has its direction flag cleared.
2157
2158 Note that GCC doesn't seem to rely on the fact that the direction
2159 flag is cleared after a function return; it always explicitly
2160 clears the flag before operations where it matters.
2161
2162 FIXME: kettenis/20030316: I'm not quite sure whether this is the
2163 right thing to do. The way we fake the flags register here makes
2164 it impossible to change it. */
2165
2167 {
2168 ULONGEST val;
2169
2170 val = get_frame_register_unsigned (this_frame, regnum);
2171 val &= ~(1 << 10);
2172 return frame_unwind_got_constant (this_frame, regnum, val);
2173 }
2174
2175 if (regnum == I386_EIP_REGNUM && cache->pc_in_eax)
2176 return frame_unwind_got_register (this_frame, regnum, I386_EAX_REGNUM);
2177
2178 if (regnum == I386_ESP_REGNUM
2179 && (cache->saved_sp != 0 || cache->saved_sp_reg != -1))
2180 {
2181 /* If the SP has been saved, but we don't know where, then this
2182 means that SAVED_SP_REG register was found unavailable back
2183 when we built the cache. */
2184 if (cache->saved_sp == 0)
2185 return frame_unwind_got_register (this_frame, regnum,
2186 cache->saved_sp_reg);
2187 else
2188 return frame_unwind_got_constant (this_frame, regnum,
2189 cache->saved_sp);
2190 }
2191
2192 if (regnum < I386_NUM_SAVED_REGS && cache->saved_regs[regnum] != -1)
2193 return frame_unwind_got_memory (this_frame, regnum,
2194 cache->saved_regs[regnum]);
2195
2196 return frame_unwind_got_register (this_frame, regnum, regnum);
2197}
2198
2199static const struct frame_unwind i386_frame_unwind =
2200{
2201 "i386 prologue",
2206 NULL,
2208};
2209
2210/* Normal frames, but in a function epilogue. */
2211
2212/* Implement the stack_frame_destroyed_p gdbarch method.
2213
2214 The epilogue is defined here as the 'ret' instruction, which will
2215 follow any instruction such as 'leave' or 'pop %ebp' that destroys
2216 the function's stack frame. */
2217
2218static int
2220{
2221 gdb_byte insn;
2222 if (target_read_memory (pc, &insn, 1))
2223 return 0; /* Can't read memory at pc. */
2224
2225 if (insn != 0xc3) /* 'ret' instruction. */
2226 return 0;
2227
2228 return 1;
2229}
2230
2231static int
2233 frame_info_ptr this_frame,
2234 void **this_prologue_cache, bool override_p)
2235{
2236 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2237 CORE_ADDR pc = get_frame_pc (this_frame);
2238
2239 if (frame_relative_level (this_frame) != 0)
2240 /* We're not in the inner frame, so assume we're not in an epilogue. */
2241 return 0;
2242
2243 bool unwind_valid_p
2245 if (override_p)
2246 {
2247 if (unwind_valid_p)
2248 /* Don't override the symtab unwinders, skip
2249 "i386 epilogue override". */
2250 return 0;
2251 }
2252 else
2253 {
2254 if (!unwind_valid_p)
2255 /* "i386 epilogue override" unwinder already ran, skip
2256 "i386 epilogue". */
2257 return 0;
2258 }
2259
2260 /* Check whether we're in an epilogue. */
2262}
2263
2264static int
2266 frame_info_ptr this_frame,
2267 void **this_prologue_cache)
2268{
2269 return i386_epilogue_frame_sniffer_1 (self, this_frame, this_prologue_cache,
2270 true);
2271}
2272
2273static int
2275 frame_info_ptr this_frame,
2276 void **this_prologue_cache)
2277{
2278 return i386_epilogue_frame_sniffer_1 (self, this_frame, this_prologue_cache,
2279 false);
2280}
2281
2282static struct i386_frame_cache *
2283i386_epilogue_frame_cache (frame_info_ptr this_frame, void **this_cache)
2284{
2285 struct i386_frame_cache *cache;
2286 CORE_ADDR sp;
2287
2288 if (*this_cache)
2289 return (struct i386_frame_cache *) *this_cache;
2290
2291 cache = i386_alloc_frame_cache ();
2292 *this_cache = cache;
2293
2294 try
2295 {
2296 cache->pc = get_frame_func (this_frame);
2297
2298 /* At this point the stack looks as if we just entered the
2299 function, with the return address at the top of the
2300 stack. */
2302 cache->base = sp + cache->sp_offset;
2303 cache->saved_sp = cache->base + 8;
2304 cache->saved_regs[I386_EIP_REGNUM] = cache->base + 4;
2305
2306 cache->base_p = 1;
2307 }
2308 catch (const gdb_exception_error &ex)
2309 {
2310 if (ex.error != NOT_AVAILABLE_ERROR)
2311 throw;
2312 }
2313
2314 return cache;
2315}
2316
2317static enum unwind_stop_reason
2319 void **this_cache)
2320{
2321 struct i386_frame_cache *cache =
2322 i386_epilogue_frame_cache (this_frame, this_cache);
2323
2324 if (!cache->base_p)
2325 return UNWIND_UNAVAILABLE;
2326
2327 return UNWIND_NO_REASON;
2328}
2329
2330static void
2332 void **this_cache,
2333 struct frame_id *this_id)
2334{
2335 struct i386_frame_cache *cache =
2336 i386_epilogue_frame_cache (this_frame, this_cache);
2337
2338 if (!cache->base_p)
2339 (*this_id) = frame_id_build_unavailable_stack (cache->pc);
2340 else
2341 (*this_id) = frame_id_build (cache->base + 8, cache->pc);
2342}
2343
2344static struct value *
2346 void **this_cache, int regnum)
2347{
2348 /* Make sure we've initialized the cache. */
2349 i386_epilogue_frame_cache (this_frame, this_cache);
2350
2351 return i386_frame_prev_register (this_frame, this_cache, regnum);
2352}
2353
2364
2375
2376
2377/* Stack-based trampolines. */
2378
2379/* These trampolines are used on cross x86 targets, when taking the
2380 address of a nested function. When executing these trampolines,
2381 no stack frame is set up, so we are in a similar situation as in
2382 epilogues and i386_epilogue_frame_this_id can be re-used. */
2383
2384/* Static chain passed in register. */
2385
2387{
2388 /* `movl imm32, %eax' and `movl imm32, %ecx' */
2389 { 5, { 0xb8 }, { 0xfe } },
2390
2391 /* `jmp imm32' */
2392 { 5, { 0xe9 }, { 0xff } },
2393
2394 {0}
2395};
2396
2397/* Static chain passed on stack (when regparm=3). */
2398
2400{
2401 /* `push imm32' */
2402 { 5, { 0x68 }, { 0xff } },
2403
2404 /* `jmp imm32' */
2405 { 5, { 0xe9 }, { 0xff } },
2406
2407 {0}
2408};
2409
2410/* Return whether PC points inside a stack trampoline. */
2411
2412static int
2414{
2415 gdb_byte insn;
2416 const char *name;
2417
2418 /* A stack trampoline is detected if no name is associated
2419 to the current pc and if it points inside a trampoline
2420 sequence. */
2421
2422 find_pc_partial_function (pc, &name, NULL, NULL);
2423 if (name)
2424 return 0;
2425
2426 if (target_read_memory (pc, &insn, 1))
2427 return 0;
2428
2431 return 0;
2432
2433 return 1;
2434}
2435
2436static int
2438 frame_info_ptr this_frame,
2439 void **this_cache)
2440{
2441 if (frame_relative_level (this_frame) == 0)
2442 return i386_in_stack_tramp_p (get_frame_pc (this_frame));
2443 else
2444 return 0;
2445}
2446
2457
2458/* Generate a bytecode expression to get the value of the saved PC. */
2459
2460static void
2462 struct agent_expr *ax, struct axs_value *value,
2463 CORE_ADDR scope)
2464{
2465 /* The following sequence assumes the traditional use of the base
2466 register. */
2467 ax_reg (ax, I386_EBP_REGNUM);
2468 ax_const_l (ax, 4);
2469 ax_simple (ax, aop_add);
2471 value->kind = axs_lvalue_memory;
2472}
2473
2474
2475/* Signal trampolines. */
2476
2477static struct i386_frame_cache *
2478i386_sigtramp_frame_cache (frame_info_ptr this_frame, void **this_cache)
2479{
2480 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2481 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
2482 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2483 struct i386_frame_cache *cache;
2484 CORE_ADDR addr;
2485 gdb_byte buf[4];
2486
2487 if (*this_cache)
2488 return (struct i386_frame_cache *) *this_cache;
2489
2490 cache = i386_alloc_frame_cache ();
2491
2492 try
2493 {
2494 get_frame_register (this_frame, I386_ESP_REGNUM, buf);
2495 cache->base = extract_unsigned_integer (buf, 4, byte_order) - 4;
2496
2497 addr = tdep->sigcontext_addr (this_frame);
2498 if (tdep->sc_reg_offset)
2499 {
2500 int i;
2501
2502 gdb_assert (tdep->sc_num_regs <= I386_NUM_SAVED_REGS);
2503
2504 for (i = 0; i < tdep->sc_num_regs; i++)
2505 if (tdep->sc_reg_offset[i] != -1)
2506 cache->saved_regs[i] = addr + tdep->sc_reg_offset[i];
2507 }
2508 else
2509 {
2510 cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset;
2511 cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset;
2512 }
2513
2514 cache->base_p = 1;
2515 }
2516 catch (const gdb_exception_error &ex)
2517 {
2518 if (ex.error != NOT_AVAILABLE_ERROR)
2519 throw;
2520 }
2521
2522 *this_cache = cache;
2523 return cache;
2524}
2525
2526static enum unwind_stop_reason
2528 void **this_cache)
2529{
2530 struct i386_frame_cache *cache =
2531 i386_sigtramp_frame_cache (this_frame, this_cache);
2532
2533 if (!cache->base_p)
2534 return UNWIND_UNAVAILABLE;
2535
2536 return UNWIND_NO_REASON;
2537}
2538
2539static void
2540i386_sigtramp_frame_this_id (frame_info_ptr this_frame, void **this_cache,
2541 struct frame_id *this_id)
2542{
2543 struct i386_frame_cache *cache =
2544 i386_sigtramp_frame_cache (this_frame, this_cache);
2545
2546 if (!cache->base_p)
2547 (*this_id) = frame_id_build_unavailable_stack (get_frame_pc (this_frame));
2548 else
2549 {
2550 /* See the end of i386_push_dummy_call. */
2551 (*this_id) = frame_id_build (cache->base + 8, get_frame_pc (this_frame));
2552 }
2553}
2554
2555static struct value *
2557 void **this_cache, int regnum)
2558{
2559 /* Make sure we've initialized the cache. */
2560 i386_sigtramp_frame_cache (this_frame, this_cache);
2561
2562 return i386_frame_prev_register (this_frame, this_cache, regnum);
2563}
2564
2565static int
2567 frame_info_ptr this_frame,
2568 void **this_prologue_cache)
2569{
2570 gdbarch *arch = get_frame_arch (this_frame);
2571 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (arch);
2572
2573 /* We shouldn't even bother if we don't have a sigcontext_addr
2574 handler. */
2575 if (tdep->sigcontext_addr == NULL)
2576 return 0;
2577
2578 if (tdep->sigtramp_p != NULL)
2579 {
2580 if (tdep->sigtramp_p (this_frame))
2581 return 1;
2582 }
2583
2584 if (tdep->sigtramp_start != 0)
2585 {
2586 CORE_ADDR pc = get_frame_pc (this_frame);
2587
2588 gdb_assert (tdep->sigtramp_end != 0);
2589 if (pc >= tdep->sigtramp_start && pc < tdep->sigtramp_end)
2590 return 1;
2591 }
2592
2593 return 0;
2594}
2595
2606
2607
2608static CORE_ADDR
2609i386_frame_base_address (frame_info_ptr this_frame, void **this_cache)
2610{
2611 struct i386_frame_cache *cache = i386_frame_cache (this_frame, this_cache);
2612
2613 return cache->base;
2614}
2615
2623
2624static struct frame_id
2626{
2627 CORE_ADDR fp;
2628
2630
2631 /* See the end of i386_push_dummy_call. */
2632 return frame_id_build (fp + 8, get_frame_pc (this_frame));
2633}
2634
2635/* _Decimal128 function return values need 16-byte alignment on the
2636 stack. */
2637
2638static CORE_ADDR
2639i386_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
2640{
2641 return sp & -(CORE_ADDR)16;
2642}
2643
2644
2645/* Figure out where the longjmp will land. Slurp the args out of the
2646 stack. We expect the first arg to be a pointer to the jmp_buf
2647 structure from which we extract the address that we will land at.
2648 This address is copied into PC. This routine returns non-zero on
2649 success. */
2650
2651static int
2653{
2654 gdb_byte buf[4];
2655 CORE_ADDR sp, jb_addr;
2656 struct gdbarch *gdbarch = get_frame_arch (frame);
2657 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2658 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
2659 int jb_pc_offset = tdep->jb_pc_offset;
2660
2661 /* If JB_PC_OFFSET is -1, we have no way to find out where the
2662 longjmp will land. */
2663 if (jb_pc_offset == -1)
2664 return 0;
2665
2666 get_frame_register (frame, I386_ESP_REGNUM, buf);
2667 sp = extract_unsigned_integer (buf, 4, byte_order);
2668 if (target_read_memory (sp + 4, buf, 4))
2669 return 0;
2670
2671 jb_addr = extract_unsigned_integer (buf, 4, byte_order);
2672 if (target_read_memory (jb_addr + jb_pc_offset, buf, 4))
2673 return 0;
2674
2675 *pc = extract_unsigned_integer (buf, 4, byte_order);
2676 return 1;
2677}
2678
2679
2680/* Check whether TYPE must be 16-byte-aligned when passed as a
2681 function argument. 16-byte vectors, _Decimal128 and structures or
2682 unions containing such types must be 16-byte-aligned; other
2683 arguments are 4-byte-aligned. */
2684
2685static int
2687{
2689 if ((type->code () == TYPE_CODE_DECFLOAT
2690 || (type->code () == TYPE_CODE_ARRAY && type->is_vector ()))
2691 && type->length () == 16)
2692 return 1;
2693 if (type->code () == TYPE_CODE_ARRAY)
2695 if (type->code () == TYPE_CODE_STRUCT
2696 || type->code () == TYPE_CODE_UNION)
2697 {
2698 int i;
2699 for (i = 0; i < type->num_fields (); i++)
2700 {
2701 if (type->field (i).is_static ())
2702 continue;
2703 if (i386_16_byte_align_p (type->field (i).type ()))
2704 return 1;
2705 }
2706 }
2707 return 0;
2708}
2709
2710/* Implementation for set_gdbarch_push_dummy_code. */
2711
2712static CORE_ADDR
2713i386_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp, CORE_ADDR funaddr,
2714 struct value **args, int nargs, struct type *value_type,
2715 CORE_ADDR *real_pc, CORE_ADDR *bp_addr,
2716 struct regcache *regcache)
2717{
2718 /* Use 0xcc breakpoint - 1 byte. */
2719 *bp_addr = sp - 1;
2720 *real_pc = funaddr;
2721
2722 /* Keep the stack aligned. */
2723 return sp - 16;
2724}
2725
2726/* The "push_dummy_call" gdbarch method, optionally with the thiscall
2727 calling convention. */
2728
2729CORE_ADDR
2731 struct regcache *regcache, CORE_ADDR bp_addr,
2732 int nargs, struct value **args, CORE_ADDR sp,
2733 function_call_return_method return_method,
2734 CORE_ADDR struct_addr, bool thiscall)
2735{
2736 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2737 gdb_byte buf[4];
2738 int i;
2739 int write_pass;
2740 int args_space = 0;
2741
2742 /* BND registers can be in arbitrary values at the moment of the
2743 inferior call. This can cause boundary violations that are not
2744 due to a real bug or even desired by the user. The best to be done
2745 is set the BND registers to allow access to the whole memory, INIT
2746 state, before pushing the inferior call. */
2748
2749 /* Determine the total space required for arguments and struct
2750 return address in a first pass (allowing for 16-byte-aligned
2751 arguments), then push arguments in a second pass. */
2752
2753 for (write_pass = 0; write_pass < 2; write_pass++)
2754 {
2755 int args_space_used = 0;
2756
2757 if (return_method == return_method_struct)
2758 {
2759 if (write_pass)
2760 {
2761 /* Push value address. */
2762 store_unsigned_integer (buf, 4, byte_order, struct_addr);
2763 write_memory (sp, buf, 4);
2764 args_space_used += 4;
2765 }
2766 else
2767 args_space += 4;
2768 }
2769
2770 for (i = thiscall ? 1 : 0; i < nargs; i++)
2771 {
2772 int len = args[i]->enclosing_type ()->length ();
2773
2774 if (write_pass)
2775 {
2776 if (i386_16_byte_align_p (args[i]->enclosing_type ()))
2777 args_space_used = align_up (args_space_used, 16);
2778
2779 write_memory (sp + args_space_used,
2780 args[i]->contents_all ().data (), len);
2781 /* The System V ABI says that:
2782
2783 "An argument's size is increased, if necessary, to make it a
2784 multiple of [32-bit] words. This may require tail padding,
2785 depending on the size of the argument."
2786
2787 This makes sure the stack stays word-aligned. */
2788 args_space_used += align_up (len, 4);
2789 }
2790 else
2791 {
2792 if (i386_16_byte_align_p (args[i]->enclosing_type ()))
2793 args_space = align_up (args_space, 16);
2794 args_space += align_up (len, 4);
2795 }
2796 }
2797
2798 if (!write_pass)
2799 {
2800 sp -= args_space;
2801
2802 /* The original System V ABI only requires word alignment,
2803 but modern incarnations need 16-byte alignment in order
2804 to support SSE. Since wasting a few bytes here isn't
2805 harmful we unconditionally enforce 16-byte alignment. */
2806 sp &= ~0xf;
2807 }
2808 }
2809
2810 /* Store return address. */
2811 sp -= 4;
2812 store_unsigned_integer (buf, 4, byte_order, bp_addr);
2813 write_memory (sp, buf, 4);
2814
2815 /* Finally, update the stack pointer... */
2816 store_unsigned_integer (buf, 4, byte_order, sp);
2818
2819 /* ...and fake a frame pointer. */
2821
2822 /* The 'this' pointer needs to be in ECX. */
2823 if (thiscall)
2825 args[0]->contents_all ().data ());
2826
2827 /* If the PLT is position-independent, the SYSTEM V ABI requires %ebx to be
2828 set to the address of the GOT when doing a call to a PLT address.
2829 Note that we do not try to determine whether the PLT is
2830 position-independent, we just set the register regardless. */
2831 CORE_ADDR func_addr = find_function_addr (function, nullptr, nullptr);
2832 if (in_plt_section (func_addr))
2833 {
2834 struct objfile *objf = nullptr;
2835 asection *asect = nullptr;
2836 obj_section *osect = nullptr;
2837
2838 /* Get object file containing func_addr. */
2839 obj_section *func_section = find_pc_section (func_addr);
2840 if (func_section != nullptr)
2841 objf = func_section->objfile;
2842
2843 if (objf != nullptr)
2844 {
2845 /* Get corresponding .got.plt or .got section. */
2846 asect = bfd_get_section_by_name (objf->obfd.get (), ".got.plt");
2847 if (asect == nullptr)
2848 asect = bfd_get_section_by_name (objf->obfd.get (), ".got");
2849 }
2850
2851 if (asect != nullptr)
2852 /* Translate asection to obj_section. */
2853 osect = maint_obj_section_from_bfd_section (objf->obfd.get (),
2854 asect, objf);
2855
2856 if (osect != nullptr)
2857 {
2858 /* Store the section address in %ebx. */
2859 store_unsigned_integer (buf, 4, byte_order, osect->addr ());
2861 }
2862 else
2863 {
2864 /* If we would only do this for a position-independent PLT, it would
2865 make sense to issue a warning here. */
2866 }
2867 }
2868
2869 /* MarkK wrote: This "+ 8" is all over the place:
2870 (i386_frame_this_id, i386_sigtramp_frame_this_id,
2871 i386_dummy_id). It's there, since all frame unwinders for
2872 a given target have to agree (within a certain margin) on the
2873 definition of the stack address of a frame. Otherwise frame id
2874 comparison might not work correctly. Since DWARF2/GCC uses the
2875 stack address *before* the function call as a frame's CFA. On
2876 the i386, when %ebp is used as a frame pointer, the offset
2877 between the contents %ebp and the CFA as defined by GCC. */
2878 return sp + 8;
2879}
2880
2881/* Implement the "push_dummy_call" gdbarch method. */
2882
2883static CORE_ADDR
2884i386_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2885 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
2886 struct value **args, CORE_ADDR sp,
2887 function_call_return_method return_method,
2888 CORE_ADDR struct_addr)
2889{
2890 return i386_thiscall_push_dummy_call (gdbarch, function, regcache, bp_addr,
2891 nargs, args, sp, return_method,
2892 struct_addr, false);
2893}
2894
2895/* These registers are used for returning integers (and on some
2896 targets also for returning `struct' and `union' values when their
2897 size and alignment match an integer type). */
2898#define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
2899#define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
2900
2901/* Read, for architecture GDBARCH, a function return value of TYPE
2902 from REGCACHE, and copy that into VALBUF. */
2903
2904static void
2906 struct regcache *regcache, gdb_byte *valbuf)
2907{
2908 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
2909 int len = type->length ();
2910 gdb_byte buf[I386_MAX_REGISTER_SIZE];
2911
2912 /* _Float16 and _Float16 _Complex values are returned via xmm0. */
2913 if (((type->code () == TYPE_CODE_FLT) && len == 2)
2914 || ((type->code () == TYPE_CODE_COMPLEX) && len == 4))
2915 {
2916 regcache->raw_read (I387_XMM0_REGNUM (tdep), valbuf);
2917 return;
2918 }
2919 else if (type->code () == TYPE_CODE_FLT)
2920 {
2921 if (tdep->st0_regnum < 0)
2922 {
2923 warning (_("Cannot find floating-point return value."));
2924 memset (valbuf, 0, len);
2925 return;
2926 }
2927
2928 /* Floating-point return values can be found in %st(0). Convert
2929 its contents to the desired type. This is probably not
2930 exactly how it would happen on the target itself, but it is
2931 the best we can do. */
2934 }
2935 else
2936 {
2937 int low_size = register_size (gdbarch, LOW_RETURN_REGNUM);
2938 int high_size = register_size (gdbarch, HIGH_RETURN_REGNUM);
2939
2940 if (len <= low_size)
2941 {
2943 memcpy (valbuf, buf, len);
2944 }
2945 else if (len <= (low_size + high_size))
2946 {
2948 memcpy (valbuf, buf, low_size);
2950 memcpy (valbuf + low_size, buf, len - low_size);
2951 }
2952 else
2953 internal_error (_("Cannot extract return value of %d bytes long."),
2954 len);
2955 }
2956}
2957
2958/* Write, for architecture GDBARCH, a function return value of TYPE
2959 from VALBUF into REGCACHE. */
2960
2961static void
2963 struct regcache *regcache, const gdb_byte *valbuf)
2964{
2965 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
2966 int len = type->length ();
2967
2968 if (type->code () == TYPE_CODE_FLT)
2969 {
2970 ULONGEST fstat;
2971 gdb_byte buf[I386_MAX_REGISTER_SIZE];
2972
2973 if (tdep->st0_regnum < 0)
2974 {
2975 warning (_("Cannot set floating-point return value."));
2976 return;
2977 }
2978
2979 /* Returning floating-point values is a bit tricky. Apart from
2980 storing the return value in %st(0), we have to simulate the
2981 state of the FPU at function return point. */
2982
2983 /* Convert the value found in VALBUF to the extended
2984 floating-point format used by the FPU. This is probably
2985 not exactly how it would happen on the target itself, but
2986 it is the best we can do. */
2989
2990 /* Set the top of the floating-point register stack to 7. The
2991 actual value doesn't really matter, but 7 is what a normal
2992 function return would end up with if the program started out
2993 with a freshly initialized FPU. */
2995 fstat |= (7 << 11);
2997
2998 /* Mark %st(1) through %st(7) as empty. Since we set the top of
2999 the floating-point register stack to 7, the appropriate value
3000 for the tag word is 0x3fff. */
3002 }
3003 else
3004 {
3005 int low_size = register_size (gdbarch, LOW_RETURN_REGNUM);
3006 int high_size = register_size (gdbarch, HIGH_RETURN_REGNUM);
3007
3008 if (len <= low_size)
3009 regcache->raw_write_part (LOW_RETURN_REGNUM, 0, len, valbuf);
3010 else if (len <= (low_size + high_size))
3011 {
3013 regcache->raw_write_part (HIGH_RETURN_REGNUM, 0, len - low_size,
3014 valbuf + low_size);
3015 }
3016 else
3017 internal_error (_("Cannot store return value of %d bytes long."), len);
3018 }
3019}
3020
3021
3022/* This is the variable that is set with "set struct-convention", and
3023 its legitimate values. */
3024static const char default_struct_convention[] = "default";
3025static const char pcc_struct_convention[] = "pcc";
3026static const char reg_struct_convention[] = "reg";
3027static const char *const valid_conventions[] =
3028{
3032 NULL
3033};
3035
3036/* Return non-zero if TYPE, which is assumed to be a structure,
3037 a union type, or an array type, should be returned in registers
3038 for architecture GDBARCH. */
3039
3040static int
3042{
3043 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
3044 enum type_code code = type->code ();
3045 int len = type->length ();
3046
3047 gdb_assert (code == TYPE_CODE_STRUCT
3048 || code == TYPE_CODE_UNION
3049 || code == TYPE_CODE_ARRAY);
3050
3053 && tdep->struct_return == pcc_struct_return)
3055 return 0;
3056
3057 /* Structures consisting of a single `float', `double' or 'long
3058 double' member are returned in %st(0). */
3059 if (code == TYPE_CODE_STRUCT && type->num_fields () == 1)
3060 {
3061 type = check_typedef (type->field (0).type ());
3062 if (type->code () == TYPE_CODE_FLT)
3063 return (len == 4 || len == 8 || len == 12);
3064 }
3065
3066 return (len == 1 || len == 2 || len == 4 || len == 8);
3067}
3068
3069/* Determine, for architecture GDBARCH, how a return value of TYPE
3070 should be returned. If it is supposed to be returned in registers,
3071 and READBUF is non-zero, read the appropriate value from REGCACHE,
3072 and copy it into READBUF. If WRITEBUF is non-zero, write the value
3073 from WRITEBUF into REGCACHE. */
3074
3075static enum return_value_convention
3076i386_return_value (struct gdbarch *gdbarch, struct value *function,
3077 struct type *type, struct regcache *regcache,
3078 struct value **read_value, const gdb_byte *writebuf)
3079{
3080 enum type_code code = type->code ();
3081
3082 if (((code == TYPE_CODE_STRUCT
3083 || code == TYPE_CODE_UNION
3084 || code == TYPE_CODE_ARRAY)
3086 /* Complex double and long double uses the struct return convention. */
3087 || (code == TYPE_CODE_COMPLEX && type->length () == 16)
3088 || (code == TYPE_CODE_COMPLEX && type->length () == 24)
3089 /* 128-bit decimal float uses the struct return convention. */
3090 || (code == TYPE_CODE_DECFLOAT && type->length () == 16))
3091 {
3092 /* The System V ABI says that:
3093
3094 "A function that returns a structure or union also sets %eax
3095 to the value of the original address of the caller's area
3096 before it returns. Thus when the caller receives control
3097 again, the address of the returned object resides in register
3098 %eax and can be used to access the object."
3099
3100 So the ABI guarantees that we can always find the return
3101 value just after the function has returned. */
3102
3103 /* Note that the ABI doesn't mention functions returning arrays,
3104 which is something possible in certain languages such as Ada.
3105 In this case, the value is returned as if it was wrapped in
3106 a record, so the convention applied to records also applies
3107 to arrays. */
3108
3109 if (read_value != nullptr)
3110 {
3111 ULONGEST addr;
3112
3114 *read_value = value_at_non_lval (type, addr);
3115 }
3116
3118 }
3119
3120 /* This special case is for structures consisting of a single
3121 `float', `double' or 'long double' member. These structures are
3122 returned in %st(0). For these structures, we call ourselves
3123 recursively, changing TYPE into the type of the first member of
3124 the structure. Since that should work for all structures that
3125 have only one member, we don't bother to check the member's type
3126 here. */
3127 if (code == TYPE_CODE_STRUCT && type->num_fields () == 1)
3128 {
3129 struct type *inner_type = check_typedef (type->field (0).type ());
3130 enum return_value_convention result
3131 = i386_return_value (gdbarch, function, inner_type, regcache,
3132 read_value, writebuf);
3133 if (read_value != nullptr)
3134 (*read_value)->deprecated_set_type (type);
3135 return result;
3136 }
3137
3138 if (read_value != nullptr)
3139 {
3140 *read_value = value::allocate (type);
3142 (*read_value)->contents_raw ().data ());
3143 }
3144 if (writebuf)
3146
3148}
3149
3150
3151struct type *
3153{
3154 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
3155
3156 if (!tdep->i387_ext_type)
3157 {
3158 tdep->i387_ext_type = tdesc_find_type (gdbarch, "i387_ext");
3159 gdb_assert (tdep->i387_ext_type != NULL);
3160 }
3161
3162 return tdep->i387_ext_type;
3163}
3164
3165/* Construct type for pseudo BND registers. We can't use
3166 tdesc_find_type since a complement of one value has to be used
3167 to describe the upper bound. */
3168
3169static struct type *
3171{
3172 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
3173
3174
3175 if (!tdep->i386_bnd_type)
3176 {
3177 struct type *t;
3178 const struct builtin_type *bt = builtin_type (gdbarch);
3179
3180 /* The type we're building is described bellow: */
3181#if 0
3182 struct __bound128
3183 {
3184 void *lbound;
3185 void *ubound; /* One complement of raw ubound field. */
3186 };
3187#endif
3188
3190 "__gdb_builtin_type_bound128", TYPE_CODE_STRUCT);
3191
3192 append_composite_type_field (t, "lbound", bt->builtin_data_ptr);
3193 append_composite_type_field (t, "ubound", bt->builtin_data_ptr);
3194
3195 t->set_name ("builtin_type_bound128");
3196 tdep->i386_bnd_type = t;
3197 }
3198
3199 return tdep->i386_bnd_type;
3200}
3201
3202/* Construct vector type for pseudo ZMM registers. We can't use
3203 tdesc_find_type since ZMM isn't described in target description. */
3204
3205static struct type *
3207{
3208 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
3209
3210 if (!tdep->i386_zmm_type)
3211 {
3212 const struct builtin_type *bt = builtin_type (gdbarch);
3213
3214 /* The type we're building is this: */
3215#if 0
3216 union __gdb_builtin_type_vec512i
3217 {
3218 int128_t v4_int128[4];
3219 int64_t v8_int64[8];
3220 int32_t v16_int32[16];
3221 int16_t v32_int16[32];
3222 int8_t v64_int8[64];
3223 double v8_double[8];
3224 float v16_float[16];
3225 float16_t v32_half[32];
3226 bfloat16_t v32_bfloat16[32];
3227 };
3228#endif
3229
3230 struct type *t;
3231
3233 "__gdb_builtin_type_vec512i", TYPE_CODE_UNION);
3234 append_composite_type_field (t, "v32_bfloat16",
3235 init_vector_type (bt->builtin_bfloat16, 32));
3236 append_composite_type_field (t, "v32_half",
3237 init_vector_type (bt->builtin_half, 32));
3238 append_composite_type_field (t, "v16_float",
3239 init_vector_type (bt->builtin_float, 16));
3240 append_composite_type_field (t, "v8_double",
3241 init_vector_type (bt->builtin_double, 8));
3242 append_composite_type_field (t, "v64_int8",
3243 init_vector_type (bt->builtin_int8, 64));
3244 append_composite_type_field (t, "v32_int16",
3245 init_vector_type (bt->builtin_int16, 32));
3246 append_composite_type_field (t, "v16_int32",
3247 init_vector_type (bt->builtin_int32, 16));
3248 append_composite_type_field (t, "v8_int64",
3249 init_vector_type (bt->builtin_int64, 8));
3250 append_composite_type_field (t, "v4_int128",
3251 init_vector_type (bt->builtin_int128, 4));
3252
3253 t->set_is_vector (true);
3254 t->set_name ("builtin_type_vec512i");
3255 tdep->i386_zmm_type = t;
3256 }
3257
3258 return tdep->i386_zmm_type;
3259}
3260
3261/* Construct vector type for pseudo YMM registers. We can't use
3262 tdesc_find_type since YMM isn't described in target description. */
3263
3264static struct type *
3266{
3267 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
3268
3269 if (!tdep->i386_ymm_type)
3270 {
3271 const struct builtin_type *bt = builtin_type (gdbarch);
3272
3273 /* The type we're building is this: */
3274#if 0
3275 union __gdb_builtin_type_vec256i
3276 {
3277 int128_t v2_int128[2];
3278 int64_t v4_int64[4];
3279 int32_t v8_int32[8];
3280 int16_t v16_int16[16];
3281 int8_t v32_int8[32];
3282 double v4_double[4];
3283 float v8_float[8];
3284 float16_t v16_half[16];
3285 bfloat16_t v16_bfloat16[16];
3286 };
3287#endif
3288
3289 struct type *t;
3290
3292 "__gdb_builtin_type_vec256i", TYPE_CODE_UNION);
3293 append_composite_type_field (t, "v16_bfloat16",
3294 init_vector_type (bt->builtin_bfloat16, 16));
3295 append_composite_type_field (t, "v16_half",
3296 init_vector_type (bt->builtin_half, 16));
3297 append_composite_type_field (t, "v8_float",
3298 init_vector_type (bt->builtin_float, 8));
3299 append_composite_type_field (t, "v4_double",
3300 init_vector_type (bt->builtin_double, 4));
3301 append_composite_type_field (t, "v32_int8",
3302 init_vector_type (bt->builtin_int8, 32));
3303 append_composite_type_field (t, "v16_int16",
3304 init_vector_type (bt->builtin_int16, 16));
3305 append_composite_type_field (t, "v8_int32",
3306 init_vector_type (bt->builtin_int32, 8));
3307 append_composite_type_field (t, "v4_int64",
3308 init_vector_type (bt->builtin_int64, 4));
3309 append_composite_type_field (t, "v2_int128",
3310 init_vector_type (bt->builtin_int128, 2));
3311
3312 t->set_is_vector (true);
3313 t->set_name ("builtin_type_vec256i");
3314 tdep->i386_ymm_type = t;
3315 }
3316
3317 return tdep->i386_ymm_type;
3318}
3319
3320/* Construct vector type for MMX registers. */
3321static struct type *
3323{
3324 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
3325
3326 if (!tdep->i386_mmx_type)
3327 {
3328 const struct builtin_type *bt = builtin_type (gdbarch);
3329
3330 /* The type we're building is this: */
3331#if 0
3332 union __gdb_builtin_type_vec64i
3333 {
3334 int64_t uint64;
3335 int32_t v2_int32[2];
3336 int16_t v4_int16[4];
3337 int8_t v8_int8[8];
3338 };
3339#endif
3340
3341 struct type *t;
3342
3344 "__gdb_builtin_type_vec64i", TYPE_CODE_UNION);
3345
3346 append_composite_type_field (t, "uint64", bt->builtin_int64);
3347 append_composite_type_field (t, "v2_int32",
3348 init_vector_type (bt->builtin_int32, 2));
3349 append_composite_type_field (t, "v4_int16",
3350 init_vector_type (bt->builtin_int16, 4));
3351 append_composite_type_field (t, "v8_int8",
3352 init_vector_type (bt->builtin_int8, 8));
3353
3354 t->set_is_vector (true);
3355 t->set_name ("builtin_type_vec64i");
3356 tdep->i386_mmx_type = t;
3357 }
3358
3359 return tdep->i386_mmx_type;
3360}
3361
3362/* Return the GDB type object for the "standard" data type of data in
3363 register REGNUM. */
3364
3365struct type *
3367{
3369 return i386_bnd_type (gdbarch);
3371 return i386_mmx_type (gdbarch);
3372 else if (i386_ymm_regnum_p (gdbarch, regnum))
3373 return i386_ymm_type (gdbarch);
3375 return i386_ymm_type (gdbarch);
3376 else if (i386_zmm_regnum_p (gdbarch, regnum))
3377 return i386_zmm_type (gdbarch);
3378 else
3379 {
3380 const struct builtin_type *bt = builtin_type (gdbarch);
3382 return bt->builtin_int8;
3383 else if (i386_word_regnum_p (gdbarch, regnum))
3384 return bt->builtin_int16;
3386 return bt->builtin_int32;
3387 else if (i386_k_regnum_p (gdbarch, regnum))
3388 return bt->builtin_int64;
3389 }
3390
3391 internal_error (_("invalid regnum"));
3392}
3393
3394/* Map a cooked register onto a raw register or memory. For the i386,
3395 the MMX registers need to be mapped onto floating point registers. */
3396
3397static int
3399{
3400 gdbarch *arch = regcache->arch ();
3401 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (arch);
3402 int mmxreg, fpreg;
3403 ULONGEST fstat;
3404 int tos;
3405
3406 mmxreg = regnum - tdep->mm0_regnum;
3407 regcache->raw_read (I387_FSTAT_REGNUM (tdep), &fstat);
3408 tos = (fstat >> 11) & 0x7;
3409 fpreg = (mmxreg + tos) % 8;
3410
3411 return (I387_ST0_REGNUM (tdep) + fpreg);
3412}
3413
3414/* A helper function for us by i386_pseudo_register_read_value and
3415 amd64_pseudo_register_read_value. It does all the work but reads
3416 the data into an already-allocated value. */
3417
3418void
3421 int regnum,
3422 struct value *result_value)
3423{
3424 gdb_byte raw_buf[I386_MAX_REGISTER_SIZE];
3425 enum register_status status;
3426 gdb_byte *buf = result_value->contents_raw ().data ();
3427
3429 {
3431
3432 /* Extract (always little endian). */
3433 status = regcache->raw_read (fpnum, raw_buf);
3434 if (status != REG_VALID)
3435 result_value->mark_bytes_unavailable (0,
3436 result_value->type ()->length ());
3437 else
3438 memcpy (buf, raw_buf, register_size (gdbarch, regnum));
3439 }
3440 else
3441 {
3442 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
3444 {
3445 regnum -= tdep->bnd0_regnum;
3446
3447 /* Extract (always little endian). Read lower 128bits. */
3449 raw_buf);
3450 if (status != REG_VALID)
3451 result_value->mark_bytes_unavailable (0, 16);
3452 else
3453 {
3454 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
3455 LONGEST upper, lower;
3457
3458 lower = extract_unsigned_integer (raw_buf, 8, byte_order);
3459 upper = extract_unsigned_integer (raw_buf + 8, 8, byte_order);
3460 upper = ~upper;
3461
3462 memcpy (buf, &lower, size);
3463 memcpy (buf + size, &upper, size);
3464 }
3465 }
3466 else if (i386_k_regnum_p (gdbarch, regnum))
3467 {
3468 regnum -= tdep->k0_regnum;
3469
3470 /* Extract (always little endian). */
3471 status = regcache->raw_read (tdep->k0_regnum + regnum, raw_buf);
3472 if (status != REG_VALID)
3473 result_value->mark_bytes_unavailable (0, 8);
3474 else
3475 memcpy (buf, raw_buf, 8);
3476 }
3477 else if (i386_zmm_regnum_p (gdbarch, regnum))
3478 {
3479 regnum -= tdep->zmm0_regnum;
3480
3482 {
3483 /* Extract (always little endian). Read lower 128bits. */
3485 raw_buf);
3486 if (status != REG_VALID)
3487 result_value->mark_bytes_unavailable (0, 16);
3488 else
3489 memcpy (buf, raw_buf, 16);
3490
3491 /* Extract (always little endian). Read upper 128bits. */
3493 raw_buf);
3494 if (status != REG_VALID)
3495 result_value->mark_bytes_unavailable (16, 16);
3496 else
3497 memcpy (buf + 16, raw_buf, 16);
3498 }
3499 else
3500 {
3501 /* Extract (always little endian). Read lower 128bits. */
3504 raw_buf);
3505 if (status != REG_VALID)
3506 result_value->mark_bytes_unavailable (0, 16);
3507 else
3508 memcpy (buf, raw_buf, 16);
3509
3510 /* Extract (always little endian). Read upper 128bits. */
3513 raw_buf);
3514 if (status != REG_VALID)
3515 result_value->mark_bytes_unavailable (16, 16);
3516 else
3517 memcpy (buf + 16, raw_buf, 16);
3518 }
3519
3520 /* Read upper 256bits. */
3522 raw_buf);
3523 if (status != REG_VALID)
3524 result_value->mark_bytes_unavailable (32, 32);
3525 else
3526 memcpy (buf + 32, raw_buf, 32);
3527 }
3528 else if (i386_ymm_regnum_p (gdbarch, regnum))
3529 {
3530 regnum -= tdep->ymm0_regnum;
3531
3532 /* Extract (always little endian). Read lower 128bits. */
3534 raw_buf);
3535 if (status != REG_VALID)
3536 result_value->mark_bytes_unavailable (0, 16);
3537 else
3538 memcpy (buf, raw_buf, 16);
3539 /* Read upper 128bits. */
3541 raw_buf);
3542 if (status != REG_VALID)
3543 result_value->mark_bytes_unavailable (16, 32);
3544 else
3545 memcpy (buf + 16, raw_buf, 16);
3546 }
3548 {
3549 regnum -= tdep->ymm16_regnum;
3550 /* Extract (always little endian). Read lower 128bits. */
3552 raw_buf);
3553 if (status != REG_VALID)
3554 result_value->mark_bytes_unavailable (0, 16);
3555 else
3556 memcpy (buf, raw_buf, 16);
3557 /* Read upper 128bits. */
3559 raw_buf);
3560 if (status != REG_VALID)
3561 result_value->mark_bytes_unavailable (16, 16);
3562 else
3563 memcpy (buf + 16, raw_buf, 16);
3564 }
3565 else if (i386_word_regnum_p (gdbarch, regnum))
3566 {
3567 int gpnum = regnum - tdep->ax_regnum;
3568
3569 /* Extract (always little endian). */
3570 status = regcache->raw_read (gpnum, raw_buf);
3571 if (status != REG_VALID)
3572 result_value->mark_bytes_unavailable (0,
3573 result_value->type ()->length ());
3574 else
3575 memcpy (buf, raw_buf, 2);
3576 }
3577 else if (i386_byte_regnum_p (gdbarch, regnum))
3578 {
3579 int gpnum = regnum - tdep->al_regnum;
3580
3581 /* Extract (always little endian). We read both lower and
3582 upper registers. */
3583 status = regcache->raw_read (gpnum % 4, raw_buf);
3584 if (status != REG_VALID)
3585 result_value->mark_bytes_unavailable (0,
3586 result_value->type ()->length ());
3587 else if (gpnum >= 4)
3588 memcpy (buf, raw_buf + 1, 1);
3589 else
3590 memcpy (buf, raw_buf, 1);
3591 }
3592 else
3593 internal_error (_("invalid regnum"));
3594 }
3595}
3596
3597static struct value *
3600 int regnum)
3601{
3602 struct value *result;
3603
3605 result->set_lval (lval_register);
3606 VALUE_REGNUM (result) = regnum;
3607
3609
3610 return result;
3611}
3612
3613void
3615 int regnum, const gdb_byte *buf)
3616{
3617 gdb_byte raw_buf[I386_MAX_REGISTER_SIZE];
3618
3620 {
3622
3623 /* Read ... */
3624 regcache->raw_read (fpnum, raw_buf);
3625 /* ... Modify ... (always little endian). */
3626 memcpy (raw_buf, buf, register_size (gdbarch, regnum));
3627 /* ... Write. */
3628 regcache->raw_write (fpnum, raw_buf);
3629 }
3630 else
3631 {
3632 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
3633
3635 {
3636 ULONGEST upper, lower;
3638 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
3639
3640 /* New values from input value. */
3641 regnum -= tdep->bnd0_regnum;
3642 lower = extract_unsigned_integer (buf, size, byte_order);
3643 upper = extract_unsigned_integer (buf + size, size, byte_order);
3644
3645 /* Fetching register buffer. */
3647 raw_buf);
3648
3649 upper = ~upper;
3650
3651 /* Set register bits. */
3652 memcpy (raw_buf, &lower, 8);
3653 memcpy (raw_buf + 8, &upper, 8);
3654
3655 regcache->raw_write (I387_BND0R_REGNUM (tdep) + regnum, raw_buf);
3656 }
3657 else if (i386_k_regnum_p (gdbarch, regnum))
3658 {
3659 regnum -= tdep->k0_regnum;
3660
3661 regcache->raw_write (tdep->k0_regnum + regnum, buf);
3662 }
3663 else if (i386_zmm_regnum_p (gdbarch, regnum))
3664 {
3665 regnum -= tdep->zmm0_regnum;
3666
3668 {
3669 /* Write lower 128bits. */
3670 regcache->raw_write (I387_XMM0_REGNUM (tdep) + regnum, buf);
3671 /* Write upper 128bits. */
3672 regcache->raw_write (I387_YMM0_REGNUM (tdep) + regnum, buf + 16);
3673 }
3674 else
3675 {
3676 /* Write lower 128bits. */
3678 - num_lower_zmm_regs, buf);
3679 /* Write upper 128bits. */
3681 - num_lower_zmm_regs, buf + 16);
3682 }
3683 /* Write upper 256bits. */
3684 regcache->raw_write (tdep->zmm0h_regnum + regnum, buf + 32);
3685 }
3686 else if (i386_ymm_regnum_p (gdbarch, regnum))
3687 {
3688 regnum -= tdep->ymm0_regnum;
3689
3690 /* ... Write lower 128bits. */
3691 regcache->raw_write (I387_XMM0_REGNUM (tdep) + regnum, buf);
3692 /* ... Write upper 128bits. */
3693 regcache->raw_write (tdep->ymm0h_regnum + regnum, buf + 16);
3694 }
3696 {
3697 regnum -= tdep->ymm16_regnum;
3698
3699 /* ... Write lower 128bits. */
3700 regcache->raw_write (I387_XMM16_REGNUM (tdep) + regnum, buf);
3701 /* ... Write upper 128bits. */
3702 regcache->raw_write (tdep->ymm16h_regnum + regnum, buf + 16);
3703 }
3704 else if (i386_word_regnum_p (gdbarch, regnum))
3705 {
3706 int gpnum = regnum - tdep->ax_regnum;
3707
3708 /* Read ... */
3709 regcache->raw_read (gpnum, raw_buf);
3710 /* ... Modify ... (always little endian). */
3711 memcpy (raw_buf, buf, 2);
3712 /* ... Write. */
3713 regcache->raw_write (gpnum, raw_buf);
3714 }
3715 else if (i386_byte_regnum_p (gdbarch, regnum))
3716 {
3717 int gpnum = regnum - tdep->al_regnum;
3718
3719 /* Read ... We read both lower and upper registers. */
3720 regcache->raw_read (gpnum % 4, raw_buf);
3721 /* ... Modify ... (always little endian). */
3722 if (gpnum >= 4)
3723 memcpy (raw_buf + 1, buf, 1);
3724 else
3725 memcpy (raw_buf, buf, 1);
3726 /* ... Write. */
3727 regcache->raw_write (gpnum % 4, raw_buf);
3728 }
3729 else
3730 internal_error (_("invalid regnum"));
3731 }
3732}
3733
3734/* Implement the 'ax_pseudo_register_collect' gdbarch method. */
3735
3736int
3738 struct agent_expr *ax, int regnum)
3739{
3740 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
3741
3743 {
3744 /* MMX to FPU register mapping depends on current TOS. Let's just
3745 not care and collect everything... */
3746 int i;
3747
3748 ax_reg_mask (ax, I387_FSTAT_REGNUM (tdep));
3749 for (i = 0; i < 8; i++)
3750 ax_reg_mask (ax, I387_ST0_REGNUM (tdep) + i);
3751 return 0;
3752 }
3753 else if (i386_bnd_regnum_p (gdbarch, regnum))
3754 {
3755 regnum -= tdep->bnd0_regnum;
3756 ax_reg_mask (ax, I387_BND0R_REGNUM (tdep) + regnum);
3757 return 0;
3758 }
3759 else if (i386_k_regnum_p (gdbarch, regnum))
3760 {
3761 regnum -= tdep->k0_regnum;
3762 ax_reg_mask (ax, tdep->k0_regnum + regnum);
3763 return 0;
3764 }
3765 else if (i386_zmm_regnum_p (gdbarch, regnum))
3766 {
3767 regnum -= tdep->zmm0_regnum;
3769 {
3770 ax_reg_mask (ax, I387_XMM0_REGNUM (tdep) + regnum);
3771 ax_reg_mask (ax, tdep->ymm0h_regnum + regnum);
3772 }
3773 else
3774 {
3779 }
3780 ax_reg_mask (ax, tdep->zmm0h_regnum + regnum);
3781 return 0;
3782 }
3783 else if (i386_ymm_regnum_p (gdbarch, regnum))
3784 {
3785 regnum -= tdep->ymm0_regnum;
3786 ax_reg_mask (ax, I387_XMM0_REGNUM (tdep) + regnum);
3787 ax_reg_mask (ax, tdep->ymm0h_regnum + regnum);
3788 return 0;
3789 }
3791 {
3792 regnum -= tdep->ymm16_regnum;
3793 ax_reg_mask (ax, I387_XMM16_REGNUM (tdep) + regnum);
3794 ax_reg_mask (ax, tdep->ymm16h_regnum + regnum);
3795 return 0;
3796 }
3797 else if (i386_word_regnum_p (gdbarch, regnum))
3798 {
3799 int gpnum = regnum - tdep->ax_regnum;
3800
3801 ax_reg_mask (ax, gpnum);
3802 return 0;
3803 }
3804 else if (i386_byte_regnum_p (gdbarch, regnum))
3805 {
3806 int gpnum = regnum - tdep->al_regnum;
3807
3808 ax_reg_mask (ax, gpnum % 4);
3809 return 0;
3810 }
3811 else
3812 internal_error (_("invalid regnum"));
3813 return 1;
3814}
3815
3816
3817/* Return the register number of the register allocated by GCC after
3818 REGNUM, or -1 if there is no such register. */
3819
3820static int
3822{
3823 /* GCC allocates the registers in the order:
3824
3825 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
3826
3827 Since storing a variable in %esp doesn't make any sense we return
3828 -1 for %ebp and for %esp itself. */
3829 static int next_regnum[] =
3830 {
3831 I386_EDX_REGNUM, /* Slot for %eax. */
3832 I386_EBX_REGNUM, /* Slot for %ecx. */
3833 I386_ECX_REGNUM, /* Slot for %edx. */
3834 I386_ESI_REGNUM, /* Slot for %ebx. */
3835 -1, -1, /* Slots for %esp and %ebp. */
3836 I386_EDI_REGNUM, /* Slot for %esi. */
3837 I386_EBP_REGNUM /* Slot for %edi. */
3838 };
3839
3840 if (regnum >= 0 && regnum < sizeof (next_regnum) / sizeof (next_regnum[0]))
3841 return next_regnum[regnum];
3842
3843 return -1;
3844}
3845
3846/* Return nonzero if a value of type TYPE stored in register REGNUM
3847 needs any special handling. */
3848
3849static int
3851 int regnum, struct type *type)
3852{
3853 int len = type->length ();
3854
3855 /* Values may be spread across multiple registers. Most debugging
3856 formats aren't expressive enough to specify the locations, so
3857 some heuristics is involved. Right now we only handle types that
3858 have a length that is a multiple of the word size, since GCC
3859 doesn't seem to put any other types into registers. */
3860 if (len > 4 && len % 4 == 0)
3861 {
3862 int last_regnum = regnum;
3863
3864 while (len > 4)
3865 {
3866 last_regnum = i386_next_regnum (last_regnum);
3867 len -= 4;
3868 }
3869
3870 if (last_regnum != -1)
3871 return 1;
3872 }
3873
3875}
3876
3877/* Read a value of type TYPE from register REGNUM in frame FRAME, and
3878 return its contents in TO. */
3879
3880static int
3882 struct type *type, gdb_byte *to,
3883 int *optimizedp, int *unavailablep)
3884{
3885 struct gdbarch *gdbarch = get_frame_arch (frame);
3886 int len = type->length ();
3887
3889 return i387_register_to_value (frame, regnum, type, to,
3890 optimizedp, unavailablep);
3891
3892 /* Read a value spread across multiple registers. */
3893
3894 gdb_assert (len > 4 && len % 4 == 0);
3895
3896 while (len > 0)
3897 {
3898 gdb_assert (regnum != -1);
3899 gdb_assert (register_size (gdbarch, regnum) == 4);
3900
3901 if (!get_frame_register_bytes (frame, regnum, 0,
3902 gdb::make_array_view (to,
3904 regnum)),
3905 optimizedp, unavailablep))
3906 return 0;
3907
3909 len -= 4;
3910 to += 4;
3911 }
3912
3913 *optimizedp = *unavailablep = 0;
3914 return 1;
3915}
3916
3917/* Write the contents FROM of a value of type TYPE into register
3918 REGNUM in frame FRAME. */
3919
3920static void
3922 struct type *type, const gdb_byte *from)
3923{
3924 int len = type->length ();
3925
3926 if (i386_fp_regnum_p (get_frame_arch (frame), regnum))
3927 {
3928 i387_value_to_register (frame, regnum, type, from);
3929 return;
3930 }
3931
3932 /* Write a value spread across multiple registers. */
3933
3934 gdb_assert (len > 4 && len % 4 == 0);
3935
3936 while (len > 0)
3937 {
3938 gdb_assert (regnum != -1);
3939 gdb_assert (register_size (get_frame_arch (frame), regnum) == 4);
3940
3941 put_frame_register (frame, regnum, from);
3943 len -= 4;
3944 from += 4;
3945 }
3946}
3947
3948/* Supply register REGNUM from the buffer specified by GREGS and LEN
3949 in the general-purpose register set REGSET to register cache
3950 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
3951
3952void
3954 int regnum, const void *gregs, size_t len)
3955{
3956 struct gdbarch *gdbarch = regcache->arch ();
3957 const i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
3958 const gdb_byte *regs = (const gdb_byte *) gregs;
3959 int i;
3960
3961 gdb_assert (len >= tdep->sizeof_gregset);
3962
3963 for (i = 0; i < tdep->gregset_num_regs; i++)
3964 {
3965 if ((regnum == i || regnum == -1)
3966 && tdep->gregset_reg_offset[i] != -1)
3967 regcache->raw_supply (i, regs + tdep->gregset_reg_offset[i]);
3968 }
3969}
3970
3971/* Collect register REGNUM from the register cache REGCACHE and store
3972 it in the buffer specified by GREGS and LEN as described by the
3973 general-purpose register set REGSET. If REGNUM is -1, do this for
3974 all registers in REGSET. */
3975
3976static void
3978 const struct regcache *regcache,
3979 int regnum, void *gregs, size_t len)
3980{
3981 struct gdbarch *gdbarch = regcache->arch ();
3982 const i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
3983 gdb_byte *regs = (gdb_byte *) gregs;
3984 int i;
3985
3986 gdb_assert (len >= tdep->sizeof_gregset);
3987
3988 for (i = 0; i < tdep->gregset_num_regs; i++)
3989 {
3990 if ((regnum == i || regnum == -1)
3991 && tdep->gregset_reg_offset[i] != -1)
3992 regcache->raw_collect (i, regs + tdep->gregset_reg_offset[i]);
3993 }
3994}
3995
3996/* Supply register REGNUM from the buffer specified by FPREGS and LEN
3997 in the floating-point register set REGSET to register cache
3998 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
3999
4000static void
4002 int regnum, const void *fpregs, size_t len)
4003{
4004 struct gdbarch *gdbarch = regcache->arch ();
4005 const i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
4006
4007 if (len == I387_SIZEOF_FXSAVE)
4008 {
4010 return;
4011 }
4012
4013 gdb_assert (len >= tdep->sizeof_fpregset);
4015}
4016
4017/* Collect register REGNUM from the register cache REGCACHE and store
4018 it in the buffer specified by FPREGS and LEN as described by the
4019 floating-point register set REGSET. If REGNUM is -1, do this for
4020 all registers in REGSET. */
4021
4022static void
4024 const struct regcache *regcache,
4025 int regnum, void *fpregs, size_t len)
4026{
4027 struct gdbarch *gdbarch = regcache->arch ();
4028 const i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
4029
4030 if (len == I387_SIZEOF_FXSAVE)
4031 {
4033 return;
4034 }
4035
4036 gdb_assert (len >= tdep->sizeof_fpregset);
4038}
4039
4040/* Register set definitions. */
4041
4042const struct regset i386_gregset =
4043 {
4045 };
4046
4047const struct regset i386_fpregset =
4048 {
4050 };
4051
4052/* Default iterator over core file register note sections. */
4053
4054void
4057 void *cb_data,
4058 const struct regcache *regcache)
4059{
4060 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
4061
4062 cb (".reg", tdep->sizeof_gregset, tdep->sizeof_gregset, &i386_gregset, NULL,
4063 cb_data);
4064 if (tdep->sizeof_fpregset)
4065 cb (".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset, tdep->fpregset,
4066 NULL, cb_data);
4067}
4068
4069
4070/* Stuff for WIN32 PE style DLL's but is pretty generic really. */
4071
4072CORE_ADDR
4074 CORE_ADDR pc, char *name)
4075{
4076 struct gdbarch *gdbarch = get_frame_arch (frame);
4077 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
4078
4079 /* jmp *(dest) */
4080 if (pc && read_memory_unsigned_integer (pc, 2, byte_order) == 0x25ff)
4081 {
4082 unsigned long indirect =
4083 read_memory_unsigned_integer (pc + 2, 4, byte_order);
4084 struct minimal_symbol *indsym =
4085 indirect ? lookup_minimal_symbol_by_pc (indirect).minsym : 0;
4086 const char *symname = indsym ? indsym->linkage_name () : 0;
4087
4088 if (symname)
4089 {
4090 if (startswith (symname, "__imp_")
4091 || startswith (symname, "_imp_"))
4092 return name ? 1 :
4093 read_memory_unsigned_integer (indirect, 4, byte_order);
4094 }
4095 }
4096 return 0; /* Not a trampoline. */
4097}
4098
4099
4100/* Return whether the THIS_FRAME corresponds to a sigtramp
4101 routine. */
4102
4103int
4105{
4106 CORE_ADDR pc = get_frame_pc (this_frame);
4107 const char *name;
4108
4109 find_pc_partial_function (pc, &name, NULL, NULL);
4110 return (name && strcmp ("_sigtramp", name) == 0);
4111}
4112
4113
4114/* We have two flavours of disassembly. The machinery on this page
4115 deals with switching between those. */
4116
4117static int
4118i386_print_insn (bfd_vma pc, struct disassemble_info *info)
4119{
4120 gdb_assert (disassembly_flavor == att_flavor
4122
4123 info->disassembler_options = disassembly_flavor;
4124
4125 return default_print_insn (pc, info);
4126}
4127
4128
4129/* There are a few i386 architecture variants that differ only
4130 slightly from the generic i386 target. For now, we don't give them
4131 their own source file, but include them here. As a consequence,
4132 they'll always be included. */
4133
4134/* System V Release 4 (SVR4). */
4135
4136/* Return whether THIS_FRAME corresponds to a SVR4 sigtramp
4137 routine. */
4138
4139static int
4141{
4142 CORE_ADDR pc = get_frame_pc (this_frame);
4143 const char *name;
4144
4145 /* The origin of these symbols is currently unknown. */
4146 find_pc_partial_function (pc, &name, NULL, NULL);
4147 return (name && (strcmp ("_sigreturn", name) == 0
4148 || strcmp ("sigvechandler", name) == 0));
4149}
4150
4151/* Assuming THIS_FRAME is for a SVR4 sigtramp routine, return the
4152 address of the associated sigcontext (ucontext) structure. */
4153
4154static CORE_ADDR
4156{
4157 struct gdbarch *gdbarch = get_frame_arch (this_frame);
4158 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
4159 gdb_byte buf[4];
4160 CORE_ADDR sp;
4161
4162 get_frame_register (this_frame, I386_ESP_REGNUM, buf);
4163 sp = extract_unsigned_integer (buf, 4, byte_order);
4164
4165 return read_memory_unsigned_integer (sp + 8, 4, byte_order);
4166}
4167
4168
4169
4170/* Implementation of `gdbarch_stap_is_single_operand', as defined in
4171 gdbarch.h. */
4172
4173int
4175{
4176 return (*s == '$' /* Literal number. */
4177 || (isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement. */
4178 || (*s == '(' && s[1] == '%') /* Register indirection. */
4179 || (*s == '%' && isalpha (s[1]))); /* Register access. */
4180}
4181
4182/* Helper function for i386_stap_parse_special_token.
4183
4184 This function parses operands of the form `-8+3+1(%rbp)', which
4185 must be interpreted as `*(-8 + 3 - 1 + (void *) $eax)'.
4186
4187 Return true if the operand was parsed successfully, false
4188 otherwise. */
4189
4190static expr::operation_up
4192 struct stap_parse_info *p)
4193{
4194 const char *s = p->arg;
4195
4196 if (isdigit (*s) || *s == '-' || *s == '+')
4197 {
4198 bool got_minus[3];
4199 int i;
4200 long displacements[3];
4201 const char *start;
4202 int len;
4203 char *endp;
4204
4205 got_minus[0] = false;
4206 if (*s == '+')
4207 ++s;
4208 else if (*s == '-')
4209 {
4210 ++s;
4211 got_minus[0] = true;
4212 }
4213
4214 if (!isdigit ((unsigned char) *s))
4215 return {};
4216
4217 displacements[0] = strtol (s, &endp, 10);
4218 s = endp;
4219
4220 if (*s != '+' && *s != '-')
4221 {
4222 /* We are not dealing with a triplet. */
4223 return {};
4224 }
4225
4226 got_minus[1] = false;
4227 if (*s == '+')
4228 ++s;
4229 else
4230 {
4231 ++s;
4232 got_minus[1] = true;
4233 }
4234
4235 if (!isdigit ((unsigned char) *s))
4236 return {};
4237
4238 displacements[1] = strtol (s, &endp, 10);
4239 s = endp;
4240
4241 if (*s != '+' && *s != '-')
4242 {
4243 /* We are not dealing with a triplet. */
4244 return {};
4245 }
4246
4247 got_minus[2] = false;
4248 if (*s == '+')
4249 ++s;
4250 else
4251 {
4252 ++s;
4253 got_minus[2] = true;
4254 }
4255
4256 if (!isdigit ((unsigned char) *s))
4257 return {};
4258
4259 displacements[2] = strtol (s, &endp, 10);
4260 s = endp;
4261
4262 if (*s != '(' || s[1] != '%')
4263 return {};
4264
4265 s += 2;
4266 start = s;
4267
4268 while (isalnum (*s))
4269 ++s;
4270
4271 if (*s++ != ')')
4272 return {};
4273
4274 len = s - start - 1;
4275 std::string regname (start, len);
4276
4277 if (user_reg_map_name_to_regnum (gdbarch, regname.c_str (), len) == -1)
4278 error (_("Invalid register name `%s' on expression `%s'."),
4279 regname.c_str (), p->saved_arg);
4280
4281 LONGEST value = 0;
4282 for (i = 0; i < 3; i++)
4283 {
4284 LONGEST this_val = displacements[i];
4285 if (got_minus[i])
4286 this_val = -this_val;
4287 value += this_val;
4288 }
4289
4290 p->arg = s;
4291
4292 using namespace expr;
4293
4294 struct type *long_type = builtin_type (gdbarch)->builtin_long;
4295 operation_up offset
4296 = make_operation<long_const_operation> (long_type, value);
4297
4298 operation_up reg
4299 = make_operation<register_operation> (std::move (regname));
4300 struct type *void_ptr = builtin_type (gdbarch)->builtin_data_ptr;
4301 reg = make_operation<unop_cast_operation> (std::move (reg), void_ptr);
4302
4303 operation_up sum
4304 = make_operation<add_operation> (std::move (reg), std::move (offset));
4305 struct type *arg_ptr_type = lookup_pointer_type (p->arg_type);
4306 sum = make_operation<unop_cast_operation> (std::move (sum),
4307 arg_ptr_type);
4308 return make_operation<unop_ind_operation> (std::move (sum));
4309 }
4310
4311 return {};
4312}
4313
4314/* Helper function for i386_stap_parse_special_token.
4315
4316 This function parses operands of the form `register base +
4317 (register index * size) + offset', as represented in
4318 `(%rcx,%rax,8)', or `[OFFSET](BASE_REG,INDEX_REG[,SIZE])'.
4319
4320 Return true if the operand was parsed successfully, false
4321 otherwise. */
4322
4323static expr::operation_up
4325 struct stap_parse_info *p)
4326{
4327 const char *s = p->arg;
4328
4329 if (isdigit (*s) || *s == '(' || *s == '-' || *s == '+')
4330 {
4331 bool offset_minus = false;
4332 long offset = 0;
4333 bool size_minus = false;
4334 long size = 0;
4335 const char *start;
4336 int len_base;
4337 int len_index;
4338
4339 if (*s == '+')
4340 ++s;
4341 else if (*s == '-')
4342 {
4343 ++s;
4344 offset_minus = true;
4345 }
4346
4347 if (offset_minus && !isdigit (*s))
4348 return {};
4349
4350 if (isdigit (*s))
4351 {
4352 char *endp;
4353
4354 offset = strtol (s, &endp, 10);
4355 s = endp;
4356 }
4357
4358 if (*s != '(' || s[1] != '%')
4359 return {};
4360
4361 s += 2;
4362 start = s;
4363
4364 while (isalnum (*s))
4365 ++s;
4366
4367 if (*s != ',' || s[1] != '%')
4368 return {};
4369
4370 len_base = s - start;
4371 std::string base (start, len_base);
4372
4373 if (user_reg_map_name_to_regnum (gdbarch, base.c_str (), len_base) == -1)
4374 error (_("Invalid register name `%s' on expression `%s'."),
4375 base.c_str (), p->saved_arg);
4376
4377 s += 2;
4378 start = s;
4379
4380 while (isalnum (*s))
4381 ++s;
4382
4383 len_index = s - start;
4384 std::string index (start, len_index);
4385
4386 if (user_reg_map_name_to_regnum (gdbarch, index.c_str (),
4387 len_index) == -1)
4388 error (_("Invalid register name `%s' on expression `%s'."),
4389 index.c_str (), p->saved_arg);
4390
4391 if (*s != ',' && *s != ')')
4392 return {};
4393
4394 if (*s == ',')
4395 {
4396 char *endp;
4397
4398 ++s;
4399 if (*s == '+')
4400 ++s;
4401 else if (*s == '-')
4402 {
4403 ++s;
4404 size_minus = true;
4405 }
4406
4407 size = strtol (s, &endp, 10);
4408 s = endp;
4409
4410 if (*s != ')')
4411 return {};
4412 }
4413
4414 ++s;
4415 p->arg = s;
4416
4417 using namespace expr;
4418
4419 struct type *long_type = builtin_type (gdbarch)->builtin_long;
4420 operation_up reg = make_operation<register_operation> (std::move (base));
4421
4422 if (offset != 0)
4423 {
4424 if (offset_minus)
4425 offset = -offset;
4427 = make_operation<long_const_operation> (long_type, offset);
4428 reg = make_operation<add_operation> (std::move (reg),
4429 std::move (value));
4430 }
4431
4432 operation_up ind_reg
4433 = make_operation<register_operation> (std::move (index));
4434
4435 if (size != 0)
4436 {
4437 if (size_minus)
4438 size = -size;
4440 = make_operation<long_const_operation> (long_type, size);
4441 ind_reg = make_operation<mul_operation> (std::move (ind_reg),
4442 std::move (value));
4443 }
4444
4445 operation_up sum
4446 = make_operation<add_operation> (std::move (reg),
4447 std::move (ind_reg));
4448
4449 struct type *arg_ptr_type = lookup_pointer_type (p->arg_type);
4450 sum = make_operation<unop_cast_operation> (std::move (sum),
4451 arg_ptr_type);
4452 return make_operation<unop_ind_operation> (std::move (sum));
4453 }
4454
4455 return {};
4456}
4457
4458/* Implementation of `gdbarch_stap_parse_special_token', as defined in
4459 gdbarch.h. */
4460
4463 struct stap_parse_info *p)
4464{
4465 /* The special tokens to be parsed here are:
4466
4467 - `register base + (register index * size) + offset', as represented
4468 in `(%rcx,%rax,8)', or `[OFFSET](BASE_REG,INDEX_REG[,SIZE])'.
4469
4470 - Operands of the form `-8+3+1(%rbp)', which must be interpreted as
4471 `*(-8 + 3 - 1 + (void *) $eax)'. */
4472
4473 expr::operation_up result
4475
4476 if (result == nullptr)
4478
4479 return result;
4480}
4481
4482/* Implementation of 'gdbarch_stap_adjust_register', as defined in
4483 gdbarch.h. */
4484
4485static std::string
4487 const std::string &regname, int regnum)
4488{
4489 static const std::unordered_set<std::string> reg_assoc
4490 = { "ax", "bx", "cx", "dx",
4491 "si", "di", "bp", "sp" };
4492
4493 /* If we are dealing with a register whose size is less than the size
4494 specified by the "[-]N@" prefix, and it is one of the registers that
4495 we know has an extended variant available, then use the extended
4496 version of the register instead. */
4498 && reg_assoc.find (regname) != reg_assoc.end ())
4499 return "e" + regname;
4500
4501 /* Otherwise, just use the requested register. */
4502 return regname;
4503}
4504
4505
4506
4507/* gdbarch gnu_triplet_regexp method. Both arches are acceptable as GDB always
4508 also supplies -m64 or -m32 by gdbarch_gcc_target_options. */
4509
4510static const char *
4512{
4513 return "(x86_64|i.86)";
4514}
4515
4516
4517
4518/* Implement the "in_indirect_branch_thunk" gdbarch function. */
4519
4520static bool
4526
4527/* Generic ELF. */
4528
4529void
4531{
4532 static const char *const stap_integer_prefixes[] = { "$", NULL };
4533 static const char *const stap_register_prefixes[] = { "%", NULL };
4534 static const char *const stap_register_indirection_prefixes[] = { "(",
4535 NULL };
4536 static const char *const stap_register_indirection_suffixes[] = { ")",
4537 NULL };
4538
4539 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
4541
4542 /* Registering SystemTap handlers. */
4543 set_gdbarch_stap_integer_prefixes (gdbarch, stap_integer_prefixes);
4544 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
4555
4558}
4559
4560/* System V Release 4 (SVR4). */
4561
4562void
4564{
4565 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
4566
4567 /* System V Release 4 uses ELF. */
4568 i386_elf_init_abi (info, gdbarch);
4569
4570 /* System V Release 4 has shared libraries. */
4572
4575 tdep->sc_pc_offset = 36 + 14 * 4;
4576 tdep->sc_sp_offset = 36 + 17 * 4;
4577
4578 tdep->jb_pc_offset = 20;
4579}
4580
4581
4582
4583/* i386 register groups. In addition to the normal groups, add "mmx"
4584 and "sse". */
4585
4588
4589static void
4595
4596static void
4602
4603int
4605 const struct reggroup *group)
4606{
4607 const i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
4608 int fp_regnum_p, mmx_regnum_p, xmm_regnum_p, mxcsr_regnum_p,
4609 ymm_regnum_p, ymmh_regnum_p, ymm_avx512_regnum_p, ymmh_avx512_regnum_p,
4610 bndr_regnum_p, bnd_regnum_p, zmm_regnum_p, zmmh_regnum_p,
4611 mpx_ctrl_regnum_p, xmm_avx512_regnum_p,
4612 avx512_p, avx_p, sse_p, pkru_regnum_p;
4613
4614 /* Don't include pseudo registers, except for MMX, in any register
4615 groups. */
4617 return 0;
4618
4620 return 0;
4621
4623 return 0;
4624
4625 mmx_regnum_p = i386_mmx_regnum_p (gdbarch, regnum);
4626 if (group == i386_mmx_reggroup)
4627 return mmx_regnum_p;
4628
4629 pkru_regnum_p = i386_pkru_regnum_p(gdbarch, regnum);
4630 xmm_regnum_p = i386_xmm_regnum_p (gdbarch, regnum);
4631 xmm_avx512_regnum_p = i386_xmm_avx512_regnum_p (gdbarch, regnum);
4632 mxcsr_regnum_p = i386_mxcsr_regnum_p (gdbarch, regnum);
4633 if (group == i386_sse_reggroup)
4634 return xmm_regnum_p || xmm_avx512_regnum_p || mxcsr_regnum_p;
4635
4636 ymm_regnum_p = i386_ymm_regnum_p (gdbarch, regnum);
4637 ymm_avx512_regnum_p = i386_ymm_avx512_regnum_p (gdbarch, regnum);
4638 zmm_regnum_p = i386_zmm_regnum_p (gdbarch, regnum);
4639
4640 avx512_p = ((tdep->xcr0 & X86_XSTATE_AVX_AVX512_MASK)
4641 == X86_XSTATE_AVX_AVX512_MASK);
4642 avx_p = ((tdep->xcr0 & X86_XSTATE_AVX_AVX512_MASK)
4643 == X86_XSTATE_AVX_MASK) && !avx512_p;
4644 sse_p = ((tdep->xcr0 & X86_XSTATE_AVX_AVX512_MASK)
4645 == X86_XSTATE_SSE_MASK) && !avx512_p && ! avx_p;
4646
4647 if (group == vector_reggroup)
4648 return (mmx_regnum_p
4649 || (zmm_regnum_p && avx512_p)
4650 || ((ymm_regnum_p || ymm_avx512_regnum_p) && avx_p)
4651 || ((xmm_regnum_p || xmm_avx512_regnum_p) && sse_p)
4652 || mxcsr_regnum_p);
4653
4654 fp_regnum_p = (i386_fp_regnum_p (gdbarch, regnum)
4656 if (group == float_reggroup)
4657 return fp_regnum_p;
4658
4659 /* For "info reg all", don't include upper YMM registers nor XMM
4660 registers when AVX is supported. */
4661 ymmh_regnum_p = i386_ymmh_regnum_p (gdbarch, regnum);
4662 ymmh_avx512_regnum_p = i386_ymmh_avx512_regnum_p (gdbarch, regnum);
4663 zmmh_regnum_p = i386_zmmh_regnum_p (gdbarch, regnum);
4664 if (group == all_reggroup
4665 && (((xmm_regnum_p || xmm_avx512_regnum_p) && !sse_p)
4666 || ((ymm_regnum_p || ymm_avx512_regnum_p) && !avx_p)
4667 || ymmh_regnum_p
4668 || ymmh_avx512_regnum_p
4669 || zmmh_regnum_p))
4670 return 0;
4671
4672 bnd_regnum_p = i386_bnd_regnum_p (gdbarch, regnum);
4673 if (group == all_reggroup
4674 && ((bnd_regnum_p && (tdep->xcr0 & X86_XSTATE_MPX_MASK))))
4675 return bnd_regnum_p;
4676
4677 bndr_regnum_p = i386_bndr_regnum_p (gdbarch, regnum);
4678 if (group == all_reggroup
4679 && ((bndr_regnum_p && (tdep->xcr0 & X86_XSTATE_MPX_MASK))))
4680 return 0;
4681
4682 mpx_ctrl_regnum_p = i386_mpx_ctrl_regnum_p (gdbarch, regnum);
4683 if (group == all_reggroup
4684 && ((mpx_ctrl_regnum_p && (tdep->xcr0 & X86_XSTATE_MPX_MASK))))
4685 return mpx_ctrl_regnum_p;
4686
4687 if (group == general_reggroup)
4688 return (!fp_regnum_p
4689 && !mmx_regnum_p
4690 && !mxcsr_regnum_p
4691 && !xmm_regnum_p
4692 && !xmm_avx512_regnum_p
4693 && !ymm_regnum_p
4694 && !ymmh_regnum_p
4695 && !ymm_avx512_regnum_p
4696 && !ymmh_avx512_regnum_p
4697 && !bndr_regnum_p
4698 && !bnd_regnum_p
4699 && !mpx_ctrl_regnum_p
4700 && !zmm_regnum_p
4701 && !zmmh_regnum_p
4702 && !pkru_regnum_p);
4703
4705}
4706
4707
4708/* Get the ARGIth function argument for the current function. */
4709
4710static CORE_ADDR
4712 struct type *type)
4713{
4714 struct gdbarch *gdbarch = get_frame_arch (frame);
4715 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
4716 CORE_ADDR sp = get_frame_register_unsigned (frame, I386_ESP_REGNUM);
4717 return read_memory_unsigned_integer (sp + (4 * (argi + 1)), 4, byte_order);
4718}
4719
4720#define PREFIX_REPZ 0x01
4721#define PREFIX_REPNZ 0x02
4722#define PREFIX_LOCK 0x04
4723#define PREFIX_DATA 0x08
4724#define PREFIX_ADDR 0x10
4725
4726/* operand size */
4727enum
4728{
4734};
4735
4736/* i386 arith/logic operations */
4737enum
4738{
4747};
4748
4750{
4753 CORE_ADDR orig_addr;
4754 CORE_ADDR addr;
4757 int override;
4758 uint8_t modrm;
4759 uint8_t mod, reg, rm;
4760 int ot;
4761 uint8_t rex_x;
4762 uint8_t rex_b;
4765 const int *regmap;
4766};
4767
4768/* Parse the "modrm" part of the memory address irp->addr points at.
4769 Returns -1 if something goes wrong, 0 otherwise. */
4770
4771static int
4773{
4774 struct gdbarch *gdbarch = irp->gdbarch;
4775
4776 if (record_read_memory (gdbarch, irp->addr, &irp->modrm, 1))
4777 return -1;
4778
4779 irp->addr++;
4780 irp->mod = (irp->modrm >> 6) & 3;
4781 irp->reg = (irp->modrm >> 3) & 7;
4782 irp->rm = irp->modrm & 7;
4783
4784 return 0;
4785}
4786
4787/* Extract the memory address that the current instruction writes to,
4788 and return it in *ADDR. Return -1 if something goes wrong. */
4789
4790static int
4791i386_record_lea_modrm_addr (struct i386_record_s *irp, uint64_t *addr)
4792{
4793 struct gdbarch *gdbarch = irp->gdbarch;
4794 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
4795 gdb_byte buf[4];
4796 ULONGEST offset64;
4797
4798 *addr = 0;
4799 if (irp->aflag || irp->regmap[X86_RECORD_R8_REGNUM])
4800 {
4801 /* 32/64 bits */
4802 int havesib = 0;
4803 uint8_t scale = 0;
4804 uint8_t byte;
4805 uint8_t index = 0;
4806 uint8_t base = irp->rm;
4807
4808 if (base == 4)
4809 {
4810 havesib = 1;
4811 if (record_read_memory (gdbarch, irp->addr, &byte, 1))
4812 return -1;
4813 irp->addr++;
4814 scale = (byte >> 6) & 3;
4815 index = ((byte >> 3) & 7) | irp->rex_x;
4816 base = (byte & 7);
4817 }
4818 base |= irp->rex_b;
4819
4820 switch (irp->mod)
4821 {
4822 case 0:
4823 if ((base & 7) == 5)
4824 {
4825 base = 0xff;
4826 if (record_read_memory (gdbarch, irp->addr, buf, 4))
4827 return -1;
4828 irp->addr += 4;
4829 *addr = extract_signed_integer (buf, 4, byte_order);
4830 if (irp->regmap[X86_RECORD_R8_REGNUM] && !havesib)
4831 *addr += irp->addr + irp->rip_offset;
4832 }
4833 break;
4834 case 1:
4835 if (record_read_memory (gdbarch, irp->addr, buf, 1))
4836 return -1;
4837 irp->addr++;
4838 *addr = (int8_t) buf[0];
4839 break;
4840 case 2:
4841 if (record_read_memory (gdbarch, irp->addr, buf, 4))
4842 return -1;
4843 *addr = extract_signed_integer (buf, 4, byte_order);
4844 irp->addr += 4;
4845 break;
4846 }
4847
4848 offset64 = 0;
4849 if (base != 0xff)
4850 {
4851 if (base == 4 && irp->popl_esp_hack)
4852 *addr += irp->popl_esp_hack;
4853 regcache_raw_read_unsigned (irp->regcache, irp->regmap[base],
4854 &offset64);
4855 }
4856 if (irp->aflag == 2)
4857 {
4858 *addr += offset64;
4859 }
4860 else
4861 *addr = (uint32_t) (offset64 + *addr);
4862
4863 if (havesib && (index != 4 || scale != 0))
4864 {
4865 regcache_raw_read_unsigned (irp->regcache, irp->regmap[index],
4866 &offset64);
4867 if (irp->aflag == 2)
4868 *addr += offset64 << scale;
4869 else
4870 *addr = (uint32_t) (*addr + (offset64 << scale));
4871 }
4872
4873 if (!irp->aflag)
4874 {
4875 /* Since we are in 64-bit mode with ADDR32 prefix, zero-extend
4876 address from 32-bit to 64-bit. */
4877 *addr = (uint32_t) *addr;
4878 }
4879 }
4880 else
4881 {
4882 /* 16 bits */
4883 switch (irp->mod)
4884 {
4885 case 0:
4886 if (irp->rm == 6)
4887 {
4888 if (record_read_memory (gdbarch, irp->addr, buf, 2))
4889 return -1;
4890 irp->addr += 2;
4891 *addr = extract_signed_integer (buf, 2, byte_order);
4892 irp->rm = 0;
4893 goto no_rm;
4894 }
4895 break;
4896 case 1:
4897 if (record_read_memory (gdbarch, irp->addr, buf, 1))
4898 return -1;
4899 irp->addr++;
4900 *addr = (int8_t) buf[0];
4901 break;
4902 case 2:
4903 if (record_read_memory (gdbarch, irp->addr, buf, 2))
4904 return -1;
4905 irp->addr += 2;
4906 *addr = extract_signed_integer (buf, 2, byte_order);
4907 break;
4908 }
4909
4910 switch (irp->rm)
4911 {
4912 case 0:
4915 &offset64);
4916 *addr = (uint32_t) (*addr + offset64);
4919 &offset64);
4920 *addr = (uint32_t) (*addr + offset64);
4921 break;
4922 case 1:
4925 &offset64);
4926 *addr = (uint32_t) (*addr + offset64);
4929 &offset64);
4930 *addr = (uint32_t) (*addr + offset64);
4931 break;
4932 case 2:
4935 &offset64);
4936 *addr = (uint32_t) (*addr + offset64);
4939 &offset64);
4940 *addr = (uint32_t) (*addr + offset64);
4941 break;
4942 case 3:
4945 &offset64);
4946 *addr = (uint32_t) (*addr + offset64);
4949 &offset64);
4950 *addr = (uint32_t) (*addr + offset64);
4951 break;
4952 case 4:
4955 &offset64);
4956 *addr = (uint32_t) (*addr + offset64);
4957 break;
4958 case 5:
4961 &offset64);
4962 *addr = (uint32_t) (*addr + offset64);
4963 break;
4964 case 6:
4967 &offset64);
4968 *addr = (uint32_t) (*addr + offset64);
4969 break;
4970 case 7:
4973 &offset64);
4974 *addr = (uint32_t) (*addr + offset64);
4975 break;
4976 }
4977 *addr &= 0xffff;
4978 }
4979
4980 no_rm:
4981 return 0;
4982}
4983
4984/* Record the address and contents of the memory that will be changed
4985 by the current instruction. Return -1 if something goes wrong, 0
4986 otherwise. */
4987
4988static int
4990{
4991 struct gdbarch *gdbarch = irp->gdbarch;
4992 uint64_t addr;
4993
4994 if (irp->override >= 0)
4995 {
4997 {
4998 if (yquery (_("\
4999Process record ignores the memory change of instruction at address %s\n\
5000because it can't get the value of the segment register.\n\
5001Do you want to stop the program?"),
5002 paddress (gdbarch, irp->orig_addr)))
5003 return -1;
5004 }
5005
5006 return 0;
5007 }
5008
5009 if (i386_record_lea_modrm_addr (irp, &addr))
5010 return -1;
5011
5012 if (record_full_arch_list_add_mem (addr, 1 << irp->ot))
5013 return -1;
5014
5015 return 0;
5016}
5017
5018/* Record the effects of a push operation. Return -1 if something
5019 goes wrong, 0 otherwise. */
5020
5021static int
5023{
5024 ULONGEST addr;
5025
5028 return -1;
5031 &addr);
5032 if (record_full_arch_list_add_mem ((CORE_ADDR) addr - size, size))
5033 return -1;
5034
5035 return 0;
5036}
5037
5038
5039/* Defines contents to record. */
5040#define I386_SAVE_FPU_REGS 0xfffd
5041#define I386_SAVE_FPU_ENV 0xfffe
5042#define I386_SAVE_FPU_ENV_REG_STACK 0xffff
5043
5044/* Record the values of the floating point registers which will be
5045 changed by the current instruction. Returns -1 if something is
5046 wrong, 0 otherwise. */
5047
5049 struct i386_record_s *ir,
5050 uint32_t iregnum)
5051{
5052 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
5053 int i;
5054
5055 /* Oza: Because of floating point insn push/pop of fpu stack is going to
5056 happen. Currently we store st0-st7 registers, but we need not store all
5057 registers all the time, in future we use ftag register and record only
5058 those who are not marked as an empty. */
5059
5060 if (I386_SAVE_FPU_REGS == iregnum)
5061 {
5062 for (i = I387_ST0_REGNUM (tdep); i <= I387_ST0_REGNUM (tdep) + 7; i++)
5063 {
5065 return -1;
5066 }
5067 }
5068 else if (I386_SAVE_FPU_ENV == iregnum)
5069 {
5070 for (i = I387_FCTRL_REGNUM (tdep); i <= I387_FOP_REGNUM (tdep); i++)
5071 {
5073 return -1;
5074 }
5075 }
5076 else if (I386_SAVE_FPU_ENV_REG_STACK == iregnum)
5077 {
5078 for (i = I387_ST0_REGNUM (tdep); i <= I387_FOP_REGNUM (tdep); i++)
5080 return -1;
5081 }
5082 else if ((iregnum >= I387_ST0_REGNUM (tdep)) &&
5083 (iregnum <= I387_FOP_REGNUM (tdep)))
5084 {
5085 if (record_full_arch_list_add_reg (ir->regcache,iregnum))
5086 return -1;
5087 }
5088 else
5089 {
5090 /* Parameter error. */
5091 return -1;
5092 }
5093 if(I386_SAVE_FPU_ENV != iregnum)
5094 {
5095 for (i = I387_FCTRL_REGNUM (tdep); i <= I387_FOP_REGNUM (tdep); i++)
5096 {
5098 return -1;
5099 }
5100 }
5101 return 0;
5102}
5103
5104/* Parse the current instruction, and record the values of the
5105 registers and memory that will be changed by the current
5106 instruction. Returns -1 if something goes wrong, 0 otherwise. */
5107
5108#define I386_RECORD_FULL_ARCH_LIST_ADD_REG(regnum) \
5109 record_full_arch_list_add_reg (ir.regcache, ir.regmap[(regnum)])
5110
5111int
5113 CORE_ADDR input_addr)
5114{
5115 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
5116 int prefixes = 0;
5117 int regnum = 0;
5118 uint32_t opcode;
5119 uint8_t opcode8;
5120 ULONGEST addr;
5121 gdb_byte buf[I386_MAX_REGISTER_SIZE];
5122 struct i386_record_s ir;
5123 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
5124 uint8_t rex_w = -1;
5125 uint8_t rex_r = 0;
5126
5127 memset (&ir, 0, sizeof (struct i386_record_s));
5128 ir.regcache = regcache;
5129 ir.addr = input_addr;
5130 ir.orig_addr = input_addr;
5131 ir.aflag = 1;
5132 ir.dflag = 1;
5133 ir.override = -1;
5134 ir.popl_esp_hack = 0;
5135 ir.regmap = tdep->record_regmap;
5136 ir.gdbarch = gdbarch;
5137
5138 if (record_debug > 1)
5139 gdb_printf (gdb_stdlog, "Process record: i386_process_record "
5140 "addr = %s\n",
5141 paddress (gdbarch, ir.addr));
5142
5143 /* prefixes */
5144 while (1)
5145 {
5146 if (record_read_memory (gdbarch, ir.addr, &opcode8, 1))
5147 return -1;
5148 ir.addr++;
5149 switch (opcode8) /* Instruction prefixes */
5150 {
5151 case REPE_PREFIX_OPCODE:
5152 prefixes |= PREFIX_REPZ;
5153 break;
5154 case REPNE_PREFIX_OPCODE:
5155 prefixes |= PREFIX_REPNZ;
5156 break;
5157 case LOCK_PREFIX_OPCODE:
5158 prefixes |= PREFIX_LOCK;
5159 break;
5160 case CS_PREFIX_OPCODE:
5162 break;
5163 case SS_PREFIX_OPCODE:
5165 break;
5166 case DS_PREFIX_OPCODE:
5168 break;
5169 case ES_PREFIX_OPCODE:
5171 break;
5172 case FS_PREFIX_OPCODE:
5174 break;
5175 case GS_PREFIX_OPCODE:
5177 break;
5178 case DATA_PREFIX_OPCODE:
5179 prefixes |= PREFIX_DATA;
5180 break;
5181 case ADDR_PREFIX_OPCODE:
5182 prefixes |= PREFIX_ADDR;
5183 break;
5184 case 0x40: /* i386 inc %eax */
5185 case 0x41: /* i386 inc %ecx */
5186 case 0x42: /* i386 inc %edx */
5187 case 0x43: /* i386 inc %ebx */
5188 case 0x44: /* i386 inc %esp */
5189 case 0x45: /* i386 inc %ebp */
5190 case 0x46: /* i386 inc %esi */
5191 case 0x47: /* i386 inc %edi */
5192 case 0x48: /* i386 dec %eax */
5193 case 0x49: /* i386 dec %ecx */
5194 case 0x4a: /* i386 dec %edx */
5195 case 0x4b: /* i386 dec %ebx */
5196 case 0x4c: /* i386 dec %esp */
5197 case 0x4d: /* i386 dec %ebp */
5198 case 0x4e: /* i386 dec %esi */
5199 case 0x4f: /* i386 dec %edi */
5200 if (ir.regmap[X86_RECORD_R8_REGNUM]) /* 64 bit target */
5201 {
5202 /* REX */
5203 rex_w = (opcode8 >> 3) & 1;
5204 rex_r = (opcode8 & 0x4) << 1;
5205 ir.rex_x = (opcode8 & 0x2) << 2;
5206 ir.rex_b = (opcode8 & 0x1) << 3;
5207 }
5208 else /* 32 bit target */
5209 goto out_prefixes;
5210 break;
5211 default:
5212 goto out_prefixes;
5213 break;
5214 }
5215 }
5216 out_prefixes:
5217 if (ir.regmap[X86_RECORD_R8_REGNUM] && rex_w == 1)
5218 {
5219 ir.dflag = 2;
5220 }
5221 else
5222 {
5223 if (prefixes & PREFIX_DATA)
5224 ir.dflag ^= 1;
5225 }
5226 if (prefixes & PREFIX_ADDR)
5227 ir.aflag ^= 1;
5228 else if (ir.regmap[X86_RECORD_R8_REGNUM])
5229 ir.aflag = 2;
5230
5231 /* Now check op code. */
5232 opcode = (uint32_t) opcode8;
5233 reswitch:
5234 switch (opcode)
5235 {
5236 case 0x0f:
5237 if (record_read_memory (gdbarch, ir.addr, &opcode8, 1))
5238 return -1;
5239 ir.addr++;
5240 opcode = (uint32_t) opcode8 | 0x0f00;
5241 goto reswitch;
5242 break;
5243
5244 case 0x00: /* arith & logic */
5245 case 0x01:
5246 case 0x02:
5247 case 0x03:
5248 case 0x04:
5249 case 0x05:
5250 case 0x08:
5251 case 0x09:
5252 case 0x0a:
5253 case 0x0b:
5254 case 0x0c:
5255 case 0x0d:
5256 case 0x10:
5257 case 0x11:
5258 case 0x12:
5259 case 0x13:
5260 case 0x14:
5261 case 0x15:
5262 case 0x18:
5263 case 0x19:
5264 case 0x1a:
5265 case 0x1b:
5266 case 0x1c:
5267 case 0x1d:
5268 case 0x20:
5269 case 0x21:
5270 case 0x22:
5271 case 0x23:
5272 case 0x24:
5273 case 0x25:
5274 case 0x28:
5275 case 0x29:
5276 case 0x2a:
5277 case 0x2b:
5278 case 0x2c:
5279 case 0x2d:
5280 case 0x30:
5281 case 0x31:
5282 case 0x32:
5283 case 0x33:
5284 case 0x34:
5285 case 0x35:
5286 case 0x38:
5287 case 0x39:
5288 case 0x3a:
5289 case 0x3b:
5290 case 0x3c:
5291 case 0x3d:
5292 if (((opcode >> 3) & 7) != OP_CMPL)
5293 {
5294 if ((opcode & 1) == 0)
5295 ir.ot = OT_BYTE;
5296 else
5297 ir.ot = ir.dflag + OT_WORD;
5298
5299 switch ((opcode >> 1) & 3)
5300 {
5301 case 0: /* OP Ev, Gv */
5302 if (i386_record_modrm (&ir))
5303 return -1;
5304 if (ir.mod != 3)
5305 {
5306 if (i386_record_lea_modrm (&ir))
5307 return -1;
5308 }
5309 else
5310 {
5311 ir.rm |= ir.rex_b;
5312 if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
5313 ir.rm &= 0x3;
5315 }
5316 break;
5317 case 1: /* OP Gv, Ev */
5318 if (i386_record_modrm (&ir))
5319 return -1;
5320 ir.reg |= rex_r;
5321 if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
5322 ir.reg &= 0x3;
5324 break;
5325 case 2: /* OP A, Iv */
5327 break;
5328 }
5329 }
5331 break;
5332
5333 case 0x80: /* GRP1 */
5334 case 0x81:
5335 case 0x82:
5336 case 0x83:
5337 if (i386_record_modrm (&ir))
5338 return -1;
5339
5340 if (ir.reg != OP_CMPL)
5341 {
5342 if ((opcode & 1) == 0)
5343 ir.ot = OT_BYTE;
5344 else
5345 ir.ot = ir.dflag + OT_WORD;
5346
5347 if (ir.mod != 3)
5348 {
5349 if (opcode == 0x83)
5350 ir.rip_offset = 1;
5351 else
5352 ir.rip_offset = (ir.ot > OT_LONG) ? 4 : (1 << ir.ot);
5353 if (i386_record_lea_modrm (&ir))
5354 return -1;
5355 }
5356 else
5358 }
5360 break;
5361
5362 case 0x40: /* inc */
5363 case 0x41:
5364 case 0x42:
5365 case 0x43:
5366 case 0x44:
5367 case 0x45:
5368 case 0x46:
5369 case 0x47:
5370
5371 case 0x48: /* dec */
5372 case 0x49:
5373 case 0x4a:
5374 case 0x4b:
5375 case 0x4c:
5376 case 0x4d:
5377 case 0x4e:
5378 case 0x4f:
5379
5382 break;
5383
5384 case 0xf6: /* GRP3 */
5385 case 0xf7:
5386 if ((opcode & 1) == 0)
5387 ir.ot = OT_BYTE;
5388 else
5389 ir.ot = ir.dflag + OT_WORD;
5390 if (i386_record_modrm (&ir))
5391 return -1;
5392
5393 if (ir.mod != 3 && ir.reg == 0)
5394 ir.rip_offset = (ir.ot > OT_LONG) ? 4 : (1 << ir.ot);
5395
5396 switch (ir.reg)
5397 {
5398 case 0: /* test */
5400 break;
5401 case 2: /* not */
5402 case 3: /* neg */
5403 if (ir.mod != 3)
5404 {
5405 if (i386_record_lea_modrm (&ir))
5406 return -1;
5407 }
5408 else
5409 {
5410 ir.rm |= ir.rex_b;
5411 if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
5412 ir.rm &= 0x3;
5414 }
5415 if (ir.reg == 3) /* neg */
5417 break;
5418 case 4: /* mul */
5419 case 5: /* imul */
5420 case 6: /* div */
5421 case 7: /* idiv */
5423 if (ir.ot != OT_BYTE)
5426 break;
5427 default:
5428 ir.addr -= 2;
5429 opcode = opcode << 8 | ir.modrm;
5430 goto no_support;
5431 break;
5432 }
5433 break;
5434
5435 case 0xfe: /* GRP4 */
5436 case 0xff: /* GRP5 */
5437 if (i386_record_modrm (&ir))
5438 return -1;
5439 if (ir.reg >= 2 && opcode == 0xfe)
5440 {
5441 ir.addr -= 2;
5442 opcode = opcode << 8 | ir.modrm;
5443 goto no_support;
5444 }
5445 switch (ir.reg)
5446 {
5447 case 0: /* inc */
5448 case 1: /* dec */
5449 if ((opcode & 1) == 0)
5450 ir.ot = OT_BYTE;
5451 else
5452 ir.ot = ir.dflag + OT_WORD;
5453 if (ir.mod != 3)
5454 {
5455 if (i386_record_lea_modrm (&ir))
5456 return -1;
5457 }
5458 else
5459 {
5460 ir.rm |= ir.rex_b;
5461 if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
5462 ir.rm &= 0x3;
5464 }
5466 break;
5467 case 2: /* call */
5468 if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag)
5469 ir.dflag = 2;
5470 if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
5471 return -1;
5473 break;
5474 case 3: /* lcall */
5476 if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
5477 return -1;
5479 break;
5480 case 4: /* jmp */
5481 case 5: /* ljmp */
5483 break;
5484 case 6: /* push */
5485 if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag)
5486 ir.dflag = 2;
5487 if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
5488 return -1;
5489 break;
5490 default:
5491 ir.addr -= 2;
5492 opcode = opcode << 8 | ir.modrm;
5493 goto no_support;
5494 break;
5495 }
5496 break;
5497
5498 case 0x84: /* test */
5499 case 0x85:
5500 case 0xa8:
5501 case 0xa9:
5503 break;
5504
5505 case 0x98: /* CWDE/CBW */
5507 break;
5508
5509 case 0x99: /* CDQ/CWD */
5512 break;
5513
5514 case 0x0faf: /* imul */
5515 case 0x69:
5516 case 0x6b:
5517 ir.ot = ir.dflag + OT_WORD;
5518 if (i386_record_modrm (&ir))
5519 return -1;
5520 if (opcode == 0x69)
5521 ir.rip_offset = (ir.ot > OT_LONG) ? 4 : (1 << ir.ot);
5522 else if (opcode == 0x6b)
5523 ir.rip_offset = 1;
5524 ir.reg |= rex_r;
5525 if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
5526 ir.reg &= 0x3;
5529 break;
5530
5531 case 0x0fc0: /* xadd */
5532 case 0x0fc1:
5533 if ((opcode & 1) == 0)
5534 ir.ot = OT_BYTE;
5535 else
5536 ir.ot = ir.dflag + OT_WORD;
5537 if (i386_record_modrm (&ir))
5538 return -1;
5539 ir.reg |= rex_r;
5540 if (ir.mod == 3)
5541 {
5542 if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
5543 ir.reg &= 0x3;
5545 if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
5546 ir.rm &= 0x3;
5548 }
5549 else
5550 {
5551 if (i386_record_lea_modrm (&ir))
5552 return -1;
5553 if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
5554 ir.reg &= 0x3;
5556 }
5558 break;
5559
5560 case 0x0fb0: /* cmpxchg */
5561 case 0x0fb1:
5562 if ((opcode & 1) == 0)
5563 ir.ot = OT_BYTE;
5564 else
5565 ir.ot = ir.dflag + OT_WORD;
5566 if (i386_record_modrm (&ir))
5567 return -1;
5568 if (ir.mod == 3)
5569 {
5570 ir.reg |= rex_r;
5572 if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
5573 ir.reg &= 0x3;
5575 }
5576 else
5577 {
5579 if (i386_record_lea_modrm (&ir))
5580 return -1;
5581 }
5583 break;
5584
5585 case 0x0fc7: /* cmpxchg8b / rdrand / rdseed */
5586 if (i386_record_modrm (&ir))
5587 return -1;
5588 if (ir.mod == 3)
5589 {
5590 /* rdrand and rdseed use the 3 bits of the REG field of ModR/M as
5591 an extended opcode. rdrand has bits 110 (/6) and rdseed
5592 has bits 111 (/7). */
5593 if (ir.reg == 6 || ir.reg == 7)
5594 {
5595 /* The storage register is described by the 3 R/M bits, but the
5596 REX.B prefix may be used to give access to registers
5597 R8~R15. In this case ir.rex_b + R/M will give us the register
5598 in the range R8~R15.
5599
5600 REX.W may also be used to access 64-bit registers, but we
5601 already record entire registers and not just partial bits
5602 of them. */
5604 /* These instructions also set conditional bits. */
5606 break;
5607 }
5608 else
5609 {
5610 /* We don't handle this particular instruction yet. */
5611 ir.addr -= 2;
5612 opcode = opcode << 8 | ir.modrm;
5613 goto no_support;
5614 }
5615 }
5618 if (i386_record_lea_modrm (&ir))
5619 return -1;
5621 break;
5622
5623 case 0x50: /* push */
5624 case 0x51:
5625 case 0x52:
5626 case 0x53:
5627 case 0x54:
5628 case 0x55:
5629 case 0x56:
5630 case 0x57:
5631 case 0x68:
5632 case 0x6a:
5633 if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag)
5634 ir.dflag = 2;
5635 if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
5636 return -1;
5637 break;
5638
5639 case 0x06: /* push es */
5640 case 0x0e: /* push cs */
5641 case 0x16: /* push ss */
5642 case 0x1e: /* push ds */
5644 {
5645 ir.addr -= 1;
5646 goto no_support;
5647 }
5648 if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
5649 return -1;
5650 break;
5651
5652 case 0x0fa0: /* push fs */
5653 case 0x0fa8: /* push gs */
5655 {
5656 ir.addr -= 2;
5657 goto no_support;
5658 }
5659 if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
5660 return -1;
5661 break;
5662
5663 case 0x60: /* pusha */
5665 {
5666 ir.addr -= 1;
5667 goto no_support;
5668 }
5669 if (i386_record_push (&ir, 1 << (ir.dflag + 4)))
5670 return -1;
5671 break;
5672
5673 case 0x58: /* pop */
5674 case 0x59:
5675 case 0x5a:
5676 case 0x5b:
5677 case 0x5c:
5678 case 0x5d:
5679 case 0x5e:
5680 case 0x5f:
5682 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode & 0x7) | ir.rex_b);
5683 break;
5684
5685 case 0x61: /* popa */
5687 {
5688 ir.addr -= 1;
5689 goto no_support;
5690 }
5693 regnum++)
5695 break;
5696
5697 case 0x8f: /* pop */
5699 ir.ot = ir.dflag ? OT_QUAD : OT_WORD;
5700 else
5701 ir.ot = ir.dflag + OT_WORD;
5702 if (i386_record_modrm (&ir))
5703 return -1;
5704 if (ir.mod == 3)
5706 else
5707 {
5708 ir.popl_esp_hack = 1 << ir.ot;
5709 if (i386_record_lea_modrm (&ir))
5710 return -1;
5711 }
5713 break;
5714
5715 case 0xc8: /* enter */
5717 if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag)
5718 ir.dflag = 2;
5719 if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
5720 return -1;
5721 break;
5722
5723 case 0xc9: /* leave */
5726 break;
5727
5728 case 0x07: /* pop es */
5730 {
5731 ir.addr -= 1;
5732 goto no_support;
5733 }
5737 break;
5738
5739 case 0x17: /* pop ss */
5741 {
5742 ir.addr -= 1;
5743 goto no_support;
5744 }
5748 break;
5749
5750 case 0x1f: /* pop ds */
5752 {
5753 ir.addr -= 1;
5754 goto no_support;
5755 }
5759 break;
5760
5761 case 0x0fa1: /* pop fs */
5765 break;
5766
5767 case 0x0fa9: /* pop gs */
5771 break;
5772
5773 case 0x88: /* mov */
5774 case 0x89:
5775 case 0xc6:
5776 case 0xc7:
5777 if ((opcode & 1) == 0)
5778 ir.ot = OT_BYTE;
5779 else
5780 ir.ot = ir.dflag + OT_WORD;
5781
5782 if (i386_record_modrm (&ir))
5783 return -1;
5784
5785 if (ir.mod != 3)
5786 {
5787 if (opcode == 0xc6 || opcode == 0xc7)
5788 ir.rip_offset = (ir.ot > OT_LONG) ? 4 : (1 << ir.ot);
5789 if (i386_record_lea_modrm (&ir))
5790 return -1;
5791 }
5792 else
5793 {
5794 if (opcode == 0xc6 || opcode == 0xc7)
5795 ir.rm |= ir.rex_b;
5796 if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
5797 ir.rm &= 0x3;
5799 }
5800 break;
5801
5802 case 0x8a: /* mov */
5803 case 0x8b:
5804 if ((opcode & 1) == 0)
5805 ir.ot = OT_BYTE;
5806 else
5807 ir.ot = ir.dflag + OT_WORD;
5808 if (i386_record_modrm (&ir))
5809 return -1;
5810 ir.reg |= rex_r;
5811 if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
5812 ir.reg &= 0x3;
5814 break;
5815
5816 case 0x8c: /* mov seg */
5817 if (i386_record_modrm (&ir))
5818 return -1;
5819 if (ir.reg > 5)
5820 {
5821 ir.addr -= 2;
5822 opcode = opcode << 8 | ir.modrm;
5823 goto no_support;
5824 }
5825
5826 if (ir.mod == 3)
5828 else
5829 {
5830 ir.ot = OT_WORD;
5831 if (i386_record_lea_modrm (&ir))
5832 return -1;
5833 }
5834 break;
5835
5836 case 0x8e: /* mov seg */
5837 if (i386_record_modrm (&ir))
5838 return -1;
5839 switch (ir.reg)
5840 {
5841 case 0:
5843 break;
5844 case 2:
5846 break;
5847 case 3:
5849 break;
5850 case 4:
5852 break;
5853 case 5:
5855 break;
5856 default:
5857 ir.addr -= 2;
5858 opcode = opcode << 8 | ir.modrm;
5859 goto no_support;
5860 break;
5861 }
5864 break;
5865
5866 case 0x0fb6: /* movzbS */
5867 case 0x0fb7: /* movzwS */
5868 case 0x0fbe: /* movsbS */
5869 case 0x0fbf: /* movswS */
5870 if (i386_record_modrm (&ir))
5871 return -1;
5873 break;
5874
5875 case 0x8d: /* lea */
5876 if (i386_record_modrm (&ir))
5877 return -1;
5878 if (ir.mod == 3)
5879 {
5880 ir.addr -= 2;
5881 opcode = opcode << 8 | ir.modrm;
5882 goto no_support;
5883 }
5884 ir.ot = ir.dflag;
5885 ir.reg |= rex_r;
5886 if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
5887 ir.reg &= 0x3;
5889 break;
5890
5891 case 0xa0: /* mov EAX */
5892 case 0xa1:
5893
5894 case 0xd7: /* xlat */
5896 break;
5897
5898 case 0xa2: /* mov EAX */
5899 case 0xa3:
5900 if (ir.override >= 0)
5901 {
5903 {
5904 if (yquery (_("\
5905Process record ignores the memory change of instruction at address %s\n\
5906because it can't get the value of the segment register.\n\
5907Do you want to stop the program?"),
5908 paddress (gdbarch, ir.orig_addr)))
5909 return -1;
5910 }
5911 }
5912 else
5913 {
5914 if ((opcode & 1) == 0)
5915 ir.ot = OT_BYTE;
5916 else
5917 ir.ot = ir.dflag + OT_WORD;
5918 if (ir.aflag == 2)
5919 {
5920 if (record_read_memory (gdbarch, ir.addr, buf, 8))
5921 return -1;
5922 ir.addr += 8;
5923 addr = extract_unsigned_integer (buf, 8, byte_order);
5924 }
5925 else if (ir.aflag)
5926 {
5927 if (record_read_memory (gdbarch, ir.addr, buf, 4))
5928 return -1;
5929 ir.addr += 4;
5930 addr = extract_unsigned_integer (buf, 4, byte_order);
5931 }
5932 else
5933 {
5934 if (record_read_memory (gdbarch, ir.addr, buf, 2))
5935 return -1;
5936 ir.addr += 2;
5937 addr = extract_unsigned_integer (buf, 2, byte_order);
5938 }
5939 if (record_full_arch_list_add_mem (addr, 1 << ir.ot))
5940 return -1;
5941 }
5942 break;
5943
5944 case 0xb0: /* mov R, Ib */
5945 case 0xb1:
5946 case 0xb2:
5947 case 0xb3:
5948 case 0xb4:
5949 case 0xb5:
5950 case 0xb6:
5951 case 0xb7:
5953 ? ((opcode & 0x7) | ir.rex_b)
5954 : ((opcode & 0x7) & 0x3));
5955 break;
5956
5957 case 0xb8: /* mov R, Iv */
5958 case 0xb9:
5959 case 0xba:
5960 case 0xbb:
5961 case 0xbc:
5962 case 0xbd:
5963 case 0xbe:
5964 case 0xbf:
5965 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode & 0x7) | ir.rex_b);
5966 break;
5967
5968 case 0x91: /* xchg R, EAX */
5969 case 0x92:
5970 case 0x93:
5971 case 0x94:
5972 case 0x95:
5973 case 0x96:
5974 case 0x97:
5977 break;
5978
5979 case 0x86: /* xchg Ev, Gv */
5980 case 0x87:
5981 if ((opcode & 1) == 0)
5982 ir.ot = OT_BYTE;
5983 else
5984 ir.ot = ir.dflag + OT_WORD;
5985 if (i386_record_modrm (&ir))
5986 return -1;
5987 if (ir.mod == 3)
5988 {
5989 ir.rm |= ir.rex_b;
5990 if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
5991 ir.rm &= 0x3;
5993 }
5994 else
5995 {
5996 if (i386_record_lea_modrm (&ir))
5997 return -1;
5998 }
5999 ir.reg |= rex_r;
6000 if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
6001 ir.reg &= 0x3;
6003 break;
6004
6005 case 0xc4: /* les Gv */
6006 case 0xc5: /* lds Gv */
6008 {
6009 ir.addr -= 1;
6010 goto no_support;
6011 }
6012 /* FALLTHROUGH */
6013 case 0x0fb2: /* lss Gv */
6014 case 0x0fb4: /* lfs Gv */
6015 case 0x0fb5: /* lgs Gv */
6016 if (i386_record_modrm (&ir))
6017 return -1;
6018 if (ir.mod == 3)
6019 {
6020 if (opcode > 0xff)
6021 ir.addr -= 3;
6022 else
6023 ir.addr -= 2;
6024 opcode = opcode << 8 | ir.modrm;
6025 goto no_support;
6026 }
6027 switch (opcode)
6028 {
6029 case 0xc4: /* les Gv */
6031 break;
6032 case 0xc5: /* lds Gv */
6034 break;
6035 case 0x0fb2: /* lss Gv */
6037 break;
6038 case 0x0fb4: /* lfs Gv */
6040 break;
6041 case 0x0fb5: /* lgs Gv */
6043 break;
6044 }
6048 break;
6049
6050 case 0xc0: /* shifts */
6051 case 0xc1:
6052 case 0xd0:
6053 case 0xd1:
6054 case 0xd2:
6055 case 0xd3:
6056 if ((opcode & 1) == 0)
6057 ir.ot = OT_BYTE;
6058 else
6059 ir.ot = ir.dflag + OT_WORD;
6060 if (i386_record_modrm (&ir))
6061 return -1;
6062 if (ir.mod != 3 && (opcode == 0xd2 || opcode == 0xd3))
6063 {
6064 if (i386_record_lea_modrm (&ir))
6065 return -1;
6066 }
6067 else
6068 {
6069 ir.rm |= ir.rex_b;
6070 if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
6071 ir.rm &= 0x3;
6073 }
6075 break;
6076
6077 case 0x0fa4:
6078 case 0x0fa5:
6079 case 0x0fac:
6080 case 0x0fad:
6081 if (i386_record_modrm (&ir))
6082 return -1;
6083 if (ir.mod == 3)
6084 {
6086 return -1;
6087 }
6088 else
6089 {
6090 if (i386_record_lea_modrm (&ir))
6091 return -1;
6092 }
6093 break;
6094
6095 case 0xd8: /* Floats. */
6096 case 0xd9:
6097 case 0xda:
6098 case 0xdb:
6099 case 0xdc:
6100 case 0xdd:
6101 case 0xde:
6102 case 0xdf:
6103 if (i386_record_modrm (&ir))
6104 return -1;
6105 ir.reg |= ((opcode & 7) << 3);
6106 if (ir.mod != 3)
6107 {
6108 /* Memory. */
6109 uint64_t addr64;
6110
6111 if (i386_record_lea_modrm_addr (&ir, &addr64))
6112 return -1;
6113 switch (ir.reg)
6114 {
6115 case 0x02:
6116 case 0x12:
6117 case 0x22:
6118 case 0x32:
6119 /* For fcom, ficom nothing to do. */
6120 break;
6121 case 0x03:
6122 case 0x13:
6123 case 0x23:
6124 case 0x33:
6125 /* For fcomp, ficomp pop FPU stack, store all. */
6127 return -1;
6128 break;
6129 case 0x00:
6130 case 0x01:
6131 case 0x04:
6132 case 0x05:
6133 case 0x06:
6134 case 0x07:
6135 case 0x10:
6136 case 0x11:
6137 case 0x14:
6138 case 0x15:
6139 case 0x16:
6140 case 0x17:
6141 case 0x20:
6142 case 0x21:
6143 case 0x24:
6144 case 0x25:
6145 case 0x26:
6146 case 0x27:
6147 case 0x30:
6148 case 0x31:
6149 case 0x34:
6150 case 0x35:
6151 case 0x36:
6152 case 0x37:
6153 /* For fadd, fmul, fsub, fsubr, fdiv, fdivr, fiadd, fimul,
6154 fisub, fisubr, fidiv, fidivr, modR/M.reg is an extension
6155 of code, always affects st(0) register. */
6156 if (i386_record_floats (gdbarch, &ir, I387_ST0_REGNUM (tdep)))
6157 return -1;
6158 break;
6159 case 0x08:
6160 case 0x0a:
6161 case 0x0b:
6162 case 0x18:
6163 case 0x19:
6164 case 0x1a:
6165 case 0x1b:
6166 case 0x1d:
6167 case 0x28:
6168 case 0x29:
6169 case 0x2a:
6170 case 0x2b:
6171 case 0x38:
6172 case 0x39:
6173 case 0x3a:
6174 case 0x3b:
6175 case 0x3c:
6176 case 0x3d:
6177 switch (ir.reg & 7)
6178 {
6179 case 0:
6180 /* Handling fld, fild. */
6182 return -1;
6183 break;
6184 case 1:
6185 switch (ir.reg >> 4)
6186 {
6187 case 0:
6188 if (record_full_arch_list_add_mem (addr64, 4))
6189 return -1;
6190 break;
6191 case 2:
6192 if (record_full_arch_list_add_mem (addr64, 8))
6193 return -1;
6194 break;
6195 case 3:
6196 break;
6197 default:
6198 if (record_full_arch_list_add_mem (addr64, 2))
6199 return -1;
6200 break;
6201 }
6202 break;
6203 default:
6204 switch (ir.reg >> 4)
6205 {
6206 case 0:
6207 if (record_full_arch_list_add_mem (addr64, 4))
6208 return -1;
6209 if (3 == (ir.reg & 7))
6210 {
6211 /* For fstp m32fp. */
6212 if (i386_record_floats (gdbarch, &ir,
6214 return -1;
6215 }
6216 break;
6217 case 1:
6218 if (record_full_arch_list_add_mem (addr64, 4))
6219 return -1;
6220 if ((3 == (ir.reg & 7))
6221 || (5 == (ir.reg & 7))
6222 || (7 == (ir.reg & 7)))
6223 {
6224 /* For fstp insn. */
6225 if (i386_record_floats (gdbarch, &ir,
6227 return -1;
6228 }
6229 break;
6230 case 2:
6231 if (record_full_arch_list_add_mem (addr64, 8))
6232 return -1;
6233 if (3 == (ir.reg & 7))
6234 {
6235 /* For fstp m64fp. */
6236 if (i386_record_floats (gdbarch, &ir,
6238 return -1;
6239 }
6240 break;
6241 case 3:
6242 if ((3 <= (ir.reg & 7)) && (6 <= (ir.reg & 7)))
6243 {
6244 /* For fistp, fbld, fild, fbstp. */
6245 if (i386_record_floats (gdbarch, &ir,
6247 return -1;
6248 }
6249 /* Fall through */
6250 default:
6251 if (record_full_arch_list_add_mem (addr64, 2))
6252 return -1;
6253 break;
6254 }
6255 break;
6256 }
6257 break;
6258 case 0x0c:
6259 /* Insn fldenv. */
6260 if (i386_record_floats (gdbarch, &ir,
6262 return -1;
6263 break;
6264 case 0x0d:
6265 /* Insn fldcw. */
6266 if (i386_record_floats (gdbarch, &ir, I387_FCTRL_REGNUM (tdep)))
6267 return -1;
6268 break;
6269 case 0x2c:
6270 /* Insn frstor. */
6271 if (i386_record_floats (gdbarch, &ir,
6273 return -1;
6274 break;
6275 case 0x0e:
6276 if (ir.dflag)
6277 {
6278 if (record_full_arch_list_add_mem (addr64, 28))
6279 return -1;
6280 }
6281 else
6282 {
6283 if (record_full_arch_list_add_mem (addr64, 14))
6284 return -1;
6285 }
6286 break;
6287 case 0x0f:
6288 case 0x2f:
6289 if (record_full_arch_list_add_mem (addr64, 2))
6290 return -1;
6291 /* Insn fstp, fbstp. */
6293 return -1;
6294 break;
6295 case 0x1f:
6296 case 0x3e:
6297 if (record_full_arch_list_add_mem (addr64, 10))
6298 return -1;
6299 break;
6300 case 0x2e:
6301 if (ir.dflag)
6302 {
6303 if (record_full_arch_list_add_mem (addr64, 28))
6304 return -1;
6305 addr64 += 28;
6306 }
6307 else
6308 {
6309 if (record_full_arch_list_add_mem (addr64, 14))
6310 return -1;
6311 addr64 += 14;
6312 }
6313 if (record_full_arch_list_add_mem (addr64, 80))
6314 return -1;
6315 /* Insn fsave. */
6316 if (i386_record_floats (gdbarch, &ir,
6318 return -1;
6319 break;
6320 case 0x3f:
6321 if (record_full_arch_list_add_mem (addr64, 8))
6322 return -1;
6323 /* Insn fistp. */
6325 return -1;
6326 break;
6327 default:
6328 ir.addr -= 2;
6329 opcode = opcode << 8 | ir.modrm;
6330 goto no_support;
6331 break;
6332 }
6333 }
6334 /* Opcode is an extension of modR/M byte. */
6335 else
6336 {
6337 switch (opcode)
6338 {
6339 case 0xd8:
6340 if (i386_record_floats (gdbarch, &ir, I387_ST0_REGNUM (tdep)))
6341 return -1;
6342 break;
6343 case 0xd9:
6344 if (0x0c == (ir.modrm >> 4))
6345 {
6346 if ((ir.modrm & 0x0f) <= 7)
6347 {
6348 if (i386_record_floats (gdbarch, &ir,
6350 return -1;
6351 }
6352 else
6353 {
6354 if (i386_record_floats (gdbarch, &ir,
6355 I387_ST0_REGNUM (tdep)))
6356 return -1;
6357 /* If only st(0) is changing, then we have already
6358 recorded. */
6359 if ((ir.modrm & 0x0f) - 0x08)
6360 {
6361 if (i386_record_floats (gdbarch, &ir,
6362 I387_ST0_REGNUM (tdep) +
6363 ((ir.modrm & 0x0f) - 0x08)))
6364 return -1;
6365 }
6366 }
6367 }
6368 else
6369 {
6370 switch (ir.modrm)
6371 {
6372 case 0xe0:
6373 case 0xe1:
6374 case 0xf0:
6375 case 0xf5:
6376 case 0xf8:
6377 case 0xfa:
6378 case 0xfc:
6379 case 0xfe:
6380 case 0xff:
6381 if (i386_record_floats (gdbarch, &ir,
6382 I387_ST0_REGNUM (tdep)))
6383 return -1;
6384 break;
6385 case 0xf1:
6386 case 0xf2:
6387 case 0xf3:
6388 case 0xf4:
6389 case 0xf6:
6390 case 0xf7:
6391 case 0xe8:
6392 case 0xe9:
6393 case 0xea:
6394 case 0xeb:
6395 case 0xec:
6396 case 0xed:
6397 case 0xee:
6398 case 0xf9:
6399 case 0xfb:
6400 if (i386_record_floats (gdbarch, &ir,
6402 return -1;
6403 break;
6404 case 0xfd:
6405 if (i386_record_floats (gdbarch, &ir,
6406 I387_ST0_REGNUM (tdep)))
6407 return -1;
6408 if (i386_record_floats (gdbarch, &ir,
6409 I387_ST0_REGNUM (tdep) + 1))
6410 return -1;
6411 break;
6412 }
6413 }
6414 break;
6415 case 0xda:
6416 if (0xe9 == ir.modrm)
6417 {
6419 return -1;
6420 }
6421 else if ((0x0c == ir.modrm >> 4) || (0x0d == ir.modrm >> 4))
6422 {
6423 if (i386_record_floats (gdbarch, &ir,
6424 I387_ST0_REGNUM (tdep)))
6425 return -1;
6426 if (((ir.modrm & 0x0f) > 0) && ((ir.modrm & 0x0f) <= 7))
6427 {
6428 if (i386_record_floats (gdbarch, &ir,
6429 I387_ST0_REGNUM (tdep) +
6430 (ir.modrm & 0x0f)))
6431 return -1;
6432 }
6433 else if ((ir.modrm & 0x0f) - 0x08)
6434 {
6435 if (i386_record_floats (gdbarch, &ir,
6436 I387_ST0_REGNUM (tdep) +
6437 ((ir.modrm & 0x0f) - 0x08)))
6438 return -1;
6439 }
6440 }
6441 break;
6442 case 0xdb:
6443 if (0xe3 == ir.modrm)
6444 {
6446 return -1;
6447 }
6448 else if ((0x0c == ir.modrm >> 4) || (0x0d == ir.modrm >> 4))
6449 {
6450 if (i386_record_floats (gdbarch, &ir,
6451 I387_ST0_REGNUM (tdep)))
6452 return -1;
6453 if (((ir.modrm & 0x0f) > 0) && ((ir.modrm & 0x0f) <= 7))
6454 {
6455 if (i386_record_floats (gdbarch, &ir,
6456 I387_ST0_REGNUM (tdep) +
6457 (ir.modrm & 0x0f)))
6458 return -1;
6459 }
6460 else if ((ir.modrm & 0x0f) - 0x08)
6461 {
6462 if (i386_record_floats (gdbarch, &ir,
6463 I387_ST0_REGNUM (tdep) +
6464 ((ir.modrm & 0x0f) - 0x08)))
6465 return -1;
6466 }
6467 }
6468 break;
6469 case 0xdc:
6470 if ((0x0c == ir.modrm >> 4)
6471 || (0x0d == ir.modrm >> 4)
6472 || (0x0f == ir.modrm >> 4))
6473 {
6474 if ((ir.modrm & 0x0f) <= 7)
6475 {
6476 if (i386_record_floats (gdbarch, &ir,
6477 I387_ST0_REGNUM (tdep) +
6478 (ir.modrm & 0x0f)))
6479 return -1;
6480 }
6481 else
6482 {
6483 if (i386_record_floats (gdbarch, &ir,
6484 I387_ST0_REGNUM (tdep) +
6485 ((ir.modrm & 0x0f) - 0x08)))
6486 return -1;
6487 }
6488 }
6489 break;
6490 case 0xdd:
6491 if (0x0c == ir.modrm >> 4)
6492 {
6493 if (i386_record_floats (gdbarch, &ir,
6494 I387_FTAG_REGNUM (tdep)))
6495 return -1;
6496 }
6497 else if ((0x0d == ir.modrm >> 4) || (0x0e == ir.modrm >> 4))
6498 {
6499 if ((ir.modrm & 0x0f) <= 7)
6500 {
6501 if (i386_record_floats (gdbarch, &ir,
6502 I387_ST0_REGNUM (tdep) +
6503 (ir.modrm & 0x0f)))
6504 return -1;
6505 }
6506 else
6507 {
6508 if (i386_record_floats (gdbarch, &ir,
6510 return -1;
6511 }
6512 }
6513 break;
6514 case 0xde:
6515 if ((0x0c == ir.modrm >> 4)
6516 || (0x0e == ir.modrm >> 4)
6517 || (0x0f == ir.modrm >> 4)
6518 || (0xd9 == ir.modrm))
6519 {
6521 return -1;
6522 }
6523 break;
6524 case 0xdf:
6525 if (0xe0 == ir.modrm)
6526 {
6529 return -1;
6530 }
6531 else if ((0x0f == ir.modrm >> 4) || (0x0e == ir.modrm >> 4))
6532 {
6534 return -1;
6535 }
6536 break;
6537 }
6538 }
6539 break;
6540 /* string ops */
6541 case 0xa4: /* movsS */
6542 case 0xa5:
6543 case 0xaa: /* stosS */
6544 case 0xab:
6545 case 0x6c: /* insS */
6546 case 0x6d:
6549 &addr);
6550 if (addr)
6551 {
6552 ULONGEST es, ds;
6553
6554 if ((opcode & 1) == 0)
6555 ir.ot = OT_BYTE;
6556 else
6557 ir.ot = ir.dflag + OT_WORD;
6560 &addr);
6561
6564 &es);
6567 &ds);
6568 if (ir.aflag && (es != ds))
6569 {
6570 /* addr += ((uint32_t) read_register (I386_ES_REGNUM)) << 4; */
6572 {
6573 if (yquery (_("\
6574Process record ignores the memory change of instruction at address %s\n\
6575because it can't get the value of the segment register.\n\
6576Do you want to stop the program?"),
6577 paddress (gdbarch, ir.orig_addr)))
6578 return -1;
6579 }
6580 }
6581 else
6582 {
6583 if (record_full_arch_list_add_mem (addr, 1 << ir.ot))
6584 return -1;
6585 }
6586
6587 if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ))
6589 if (opcode == 0xa4 || opcode == 0xa5)
6593 }
6594 break;
6595
6596 case 0xa6: /* cmpsS */
6597 case 0xa7:
6600 if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ))
6603 break;
6604
6605 case 0xac: /* lodsS */
6606 case 0xad:
6609 if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ))
6612 break;
6613
6614 case 0xae: /* scasS */
6615 case 0xaf:
6617 if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ))
6620 break;
6621
6622 case 0x6e: /* outsS */
6623 case 0x6f:
6625 if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ))
6628 break;
6629
6630 case 0xe4: /* port I/O */
6631 case 0xe5:
6632 case 0xec:
6633 case 0xed:
6636 break;
6637
6638 case 0xe6:
6639 case 0xe7:
6640 case 0xee:
6641 case 0xef:
6642 break;
6643
6644 /* control */
6645 case 0xc2: /* ret im */
6646 case 0xc3: /* ret */
6649 break;
6650
6651 case 0xca: /* lret im */
6652 case 0xcb: /* lret */
6653 case 0xcf: /* iret */
6657 break;
6658
6659 case 0xe8: /* call im */
6660 if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag)
6661 ir.dflag = 2;
6662 if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
6663 return -1;
6664 break;
6665
6666 case 0x9a: /* lcall im */
6668 {
6669 ir.addr -= 1;
6670 goto no_support;
6671 }
6673 if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
6674 return -1;
6675 break;
6676
6677 case 0xe9: /* jmp im */
6678 case 0xea: /* ljmp im */
6679 case 0xeb: /* jmp Jb */
6680 case 0x70: /* jcc Jb */
6681 case 0x71:
6682 case 0x72:
6683 case 0x73:
6684 case 0x74:
6685 case 0x75:
6686 case 0x76:
6687 case 0x77:
6688 case 0x78:
6689 case 0x79:
6690 case 0x7a:
6691 case 0x7b:
6692 case 0x7c:
6693 case 0x7d:
6694 case 0x7e:
6695 case 0x7f:
6696 case 0x0f80: /* jcc Jv */
6697 case 0x0f81:
6698 case 0x0f82:
6699 case 0x0f83:
6700 case 0x0f84:
6701 case 0x0f85:
6702 case 0x0f86:
6703 case 0x0f87:
6704 case 0x0f88:
6705 case 0x0f89:
6706 case 0x0f8a:
6707 case 0x0f8b:
6708 case 0x0f8c:
6709 case 0x0f8d:
6710 case 0x0f8e:
6711 case 0x0f8f:
6712 break;
6713
6714 case 0x0f90: /* setcc Gv */
6715 case 0x0f91:
6716 case 0x0f92:
6717 case 0x0f93:
6718 case 0x0f94:
6719 case 0x0f95:
6720 case 0x0f96:
6721 case 0x0f97:
6722 case 0x0f98:
6723 case 0x0f99:
6724 case 0x0f9a:
6725 case 0x0f9b:
6726 case 0x0f9c:
6727 case 0x0f9d:
6728 case 0x0f9e:
6729 case 0x0f9f:
6731 ir.ot = OT_BYTE;
6732 if (i386_record_modrm (&ir))
6733 return -1;
6734 if (ir.mod == 3)
6736 : (ir.rm & 0x3));
6737 else
6738 {
6739 if (i386_record_lea_modrm (&ir))
6740 return -1;
6741 }
6742 break;
6743
6744 case 0x0f40: /* cmov Gv, Ev */
6745 case 0x0f41:
6746 case 0x0f42:
6747 case 0x0f43:
6748 case 0x0f44:
6749 case 0x0f45:
6750 case 0x0f46:
6751 case 0x0f47:
6752 case 0x0f48:
6753 case 0x0f49:
6754 case 0x0f4a:
6755 case 0x0f4b:
6756 case 0x0f4c:
6757 case 0x0f4d:
6758 case 0x0f4e:
6759 case 0x0f4f:
6760 if (i386_record_modrm (&ir))
6761 return -1;
6762 ir.reg |= rex_r;
6763 if (ir.dflag == OT_BYTE)
6764 ir.reg &= 0x3;
6766 break;
6767
6768 /* flags */
6769 case 0x9c: /* pushf */
6771 if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag)
6772 ir.dflag = 2;
6773 if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
6774 return -1;
6775 break;
6776
6777 case 0x9d: /* popf */
6780 break;
6781
6782 case 0x9e: /* sahf */
6784 {
6785 ir.addr -= 1;
6786 goto no_support;
6787 }
6788 /* FALLTHROUGH */
6789 case 0xf5: /* cmc */
6790 case 0xf8: /* clc */
6791 case 0xf9: /* stc */
6792 case 0xfc: /* cld */
6793 case 0xfd: /* std */
6795 break;
6796
6797 case 0x9f: /* lahf */
6799 {
6800 ir.addr -= 1;
6801 goto no_support;
6802 }
6805 break;
6806
6807 /* bit operations */
6808 case 0x0fba: /* bt/bts/btr/btc Gv, im */
6809 ir.ot = ir.dflag + OT_WORD;
6810 if (i386_record_modrm (&ir))
6811 return -1;
6812 if (ir.reg < 4)
6813 {
6814 ir.addr -= 2;
6815 opcode = opcode << 8 | ir.modrm;
6816 goto no_support;
6817 }
6818 if (ir.reg != 4)
6819 {
6820 if (ir.mod == 3)
6822 else
6823 {
6824 if (i386_record_lea_modrm (&ir))
6825 return -1;
6826 }
6827 }
6829 break;
6830
6831 case 0x0fa3: /* bt Gv, Ev */
6833 break;
6834
6835 case 0x0fab: /* bts */
6836 case 0x0fb3: /* btr */
6837 case 0x0fbb: /* btc */
6838 ir.ot = ir.dflag + OT_WORD;
6839 if (i386_record_modrm (&ir))
6840 return -1;
6841 if (ir.mod == 3)
6843 else
6844 {
6845 uint64_t addr64;
6846 if (i386_record_lea_modrm_addr (&ir, &addr64))
6847 return -1;
6849 ir.regmap[ir.reg | rex_r],
6850 &addr);
6851 switch (ir.dflag)
6852 {
6853 case 0:
6854 addr64 += ((int16_t) addr >> 4) << 4;
6855 break;
6856 case 1:
6857 addr64 += ((int32_t) addr >> 5) << 5;
6858 break;
6859 case 2:
6860 addr64 += ((int64_t) addr >> 6) << 6;
6861 break;
6862 }
6863 if (record_full_arch_list_add_mem (addr64, 1 << ir.ot))
6864 return -1;
6865 if (i386_record_lea_modrm (&ir))
6866 return -1;
6867 }
6869 break;
6870
6871 case 0x0fbc: /* bsf */
6872 case 0x0fbd: /* bsr */
6875 break;
6876
6877 /* bcd */
6878 case 0x27: /* daa */
6879 case 0x2f: /* das */
6880 case 0x37: /* aaa */
6881 case 0x3f: /* aas */
6882 case 0xd4: /* aam */
6883 case 0xd5: /* aad */
6885 {
6886 ir.addr -= 1;
6887 goto no_support;
6888 }
6891 break;
6892
6893 /* misc */
6894 case 0x90: /* nop */
6895 if (prefixes & PREFIX_LOCK)
6896 {
6897 ir.addr -= 1;
6898 goto no_support;
6899 }
6900 break;
6901
6902 case 0x9b: /* fwait */
6903 if (record_read_memory (gdbarch, ir.addr, &opcode8, 1))
6904 return -1;
6905 opcode = (uint32_t) opcode8;
6906 ir.addr++;
6907 goto reswitch;
6908 break;
6909
6910 /* XXX */
6911 case 0xcc: /* int3 */
6913 _("Process record does not support instruction "
6914 "int3.\n"));
6915 ir.addr -= 1;
6916 goto no_support;
6917 break;
6918
6919 /* XXX */
6920 case 0xcd: /* int */
6921 {
6922 int ret;
6923 uint8_t interrupt;
6924 if (record_read_memory (gdbarch, ir.addr, &interrupt, 1))
6925 return -1;
6926 ir.addr++;
6927 if (interrupt != 0x80
6928 || tdep->i386_intx80_record == NULL)
6929 {
6931 _("Process record does not support "
6932 "instruction int 0x%02x.\n"),
6933 interrupt);
6934 ir.addr -= 2;
6935 goto no_support;
6936 }
6937 ret = tdep->i386_intx80_record (ir.regcache);
6938 if (ret)
6939 return ret;
6940 }
6941 break;
6942
6943 /* XXX */
6944 case 0xce: /* into */
6946 _("Process record does not support "
6947 "instruction into.\n"));
6948 ir.addr -= 1;
6949 goto no_support;
6950 break;
6951
6952 case 0xfa: /* cli */
6953 case 0xfb: /* sti */
6954 break;
6955
6956 case 0x62: /* bound */
6958 _("Process record does not support "
6959 "instruction bound.\n"));
6960 ir.addr -= 1;
6961 goto no_support;
6962 break;
6963
6964 case 0x0fc8: /* bswap reg */
6965 case 0x0fc9:
6966 case 0x0fca:
6967 case 0x0fcb:
6968 case 0x0fcc:
6969 case 0x0fcd:
6970 case 0x0fce:
6971 case 0x0fcf:
6972 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode & 7) | ir.rex_b);
6973 break;
6974
6975 case 0xd6: /* salc */
6977 {
6978 ir.addr -= 1;
6979 goto no_support;
6980 }
6983 break;
6984
6985 case 0xe0: /* loopnz */
6986 case 0xe1: /* loopz */
6987 case 0xe2: /* loop */
6988 case 0xe3: /* jecxz */
6991 break;
6992
6993 case 0x0f30: /* wrmsr */
6995 _("Process record does not support "
6996 "instruction wrmsr.\n"));
6997 ir.addr -= 2;
6998 goto no_support;
6999 break;
7000
7001 case 0x0f32: /* rdmsr */
7003 _("Process record does not support "
7004 "instruction rdmsr.\n"));
7005 ir.addr -= 2;
7006 goto no_support;
7007 break;
7008
7009 case 0x0f31: /* rdtsc */
7012 break;
7013
7014 case 0x0f34: /* sysenter */
7015 {
7016 int ret;
7018 {
7019 ir.addr -= 2;
7020 goto no_support;
7021 }
7022 if (tdep->i386_sysenter_record == NULL)
7023 {
7025 _("Process record does not support "
7026 "instruction sysenter.\n"));
7027 ir.addr -= 2;
7028 goto no_support;
7029 }
7030 ret = tdep->i386_sysenter_record (ir.regcache);
7031 if (ret)
7032 return ret;
7033 }
7034 break;
7035
7036 case 0x0f35: /* sysexit */
7038 _("Process record does not support "
7039 "instruction sysexit.\n"));
7040 ir.addr -= 2;
7041 goto no_support;
7042 break;
7043
7044 case 0x0f05: /* syscall */
7045 {
7046 int ret;
7047 if (tdep->i386_syscall_record == NULL)
7048 {
7050 _("Process record does not support "
7051 "instruction syscall.\n"));
7052 ir.addr -= 2;
7053 goto no_support;
7054 }
7055 ret = tdep->i386_syscall_record (ir.regcache);
7056 if (ret)
7057 return ret;
7058 }
7059 break;
7060
7061 case 0x0f07: /* sysret */
7063 _("Process record does not support "
7064 "instruction sysret.\n"));
7065 ir.addr -= 2;
7066 goto no_support;
7067 break;
7068
7069 case 0x0fa2: /* cpuid */
7074 break;
7075
7076 case 0xf4: /* hlt */
7078 _("Process record does not support "
7079 "instruction hlt.\n"));
7080 ir.addr -= 1;
7081 goto no_support;
7082 break;
7083
7084 case 0x0f00:
7085 if (i386_record_modrm (&ir))
7086 return -1;
7087 switch (ir.reg)
7088 {
7089 case 0: /* sldt */
7090 case 1: /* str */
7091 if (ir.mod == 3)
7093 else
7094 {
7095 ir.ot = OT_WORD;
7096 if (i386_record_lea_modrm (&ir))
7097 return -1;
7098 }
7099 break;
7100 case 2: /* lldt */
7101 case 3: /* ltr */
7102 break;
7103 case 4: /* verr */
7104 case 5: /* verw */
7106 break;
7107 default:
7108 ir.addr -= 3;
7109 opcode = opcode << 8 | ir.modrm;
7110 goto no_support;
7111 break;
7112 }
7113 break;
7114
7115 case 0x0f01:
7116 if (i386_record_modrm (&ir))
7117 return -1;
7118 switch (ir.reg)
7119 {
7120 case 0: /* sgdt */
7121 {
7122 uint64_t addr64;
7123
7124 if (ir.mod == 3)
7125 {
7126 ir.addr -= 3;
7127 opcode = opcode << 8 | ir.modrm;
7128 goto no_support;
7129 }
7130 if (ir.override >= 0)
7131 {
7133 {
7134 if (yquery (_("\
7135Process record ignores the memory change of instruction at address %s\n\
7136because it can't get the value of the segment register.\n\
7137Do you want to stop the program?"),
7138 paddress (gdbarch, ir.orig_addr)))
7139 return -1;
7140 }
7141 }
7142 else
7143 {
7144 if (i386_record_lea_modrm_addr (&ir, &addr64))
7145 return -1;
7146 if (record_full_arch_list_add_mem (addr64, 2))
7147 return -1;
7148 addr64 += 2;
7150 {
7151 if (record_full_arch_list_add_mem (addr64, 8))
7152 return -1;
7153 }
7154 else
7155 {
7156 if (record_full_arch_list_add_mem (addr64, 4))
7157 return -1;
7158 }
7159 }
7160 }
7161 break;
7162 case 1:
7163 if (ir.mod == 3)
7164 {
7165 switch (ir.rm)
7166 {
7167 case 0: /* monitor */
7168 break;
7169 case 1: /* mwait */
7171 break;
7172 default:
7173 ir.addr -= 3;
7174 opcode = opcode << 8 | ir.modrm;
7175 goto no_support;
7176 break;
7177 }
7178 }
7179 else
7180 {
7181 /* sidt */
7182 if (ir.override >= 0)
7183 {
7185 {
7186 if (yquery (_("\
7187Process record ignores the memory change of instruction at address %s\n\
7188because it can't get the value of the segment register.\n\
7189Do you want to stop the program?"),
7190 paddress (gdbarch, ir.orig_addr)))
7191 return -1;
7192 }
7193 }
7194 else
7195 {
7196 uint64_t addr64;
7197
7198 if (i386_record_lea_modrm_addr (&ir, &addr64))
7199 return -1;
7200 if (record_full_arch_list_add_mem (addr64, 2))
7201 return -1;
7202 addr64 += 2;
7204 {
7205 if (record_full_arch_list_add_mem (addr64, 8))
7206 return -1;
7207 }
7208 else
7209 {
7210 if (record_full_arch_list_add_mem (addr64, 4))
7211 return -1;
7212 }
7213 }
7214 }
7215 break;
7216 case 2: /* lgdt */
7217 if (ir.mod == 3)
7218 {
7219 /* xgetbv */
7220 if (ir.rm == 0)
7221 {
7224 break;
7225 }
7226 /* xsetbv */
7227 else if (ir.rm == 1)
7228 break;
7229 }
7230 /* Fall through. */
7231 case 3: /* lidt */
7232 if (ir.mod == 3)
7233 {
7234 ir.addr -= 3;
7235 opcode = opcode << 8 | ir.modrm;
7236 goto no_support;
7237 }
7238 break;
7239 case 4: /* smsw */
7240 if (ir.mod == 3)
7241 {
7243 return -1;
7244 }
7245 else
7246 {
7247 ir.ot = OT_WORD;
7248 if (i386_record_lea_modrm (&ir))
7249 return -1;
7250 }
7252 break;
7253 case 6: /* lmsw */
7255 break;
7256 case 7: /* invlpg */
7257 if (ir.mod == 3)
7258 {
7259 if (ir.rm == 0 && ir.regmap[X86_RECORD_R8_REGNUM])
7261 else
7262 {
7263 ir.addr -= 3;
7264 opcode = opcode << 8 | ir.modrm;
7265 goto no_support;
7266 }
7267 }
7268 else
7270 break;
7271 default:
7272 ir.addr -= 3;
7273 opcode = opcode << 8 | ir.modrm;
7274 goto no_support;
7275 break;
7276 }
7277 break;
7278
7279 case 0x0f08: /* invd */
7280 case 0x0f09: /* wbinvd */
7281 break;
7282
7283 case 0x63: /* arpl */
7284 if (i386_record_modrm (&ir))
7285 return -1;
7286 if (ir.mod == 3 || ir.regmap[X86_RECORD_R8_REGNUM])
7287 {
7289 ? (ir.reg | rex_r) : ir.rm);
7290 }
7291 else
7292 {
7293 ir.ot = ir.dflag ? OT_LONG : OT_WORD;
7294 if (i386_record_lea_modrm (&ir))
7295 return -1;
7296 }
7299 break;
7300
7301 case 0x0f02: /* lar */
7302 case 0x0f03: /* lsl */
7303 if (i386_record_modrm (&ir))
7304 return -1;
7307 break;
7308
7309 case 0x0f18:
7310 if (i386_record_modrm (&ir))
7311 return -1;
7312 if (ir.mod == 3 && ir.reg == 3)
7313 {
7314 ir.addr -= 3;
7315 opcode = opcode << 8 | ir.modrm;
7316 goto no_support;
7317 }
7318 break;
7319
7320 case 0x0f19:
7321 case 0x0f1a:
7322 case 0x0f1b:
7323 case 0x0f1c:
7324 case 0x0f1d:
7325 case 0x0f1e:
7326 case 0x0f1f:
7327 /* nop (multi byte) */
7328 break;
7329
7330 case 0x0f20: /* mov reg, crN */
7331 case 0x0f22: /* mov crN, reg */
7332 if (i386_record_modrm (&ir))
7333 return -1;
7334 if ((ir.modrm & 0xc0) != 0xc0)
7335 {
7336 ir.addr -= 3;
7337 opcode = opcode << 8 | ir.modrm;
7338 goto no_support;
7339 }
7340 switch (ir.reg)
7341 {
7342 case 0:
7343 case 2:
7344 case 3:
7345 case 4:
7346 case 8:
7347 if (opcode & 2)
7349 else
7351 break;
7352 default:
7353 ir.addr -= 3;
7354 opcode = opcode << 8 | ir.modrm;
7355 goto no_support;
7356 break;
7357 }
7358 break;
7359
7360 case 0x0f21: /* mov reg, drN */
7361 case 0x0f23: /* mov drN, reg */
7362 if (i386_record_modrm (&ir))
7363 return -1;
7364 if ((ir.modrm & 0xc0) != 0xc0 || ir.reg == 4
7365 || ir.reg == 5 || ir.reg >= 8)
7366 {
7367 ir.addr -= 3;
7368 opcode = opcode << 8 | ir.modrm;
7369 goto no_support;
7370 }
7371 if (opcode & 2)
7373 else
7375 break;
7376
7377 case 0x0f06: /* clts */
7379 break;
7380
7381 /* MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 */
7382
7383 case 0x0f0d: /* 3DNow! prefetch */
7384 break;
7385
7386 case 0x0f0e: /* 3DNow! femms */
7387 case 0x0f77: /* emms */
7389 goto no_support;
7391 break;
7392
7393 case 0x0f0f: /* 3DNow! data */
7394 if (i386_record_modrm (&ir))
7395 return -1;
7396 if (record_read_memory (gdbarch, ir.addr, &opcode8, 1))
7397 return -1;
7398 ir.addr++;
7399 switch (opcode8)
7400 {
7401 case 0x0c: /* 3DNow! pi2fw */
7402 case 0x0d: /* 3DNow! pi2fd */
7403 case 0x1c: /* 3DNow! pf2iw */
7404 case 0x1d: /* 3DNow! pf2id */
7405 case 0x8a: /* 3DNow! pfnacc */
7406 case 0x8e: /* 3DNow! pfpnacc */
7407 case 0x90: /* 3DNow! pfcmpge */
7408 case 0x94: /* 3DNow! pfmin */
7409 case 0x96: /* 3DNow! pfrcp */
7410 case 0x97: /* 3DNow! pfrsqrt */
7411 case 0x9a: /* 3DNow! pfsub */
7412 case 0x9e: /* 3DNow! pfadd */
7413 case 0xa0: /* 3DNow! pfcmpgt */
7414 case 0xa4: /* 3DNow! pfmax */
7415 case 0xa6: /* 3DNow! pfrcpit1 */
7416 case 0xa7: /* 3DNow! pfrsqit1 */
7417 case 0xaa: /* 3DNow! pfsubr */
7418 case 0xae: /* 3DNow! pfacc */
7419 case 0xb0: /* 3DNow! pfcmpeq */
7420 case 0xb4: /* 3DNow! pfmul */
7421 case 0xb6: /* 3DNow! pfrcpit2 */
7422 case 0xb7: /* 3DNow! pmulhrw */
7423 case 0xbb: /* 3DNow! pswapd */
7424 case 0xbf: /* 3DNow! pavgusb */
7425 if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
7426 goto no_support_3dnow_data;
7428 break;
7429
7430 default:
7431no_support_3dnow_data:
7432 opcode = (opcode << 8) | opcode8;
7433 goto no_support;
7434 break;
7435 }
7436 break;
7437
7438 case 0x0faa: /* rsm */
7448 break;
7449
7450 case 0x0fae:
7451 if (i386_record_modrm (&ir))
7452 return -1;
7453 switch(ir.reg)
7454 {
7455 case 0: /* fxsave */
7456 {
7457 uint64_t tmpu64;
7458
7460 if (i386_record_lea_modrm_addr (&ir, &tmpu64))
7461 return -1;
7462 if (record_full_arch_list_add_mem (tmpu64, 512))
7463 return -1;
7464 }
7465 break;
7466
7467 case 1: /* fxrstor */
7468 {
7469 int i;
7470
7472
7473 for (i = I387_MM0_REGNUM (tdep);
7474 i386_mmx_regnum_p (gdbarch, i); i++)
7476
7477 for (i = I387_XMM0_REGNUM (tdep);
7478 i386_xmm_regnum_p (gdbarch, i); i++)
7480
7483 I387_MXCSR_REGNUM(tdep));
7484
7485 for (i = I387_ST0_REGNUM (tdep);
7486 i386_fp_regnum_p (gdbarch, i); i++)
7488
7489 for (i = I387_FCTRL_REGNUM (tdep);
7490 i386_fpc_regnum_p (gdbarch, i); i++)
7492 }
7493 break;
7494
7495 case 2: /* ldmxcsr */
7497 goto no_support;
7499 break;
7500
7501 case 3: /* stmxcsr */
7502 ir.ot = OT_LONG;
7503 if (i386_record_lea_modrm (&ir))
7504 return -1;
7505 break;
7506
7507 case 5: /* lfence */
7508 case 6: /* mfence */
7509 case 7: /* sfence clflush */
7510 break;
7511
7512 default:
7513 opcode = (opcode << 8) | ir.modrm;
7514 goto no_support;
7515 break;
7516 }
7517 break;
7518
7519 case 0x0fc3: /* movnti */
7520 ir.ot = (ir.dflag == 2) ? OT_QUAD : OT_LONG;
7521 if (i386_record_modrm (&ir))
7522 return -1;
7523 if (ir.mod == 3)
7524 goto no_support;
7525 ir.reg |= rex_r;
7526 if (i386_record_lea_modrm (&ir))
7527 return -1;
7528 break;
7529
7530 /* Add prefix to opcode. */
7531 case 0x0f10:
7532 case 0x0f11:
7533 case 0x0f12:
7534 case 0x0f13:
7535 case 0x0f14:
7536 case 0x0f15:
7537 case 0x0f16:
7538 case 0x0f17:
7539 case 0x0f28:
7540 case 0x0f29:
7541 case 0x0f2a:
7542 case 0x0f2b:
7543 case 0x0f2c:
7544 case 0x0f2d:
7545 case 0x0f2e:
7546 case 0x0f2f:
7547 case 0x0f38:
7548 case 0x0f39:
7549 case 0x0f3a:
7550 case 0x0f50:
7551 case 0x0f51:
7552 case 0x0f52:
7553 case 0x0f53:
7554 case 0x0f54:
7555 case 0x0f55:
7556 case 0x0f56:
7557 case 0x0f57:
7558 case 0x0f58:
7559 case 0x0f59:
7560 case 0x0f5a:
7561 case 0x0f5b:
7562 case 0x0f5c:
7563 case 0x0f5d:
7564 case 0x0f5e:
7565 case 0x0f5f:
7566 case 0x0f60:
7567 case 0x0f61:
7568 case 0x0f62:
7569 case 0x0f63:
7570 case 0x0f64:
7571 case 0x0f65:
7572 case 0x0f66:
7573 case 0x0f67:
7574 case 0x0f68:
7575 case 0x0f69:
7576 case 0x0f6a:
7577 case 0x0f6b:
7578 case 0x0f6c:
7579 case 0x0f6d:
7580 case 0x0f6e:
7581 case 0x0f6f:
7582 case 0x0f70:
7583 case 0x0f71:
7584 case 0x0f72:
7585 case 0x0f73:
7586 case 0x0f74:
7587 case 0x0f75:
7588 case 0x0f76:
7589 case 0x0f7c:
7590 case 0x0f7d:
7591 case 0x0f7e:
7592 case 0x0f7f:
7593 case 0x0fb8:
7594 case 0x0fc2:
7595 case 0x0fc4:
7596 case 0x0fc5:
7597 case 0x0fc6:
7598 case 0x0fd0:
7599 case 0x0fd1:
7600 case 0x0fd2:
7601 case 0x0fd3:
7602 case 0x0fd4:
7603 case 0x0fd5:
7604 case 0x0fd6:
7605 case 0x0fd7:
7606 case 0x0fd8:
7607 case 0x0fd9:
7608 case 0x0fda:
7609 case 0x0fdb:
7610 case 0x0fdc:
7611 case 0x0fdd:
7612 case 0x0fde:
7613 case 0x0fdf:
7614 case 0x0fe0:
7615 case 0x0fe1:
7616 case 0x0fe2:
7617 case 0x0fe3:
7618 case 0x0fe4:
7619 case 0x0fe5:
7620 case 0x0fe6:
7621 case 0x0fe7:
7622 case 0x0fe8:
7623 case 0x0fe9:
7624 case 0x0fea:
7625 case 0x0feb:
7626 case 0x0fec:
7627 case 0x0fed:
7628 case 0x0fee:
7629 case 0x0fef:
7630 case 0x0ff0:
7631 case 0x0ff1:
7632 case 0x0ff2:
7633 case 0x0ff3:
7634 case 0x0ff4:
7635 case 0x0ff5:
7636 case 0x0ff6:
7637 case 0x0ff7:
7638 case 0x0ff8:
7639 case 0x0ff9:
7640 case 0x0ffa:
7641 case 0x0ffb:
7642 case 0x0ffc:
7643 case 0x0ffd:
7644 case 0x0ffe:
7645 /* Mask out PREFIX_ADDR. */
7646 switch ((prefixes & ~PREFIX_ADDR))
7647 {
7648 case PREFIX_REPNZ:
7649 opcode |= 0xf20000;
7650 break;
7651 case PREFIX_DATA:
7652 opcode |= 0x660000;
7653 break;
7654 case PREFIX_REPZ:
7655 opcode |= 0xf30000;
7656 break;
7657 }
7658reswitch_prefix_add:
7659 switch (opcode)
7660 {
7661 case 0x0f38:
7662 case 0x660f38:
7663 case 0xf20f38:
7664 case 0x0f3a:
7665 case 0x660f3a:
7666 if (record_read_memory (gdbarch, ir.addr, &opcode8, 1))
7667 return -1;
7668 ir.addr++;
7669 opcode = (uint32_t) opcode8 | opcode << 8;
7670 goto reswitch_prefix_add;
7671 break;
7672
7673 case 0x0f10: /* movups */
7674 case 0x660f10: /* movupd */
7675 case 0xf30f10: /* movss */
7676 case 0xf20f10: /* movsd */
7677 case 0x0f12: /* movlps */
7678 case 0x660f12: /* movlpd */
7679 case 0xf30f12: /* movsldup */
7680 case 0xf20f12: /* movddup */
7681 case 0x0f14: /* unpcklps */
7682 case 0x660f14: /* unpcklpd */
7683 case 0x0f15: /* unpckhps */
7684 case 0x660f15: /* unpckhpd */
7685 case 0x0f16: /* movhps */
7686 case 0x660f16: /* movhpd */
7687 case 0xf30f16: /* movshdup */
7688 case 0x0f28: /* movaps */
7689 case 0x660f28: /* movapd */
7690 case 0x0f2a: /* cvtpi2ps */
7691 case 0x660f2a: /* cvtpi2pd */
7692 case 0xf30f2a: /* cvtsi2ss */
7693 case 0xf20f2a: /* cvtsi2sd */
7694 case 0x0f2c: /* cvttps2pi */
7695 case 0x660f2c: /* cvttpd2pi */
7696 case 0x0f2d: /* cvtps2pi */
7697 case 0x660f2d: /* cvtpd2pi */
7698 case 0x660f3800: /* pshufb */
7699 case 0x660f3801: /* phaddw */
7700 case 0x660f3802: /* phaddd */
7701 case 0x660f3803: /* phaddsw */
7702 case 0x660f3804: /* pmaddubsw */
7703 case 0x660f3805: /* phsubw */
7704 case 0x660f3806: /* phsubd */
7705 case 0x660f3807: /* phsubsw */
7706 case 0x660f3808: /* psignb */
7707 case 0x660f3809: /* psignw */
7708 case 0x660f380a: /* psignd */
7709 case 0x660f380b: /* pmulhrsw */
7710 case 0x660f3810: /* pblendvb */
7711 case 0x660f3814: /* blendvps */
7712 case 0x660f3815: /* blendvpd */
7713 case 0x660f381c: /* pabsb */
7714 case 0x660f381d: /* pabsw */
7715 case 0x660f381e: /* pabsd */
7716 case 0x660f3820: /* pmovsxbw */
7717 case 0x660f3821: /* pmovsxbd */
7718 case 0x660f3822: /* pmovsxbq */
7719 case 0x660f3823: /* pmovsxwd */
7720 case 0x660f3824: /* pmovsxwq */
7721 case 0x660f3825: /* pmovsxdq */
7722 case 0x660f3828: /* pmuldq */
7723 case 0x660f3829: /* pcmpeqq */
7724 case 0x660f382a: /* movntdqa */
7725 case 0x660f3a08: /* roundps */
7726 case 0x660f3a09: /* roundpd */
7727 case 0x660f3a0a: /* roundss */
7728 case 0x660f3a0b: /* roundsd */
7729 case 0x660f3a0c: /* blendps */
7730 case 0x660f3a0d: /* blendpd */
7731 case 0x660f3a0e: /* pblendw */
7732 case 0x660f3a0f: /* palignr */
7733 case 0x660f3a20: /* pinsrb */
7734 case 0x660f3a21: /* insertps */
7735 case 0x660f3a22: /* pinsrd pinsrq */
7736 case 0x660f3a40: /* dpps */
7737 case 0x660f3a41: /* dppd */
7738 case 0x660f3a42: /* mpsadbw */
7739 case 0x660f3a60: /* pcmpestrm */
7740 case 0x660f3a61: /* pcmpestri */
7741 case 0x660f3a62: /* pcmpistrm */
7742 case 0x660f3a63: /* pcmpistri */
7743 case 0x0f51: /* sqrtps */
7744 case 0x660f51: /* sqrtpd */
7745 case 0xf20f51: /* sqrtsd */
7746 case 0xf30f51: /* sqrtss */
7747 case 0x0f52: /* rsqrtps */
7748 case 0xf30f52: /* rsqrtss */
7749 case 0x0f53: /* rcpps */
7750 case 0xf30f53: /* rcpss */
7751 case 0x0f54: /* andps */
7752 case 0x660f54: /* andpd */
7753 case 0x0f55: /* andnps */
7754 case 0x660f55: /* andnpd */
7755 case 0x0f56: /* orps */
7756 case 0x660f56: /* orpd */
7757 case 0x0f57: /* xorps */
7758 case 0x660f57: /* xorpd */
7759 case 0x0f58: /* addps */
7760 case 0x660f58: /* addpd */
7761 case 0xf20f58: /* addsd */
7762 case 0xf30f58: /* addss */
7763 case 0x0f59: /* mulps */
7764 case 0x660f59: /* mulpd */
7765 case 0xf20f59: /* mulsd */
7766 case 0xf30f59: /* mulss */
7767 case 0x0f5a: /* cvtps2pd */
7768 case 0x660f5a: /* cvtpd2ps */
7769 case 0xf20f5a: /* cvtsd2ss */
7770 case 0xf30f5a: /* cvtss2sd */
7771 case 0x0f5b: /* cvtdq2ps */
7772 case 0x660f5b: /* cvtps2dq */
7773 case 0xf30f5b: /* cvttps2dq */
7774 case 0x0f5c: /* subps */
7775 case 0x660f5c: /* subpd */
7776 case 0xf20f5c: /* subsd */
7777 case 0xf30f5c: /* subss */
7778 case 0x0f5d: /* minps */
7779 case 0x660f5d: /* minpd */
7780 case 0xf20f5d: /* minsd */
7781 case 0xf30f5d: /* minss */
7782 case 0x0f5e: /* divps */
7783 case 0x660f5e: /* divpd */
7784 case 0xf20f5e: /* divsd */
7785 case 0xf30f5e: /* divss */
7786 case 0x0f5f: /* maxps */
7787 case 0x660f5f: /* maxpd */
7788 case 0xf20f5f: /* maxsd */
7789 case 0xf30f5f: /* maxss */
7790 case 0x660f60: /* punpcklbw */
7791 case 0x660f61: /* punpcklwd */
7792 case 0x660f62: /* punpckldq */
7793 case 0x660f63: /* packsswb */
7794 case 0x660f64: /* pcmpgtb */
7795 case 0x660f65: /* pcmpgtw */
7796 case 0x660f66: /* pcmpgtd */
7797 case 0x660f67: /* packuswb */
7798 case 0x660f68: /* punpckhbw */
7799 case 0x660f69: /* punpckhwd */
7800 case 0x660f6a: /* punpckhdq */
7801 case 0x660f6b: /* packssdw */
7802 case 0x660f6c: /* punpcklqdq */
7803 case 0x660f6d: /* punpckhqdq */
7804 case 0x660f6e: /* movd */
7805 case 0x660f6f: /* movdqa */
7806 case 0xf30f6f: /* movdqu */
7807 case 0x660f70: /* pshufd */
7808 case 0xf20f70: /* pshuflw */
7809 case 0xf30f70: /* pshufhw */
7810 case 0x660f74: /* pcmpeqb */
7811 case 0x660f75: /* pcmpeqw */
7812 case 0x660f76: /* pcmpeqd */
7813 case 0x660f7c: /* haddpd */
7814 case 0xf20f7c: /* haddps */
7815 case 0x660f7d: /* hsubpd */
7816 case 0xf20f7d: /* hsubps */
7817 case 0xf30f7e: /* movq */
7818 case 0x0fc2: /* cmpps */
7819 case 0x660fc2: /* cmppd */
7820 case 0xf20fc2: /* cmpsd */
7821 case 0xf30fc2: /* cmpss */
7822 case 0x660fc4: /* pinsrw */
7823 case 0x0fc6: /* shufps */
7824 case 0x660fc6: /* shufpd */
7825 case 0x660fd0: /* addsubpd */
7826 case 0xf20fd0: /* addsubps */
7827 case 0x660fd1: /* psrlw */
7828 case 0x660fd2: /* psrld */
7829 case 0x660fd3: /* psrlq */
7830 case 0x660fd4: /* paddq */
7831 case 0x660fd5: /* pmullw */
7832 case 0xf30fd6: /* movq2dq */
7833 case 0x660fd8: /* psubusb */
7834 case 0x660fd9: /* psubusw */
7835 case 0x660fda: /* pminub */
7836 case 0x660fdb: /* pand */
7837 case 0x660fdc: /* paddusb */
7838 case 0x660fdd: /* paddusw */
7839 case 0x660fde: /* pmaxub */
7840 case 0x660fdf: /* pandn */
7841 case 0x660fe0: /* pavgb */
7842 case 0x660fe1: /* psraw */
7843 case 0x660fe2: /* psrad */
7844 case 0x660fe3: /* pavgw */
7845 case 0x660fe4: /* pmulhuw */
7846 case 0x660fe5: /* pmulhw */
7847 case 0x660fe6: /* cvttpd2dq */
7848 case 0xf20fe6: /* cvtpd2dq */
7849 case 0xf30fe6: /* cvtdq2pd */
7850 case 0x660fe8: /* psubsb */
7851 case 0x660fe9: /* psubsw */
7852 case 0x660fea: /* pminsw */
7853 case 0x660feb: /* por */
7854 case 0x660fec: /* paddsb */
7855 case 0x660fed: /* paddsw */
7856 case 0x660fee: /* pmaxsw */
7857 case 0x660fef: /* pxor */
7858 case 0xf20ff0: /* lddqu */
7859 case 0x660ff1: /* psllw */
7860 case 0x660ff2: /* pslld */
7861 case 0x660ff3: /* psllq */
7862 case 0x660ff4: /* pmuludq */
7863 case 0x660ff5: /* pmaddwd */
7864 case 0x660ff6: /* psadbw */
7865 case 0x660ff8: /* psubb */
7866 case 0x660ff9: /* psubw */
7867 case 0x660ffa: /* psubd */
7868 case 0x660ffb: /* psubq */
7869 case 0x660ffc: /* paddb */
7870 case 0x660ffd: /* paddw */
7871 case 0x660ffe: /* paddd */
7872 if (i386_record_modrm (&ir))
7873 return -1;
7874 ir.reg |= rex_r;
7875 if (!i386_xmm_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.reg))
7876 goto no_support;
7878 I387_XMM0_REGNUM (tdep) + ir.reg);
7879 if ((opcode & 0xfffffffc) == 0x660f3a60)
7881 break;
7882
7883 case 0x0f11: /* movups */
7884 case 0x660f11: /* movupd */
7885 case 0xf30f11: /* movss */
7886 case 0xf20f11: /* movsd */
7887 case 0x0f13: /* movlps */
7888 case 0x660f13: /* movlpd */
7889 case 0x0f17: /* movhps */
7890 case 0x660f17: /* movhpd */
7891 case 0x0f29: /* movaps */
7892 case 0x660f29: /* movapd */
7893 case 0x660f3a14: /* pextrb */
7894 case 0x660f3a15: /* pextrw */
7895 case 0x660f3a16: /* pextrd pextrq */
7896 case 0x660f3a17: /* extractps */
7897 case 0x660f7f: /* movdqa */
7898 case 0xf30f7f: /* movdqu */
7899 if (i386_record_modrm (&ir))
7900 return -1;
7901 if (ir.mod == 3)
7902 {
7903 if (opcode == 0x0f13 || opcode == 0x660f13
7904 || opcode == 0x0f17 || opcode == 0x660f17)
7905 goto no_support;
7906 ir.rm |= ir.rex_b;
7908 I387_XMM0_REGNUM (tdep) + ir.rm))
7909 goto no_support;
7911 I387_XMM0_REGNUM (tdep) + ir.rm);
7912 }
7913 else
7914 {
7915 switch (opcode)
7916 {
7917 case 0x660f3a14:
7918 ir.ot = OT_BYTE;
7919 break;
7920 case 0x660f3a15:
7921 ir.ot = OT_WORD;
7922 break;
7923 case 0x660f3a16:
7924 ir.ot = OT_LONG;
7925 break;
7926 case 0x660f3a17:
7927 ir.ot = OT_QUAD;
7928 break;
7929 default:
7930 ir.ot = OT_DQUAD;
7931 break;
7932 }
7933 if (i386_record_lea_modrm (&ir))
7934 return -1;
7935 }
7936 break;
7937
7938 case 0x0f2b: /* movntps */
7939 case 0x660f2b: /* movntpd */
7940 case 0x0fe7: /* movntq */
7941 case 0x660fe7: /* movntdq */
7942 if (ir.mod == 3)
7943 goto no_support;
7944 if (opcode == 0x0fe7)
7945 ir.ot = OT_QUAD;
7946 else
7947 ir.ot = OT_DQUAD;
7948 if (i386_record_lea_modrm (&ir))
7949 return -1;
7950 break;
7951
7952 case 0xf30f2c: /* cvttss2si */
7953 case 0xf20f2c: /* cvttsd2si */
7954 case 0xf30f2d: /* cvtss2si */
7955 case 0xf20f2d: /* cvtsd2si */
7956 case 0xf20f38f0: /* crc32 */
7957 case 0xf20f38f1: /* crc32 */
7958 case 0x0f50: /* movmskps */
7959 case 0x660f50: /* movmskpd */
7960 case 0x0fc5: /* pextrw */
7961 case 0x660fc5: /* pextrw */
7962 case 0x0fd7: /* pmovmskb */
7963 case 0x660fd7: /* pmovmskb */
7965 break;
7966
7967 case 0x0f3800: /* pshufb */
7968 case 0x0f3801: /* phaddw */
7969 case 0x0f3802: /* phaddd */
7970 case 0x0f3803: /* phaddsw */
7971 case 0x0f3804: /* pmaddubsw */
7972 case 0x0f3805: /* phsubw */
7973 case 0x0f3806: /* phsubd */
7974 case 0x0f3807: /* phsubsw */
7975 case 0x0f3808: /* psignb */
7976 case 0x0f3809: /* psignw */
7977 case 0x0f380a: /* psignd */
7978 case 0x0f380b: /* pmulhrsw */
7979 case 0x0f381c: /* pabsb */
7980 case 0x0f381d: /* pabsw */
7981 case 0x0f381e: /* pabsd */
7982 case 0x0f382b: /* packusdw */
7983 case 0x0f3830: /* pmovzxbw */
7984 case 0x0f3831: /* pmovzxbd */
7985 case 0x0f3832: /* pmovzxbq */
7986 case 0x0f3833: /* pmovzxwd */
7987 case 0x0f3834: /* pmovzxwq */
7988 case 0x0f3835: /* pmovzxdq */
7989 case 0x0f3837: /* pcmpgtq */
7990 case 0x0f3838: /* pminsb */
7991 case 0x0f3839: /* pminsd */
7992 case 0x0f383a: /* pminuw */
7993 case 0x0f383b: /* pminud */
7994 case 0x0f383c: /* pmaxsb */
7995 case 0x0f383d: /* pmaxsd */
7996 case 0x0f383e: /* pmaxuw */
7997 case 0x0f383f: /* pmaxud */
7998 case 0x0f3840: /* pmulld */
7999 case 0x0f3841: /* phminposuw */
8000 case 0x0f3a0f: /* palignr */
8001 case 0x0f60: /* punpcklbw */
8002 case 0x0f61: /* punpcklwd */
8003 case 0x0f62: /* punpckldq */
8004 case 0x0f63: /* packsswb */
8005 case 0x0f64: /* pcmpgtb */
8006 case 0x0f65: /* pcmpgtw */
8007 case 0x0f66: /* pcmpgtd */
8008 case 0x0f67: /* packuswb */
8009 case 0x0f68: /* punpckhbw */
8010 case 0x0f69: /* punpckhwd */
8011 case 0x0f6a: /* punpckhdq */
8012 case 0x0f6b: /* packssdw */
8013 case 0x0f6e: /* movd */
8014 case 0x0f6f: /* movq */
8015 case 0x0f70: /* pshufw */
8016 case 0x0f74: /* pcmpeqb */
8017 case 0x0f75: /* pcmpeqw */
8018 case 0x0f76: /* pcmpeqd */
8019 case 0x0fc4: /* pinsrw */
8020 case 0x0fd1: /* psrlw */
8021 case 0x0fd2: /* psrld */
8022 case 0x0fd3: /* psrlq */
8023 case 0x0fd4: /* paddq */
8024 case 0x0fd5: /* pmullw */
8025 case 0xf20fd6: /* movdq2q */
8026 case 0x0fd8: /* psubusb */
8027 case 0x0fd9: /* psubusw */
8028 case 0x0fda: /* pminub */
8029 case 0x0fdb: /* pand */
8030 case 0x0fdc: /* paddusb */
8031 case 0x0fdd: /* paddusw */
8032 case 0x0fde: /* pmaxub */
8033 case 0x0fdf: /* pandn */
8034 case 0x0fe0: /* pavgb */
8035 case 0x0fe1: /* psraw */
8036 case 0x0fe2: /* psrad */
8037 case 0x0fe3: /* pavgw */
8038 case 0x0fe4: /* pmulhuw */
8039 case 0x0fe5: /* pmulhw */
8040 case 0x0fe8: /* psubsb */
8041 case 0x0fe9: /* psubsw */
8042 case 0x0fea: /* pminsw */
8043 case 0x0feb: /* por */
8044 case 0x0fec: /* paddsb */
8045 case 0x0fed: /* paddsw */
8046 case 0x0fee: /* pmaxsw */
8047 case 0x0fef: /* pxor */
8048 case 0x0ff1: /* psllw */
8049 case 0x0ff2: /* pslld */
8050 case 0x0ff3: /* psllq */
8051 case 0x0ff4: /* pmuludq */
8052 case 0x0ff5: /* pmaddwd */
8053 case 0x0ff6: /* psadbw */
8054 case 0x0ff8: /* psubb */
8055 case 0x0ff9: /* psubw */
8056 case 0x0ffa: /* psubd */
8057 case 0x0ffb: /* psubq */
8058 case 0x0ffc: /* paddb */
8059 case 0x0ffd: /* paddw */
8060 case 0x0ffe: /* paddd */
8061 if (i386_record_modrm (&ir))
8062 return -1;
8063 if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
8064 goto no_support;
8066 I387_MM0_REGNUM (tdep) + ir.reg);
8067 break;
8068
8069 case 0x0f71: /* psllw */
8070 case 0x0f72: /* pslld */
8071 case 0x0f73: /* psllq */
8072 if (i386_record_modrm (&ir))
8073 return -1;
8074 if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
8075 goto no_support;
8077 I387_MM0_REGNUM (tdep) + ir.rm);
8078 break;
8079
8080 case 0x660f71: /* psllw */
8081 case 0x660f72: /* pslld */
8082 case 0x660f73: /* psllq */
8083 if (i386_record_modrm (&ir))
8084 return -1;
8085 ir.rm |= ir.rex_b;
8086 if (!i386_xmm_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
8087 goto no_support;
8089 I387_XMM0_REGNUM (tdep) + ir.rm);
8090 break;
8091
8092 case 0x0f7e: /* movd */
8093 case 0x660f7e: /* movd */
8094 if (i386_record_modrm (&ir))
8095 return -1;
8096 if (ir.mod == 3)
8098 else
8099 {
8100 if (ir.dflag == 2)
8101 ir.ot = OT_QUAD;
8102 else
8103 ir.ot = OT_LONG;
8104 if (i386_record_lea_modrm (&ir))
8105 return -1;
8106 }
8107 break;
8108
8109 case 0x0f7f: /* movq */
8110 if (i386_record_modrm (&ir))
8111 return -1;
8112 if (ir.mod == 3)
8113 {
8114 if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
8115 goto no_support;
8117 I387_MM0_REGNUM (tdep) + ir.rm);
8118 }
8119 else
8120 {
8121 ir.ot = OT_QUAD;
8122 if (i386_record_lea_modrm (&ir))
8123 return -1;
8124 }
8125 break;
8126
8127 case 0xf30fb8: /* popcnt */
8128 if (i386_record_modrm (&ir))
8129 return -1;
8132 break;
8133
8134 case 0x660fd6: /* movq */
8135 if (i386_record_modrm (&ir))
8136 return -1;
8137 if (ir.mod == 3)
8138 {
8139 ir.rm |= ir.rex_b;
8141 I387_XMM0_REGNUM (tdep) + ir.rm))
8142 goto no_support;
8144 I387_XMM0_REGNUM (tdep) + ir.rm);
8145 }
8146 else
8147 {
8148 ir.ot = OT_QUAD;
8149 if (i386_record_lea_modrm (&ir))
8150 return -1;
8151 }
8152 break;
8153
8154 case 0x660f3817: /* ptest */
8155 case 0x0f2e: /* ucomiss */
8156 case 0x660f2e: /* ucomisd */
8157 case 0x0f2f: /* comiss */
8158 case 0x660f2f: /* comisd */
8160 break;
8161
8162 case 0x0ff7: /* maskmovq */
8165 &addr);
8167 return -1;
8168 break;
8169
8170 case 0x660ff7: /* maskmovdqu */
8173 &addr);
8175 return -1;
8176 break;
8177
8178 default:
8179 goto no_support;
8180 break;
8181 }
8182 break;
8183
8184 default:
8185 goto no_support;
8186 break;
8187 }
8188
8189 /* In the future, maybe still need to deal with need_dasm. */
8192 return -1;
8193
8194 return 0;
8195
8196 no_support:
8198 _("Process record does not support instruction 0x%02x "
8199 "at address %s.\n"),
8200 (unsigned int) (opcode),
8201 paddress (gdbarch, ir.orig_addr));
8202 return -1;
8203}
8204
8213
8214/* Check that the given address appears suitable for a fast
8215 tracepoint, which on x86-64 means that we need an instruction of at
8216 least 5 bytes, so that we can overwrite it with a 4-byte-offset
8217 jump and not have to worry about program jumps to an address in the
8218 middle of the tracepoint jump. On x86, it may be possible to use
8219 4-byte jumps with a 2-byte offset to a trampoline located in the
8220 bottom 64 KiB of memory. Returns 1 if OK, and writes a size
8221 of instruction to replace, and 0 if not, plus an explanatory
8222 string. */
8223
8224static int
8226 std::string *msg)
8227{
8228 int len, jumplen;
8229
8230 /* Ask the target for the minimum instruction length supported. */
8232
8233 if (jumplen < 0)
8234 {
8235 /* If the target does not support the get_min_fast_tracepoint_insn_len
8236 operation, assume that fast tracepoints will always be implemented
8237 using 4-byte relative jumps on both x86 and x86-64. */
8238 jumplen = 5;
8239 }
8240 else if (jumplen == 0)
8241 {
8242 /* If the target does support get_min_fast_tracepoint_insn_len but
8243 returns zero, then the IPA has not loaded yet. In this case,
8244 we optimistically assume that truncated 2-byte relative jumps
8245 will be available on x86, and compensate later if this assumption
8246 turns out to be incorrect. On x86-64 architectures, 4-byte relative
8247 jumps will always be used. */
8248 jumplen = (register_size (gdbarch, 0) == 8) ? 5 : 4;
8249 }
8250
8251 /* Check for fit. */
8252 len = gdb_insn_length (gdbarch, addr);
8253
8254 if (len < jumplen)
8255 {
8256 /* Return a bit of target-specific detail to add to the caller's
8257 generic failure message. */
8258 if (msg)
8259 *msg = string_printf (_("; instruction is only %d bytes long, "
8260 "need at least %d bytes for the jump"),
8261 len, jumplen);
8262 return 0;
8263 }
8264 else
8265 {
8266 if (msg)
8267 msg->clear ();
8268 return 1;
8269 }
8270}
8271
8272/* Return a floating-point format for a floating-point variable of
8273 length LEN in bits. If non-NULL, NAME is the name of its type.
8274 If no suitable type is found, return NULL. */
8275
8276static const struct floatformat **
8278 const char *name, int len)
8279{
8280 if (len == 128 && name)
8281 if (strcmp (name, "__float128") == 0
8282 || strcmp (name, "_Float128") == 0
8283 || strcmp (name, "complex _Float128") == 0
8284 || strcmp (name, "complex(kind=16)") == 0
8285 || strcmp (name, "COMPLEX(16)") == 0
8286 || strcmp (name, "complex*32") == 0
8287 || strcmp (name, "COMPLEX*32") == 0
8288 || strcmp (name, "quad complex") == 0
8289 || strcmp (name, "real(kind=16)") == 0
8290 || strcmp (name, "real*16") == 0
8291 || strcmp (name, "REAL*16") == 0
8292 || strcmp (name, "REAL(16)") == 0)
8294
8296}
8297
8298/* Compute an XCR0 mask based on a target description. */
8299
8300static uint64_t
8302{
8303 if (! tdesc_has_registers (tdesc))
8304 return 0;
8305
8306 const struct tdesc_feature *feature_core;
8307
8308 const struct tdesc_feature *feature_sse, *feature_avx, *feature_mpx,
8309 *feature_avx512, *feature_pkeys;
8310
8311 /* Get core registers. */
8312 feature_core = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.core");
8313 if (feature_core == NULL)
8314 return 0;
8315
8316 /* Get SSE registers. */
8317 feature_sse = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.sse");
8318
8319 /* Try AVX registers. */
8320 feature_avx = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx");
8321
8322 /* Try MPX registers. */
8323 feature_mpx = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.mpx");
8324
8325 /* Try AVX512 registers. */
8326 feature_avx512 = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx512");
8327
8328 /* Try PKEYS */
8329 feature_pkeys = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.pkeys");
8330
8331 /* The XCR0 bits. */
8332 uint64_t xcr0 = X86_XSTATE_X87;
8333
8334 if (feature_sse)
8335 xcr0 |= X86_XSTATE_SSE;
8336
8337 if (feature_avx)
8338 {
8339 /* AVX register description requires SSE register description. */
8340 if (!feature_sse)
8341 return 0;
8342
8343 xcr0 |= X86_XSTATE_AVX;
8344 }
8345
8346 if (feature_mpx)
8347 xcr0 |= X86_XSTATE_MPX_MASK;
8348
8349 if (feature_avx512)
8350 {
8351 /* AVX512 register description requires AVX register description. */
8352 if (!feature_avx)
8353 return 0;
8354
8355 xcr0 |= X86_XSTATE_AVX512;
8356 }
8357
8358 if (feature_pkeys)
8359 xcr0 |= X86_XSTATE_PKRU;
8360
8361 return xcr0;
8362}
8363
8364static int
8367{
8368 const struct target_desc *tdesc = tdep->tdesc;
8369 const struct tdesc_feature *feature_core;
8370
8371 const struct tdesc_feature *feature_sse, *feature_avx, *feature_mpx,
8372 *feature_avx512, *feature_pkeys, *feature_segments;
8373 int i, num_regs, valid_p;
8374
8375 if (! tdesc_has_registers (tdesc))
8376 return 0;
8377
8378 /* Get core registers. */
8379 feature_core = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.core");
8380 if (feature_core == NULL)
8381 return 0;
8382
8383 /* Get SSE registers. */
8384 feature_sse = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.sse");
8385
8386 /* Try AVX registers. */
8387 feature_avx = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx");
8388
8389 /* Try MPX registers. */
8390 feature_mpx = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.mpx");
8391
8392 /* Try AVX512 registers. */
8393 feature_avx512 = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx512");
8394
8395 /* Try segment base registers. */
8396 feature_segments = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.segments");
8397
8398 /* Try PKEYS */
8399 feature_pkeys = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.pkeys");
8400
8401 valid_p = 1;
8402
8403 /* The XCR0 bits. */
8404 if (feature_avx512)
8405 {
8406 /* AVX512 register description requires AVX register description. */
8407 if (!feature_avx)
8408 return 0;
8409
8410 tdep->xcr0 = X86_XSTATE_AVX_AVX512_MASK;
8411
8412 /* It may have been set by OSABI initialization function. */
8413 if (tdep->k0_regnum < 0)
8414 {
8416 tdep->k0_regnum = I386_K0_REGNUM;
8417 }
8418
8419 for (i = 0; i < I387_NUM_K_REGS; i++)
8420 valid_p &= tdesc_numbered_register (feature_avx512, tdesc_data,
8421 tdep->k0_regnum + i,
8422 i386_k_names[i]);
8423
8424 if (tdep->num_zmm_regs == 0)
8425 {
8427 tdep->num_zmm_regs = 8;
8429 }
8430
8431 for (i = 0; i < tdep->num_zmm_regs; i++)
8432 valid_p &= tdesc_numbered_register (feature_avx512, tdesc_data,
8433 tdep->zmm0h_regnum + i,
8434 tdep->zmmh_register_names[i]);
8435
8436 for (i = 0; i < tdep->num_xmm_avx512_regs; i++)
8437 valid_p &= tdesc_numbered_register (feature_avx512, tdesc_data,
8438 tdep->xmm16_regnum + i,
8439 tdep->xmm_avx512_register_names[i]);
8440
8441 for (i = 0; i < tdep->num_ymm_avx512_regs; i++)
8442 valid_p &= tdesc_numbered_register (feature_avx512, tdesc_data,
8443 tdep->ymm16h_regnum + i,
8444 tdep->ymm16h_register_names[i]);
8445 }
8446 if (feature_avx)
8447 {
8448 /* AVX register description requires SSE register description. */
8449 if (!feature_sse)
8450 return 0;
8451
8452 if (!feature_avx512)
8453 tdep->xcr0 = X86_XSTATE_AVX_MASK;
8454
8455 /* It may have been set by OSABI initialization function. */
8456 if (tdep->num_ymm_regs == 0)
8457 {
8459 tdep->num_ymm_regs = 8;
8461 }
8462
8463 for (i = 0; i < tdep->num_ymm_regs; i++)
8464 valid_p &= tdesc_numbered_register (feature_avx, tdesc_data,
8465 tdep->ymm0h_regnum + i,
8466 tdep->ymmh_register_names[i]);
8467 }
8468 else if (feature_sse)
8469 tdep->xcr0 = X86_XSTATE_SSE_MASK;
8470 else
8471 {
8472 tdep->xcr0 = X86_XSTATE_X87_MASK;
8473 tdep->num_xmm_regs = 0;
8474 }
8475
8476 num_regs = tdep->num_core_regs;
8477 for (i = 0; i < num_regs; i++)
8478 valid_p &= tdesc_numbered_register (feature_core, tdesc_data, i,
8479 tdep->register_names[i]);
8480
8481 if (feature_sse)
8482 {
8483 /* Need to include %mxcsr, so add one. */
8484 num_regs += tdep->num_xmm_regs + 1;
8485 for (; i < num_regs; i++)
8486 valid_p &= tdesc_numbered_register (feature_sse, tdesc_data, i,
8487 tdep->register_names[i]);
8488 }
8489
8490 if (feature_mpx)
8491 {
8492 tdep->xcr0 |= X86_XSTATE_MPX_MASK;
8493
8494 if (tdep->bnd0r_regnum < 0)
8495 {
8499 }
8500
8501 for (i = 0; i < I387_NUM_MPX_REGS; i++)
8502 valid_p &= tdesc_numbered_register (feature_mpx, tdesc_data,
8503 I387_BND0R_REGNUM (tdep) + i,
8504 tdep->mpx_register_names[i]);
8505 }
8506
8507 if (feature_segments)
8508 {
8509 if (tdep->fsbase_regnum < 0)
8511 valid_p &= tdesc_numbered_register (feature_segments, tdesc_data,
8512 tdep->fsbase_regnum, "fs_base");
8513 valid_p &= tdesc_numbered_register (feature_segments, tdesc_data,
8514 tdep->fsbase_regnum + 1, "gs_base");
8515 }
8516
8517 if (feature_pkeys)
8518 {
8519 tdep->xcr0 |= X86_XSTATE_PKRU;
8520 if (tdep->pkru_regnum < 0)
8521 {
8524 tdep->num_pkeys_regs = 1;
8525 }
8526
8527 for (i = 0; i < I387_NUM_PKEYS_REGS; i++)
8528 valid_p &= tdesc_numbered_register (feature_pkeys, tdesc_data,
8529 I387_PKRU_REGNUM (tdep) + i,
8530 tdep->pkeys_register_names[i]);
8531 }
8532
8533 return valid_p;
8534}
8535
8536
8537
8538/* Implement the type_align gdbarch function. */
8539
8540static ULONGEST
8542{
8544
8545 if (gdbarch_ptr_bit (gdbarch) == 32)
8546 {
8547 if ((type->code () == TYPE_CODE_INT
8548 || type->code () == TYPE_CODE_FLT)
8549 && type->length () > 4)
8550 return 4;
8551
8552 /* Handle x86's funny long double. */
8553 if (type->code () == TYPE_CODE_FLT
8555 return 4;
8556 }
8557
8558 return 0;
8559}
8560
8561
8562/* Note: This is called for both i386 and amd64. */
8563
8564static struct gdbarch *
8566{
8567 const struct target_desc *tdesc;
8568 int mm0_regnum;
8569 int ymm0_regnum;
8570 int bnd0_regnum;
8571 int num_bnd_cooked;
8572
8573 x86_xsave_layout xsave_layout = target_fetch_x86_xsave_layout ();
8574
8575 /* If the target did not provide an XSAVE layout but the target
8576 description includes registers from the XSAVE extended region,
8577 use a fallback XSAVE layout. Specifically, this fallback layout
8578 is used when writing out a local core dump for a remote
8579 target. */
8580 if (xsave_layout.sizeof_xsave == 0)
8581 xsave_layout
8582 = i387_fallback_xsave_layout (i386_xcr0_from_tdesc (info.target_desc));
8583
8584 /* If there is already a candidate, use it. */
8586 arches != NULL;
8587 arches = gdbarch_list_lookup_by_info (arches->next, &info))
8588 {
8589 /* Check that the XSAVE layout of ARCHES matches the layout for
8590 the current target. */
8591 i386_gdbarch_tdep *other_tdep
8592 = gdbarch_tdep<i386_gdbarch_tdep> (arches->gdbarch);
8593
8594 if (other_tdep->xsave_layout == xsave_layout)
8595 return arches->gdbarch;
8596 }
8597
8598 /* Allocate space for the new architecture. Assume i386 for now. */
8601 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
8602
8603 /* General-purpose registers. */
8604 tdep->gregset_reg_offset = NULL;
8606 tdep->sizeof_gregset = 0;
8607
8608 /* Floating-point registers. */
8610 tdep->fpregset = &i386_fpregset;
8611
8612 /* The default settings include the FPU registers, the MMX registers
8613 and the SSE registers. This can be overridden for a specific ABI
8614 by adjusting the members `st0_regnum', `mm0_regnum' and
8615 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
8616 will show up in the output of "info all-registers". */
8617
8619
8620 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
8621 tdep->num_xmm_regs = I386_NUM_XREGS - 1;
8622
8623 tdep->jb_pc_offset = -1;
8624 tdep->struct_return = pcc_struct_return;
8625 tdep->sigtramp_start = 0;
8626 tdep->sigtramp_end = 0;
8628 tdep->sigcontext_addr = NULL;
8629 tdep->sc_reg_offset = NULL;
8630 tdep->sc_pc_offset = -1;
8631 tdep->sc_sp_offset = -1;
8632
8633 tdep->xsave_xcr0_offset = -1;
8634
8636
8638
8639 /* The format used for `long double' on almost all i386 targets is
8640 the i387 extended floating-point format. In fact, of all targets
8641 in the GCC 2.95 tree, only OSF/1 does it different, and insists
8642 on having a `long double' that's not `long' at all. */
8644
8645 /* Although the i387 extended floating-point has only 80 significant
8646 bits, a `long double' actually takes up 96, probably to enforce
8647 alignment. */
8649
8650 /* Support of bfloat16 format. */
8652
8653 /* Support for floating-point data type variants. */
8655
8656 /* Register numbers of various important registers. */
8661
8662 /* NOTE: kettenis/20040418: GCC does have two possible register
8663 numbering schemes on the i386: dbx and SVR4. These schemes
8664 differ in how they number %ebp, %esp, %eflags, and the
8665 floating-point registers, and are implemented by the arrays
8666 dbx_register_map[] and svr4_dbx_register_map in
8667 gcc/config/i386.c. GCC also defines a third numbering scheme in
8668 gcc/config/i386.c, which it designates as the "default" register
8669 map used in 64bit mode. This last register numbering scheme is
8670 implemented in dbx64_register_map, and is used for AMD64; see
8671 amd64-tdep.c.
8672
8673 Currently, each GCC i386 target always uses the same register
8674 numbering scheme across all its supported debugging formats
8675 i.e. SDB (COFF), stabs and DWARF 2. This is because
8676 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
8677 DBX_REGISTER_NUMBER macro which is defined by each target's
8678 respective config header in a manner independent of the requested
8679 output debugging format.
8680
8681 This does not match the arrangement below, which presumes that
8682 the SDB and stabs numbering schemes differ from the DWARF and
8683 DWARF 2 ones. The reason for this arrangement is that it is
8684 likely to get the numbering scheme for the target's
8685 default/native debug format right. For targets where GCC is the
8686 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
8687 targets where the native toolchain uses a different numbering
8688 scheme for a particular debug format (stabs-in-ELF on Solaris)
8689 the defaults below will have to be overridden, like
8690 i386_elf_init_abi() does. */
8691
8692 /* Use the dbx register numbering scheme for stabs and COFF. */
8695
8696 /* Use the SVR4 register numbering scheme for DWARF 2. */
8698
8699 /* We don't set gdbarch_stab_reg_to_regnum, since ECOFF doesn't seem to
8700 be in use on any of the supported i386 targets. */
8701
8703
8705
8706 /* Call dummy code. */
8711
8715
8717
8719
8720 /* Stack grows downward. */
8722
8723 set_gdbarch_breakpoint_kind_from_pc (gdbarch, i386_breakpoint::kind_from_pc);
8724 set_gdbarch_sw_breakpoint_from_kind (gdbarch, i386_breakpoint::bp_from_kind);
8725
8728
8730
8732
8734
8736
8737 /* Add the i386 register groups. */
8740
8741 /* Helper for function argument information. */
8743
8744 /* Hook the function epilogue frame unwinder. This unwinder is
8745 appended to the list first, so that it supersedes the DWARF
8746 unwinder in function epilogues (where the DWARF unwinder
8747 currently fails). */
8748 if (info.bfd_arch_info->bits_per_word == 32)
8750
8751 /* Hook in the DWARF CFI frame unwinder. This unwinder is appended
8752 to the list before the prologue-based unwinders, so that DWARF
8753 CFI info will be used if it is available. */
8755
8756 if (info.bfd_arch_info->bits_per_word == 32)
8758
8760
8761 /* Pseudo registers may be changed by amd64_init_abi. */
8767
8770
8771 /* Override the normal target description method to make the AVX
8772 upper halves anonymous. */
8774
8775 /* Even though the default ABI only includes general-purpose registers,
8776 floating-point registers and the SSE registers, we have to leave a
8777 gap for the upper AVX, MPX and AVX512 registers. */
8779
8781
8782 /* Get the x86 target description from INFO. */
8783 tdesc = info.target_desc;
8784 if (! tdesc_has_registers (tdesc))
8785 tdesc = i386_target_description (X86_XSTATE_SSE_MASK, false);
8786 tdep->tdesc = tdesc;
8787
8790
8791 /* No upper YMM registers. */
8792 tdep->ymmh_register_names = NULL;
8793 tdep->ymm0h_regnum = -1;
8794
8795 /* No upper ZMM registers. */
8796 tdep->zmmh_register_names = NULL;
8797 tdep->zmm0h_regnum = -1;
8798
8799 /* No high XMM registers. */
8800 tdep->xmm_avx512_register_names = NULL;
8801 tdep->xmm16_regnum = -1;
8802
8803 /* No upper YMM16-31 registers. */
8804 tdep->ymm16h_register_names = NULL;
8805 tdep->ymm16h_regnum = -1;
8806
8807 tdep->num_byte_regs = 8;
8808 tdep->num_word_regs = 8;
8809 tdep->num_dword_regs = 0;
8810 tdep->num_mmx_regs = 8;
8811 tdep->num_ymm_regs = 0;
8812
8813 /* No MPX registers. */
8814 tdep->bnd0r_regnum = -1;
8815 tdep->bndcfgu_regnum = -1;
8816
8817 /* No AVX512 registers. */
8818 tdep->k0_regnum = -1;
8819 tdep->num_zmm_regs = 0;
8820 tdep->num_ymm_avx512_regs = 0;
8821 tdep->num_xmm_avx512_regs = 0;
8822
8823 /* No PKEYS registers */
8824 tdep->pkru_regnum = -1;
8825 tdep->num_pkeys_regs = 0;
8826
8827 /* No segment base registers. */
8828 tdep->fsbase_regnum = -1;
8829
8831
8833
8835
8839
8840 /* Hook in ABI-specific overrides, if they have been registered.
8841 Note: If INFO specifies a 64 bit arch, this is where we turn
8842 a 32-bit i386 into a 64-bit amd64. */
8843 info.tdesc_data = tdesc_data.get ();
8845
8846 if (!i386_validate_tdesc_p (tdep, tdesc_data.get ()))
8847 {
8849 return NULL;
8850 }
8851 tdep->xsave_layout = xsave_layout;
8852
8853 num_bnd_cooked = (tdep->bnd0r_regnum > 0 ? I387_NUM_BND_REGS : 0);
8854
8855 /* Wire in pseudo registers. Number of pseudo registers may be
8856 changed. */
8858 + tdep->num_word_regs
8859 + tdep->num_dword_regs
8860 + tdep->num_mmx_regs
8861 + tdep->num_ymm_regs
8862 + num_bnd_cooked
8863 + tdep->num_ymm_avx512_regs
8864 + tdep->num_zmm_regs));
8865
8866 /* Target description may be changed. */
8867 tdesc = tdep->tdesc;
8868
8869 tdesc_use_registers (gdbarch, tdesc, std::move (tdesc_data));
8870
8871 /* Override gdbarch_register_reggroup_p set in tdesc_use_registers. */
8873
8874 /* Make %al the first pseudo-register. */
8876 tdep->ax_regnum = tdep->al_regnum + tdep->num_byte_regs;
8877
8878 ymm0_regnum = tdep->ax_regnum + tdep->num_word_regs;
8879 if (tdep->num_dword_regs)
8880 {
8881 /* Support dword pseudo-register if it hasn't been disabled. */
8882 tdep->eax_regnum = ymm0_regnum;
8883 ymm0_regnum += tdep->num_dword_regs;
8884 }
8885 else
8886 tdep->eax_regnum = -1;
8887
8888 mm0_regnum = ymm0_regnum;
8889 if (tdep->num_ymm_regs)
8890 {
8891 /* Support YMM pseudo-register if it is available. */
8892 tdep->ymm0_regnum = ymm0_regnum;
8893 mm0_regnum += tdep->num_ymm_regs;
8894 }
8895 else
8896 tdep->ymm0_regnum = -1;
8897
8898 if (tdep->num_ymm_avx512_regs)
8899 {
8900 /* Support YMM16-31 pseudo registers if available. */
8901 tdep->ymm16_regnum = mm0_regnum;
8902 mm0_regnum += tdep->num_ymm_avx512_regs;
8903 }
8904 else
8905 tdep->ymm16_regnum = -1;
8906
8907 if (tdep->num_zmm_regs)
8908 {
8909 /* Support ZMM pseudo-register if it is available. */
8910 tdep->zmm0_regnum = mm0_regnum;
8911 mm0_regnum += tdep->num_zmm_regs;
8912 }
8913 else
8914 tdep->zmm0_regnum = -1;
8915
8916 bnd0_regnum = mm0_regnum;
8917 if (tdep->num_mmx_regs != 0)
8918 {
8919 /* Support MMX pseudo-register if MMX hasn't been disabled. */
8920 tdep->mm0_regnum = mm0_regnum;
8921 bnd0_regnum += tdep->num_mmx_regs;
8922 }
8923 else
8924 tdep->mm0_regnum = -1;
8925
8926 if (tdep->bnd0r_regnum > 0)
8927 tdep->bnd0_regnum = bnd0_regnum;
8928 else
8929 tdep-> bnd0_regnum = -1;
8930
8931 /* Hook in the legacy prologue-based unwinders last (fallback). */
8932 if (info.bfd_arch_info->bits_per_word == 32)
8933 {
8937 }
8938
8939 /* If we have a register mapping, enable the generic core file
8940 support, unless it has already been enabled. */
8941 if (tdep->gregset_reg_offset
8945
8948
8949 return gdbarch;
8950}
8951
8952
8953
8954/* Return the target description for a specified XSAVE feature mask. */
8955
8956const struct target_desc *
8957i386_target_description (uint64_t xcr0, bool segments)
8958{
8959 static target_desc *i386_tdescs \
8960 [2/*SSE*/][2/*AVX*/][2/*MPX*/][2/*AVX512*/][2/*PKRU*/][2/*segments*/] = {};
8961 target_desc **tdesc;
8962
8963 tdesc = &i386_tdescs[(xcr0 & X86_XSTATE_SSE) ? 1 : 0]
8964 [(xcr0 & X86_XSTATE_AVX) ? 1 : 0]
8965 [(xcr0 & X86_XSTATE_MPX) ? 1 : 0]
8966 [(xcr0 & X86_XSTATE_AVX512) ? 1 : 0]
8967 [(xcr0 & X86_XSTATE_PKRU) ? 1 : 0]
8968 [segments ? 1 : 0];
8969
8970 if (*tdesc == NULL)
8971 *tdesc = i386_create_target_description (xcr0, false, segments);
8972
8973 return *tdesc;
8974}
8975
8976#define MPX_BASE_MASK (~(ULONGEST) 0xfff)
8977
8978/* Find the bound directory base address. */
8979
8980static unsigned long
8982{
8983 struct regcache *rcache;
8984 ULONGEST ret;
8985 enum register_status regstatus;
8986
8987 rcache = get_current_regcache ();
8988 gdbarch *arch = rcache->arch ();
8989 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (arch);
8990
8991 regstatus = regcache_raw_read_unsigned (rcache, tdep->bndcfgu_regnum, &ret);
8992
8993 if (regstatus != REG_VALID)
8994 error (_("BNDCFGU register invalid, read status %d."), regstatus);
8995
8996 return ret & MPX_BASE_MASK;
8997}
8998
8999int
9001{
9003 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (arch);
9004 const struct target_desc *tdesc = tdep->tdesc;
9005
9006 return (tdesc_find_feature (tdesc, "org.gnu.gdb.i386.mpx") != NULL);
9007}
9008
9009#define MPX_BD_MASK 0xfffffff00000ULL /* select bits [47:20] */
9010#define MPX_BT_MASK 0x0000000ffff8 /* select bits [19:3] */
9011#define MPX_BD_MASK_32 0xfffff000 /* select bits [31:12] */
9012#define MPX_BT_MASK_32 0x00000ffc /* select bits [11:2] */
9013
9014/* Find the bound table entry given the pointer location and the base
9015 address of the table. */
9016
9017static CORE_ADDR
9018i386_mpx_get_bt_entry (CORE_ADDR ptr, CORE_ADDR bd_base)
9019{
9020 CORE_ADDR offset1;
9021 CORE_ADDR offset2;
9022 CORE_ADDR mpx_bd_mask, bd_ptr_r_shift, bd_ptr_l_shift;
9023 CORE_ADDR bt_mask, bt_select_r_shift, bt_select_l_shift;
9024 CORE_ADDR bd_entry_addr;
9025 CORE_ADDR bt_addr;
9026 CORE_ADDR bd_entry;
9027 struct gdbarch *gdbarch = get_current_arch ();
9028 struct type *data_ptr_type = builtin_type (gdbarch)->builtin_data_ptr;
9029
9030
9031 if (gdbarch_ptr_bit (gdbarch) == 64)
9032 {
9033 mpx_bd_mask = (CORE_ADDR) MPX_BD_MASK;
9034 bd_ptr_r_shift = 20;
9035 bd_ptr_l_shift = 3;
9036 bt_select_r_shift = 3;
9037 bt_select_l_shift = 5;
9038 bt_mask = (CORE_ADDR) MPX_BT_MASK;
9039
9040 if ( sizeof (CORE_ADDR) == 4)
9041 error (_("bound table examination not supported\
9042 for 64-bit process with 32-bit GDB"));
9043 }
9044 else
9045 {
9046 mpx_bd_mask = MPX_BD_MASK_32;
9047 bd_ptr_r_shift = 12;
9048 bd_ptr_l_shift = 2;
9049 bt_select_r_shift = 2;
9050 bt_select_l_shift = 4;
9051 bt_mask = MPX_BT_MASK_32;
9052 }
9053
9054 offset1 = ((ptr & mpx_bd_mask) >> bd_ptr_r_shift) << bd_ptr_l_shift;
9055 bd_entry_addr = bd_base + offset1;
9056 bd_entry = read_memory_typed_address (bd_entry_addr, data_ptr_type);
9057
9058 if ((bd_entry & 0x1) == 0)
9059 error (_("Invalid bounds directory entry at %s."),
9060 paddress (get_current_arch (), bd_entry_addr));
9061
9062 /* Clearing status bit. */
9063 bd_entry--;
9064 bt_addr = bd_entry & ~bt_select_r_shift;
9065 offset2 = ((ptr & bt_mask) >> bt_select_r_shift) << bt_select_l_shift;
9066
9067 return bt_addr + offset2;
9068}
9069
9070/* Print routine for the mpx bounds. */
9071
9072static void
9073i386_mpx_print_bounds (const CORE_ADDR bt_entry[4])
9074{
9075 struct ui_out *uiout = current_uiout;
9076 LONGEST size;
9077 struct gdbarch *gdbarch = get_current_arch ();
9078 CORE_ADDR onecompl = ~((CORE_ADDR) 0);
9079 int bounds_in_map = ((~bt_entry[1] == 0 && bt_entry[0] == onecompl) ? 1 : 0);
9080
9081 if (bounds_in_map == 1)
9082 {
9083 uiout->text ("Null bounds on map:");
9084 uiout->text (" pointer value = ");
9085 uiout->field_core_addr ("pointer-value", gdbarch, bt_entry[2]);
9086 uiout->text (".");
9087 uiout->text ("\n");
9088 }
9089 else
9090 {
9091 uiout->text ("{lbound = ");
9092 uiout->field_core_addr ("lower-bound", gdbarch, bt_entry[0]);
9093 uiout->text (", ubound = ");
9094
9095 /* The upper bound is stored in 1's complement. */
9096 uiout->field_core_addr ("upper-bound", gdbarch, ~bt_entry[1]);
9097 uiout->text ("}: pointer value = ");
9098 uiout->field_core_addr ("pointer-value", gdbarch, bt_entry[2]);
9099
9100 if (gdbarch_ptr_bit (gdbarch) == 64)
9101 size = ( (~(int64_t) bt_entry[1]) - (int64_t) bt_entry[0]);
9102 else
9103 size = ( ~((int32_t) bt_entry[1]) - (int32_t) bt_entry[0]);
9104
9105 /* In case the bounds are 0x0 and 0xffff... the difference will be -1.
9106 -1 represents in this sense full memory access, and there is no need
9107 one to the size. */
9108
9109 size = (size > -1 ? size + 1 : size);
9110 uiout->text (", size = ");
9111 uiout->field_string ("size", plongest (size));
9112
9113 uiout->text (", metadata = ");
9114 uiout->field_core_addr ("metadata", gdbarch, bt_entry[3]);
9115 uiout->text ("\n");
9116 }
9117}
9118
9119/* Implement the command "show mpx bound". */
9120
9121static void
9122i386_mpx_info_bounds (const char *args, int from_tty)
9123{
9124 CORE_ADDR bd_base = 0;
9125 CORE_ADDR addr;
9126 CORE_ADDR bt_entry_addr = 0;
9127 CORE_ADDR bt_entry[4];
9128 int i;
9129 struct gdbarch *gdbarch = get_current_arch ();
9130 struct type *data_ptr_type = builtin_type (gdbarch)->builtin_data_ptr;
9131
9132 if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_i386
9133 || !i386_mpx_enabled ())
9134 {
9135 gdb_printf (_("Intel Memory Protection Extensions not "
9136 "supported on this target.\n"));
9137 return;
9138 }
9139
9140 if (args == NULL)
9141 {
9142 gdb_printf (_("Address of pointer variable expected.\n"));
9143 return;
9144 }
9145
9146 addr = parse_and_eval_address (args);
9147
9148 bd_base = i386_mpx_bd_base ();
9149 bt_entry_addr = i386_mpx_get_bt_entry (addr, bd_base);
9150
9151 memset (bt_entry, 0, sizeof (bt_entry));
9152
9153 for (i = 0; i < 4; i++)
9154 bt_entry[i] = read_memory_typed_address (bt_entry_addr
9155 + i * data_ptr_type->length (),
9156 data_ptr_type);
9157
9158 i386_mpx_print_bounds (bt_entry);
9159}
9160
9161/* Implement the command "set mpx bound". */
9162
9163static void
9164i386_mpx_set_bounds (const char *args, int from_tty)
9165{
9166 CORE_ADDR bd_base = 0;
9167 CORE_ADDR addr, lower, upper;
9168 CORE_ADDR bt_entry_addr = 0;
9169 CORE_ADDR bt_entry[2];
9170 const char *input = args;
9171 int i;
9172 struct gdbarch *gdbarch = get_current_arch ();
9173 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
9174 struct type *data_ptr_type = builtin_type (gdbarch)->builtin_data_ptr;
9175
9176 if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_i386
9177 || !i386_mpx_enabled ())
9178 error (_("Intel Memory Protection Extensions not supported\
9179 on this target."));
9180
9181 if (args == NULL)
9182 error (_("Pointer value expected."));
9183
9184 addr = value_as_address (parse_to_comma_and_eval (&input));
9185
9186 if (input[0] == ',')
9187 ++input;
9188 if (input[0] == '\0')
9189 error (_("wrong number of arguments: missing lower and upper bound."));
9190 lower = value_as_address (parse_to_comma_and_eval (&input));
9191
9192 if (input[0] == ',')
9193 ++input;
9194 if (input[0] == '\0')
9195 error (_("Wrong number of arguments; Missing upper bound."));
9196 upper = value_as_address (parse_to_comma_and_eval (&input));
9197
9198 bd_base = i386_mpx_bd_base ();
9199 bt_entry_addr = i386_mpx_get_bt_entry (addr, bd_base);
9200 for (i = 0; i < 2; i++)
9201 bt_entry[i] = read_memory_typed_address (bt_entry_addr
9202 + i * data_ptr_type->length (),
9203 data_ptr_type);
9204 bt_entry[0] = (uint64_t) lower;
9205 bt_entry[1] = ~(uint64_t) upper;
9206
9207 for (i = 0; i < 2; i++)
9208 write_memory_unsigned_integer (bt_entry_addr
9209 + i * data_ptr_type->length (),
9210 data_ptr_type->length (), byte_order,
9211 bt_entry[i]);
9212}
9213
9215
9216void _initialize_i386_tdep ();
9217void
9219{
9220 gdbarch_register (bfd_arch_i386, i386_gdbarch_init);
9221
9222 /* Add the variable that controls the disassembly flavor. */
9223 add_setshow_enum_cmd ("disassembly-flavor", no_class, valid_flavors,
9224 &disassembly_flavor, _("\
9225Set the disassembly flavor."), _("\
9226Show the disassembly flavor."), _("\
9227The valid values are \"att\" and \"intel\", and the default value is \"att\"."),
9228 NULL,
9229 NULL, /* FIXME: i18n: */
9230 &setlist, &showlist);
9231
9232 /* Add the variable that controls the convention for returning
9233 structs. */
9234 add_setshow_enum_cmd ("struct-convention", no_class, valid_conventions,
9235 &struct_convention, _("\
9236Set the convention for returning small structs."), _("\
9237Show the convention for returning small structs."), _("\
9238Valid values are \"default\", \"pcc\" and \"reg\", and the default value\n\
9239is \"default\"."),
9240 NULL,
9241 NULL, /* FIXME: i18n: */
9242 &setlist, &showlist);
9243
9244 /* Add "mpx" prefix for the set and show commands. */
9245
9247 ("mpx", class_support,
9248 _("Set Intel Memory Protection Extensions specific variables."),
9249 _("Show Intel Memory Protection Extensions specific variables."),
9251
9252 /* Add "bound" command for the show mpx commands list. */
9253
9255 "Show the memory bounds for a given array/pointer storage\
9256 in the bound table.",
9258
9259 /* Add "bound" command for the set mpx commands list. */
9260
9262 "Set the memory bounds for a given array/pointer storage\
9263 in the bound table.",
9265
9266 gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_SVR4,
9268
9269 /* Initialize the i386-specific register groups. */
9271
9272 /* Tell remote stub that we support XML target description. */
9274}
int regnum
const char *const name
int code
Definition ada-lex.l:670
void gdbarch_register(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init, gdbarch_dump_tdep_ftype *dump_tdep, gdbarch_supports_arch_info_ftype *supports_arch_info)
void gdbarch_free(struct gdbarch *arch)
int default_print_insn(bfd_vma memaddr, disassemble_info *info)
const struct floatformat ** default_floatformat_for_type(struct gdbarch *gdbarch, const char *name, int len)
Definition arch-utils.c:289
struct gdbarch * get_current_arch(void)
Definition arch-utils.c:846
struct gdbarch * target_gdbarch(void)
static std::vector< const char * > arches
Definition arch-utils.c:685
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
Definition arch-utils.c:177
struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
#define BP_MANIPULATION(BREAK_INSN)
Definition arch-utils.h:70
@ pcc_struct_return
Definition arm-tdep.h:85
@ axs_lvalue_memory
Definition ax-gdb.h:62
void ax_reg_mask(struct agent_expr *ax, int reg)
Definition ax-general.c:397
void ax_simple(struct agent_expr *x, enum agent_op op)
Definition ax-general.c:82
void ax_const_l(struct agent_expr *x, LONGEST l)
Definition ax-general.c:182
void ax_reg(struct agent_expr *x, int reg)
Definition ax-general.c:227
bool find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr, const struct block **block)
Definition blockframe.c:373
enum register_status raw_read(int regnum, gdb_byte *buf)
Definition regcache.c:611
gdbarch * arch() const
Definition regcache.c:231
void raw_collect(int regnum, void *buf) const override
Definition regcache.c:1127
void raw_supply(int regnum, const void *buf) override
Definition regcache.c:1062
void cooked_write(int regnum, const gdb_byte *buf)
Definition regcache.c:870
void raw_write_part(int regnum, int offset, int len, const gdb_byte *buf)
Definition regcache.c:1032
void raw_write(int regnum, const gdb_byte *buf)
Definition regcache.c:833
void * get(unsigned key)
Definition registry.h:211
void field_core_addr(const char *fldname, struct gdbarch *gdbarch, CORE_ADDR address)
Definition ui-out.c:478
void field_string(const char *fldname, const char *string, const ui_file_style &style=ui_file_style())
Definition ui-out.c:511
void text(const char *string)
Definition ui-out.c:566
struct cmd_list_element * showlist
Definition cli-cmds.c:127
struct cmd_list_element * setlist
Definition cli-cmds.c:119
struct cmd_list_element * add_cmd(const char *name, enum command_class theclass, const char *doc, struct cmd_list_element **list)
Definition cli-decode.c:233
set_show_commands add_setshow_enum_cmd(const char *name, enum command_class theclass, const char *const *enumlist, const char **var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
Definition cli-decode.c:688
set_show_commands add_setshow_prefix_cmd(const char *name, command_class theclass, const char *set_doc, const char *show_doc, cmd_list_element **set_subcommands_list, cmd_list_element **show_subcommands_list, cmd_list_element **set_list, cmd_list_element **show_list)
Definition cli-decode.c:428
@ class_support
Definition command.h:58
@ no_class
Definition command.h:53
void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
Definition corefile.c:347
CORE_ADDR read_memory_typed_address(CORE_ADDR addr, struct type *type)
Definition corefile.c:336
ULONGEST read_memory_unsigned_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
Definition corefile.c:306
void write_memory_unsigned_integer(CORE_ADDR addr, int len, enum bfd_endian byte_order, ULONGEST value)
Definition corefile.c:380
void read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition corefile.c:238
LONGEST read_memory_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
Definition corefile.c:296
ULONGEST read_code_unsigned_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
Definition corefile.c:326
void read_code(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition corefile.c:254
LONGEST read_code_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
Definition corefile.c:316
static void store_signed_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, LONGEST val)
Definition defs.h:508
static void store_unsigned_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, ULONGEST val)
Definition defs.h:515
CORE_ADDR extract_typed_address(const gdb_byte *buf, struct type *type)
Definition findvar.c:152
@ lval_register
Definition defs.h:365
static LONGEST extract_signed_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
Definition defs.h:465
static ULONGEST extract_unsigned_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
Definition defs.h:480
return_value_convention
Definition defs.h:257
@ RETURN_VALUE_ABI_RETURNS_ADDRESS
Definition defs.h:273
@ RETURN_VALUE_REGISTER_CONVENTION
Definition defs.h:260
int gdb_buffered_insn_length(struct gdbarch *gdbarch, const gdb_byte *insn, int max_len, CORE_ADDR addr)
Definition disasm.c:1281
int gdb_insn_length(struct gdbarch *gdbarch, CORE_ADDR addr)
Definition disasm.c:1230
#define displaced_debug_printf(fmt,...)
std::unique_ptr< displaced_step_copy_insn_closure > displaced_step_copy_insn_closure_up
void dwarf2_append_unwinders(struct gdbarch *gdbarch)
Definition frame.c:1369
struct value * parse_to_comma_and_eval(const char **expp)
Definition eval.c:82
CORE_ADDR parse_and_eval_address(const char *exp)
Definition eval.c:52
void frame_base_set_default(struct gdbarch *gdbarch, const struct frame_base *default_base)
Definition frame-base.c:93
int default_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
struct value * frame_unwind_got_memory(frame_info_ptr frame, int regnum, CORE_ADDR addr)
struct value * frame_unwind_got_register(frame_info_ptr frame, int regnum, int new_regnum)
struct value * frame_unwind_got_constant(frame_info_ptr frame, int regnum, ULONGEST val)
void frame_unwind_append_unwinder(struct gdbarch *gdbarch, const struct frame_unwind *unwinder)
int frame_relative_level(frame_info_ptr fi)
Definition frame.c:2946
ULONGEST get_frame_register_unsigned(frame_info_ptr frame, int regnum)
Definition frame.c:1399
CORE_ADDR get_frame_pc(frame_info_ptr frame)
Definition frame.c:2712
void get_frame_register(frame_info_ptr frame, int regnum, gdb_byte *buf)
Definition frame.c:1263
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
Definition frame.c:736
struct gdbarch * get_frame_arch(frame_info_ptr this_frame)
Definition frame.c:3027
void frame_unwind_register(frame_info_ptr next_frame, int regnum, gdb_byte *buf)
Definition frame.c:1243
struct frame_id frame_id_build_unavailable_stack(CORE_ADDR code_addr)
Definition frame.c:709
CORE_ADDR get_frame_func(frame_info_ptr this_frame)
Definition frame.c:1098
bool get_frame_register_bytes(frame_info_ptr frame, int regnum, CORE_ADDR offset, gdb::array_view< gdb_byte > buffer, int *optimizedp, int *unavailablep)
Definition frame.c:1480
bool deprecated_frame_register_read(frame_info_ptr frame, int regnum, gdb_byte *myaddr)
Definition frame.c:1464
void put_frame_register(frame_info_ptr frame, int regnum, const gdb_byte *buf)
Definition frame.c:1426
@ SIGTRAMP_FRAME
Definition frame.h:198
@ NORMAL_FRAME
Definition frame.h:187
unwind_stop_reason
Definition frame.h:653
#define FRAME_OBSTACK_ZALLOC(TYPE)
Definition frame.h:825
void set_gdbarch_stab_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_stab_reg_to_regnum_ftype *stab_reg_to_regnum)
void set_gdbarch_insn_is_jump(struct gdbarch *gdbarch, gdbarch_insn_is_jump_ftype *insn_is_jump)
int gdbarch_pc_regnum(struct gdbarch *gdbarch)
Definition gdbarch.c:2054
void set_gdbarch_unwind_pc(struct gdbarch *gdbarch, gdbarch_unwind_pc_ftype *unwind_pc)
void set_gdbarch_return_value_as_value(struct gdbarch *gdbarch, gdbarch_return_value_as_value_ftype *return_value_as_value)
void set_gdbarch_fetch_pointer_argument(struct gdbarch *gdbarch, gdbarch_fetch_pointer_argument_ftype *fetch_pointer_argument)
void set_gdbarch_ps_regnum(struct gdbarch *gdbarch, int ps_regnum)
Definition gdbarch.c:2081
void set_gdbarch_register_to_value(struct gdbarch *gdbarch, gdbarch_register_to_value_ftype *register_to_value)
void set_gdbarch_gen_return_address(struct gdbarch *gdbarch, gdbarch_gen_return_address_ftype *gen_return_address)
enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
Definition gdbarch.c:1396
void set_gdbarch_value_to_register(struct gdbarch *gdbarch, gdbarch_value_to_register_ftype *value_to_register)
void set_gdbarch_stap_parse_special_token(struct gdbarch *gdbarch, gdbarch_stap_parse_special_token_ftype *stap_parse_special_token)
void set_gdbarch_stap_integer_prefixes(struct gdbarch *gdbarch, const char *const *stap_integer_prefixes)
Definition gdbarch.c:4560
void set_gdbarch_breakpoint_kind_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_kind_from_pc_ftype *breakpoint_kind_from_pc)
void set_gdbarch_pseudo_register_read_value(struct gdbarch *gdbarch, gdbarch_pseudo_register_read_value_ftype *pseudo_register_read_value)
void set_gdbarch_frame_align(struct gdbarch *gdbarch, gdbarch_frame_align_ftype *frame_align)
void set_gdbarch_max_insn_length(struct gdbarch *gdbarch, ULONGEST max_insn_length)
Definition gdbarch.c:4093
void set_gdbarch_get_longjmp_target(struct gdbarch *gdbarch, gdbarch_get_longjmp_target_ftype *get_longjmp_target)
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype *skip_prologue)
void set_gdbarch_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype *register_name)
void set_gdbarch_push_dummy_code(struct gdbarch *gdbarch, gdbarch_push_dummy_code_ftype *push_dummy_code)
void set_gdbarch_skip_trampoline_code(struct gdbarch *gdbarch, gdbarch_skip_trampoline_code_ftype *skip_trampoline_code)
void set_gdbarch_bfloat16_format(struct gdbarch *gdbarch, const struct floatformat **bfloat16_format)
Definition gdbarch.c:1527
void set_gdbarch_stap_is_single_operand(struct gdbarch *gdbarch, gdbarch_stap_is_single_operand_ftype *stap_is_single_operand)
void set_gdbarch_decr_pc_after_break(struct gdbarch *gdbarch, CORE_ADDR decr_pc_after_break)
Definition gdbarch.c:2913
void set_gdbarch_gnu_triplet_regexp(struct gdbarch *gdbarch, gdbarch_gnu_triplet_regexp_ftype *gnu_triplet_regexp)
int gdbarch_num_regs(struct gdbarch *gdbarch)
Definition gdbarch.c:1930
void set_gdbarch_fp0_regnum(struct gdbarch *gdbarch, int fp0_regnum)
Definition gdbarch.c:2098
void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype *inner_than)
void set_gdbarch_stap_register_indirection_prefixes(struct gdbarch *gdbarch, const char *const *stap_register_indirection_prefixes)
Definition gdbarch.c:4628
void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
Definition gdbarch.c:2047
void set_gdbarch_register_reggroup_p(struct gdbarch *gdbarch, gdbarch_register_reggroup_p_ftype *register_reggroup_p)
void set_gdbarch_ax_pseudo_register_collect(struct gdbarch *gdbarch, gdbarch_ax_pseudo_register_collect_ftype *ax_pseudo_register_collect)
void set_gdbarch_long_double_format(struct gdbarch *gdbarch, const struct floatformat **long_double_format)
Definition gdbarch.c:1663
void set_gdbarch_pc_regnum(struct gdbarch *gdbarch, int pc_regnum)
Definition gdbarch.c:2064
void set_gdbarch_call_dummy_location(struct gdbarch *gdbarch, enum call_dummy_location_type call_dummy_location)
Definition gdbarch.c:2279
void set_gdbarch_print_insn(struct gdbarch *gdbarch, gdbarch_print_insn_ftype *print_insn)
int gdbarch_long_double_bit(struct gdbarch *gdbarch)
Definition gdbarch.c:1636
void set_gdbarch_pseudo_register_write(struct gdbarch *gdbarch, gdbarch_pseudo_register_write_ftype *pseudo_register_write)
void set_gdbarch_num_pseudo_regs(struct gdbarch *gdbarch, int num_pseudo_regs)
Definition gdbarch.c:1958
void set_gdbarch_dwarf2_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_dwarf2_reg_to_regnum_ftype *dwarf2_reg_to_regnum)
bool gdbarch_iterate_over_regset_sections_p(struct gdbarch *gdbarch)
Definition gdbarch.c:3711
void set_gdbarch_insn_is_ret(struct gdbarch *gdbarch, gdbarch_insn_is_ret_ftype *insn_is_ret)
void set_gdbarch_convert_register_p(struct gdbarch *gdbarch, gdbarch_convert_register_p_ftype *convert_register_p)
void set_gdbarch_type_align(struct gdbarch *gdbarch, gdbarch_type_align_ftype *type_align)
void set_gdbarch_fast_tracepoint_valid_at(struct gdbarch *gdbarch, gdbarch_fast_tracepoint_valid_at_ftype *fast_tracepoint_valid_at)
void set_gdbarch_insn_is_call(struct gdbarch *gdbarch, gdbarch_insn_is_call_ftype *insn_is_call)
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
Definition gdbarch.c:1941
const struct bfd_arch_info * gdbarch_bfd_arch_info(struct gdbarch *gdbarch)
Definition gdbarch.c:1387
void set_gdbarch_long_double_bit(struct gdbarch *gdbarch, int long_double_bit)
Definition gdbarch.c:1646
void set_gdbarch_sw_breakpoint_from_kind(struct gdbarch *gdbarch, gdbarch_sw_breakpoint_from_kind_ftype *sw_breakpoint_from_kind)
int gdbarch_ptr_bit(struct gdbarch *gdbarch)
Definition gdbarch.c:1722
void set_gdbarch_sdb_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_sdb_reg_to_regnum_ftype *sdb_reg_to_regnum)
void set_gdbarch_stap_register_prefixes(struct gdbarch *gdbarch, const char *const *stap_register_prefixes)
Definition gdbarch.c:4594
void set_gdbarch_dummy_id(struct gdbarch *gdbarch, gdbarch_dummy_id_ftype *dummy_id)
void set_gdbarch_relocate_instruction(struct gdbarch *gdbarch, gdbarch_relocate_instruction_ftype *relocate_instruction)
void set_gdbarch_print_float_info(struct gdbarch *gdbarch, gdbarch_print_float_info_ftype *print_float_info)
void set_gdbarch_stap_register_indirection_suffixes(struct gdbarch *gdbarch, const char *const *stap_register_indirection_suffixes)
Definition gdbarch.c:4645
ULONGEST gdbarch_max_insn_length(struct gdbarch *gdbarch)
Definition gdbarch.c:4082
void set_gdbarch_floatformat_for_type(struct gdbarch *gdbarch, gdbarch_floatformat_for_type_ftype *floatformat_for_type)
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype *push_dummy_call)
void set_gdbarch_in_indirect_branch_thunk(struct gdbarch *gdbarch, gdbarch_in_indirect_branch_thunk_ftype *in_indirect_branch_thunk)
void set_gdbarch_iterate_over_regset_sections(struct gdbarch *gdbarch, gdbarch_iterate_over_regset_sections_ftype *iterate_over_regset_sections)
void set_gdbarch_stap_adjust_register(struct gdbarch *gdbarch, gdbarch_stap_adjust_register_ftype *stap_adjust_register)
void set_gdbarch_frame_args_skip(struct gdbarch *gdbarch, CORE_ADDR frame_args_skip)
Definition gdbarch.c:3012
struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, gdbarch_tdep_up tdep)
Definition gdbarch.c:266
std::unique_ptr< gdbarch_tdep_base > gdbarch_tdep_up
Definition gdbarch.h:73
void iterate_over_regset_sections_cb(const char *sect_name, int supply_size, int collect_size, const struct regset *regset, const char *human_name, void *cb_data)
Definition gdbarch.h:104
@ ON_STACK
Definition gdbarch.h:157
static int gdbarch_num_cooked_regs(gdbarch *arch)
Definition gdbarch.h:390
function_call_return_method
Definition gdbarch.h:114
@ return_method_struct
Definition gdbarch.h:126
struct type * lookup_pointer_type(struct type *type)
Definition gdbtypes.c:430
struct type * arch_composite_type(struct gdbarch *gdbarch, const char *name, enum type_code code)
Definition gdbtypes.c:5734
const struct floatformat * floatformats_ieee_quad[BFD_ENDIAN_UNKNOWN]
Definition gdbtypes.c:93
struct type * init_vector_type(struct type *elt_type, int n)
Definition gdbtypes.c:1491
const struct floatformat * floatformats_bfloat16[BFD_ENDIAN_UNKNOWN]
Definition gdbtypes.c:129
const struct builtin_type * builtin_type(struct gdbarch *gdbarch)
Definition gdbtypes.c:6168
void append_composite_type_field(struct type *t, const char *name, struct type *field)
Definition gdbtypes.c:5810
const struct floatformat * floatformats_i387_ext[BFD_ENDIAN_UNKNOWN]
Definition gdbtypes.c:101
struct type * check_typedef(struct type *type)
Definition gdbtypes.c:2966
#define TYPE_HAS_DYNAMIC_LENGTH(t)
Definition gdbtypes.h:151
type_code
Definition gdbtypes.h:82
mach_port_t mach_port_t name mach_port_t mach_port_t name kern_return_t int status
Definition gnu-nat.c:1790
unsigned short offset1
Definition go32-nat.c:7
size_t size
Definition go32-nat.c:239
static void append_insns(CORE_ADDR *to, ULONGEST len, const gdb_byte *buf)
Definition i386-tdep.c:962
int i386_svr4_reg_to_regnum(struct gdbarch *gdbarch, int reg)
Definition i386-tdep.c:578
void i386_iterate_over_regset_sections(struct gdbarch *gdbarch, iterate_over_regset_sections_cb *cb, void *cb_data, const struct regcache *regcache)
Definition i386-tdep.c:4055
bool i386_pkru_regnum_p(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:427
static CORE_ADDR i386_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
Definition i386-tdep.c:2884
#define PREFIX_DATA
Definition i386-tdep.c:4723
static struct value * i386_frame_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
Definition i386-tdep.c:2140
static CORE_ADDR i386_analyze_struct_return(CORE_ADDR pc, CORE_ADDR current_pc, struct i386_frame_cache *cache)
Definition i386-tdep.c:1161
int i386_sigtramp_p(frame_info_ptr this_frame)
Definition i386-tdep.c:4104
int i386_bnd_regnum_p(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:317
static int i386_mmx_regnum_p(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:170
static int i386_match_insn_block(CORE_ADDR pc, struct i386_insn *insn_patterns)
Definition i386-tdep.c:1435
static struct frame_id i386_dummy_id(struct gdbarch *gdbarch, frame_info_ptr this_frame)
Definition i386-tdep.c:2625
static struct cmd_list_element * mpx_show_cmdlist
Definition i386-tdep.c:9214
#define I386_MAX_MATCHED_INSN_LEN
Definition i386-tdep.c:1371
static int i386_stack_frame_destroyed_p(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition i386-tdep.c:2219
static enum unwind_stop_reason i386_frame_unwind_stop_reason(frame_info_ptr this_frame, void **this_cache)
Definition i386-tdep.c:2124
static CORE_ADDR i386_push_dummy_code(struct gdbarch *gdbarch, CORE_ADDR sp, CORE_ADDR funaddr, struct value **args, int nargs, struct type *value_type, CORE_ADDR *real_pc, CORE_ADDR *bp_addr, struct regcache *regcache)
Definition i386-tdep.c:2713
int i386_fp_regnum_p(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:373
int i386_zmm_regnum_p(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:235
struct type * i387_ext_type(struct gdbarch *gdbarch)
Definition i386-tdep.c:3152
const char * i386_pseudo_register_name(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:463
static const reggroup * i386_mmx_reggroup
Definition i386-tdep.c:4587
static int i386_call_p(const gdb_byte *insn)
Definition i386-tdep.c:732
int i386_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *group)
Definition i386-tdep.c:4604
#define HIGH_RETURN_REGNUM
Definition i386-tdep.c:2899
const struct regset i386_fpregset
Definition i386-tdep.c:4047
static CORE_ADDR i386_frame_align(struct gdbarch *gdbarch, CORE_ADDR sp)
Definition i386-tdep.c:2639
static int i386_absolute_call_p(const gdb_byte *insn)
Definition i386-tdep.c:694
static ULONGEST i386_type_align(struct gdbarch *gdbarch, struct type *type)
Definition i386-tdep.c:8541
static CORE_ADDR i386_frame_base_address(frame_info_ptr this_frame, void **this_cache)
Definition i386-tdep.c:2609
#define I386_SAVE_FPU_REGS
Definition i386-tdep.c:5040
static int i386_validate_tdesc_p(i386_gdbarch_tdep *tdep, struct tdesc_arch_data *tdesc_data)
Definition i386-tdep.c:8365
static int i386_fast_tracepoint_valid_at(struct gdbarch *gdbarch, CORE_ADDR addr, std::string *msg)
Definition i386-tdep.c:8225
static int i386_mpx_ctrl_regnum_p(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:413
int i386_process_record(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR input_addr)
Definition i386-tdep.c:5112
int i386_stap_is_single_operand(struct gdbarch *gdbarch, const char *s)
Definition i386-tdep.c:4174
static const char *const i386_ymmh_names[]
Definition i386-tdep.c:114
static int i386_jmp_p(const gdb_byte *insn)
Definition i386-tdep.c:680
static const char *const i386_zmm_names[]
Definition i386-tdep.c:90
static struct gdbarch * i386_gdbarch_init(struct gdbarch_info info, struct gdbarch_list *arches)
Definition i386-tdep.c:8565
static CORE_ADDR i386_mpx_get_bt_entry(CORE_ADDR ptr, CORE_ADDR bd_base)
Definition i386-tdep.c:9018
static int i386_convert_register_p(struct gdbarch *gdbarch, int regnum, struct type *type)
Definition i386-tdep.c:3850
static void i386_mpx_info_bounds(const char *args, int from_tty)
Definition i386-tdep.c:9122
static void i386_mpx_print_bounds(const CORE_ADDR bt_entry[4])
Definition i386-tdep.c:9073
static const char *const i386_k_names[]
Definition i386-tdep.c:102
static int i386_record_lea_modrm_addr(struct i386_record_s *irp, uint64_t *addr)
Definition i386-tdep.c:4791
#define PREFIX_ADDR
Definition i386-tdep.c:4724
static enum unwind_stop_reason i386_epilogue_frame_unwind_stop_reason(frame_info_ptr this_frame, void **this_cache)
Definition i386-tdep.c:2318
void i386_svr4_init_abi(struct gdbarch_info info, struct gdbarch *gdbarch)
Definition i386-tdep.c:4563
static struct i386_frame_cache * i386_frame_cache(frame_info_ptr this_frame, void **this_cache)
Definition i386-tdep.c:2081
static void i386_collect_gregset(const struct regset *regset, const struct regcache *regcache, int regnum, void *gregs, size_t len)
Definition i386-tdep.c:3977
static void i386_store_return_value(struct gdbarch *gdbarch, struct type *type, struct regcache *regcache, const gdb_byte *valbuf)
Definition i386-tdep.c:2962
static CORE_ADDR i386_analyze_stack_align(CORE_ADDR pc, CORE_ADDR current_pc, struct i386_frame_cache *cache)
Definition i386-tdep.c:1260
static const char *const i386_mpx_names[]
Definition i386-tdep.c:120
@ OT_QUAD
Definition i386-tdep.c:4732
@ OT_BYTE
Definition i386-tdep.c:4729
@ OT_WORD
Definition i386-tdep.c:4730
@ OT_DQUAD
Definition i386-tdep.c:4733
@ OT_LONG
Definition i386-tdep.c:4731
static i386_insn i386_frame_setup_skip_insns[]
Definition i386-tdep.c:1473
static const char *const i386_mmx_names[]
Definition i386-tdep.c:139
static int i386_record_push(struct i386_record_s *irp, int size)
Definition i386-tdep.c:5022
static CORE_ADDR i386_skip_noop(CORE_ADDR pc)
Definition i386-tdep.c:1543
static CORE_ADDR i386_skip_endbr(CORE_ADDR pc)
Definition i386-tdep.c:1524
int i386_dword_regnum_p(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:207
static std::string i386_stap_adjust_register(struct gdbarch *gdbarch, struct stap_parse_info *p, const std::string &regname, int regnum)
Definition i386-tdep.c:4486
static int i386_print_insn(bfd_vma pc, struct disassemble_info *info)
Definition i386-tdep.c:4118
static void i386_init_reggroups(void)
Definition i386-tdep.c:4590
static void i386_relocate_instruction(struct gdbarch *gdbarch, CORE_ADDR *to, CORE_ADDR oldloc)
Definition i386-tdep.c:969
static int i386_record_lea_modrm(struct i386_record_s *irp)
Definition i386-tdep.c:4989
const struct regset i386_gregset
Definition i386-tdep.c:4042
int i386_ymm_avx512_regnum_p(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:302
static const char * i386_gnu_triplet_regexp(struct gdbarch *gdbarch)
Definition i386-tdep.c:4511
static int i386_ymmh_regnum_p(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:261
int i386_k_regnum_p(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:248
const int num_lower_zmm_regs
Definition i386-tdep.c:165
static const char *const i386_pkeys_names[]
Definition i386-tdep.c:125
static int i386_ymmh_avx512_regnum_p(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:289
static i386_insn i386_tramp_chain_in_reg_insns[]
Definition i386-tdep.c:2386
const struct target_desc * i386_target_description(uint64_t xcr0, bool segments)
Definition i386-tdep.c:8957
constexpr gdb_byte i386_break_insn[]
Definition i386-tdep.c:613
static void i386_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
Definition i386-tdep.c:2105
#define PREFIX_LOCK
Definition i386-tdep.c:4722
#define PREFIX_REPZ
Definition i386-tdep.c:4720
void i386_pseudo_register_read_into_value(struct gdbarch *gdbarch, readable_regcache *regcache, int regnum, struct value *result_value)
Definition i386-tdep.c:3419
int i386_ymm_regnum_p(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:276
static void i386_extract_return_value(struct gdbarch *gdbarch, struct type *type, struct regcache *regcache, gdb_byte *valbuf)
Definition i386-tdep.c:2905
static int i386_ret_p(const gdb_byte *insn)
Definition i386-tdep.c:715
static int i386_epilogue_override_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
Definition i386-tdep.c:2265
static int i386_match_pattern(CORE_ADDR pc, struct i386_insn pattern)
Definition i386-tdep.c:1384
static CORE_ADDR i386_fetch_pointer_argument(frame_info_ptr frame, int argi, struct type *type)
Definition i386-tdep.c:4711
static void i386_add_reggroups(struct gdbarch *gdbarch)
Definition i386-tdep.c:4597
static i386_insn i386_tramp_chain_on_stack_insns[]
Definition i386-tdep.c:2399
static const char att_flavor[]
Definition i386-tdep.c:591
static struct type * i386_zmm_type(struct gdbarch *gdbarch)
Definition i386-tdep.c:3206
static const struct frame_unwind i386_stack_tramp_frame_unwind
Definition i386-tdep.c:2447
#define LOW_RETURN_REGNUM
Definition i386-tdep.c:2898
static uint64_t i386_xcr0_from_tdesc(const struct target_desc *tdesc)
Definition i386-tdep.c:8301
static bool i386_in_indirect_branch_thunk(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition i386-tdep.c:4521
static struct type * i386_mmx_type(struct gdbarch *gdbarch)
Definition i386-tdep.c:3322
#define MPX_BT_MASK
Definition i386-tdep.c:9010
static int i386_get_longjmp_target(frame_info_ptr frame, CORE_ADDR *pc)
Definition i386-tdep.c:2652
void i386_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int regnum, const gdb_byte *buf)
Definition i386-tdep.c:3614
static int i386_dbx_reg_to_regnum(struct gdbarch *gdbarch, int reg)
Definition i386-tdep.c:486
static int i386_reg_struct_return_p(struct gdbarch *gdbarch, struct type *type)
Definition i386-tdep.c:3041
static struct cmd_list_element * mpx_set_cmdlist
Definition i386-tdep.c:9214
static const char * struct_convention
Definition i386-tdep.c:3034
CORE_ADDR i386_thiscall_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr, bool thiscall)
Definition i386-tdep.c:2730
static struct i386_frame_cache * i386_epilogue_frame_cache(frame_info_ptr this_frame, void **this_cache)
Definition i386-tdep.c:2283
displaced_step_copy_insn_closure_up i386_displaced_step_copy_insn(struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to, struct regcache *regs)
Definition i386-tdep.c:806
#define I386_SAVE_FPU_ENV_REG_STACK
Definition i386-tdep.c:5042
static struct type * i386_bnd_type(struct gdbarch *gdbarch)
Definition i386-tdep.c:3170
static struct value * i386_epilogue_frame_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
Definition i386-tdep.c:2345
#define MPX_BASE_MASK
Definition i386-tdep.c:8976
static struct value * i386_sigtramp_frame_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
Definition i386-tdep.c:2556
static const char reg_struct_convention[]
Definition i386-tdep.c:3026
CORE_ADDR i386_pe_skip_trampoline_code(frame_info_ptr frame, CORE_ADDR pc, char *name)
Definition i386-tdep.c:4073
#define PREFIX_REPNZ
Definition i386-tdep.c:4721
static const char * disassembly_flavor
Definition i386-tdep.c:599
static const struct frame_base i386_frame_base
Definition i386-tdep.c:2616
static const char *const i386_zmmh_names[]
Definition i386-tdep.c:96
#define I386_NUM_SAVED_REGS
Definition i386-tdep.c:1052
static int i386_stack_tramp_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_cache)
Definition i386-tdep.c:2437
static CORE_ADDR i386_skip_probe(CORE_ADDR pc)
Definition i386-tdep.c:1213
static struct type * i386_ymm_type(struct gdbarch *gdbarch)
Definition i386-tdep.c:3265
static int i386_insn_is_call(struct gdbarch *gdbarch, CORE_ADDR addr)
Definition i386-tdep.c:767
static int i386_record_floats(struct gdbarch *gdbarch, struct i386_record_s *ir, uint32_t iregnum)
Definition i386-tdep.c:5048
int i386_fpc_regnum_p(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:385
static void i386_supply_fpregset(const struct regset *regset, struct regcache *regcache, int regnum, const void *fpregs, size_t len)
Definition i386-tdep.c:4001
#define MPX_BD_MASK_32
Definition i386-tdep.c:9011
@ OP_XORL
Definition i386-tdep.c:4745
@ OP_ADCL
Definition i386-tdep.c:4741
@ OP_ADDL
Definition i386-tdep.c:4739
@ OP_ORL
Definition i386-tdep.c:4740
@ OP_SUBL
Definition i386-tdep.c:4744
@ OP_CMPL
Definition i386-tdep.c:4746
@ OP_ANDL
Definition i386-tdep.c:4743
@ OP_SBBL
Definition i386-tdep.c:4742
static unsigned long i386_mpx_bd_base(void)
Definition i386-tdep.c:8981
static const char pcc_struct_convention[]
Definition i386-tdep.c:3025
static CORE_ADDR i386_analyze_register_saves(CORE_ADDR pc, CORE_ADDR current_pc, struct i386_frame_cache *cache)
Definition i386-tdep.c:1760
void i386_displaced_step_fixup(struct gdbarch *gdbarch, struct displaced_step_copy_insn_closure *closure_, CORE_ADDR from, CORE_ADDR to, struct regcache *regs, bool completed_p)
Definition i386-tdep.c:843
static void i386_collect_fpregset(const struct regset *regset, const struct regcache *regcache, int regnum, void *fpregs, size_t len)
Definition i386-tdep.c:4023
#define I386_RECORD_FULL_ARCH_LIST_ADD_REG(regnum)
Definition i386-tdep.c:5108
int i386_xmm_avx512_regnum_p(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:347
static const struct frame_unwind i386_sigtramp_frame_unwind
Definition i386-tdep.c:2596
static CORE_ADDR i386_unwind_pc(struct gdbarch *gdbarch, frame_info_ptr next_frame)
Definition i386-tdep.c:1968
static const char * i386_register_name(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:443
static void i386_epilogue_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
Definition i386-tdep.c:2331
static const char *const i386_ymm_names[]
Definition i386-tdep.c:108
#define I386_SAVE_FPU_ENV
Definition i386-tdep.c:5041
static const char *const valid_flavors[]
Definition i386-tdep.c:593
static int i386_bndr_regnum_p(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:399
static struct i386_frame_cache * i386_alloc_frame_cache(void)
Definition i386-tdep.c:1075
static struct i386_insn * i386_match_insn(CORE_ADDR pc, struct i386_insn *insn_patterns)
Definition i386-tdep.c:1418
static enum return_value_convention i386_return_value(struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, struct value **read_value, const gdb_byte *writebuf)
Definition i386-tdep.c:3076
static const reggroup * i386_sse_reggroup
Definition i386-tdep.c:4586
static CORE_ADDR i386_skip_prologue(struct gdbarch *gdbarch, CORE_ADDR start_pc)
Definition i386-tdep.c:1830
static void i386_gen_return_address(struct gdbarch *gdbarch, struct agent_expr *ax, struct axs_value *value, CORE_ADDR scope)
Definition i386-tdep.c:2461
static int i386_svr4_dwarf_reg_to_regnum(struct gdbarch *gdbarch, int reg)
Definition i386-tdep.c:533
static int i386_sigtramp_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
Definition i386-tdep.c:2566
static int i386_next_regnum(int regnum)
Definition i386-tdep.c:3821
static expr::operation_up i386_stap_parse_special_token_three_arg_disp(struct gdbarch *gdbarch, struct stap_parse_info *p)
Definition i386-tdep.c:4324
CORE_ADDR i386_skip_main_prologue(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition i386-tdep.c:1934
int i386_byte_regnum_p(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:185
int i386_xmm_regnum_p(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:332
static int i386_register_to_value(frame_info_ptr frame, int regnum, struct type *type, gdb_byte *to, int *optimizedp, int *unavailablep)
Definition i386-tdep.c:3881
#define MPX_BD_MASK
Definition i386-tdep.c:9009
static const struct frame_unwind i386_frame_unwind
Definition i386-tdep.c:2199
static int i386_syscall_p(const gdb_byte *insn, int *lengthp)
Definition i386-tdep.c:748
int i386_ax_pseudo_register_collect(struct gdbarch *gdbarch, struct agent_expr *ax, int regnum)
Definition i386-tdep.c:3737
static const char intel_flavor[]
Definition i386-tdep.c:592
static int i386_epilogue_frame_sniffer_1(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache, bool override_p)
Definition i386-tdep.c:2232
void i386_elf_init_abi(struct gdbarch_info info, struct gdbarch *gdbarch)
Definition i386-tdep.c:4530
static void i386_frame_cache_1(frame_info_ptr this_frame, struct i386_frame_cache *cache)
Definition i386-tdep.c:1980
static CORE_ADDR i386_analyze_frame_setup(struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR limit, struct i386_frame_cache *cache)
Definition i386-tdep.c:1597
static const struct floatformat ** i386_floatformat_for_type(struct gdbarch *gdbarch, const char *name, int len)
Definition i386-tdep.c:8277
static int i386_absolute_jmp_p(const gdb_byte *insn)
Definition i386-tdep.c:657
static enum unwind_stop_reason i386_sigtramp_frame_unwind_stop_reason(frame_info_ptr this_frame, void **this_cache)
Definition i386-tdep.c:2527
static const int i386_record_regmap[]
Definition i386-tdep.c:8205
static void i386_value_to_register(frame_info_ptr frame, int regnum, struct type *type, const gdb_byte *from)
Definition i386-tdep.c:3921
static CORE_ADDR i386_follow_jump(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition i386-tdep.c:1106
static int i386_record_modrm(struct i386_record_s *irp)
Definition i386-tdep.c:4772
static struct i386_frame_cache * i386_sigtramp_frame_cache(frame_info_ptr this_frame, void **this_cache)
Definition i386-tdep.c:2478
static int i386_insn_is_ret(struct gdbarch *gdbarch, CORE_ADDR addr)
Definition i386-tdep.c:780
static const char *const i386_bnd_names[]
Definition i386-tdep.c:132
static int i386_epilogue_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
Definition i386-tdep.c:2274
static int i386_svr4_sigtramp_p(frame_info_ptr this_frame)
Definition i386-tdep.c:4140
static const char *const i386_word_names[]
Definition i386-tdep.c:155
static int i386_16_byte_align_p(struct type *type)
Definition i386-tdep.c:2686
static const char *const i386_register_names[]
Definition i386-tdep.c:75
static int i386_mxcsr_regnum_p(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:360
static void i386_mpx_set_bounds(const char *args, int from_tty)
Definition i386-tdep.c:9164
expr::operation_up i386_stap_parse_special_token(struct gdbarch *gdbarch, struct stap_parse_info *p)
Definition i386-tdep.c:4462
static const struct frame_unwind i386_epilogue_frame_unwind
Definition i386-tdep.c:2365
static expr::operation_up i386_stap_parse_special_token_triplet(struct gdbarch *gdbarch, struct stap_parse_info *p)
Definition i386-tdep.c:4191
static const char default_struct_convention[]
Definition i386-tdep.c:3024
void _initialize_i386_tdep()
Definition i386-tdep.c:9218
void i386_supply_gregset(const struct regset *regset, struct regcache *regcache, int regnum, const void *gregs, size_t len)
Definition i386-tdep.c:3953
static int i386_in_stack_tramp_p(CORE_ADDR pc)
Definition i386-tdep.c:2413
static const char *const i386_byte_names[]
Definition i386-tdep.c:147
static int i386_mmx_regnum_to_fp_regnum(readable_regcache *regcache, int regnum)
Definition i386-tdep.c:3398
static struct value * i386_pseudo_register_read_value(struct gdbarch *gdbarch, readable_regcache *regcache, int regnum)
Definition i386-tdep.c:3598
static const struct frame_unwind i386_epilogue_override_frame_unwind
Definition i386-tdep.c:2354
static int i386_insn_is_jump(struct gdbarch *gdbarch, CORE_ADDR addr)
Definition i386-tdep.c:793
static CORE_ADDR i386_svr4_sigcontext_addr(frame_info_ptr this_frame)
Definition i386-tdep.c:4155
static const char *const valid_conventions[]
Definition i386-tdep.c:3027
int i386_word_regnum_p(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:196
int i386_zmmh_regnum_p(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:222
#define MPX_BT_MASK_32
Definition i386-tdep.c:9012
static CORE_ADDR i386_analyze_prologue(struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR current_pc, struct i386_frame_cache *cache)
Definition i386-tdep.c:1813
int i386_mpx_enabled(void)
Definition i386-tdep.c:9000
static void i386_sigtramp_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
Definition i386-tdep.c:2540
struct type * i386_pseudo_register_type(struct gdbarch *gdbarch, int regnum)
Definition i386-tdep.c:3366
#define I386_NUM_XREGS
Definition i386-tdep.h:345
#define I386_MAX_REGISTER_SIZE
Definition i386-tdep.h:355
@ I386_PKRU_REGNUM
Definition i386-tdep.h:309
@ I386_EFLAGS_REGNUM
Definition i386-tdep.h:290
@ I386_ESI_REGNUM
Definition i386-tdep.h:287
@ I386_ST0_REGNUM
Definition i386-tdep.h:297
@ I386_FS_REGNUM
Definition i386-tdep.h:295
@ I386_ZMM0H_REGNUM
Definition i386-tdep.h:307
@ I386_BND0R_REGNUM
Definition i386-tdep.h:301
@ I386_YMM0H_REGNUM
Definition i386-tdep.h:299
@ I386_ECX_REGNUM
Definition i386-tdep.h:282
@ I386_GS_REGNUM
Definition i386-tdep.h:296
@ I386_EIP_REGNUM
Definition i386-tdep.h:289
@ I386_EBP_REGNUM
Definition i386-tdep.h:286
@ I386_ES_REGNUM
Definition i386-tdep.h:294
@ I386_CS_REGNUM
Definition i386-tdep.h:291
@ I386_EAX_REGNUM
Definition i386-tdep.h:281
@ I386_SS_REGNUM
Definition i386-tdep.h:292
@ I386_BNDCFGU_REGNUM
Definition i386-tdep.h:303
@ I386_EDX_REGNUM
Definition i386-tdep.h:283
@ I386_K0_REGNUM
Definition i386-tdep.h:305
@ I386_ESP_REGNUM
Definition i386-tdep.h:285
@ I386_EBX_REGNUM
Definition i386-tdep.h:284
@ I386_DS_REGNUM
Definition i386-tdep.h:293
@ I386_EDI_REGNUM
Definition i386-tdep.h:288
@ I386_FSBASE_REGNUM
Definition i386-tdep.h:310
#define I386_NUM_REGS
Definition i386-tdep.h:352
#define I386_MAX_INSN_LEN
Definition i386-tdep.h:399
@ X86_RECORD_REAX_REGNUM
Definition i386-tdep.h:318
@ X86_RECORD_REDX_REGNUM
Definition i386-tdep.h:320
@ X86_RECORD_RECX_REGNUM
Definition i386-tdep.h:319
@ X86_RECORD_SS_REGNUM
Definition i386-tdep.h:337
@ X86_RECORD_GS_REGNUM
Definition i386-tdep.h:341
@ X86_RECORD_REBP_REGNUM
Definition i386-tdep.h:323
@ X86_RECORD_REBX_REGNUM
Definition i386-tdep.h:321
@ X86_RECORD_EFLAGS_REGNUM
Definition i386-tdep.h:335
@ X86_RECORD_CS_REGNUM
Definition i386-tdep.h:336
@ X86_RECORD_ES_REGNUM
Definition i386-tdep.h:339
@ X86_RECORD_REIP_REGNUM
Definition i386-tdep.h:334
@ X86_RECORD_DS_REGNUM
Definition i386-tdep.h:338
@ X86_RECORD_RESP_REGNUM
Definition i386-tdep.h:322
@ X86_RECORD_RESI_REGNUM
Definition i386-tdep.h:324
@ X86_RECORD_REDI_REGNUM
Definition i386-tdep.h:325
@ X86_RECORD_R8_REGNUM
Definition i386-tdep.h:326
@ X86_RECORD_FS_REGNUM
Definition i386-tdep.h:340
#define I386_NUM_GREGS
Definition i386-tdep.h:344
target_desc * i386_create_target_description(uint64_t xcr0, bool is_linux, bool segments)
Definition i386.c:36
void i387_value_to_register(frame_info_ptr frame, int regnum, struct type *type, const gdb_byte *from)
Definition i387-tdep.c:383
void i387_supply_fxsave(struct regcache *regcache, int regnum, const void *fxsave)
Definition i387-tdep.c:589
x86_xsave_layout i387_fallback_xsave_layout(uint64_t xcr0)
Definition i387-tdep.c:993
void i387_collect_fxsave(const struct regcache *regcache, int regnum, void *fxsave)
Definition i387-tdep.c:673
void i387_reset_bnd_regs(struct gdbarch *gdbarch, struct regcache *regcache)
Definition i387-tdep.c:2147
int i387_convert_register_p(struct gdbarch *gdbarch, int regnum, struct type *type)
Definition i387-tdep.c:327
void i387_supply_fsave(struct regcache *regcache, int regnum, const void *fsave)
Definition i387-tdep.c:440
void i387_collect_fsave(const struct regcache *regcache, int regnum, void *fsave)
Definition i387-tdep.c:495
int i387_register_to_value(frame_info_ptr frame, int regnum, struct type *type, gdb_byte *to, int *optimizedp, int *unavailablep)
Definition i387-tdep.c:348
void i387_print_float_info(struct gdbarch *gdbarch, struct ui_file *file, frame_info_ptr frame, const char *args)
Definition i387-tdep.c:204
#define I387_XMM0_REGNUM(tdep)
Definition i387-tdep.h:66
#define I387_ST0_REGNUM(tdep)
Definition i387-tdep.h:33
#define I387_YMM0_REGNUM(tdep)
Definition i387-tdep.h:70
#define I387_XMM16_REGNUM(tdep)
Definition i387-tdep.h:67
#define I387_NUM_MPX_REGS
Definition i387-tdep.h:44
#define I387_BND0R_REGNUM(tdep)
Definition i387-tdep.h:40
#define I387_NUM_BND_REGS
Definition i387-tdep.h:45
#define I387_YMM16H_REGNUM(tdep)
Definition i387-tdep.h:56
#define I387_SIZEOF_FSAVE
Definition i387-tdep.h:118
#define I387_NUM_PKEYS_REGS
Definition i387-tdep.h:48
#define I387_FSTAT_REGNUM(tdep)
Definition i387-tdep.h:59
#define I387_FOP_REGNUM(tdep)
Definition i387-tdep.h:65
#define I387_SIZEOF_FXSAVE
Definition i387-tdep.h:119
#define I387_NUM_REGS
Definition i387-tdep.h:31
#define I387_FCTRL_REGNUM(tdep)
Definition i387-tdep.h:58
#define I387_NUM_XMM_AVX512_REGS(tdep)
Definition i387-tdep.h:35
#define I387_MXCSR_REGNUM(tdep)
Definition i387-tdep.h:68
#define I387_BNDCFGU_REGNUM(tdep)
Definition i387-tdep.h:41
#define I387_MM0_REGNUM(tdep)
Definition i387-tdep.h:36
#define I387_NUM_MPX_CTRL_REGS
Definition i387-tdep.h:46
#define I387_PKRU_REGNUM(tdep)
Definition i387-tdep.h:50
#define I387_FTAG_REGNUM(tdep)
Definition i387-tdep.h:60
#define I387_NUM_XMM_REGS(tdep)
Definition i387-tdep.h:34
#define I387_NUM_K_REGS
Definition i387-tdep.h:47
CORE_ADDR find_function_addr(struct value *function, struct type **retval_type, struct type **function_type)
Definition infcall.c:278
obj_section * maint_obj_section_from_bfd_section(bfd *abfd, asection *asection, objfile *ofile)
Definition maint.c:330
CORE_ADDR find_solib_trampoline_target(frame_info_ptr frame, CORE_ADDR pc)
Definition minsyms.c:1554
struct bound_minimal_symbol lookup_minimal_symbol_by_pc(CORE_ADDR pc)
Definition minsyms.c:996
Definition ada-exp.h:87
std::unique_ptr< operation > operation_up
Definition expression.h:82
info(Component c)
Definition gdbarch.py:41
struct obj_section * find_pc_section(CORE_ADDR pc)
Definition objfiles.c:1128
static int in_plt_section(CORE_ADDR pc)
Definition objfiles.h:972
void gdbarch_register_osabi(enum bfd_architecture arch, unsigned long machine, enum gdb_osabi osabi, void(*init_osabi)(struct gdbarch_info, struct gdbarch *))
Definition osabi.c:146
void gdbarch_init_osabi(struct gdbarch_info info, struct gdbarch *gdbarch)
Definition osabi.c:382
@ GDB_OSABI_SVR4
Definition osabi.h:29
bool producer_is_llvm(const char *producer)
Definition producer.c:124
bool producer_is_icc_ge_19(const char *producer)
Definition producer.c:79
bool record_full_memory_query
int record_full_arch_list_add_reg(struct regcache *regcache, int regnum)
int record_full_arch_list_add_mem(CORE_ADDR addr, int len)
int record_full_arch_list_add_end(void)
unsigned int record_debug
Definition record.c:34
int record_read_memory(struct gdbarch *gdbarch, CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition record.c:140
CORE_ADDR regcache_read_pc(struct regcache *regcache)
Definition regcache.c:1333
enum register_status regcache_raw_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
Definition regcache.c:649
int register_size(struct gdbarch *gdbarch, int regnum)
Definition regcache.c:170
enum register_status regcache_cooked_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
Definition regcache.c:796
void regcache_raw_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
Definition regcache.c:677
void regcache_write_pc(struct regcache *regcache, CORE_ADDR pc)
Definition regcache.c:1377
struct regcache * get_current_regcache(void)
Definition regcache.c:429
struct type * register_type(struct gdbarch *gdbarch, int regnum)
Definition regcache.c:158
const reggroup *const general_reggroup
Definition reggroups.c:251
int default_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *group)
Definition reggroups.c:147
const reggroup * reggroup_new(const char *name, enum reggroup_type type)
Definition reggroups.c:34
const reggroup *const float_reggroup
Definition reggroups.c:252
const reggroup *const all_reggroup
Definition reggroups.c:255
void reggroup_add(struct gdbarch *gdbarch, const reggroup *group)
Definition reggroups.c:124
const reggroup *const vector_reggroup
Definition reggroups.c:254
@ USER_REGGROUP
Definition reggroups.h:32
void register_remote_support_xml(const char *xml)
Definition remote.c:5606
static const char *const stap_register_indirection_prefixes[]
static const char *const stap_register_indirection_suffixes[]
struct minimal_symbol * minsym
Definition minsyms.h:49
struct type * builtin_long
Definition gdbtypes.h:2081
struct type * builtin_data_ptr
Definition gdbtypes.h:2135
const char * producer() const
Definition symtab.h:1827
struct type * type() const
Definition gdbtypes.h:547
bool is_static() const
Definition gdbtypes.h:593
const char * linkage_name() const
Definition symtab.h:460
CORE_ADDR saved_sp
Definition i386-tdep.c:1064
CORE_ADDR saved_regs[I386_NUM_SAVED_REGS]
Definition i386-tdep.c:1063
const char *const * mpx_register_names
Definition i386-tdep.h:182
struct type * i386_bnd_type
Definition i386-tdep.h:249
const struct regset * fpregset
Definition i386-tdep.h:263
int * gregset_reg_offset
Definition i386-tdep.h:64
const char *const * zmmh_register_names
Definition i386-tdep.h:192
struct type * i387_ext_type
Definition i386-tdep.h:248
const char *const * k_register_names
Definition i386-tdep.h:189
struct type * i386_mmx_type
Definition i386-tdep.h:245
const char *const * register_names
Definition i386-tdep.h:153
int(* sigtramp_p)(frame_info_ptr)
Definition i386-tdep.h:230
CORE_ADDR sigtramp_end
Definition i386-tdep.h:227
size_t sizeof_fpregset
Definition i386-tdep.h:69
CORE_ADDR sigtramp_start
Definition i386-tdep.h:226
const char *const * xmm_avx512_register_names
Definition i386-tdep.h:195
x86_xsave_layout xsave_layout
Definition i386-tdep.h:150
gdbarch_register_reggroup_p_ftype * register_reggroup_p
Definition i386-tdep.h:217
CORE_ADDR(* sigcontext_addr)(frame_info_ptr)
Definition i386-tdep.h:233
const char *const * pkeys_register_names
Definition i386-tdep.h:207
const char *const * ymmh_register_names
Definition i386-tdep.h:160
size_t sizeof_gregset
Definition i386-tdep.h:66
struct type * i386_zmm_type
Definition i386-tdep.h:247
const struct target_desc * tdesc
Definition i386-tdep.h:214
const int * record_regmap
Definition i386-tdep.h:254
struct type * i386_ymm_type
Definition i386-tdep.h:246
const char *const * ymm16h_register_names
Definition i386-tdep.h:167
gdb_byte mask[I386_MAX_MATCHED_INSN_LEN]
Definition i386-tdep.c:1378
gdb_byte insn[I386_MAX_MATCHED_INSN_LEN]
Definition i386-tdep.c:1377
size_t len
Definition i386-tdep.c:1376
struct regcache * regcache
Definition i386-tdep.c:4752
const int * regmap
Definition i386-tdep.c:4765
uint8_t modrm
Definition i386-tdep.c:4758
struct gdbarch * gdbarch
Definition i386-tdep.c:4751
CORE_ADDR orig_addr
Definition i386-tdep.c:4753
uint8_t rex_b
Definition i386-tdep.c:4762
CORE_ADDR addr
Definition i386-tdep.c:4754
uint8_t rex_x
Definition i386-tdep.c:4761
CORE_ADDR addr() const
Definition objfiles.h:385
struct objfile * objfile
Definition objfiles.h:401
gdb_bfd_ref_ptr obfd
Definition objfiles.h:740
const char * arg
Definition stap-probe.h:45
const char * saved_arg
Definition stap-probe.h:53
struct type * arg_type
Definition stap-probe.h:59
struct type * target_type() const
Definition gdbtypes.h:1037
type_code code() const
Definition gdbtypes.h:956
ULONGEST length() const
Definition gdbtypes.h:983
struct field & field(int idx) const
Definition gdbtypes.h:1012
bool is_vector() const
Definition gdbtypes.h:1186
unsigned int num_fields() const
Definition gdbtypes.h:994
void set_name(const char *name)
Definition gdbtypes.h:974
gdbarch * arch() const
Definition gdbtypes.c:273
void set_is_vector(bool is_vector)
Definition gdbtypes.h:1191
Definition value.h:130
struct gdbarch * arch() const
Definition value.c:167
static struct value * allocate(struct type *type)
Definition value.c:957
void set_lval(lval_type val)
Definition value.h:336
void mark_bytes_unavailable(LONGEST offset, ULONGEST length)
Definition value.c:419
gdb::array_view< gdb_byte > contents_raw()
Definition value.c:1009
struct type * type() const
Definition value.h:180
struct compunit_symtab * find_pc_compunit_symtab(CORE_ADDR pc)
Definition symtab.c:2946
CORE_ADDR skip_prologue_using_sal(struct gdbarch *gdbarch, CORE_ADDR func_addr)
Definition symtab.c:3963
static bool compunit_epilogue_unwind_valid(struct compunit_symtab *cust)
Definition symtab.h:1997
tdesc_arch_data_up tdesc_data_alloc(void)
const struct tdesc_feature * tdesc_find_feature(const struct target_desc *target_desc, const char *name)
int tdesc_numbered_register(const struct tdesc_feature *feature, struct tdesc_arch_data *data, int regno, const char *name)
static const registry< gdbarch >::key< tdesc_arch_data > tdesc_data
void tdesc_use_registers(struct gdbarch *gdbarch, const struct target_desc *target_desc, tdesc_arch_data_up &&early_data, tdesc_unknown_register_ftype unk_reg_cb)
void set_tdesc_pseudo_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype *pseudo_name)
int tdesc_has_registers(const struct target_desc *target_desc)
void set_tdesc_pseudo_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype *pseudo_type)
const char * tdesc_register_name(struct gdbarch *gdbarch, int regno)
struct type * tdesc_find_type(struct gdbarch *gdbarch, const char *id)
std::unique_ptr< tdesc_arch_data, tdesc_arch_data_deleter > tdesc_arch_data_up
void target_float_convert(const gdb_byte *from, const struct type *from_type, gdb_byte *to, const struct type *to_type)
int target_get_min_fast_tracepoint_insn_len()
Definition target.c:727
int target_read_code(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition target.c:1844
x86_xsave_layout target_fetch_x86_xsave_layout()
Definition target.c:835
int target_write_memory(CORE_ADDR memaddr, const gdb_byte *myaddr, ssize_t len)
Definition target.c:1861
int target_read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition target.c:1785
#define current_uiout
Definition ui-out.h:40
int user_reg_map_name_to_regnum(struct gdbarch *gdbarch, const char *name, int len)
Definition user-regs.c:132
const char * paddress(struct gdbarch *gdbarch, CORE_ADDR addr)
Definition utils.c:3166
int yquery(const char *ctlstr,...)
Definition utils.c:926
void gdb_printf(struct ui_file *stream, const char *format,...)
Definition utils.c:1886
#define gdb_stderr
Definition utils.h:187
#define gdb_stdlog
Definition utils.h:190
struct value * value_at_non_lval(struct type *type, CORE_ADDR addr)
Definition valops.c:1023
CORE_ADDR value_as_address(struct value *val)
Definition value.c:2636
#define VALUE_REGNUM(val)
Definition value.h:962
static void check(BOOL ok, const char *file, int line)
bool x86_in_indirect_branch_thunk(CORE_ADDR pc, const char *const *register_names, int lo, int hi)
Definition x86-tdep.c:43