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sh-tdep.c
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1/* Target-dependent code for Renesas Super-H, for GDB.
2
3 Copyright (C) 1993-2023 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20/* Contributed by Steve Chamberlain
21 sac@cygnus.com. */
22
23#include "defs.h"
24#include "frame.h"
25#include "frame-base.h"
26#include "frame-unwind.h"
27#include "dwarf2/frame.h"
28#include "symtab.h"
29#include "gdbtypes.h"
30#include "gdbcmd.h"
31#include "gdbcore.h"
32#include "value.h"
33#include "dis-asm.h"
34#include "inferior.h"
35#include "arch-utils.h"
36#include "regcache.h"
37#include "target-float.h"
38#include "osabi.h"
39#include "reggroups.h"
40#include "regset.h"
41#include "objfiles.h"
42
43#include "sh-tdep.h"
44
45#include "elf-bfd.h"
46#include "solib-svr4.h"
47
48/* sh flags */
49#include "elf/sh.h"
50#include "dwarf2.h"
51/* registers numbers shared with the simulator. */
52#include "sim/sim-sh.h"
53#include <algorithm>
54
55/* List of "set sh ..." and "show sh ..." commands. */
56static struct cmd_list_element *setshcmdlist = NULL;
57static struct cmd_list_element *showshcmdlist = NULL;
58
59static const char sh_cc_gcc[] = "gcc";
60static const char sh_cc_renesas[] = "renesas";
61static const char *const sh_cc_enum[] = {
64 NULL
65};
66
68
69#define SH_NUM_REGS 67
70
72{
73 /* Base address. */
74 CORE_ADDR base;
75 LONGEST sp_offset;
76 CORE_ADDR pc;
77
78 /* Flag showing that a frame has been created in the prologue code. */
80
81 /* Saved registers. */
83 CORE_ADDR saved_sp;
84};
85
86static int
88{
89 int val = 0;
90
91 if (func_type)
92 {
94
95 if (func_type->code () == TYPE_CODE_PTR)
96 func_type = check_typedef (func_type->target_type ());
97
98 if (func_type->code () == TYPE_CODE_FUNC
99 && TYPE_CALLING_CONVENTION (func_type) == DW_CC_GNU_renesas_sh)
100 val = 1;
101 }
102
104 val = 1;
105
106 return val;
107}
108
109static const char *
111{
112 static const char *register_names[] = {
113 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
114 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
115 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr"
116 };
117
118 if (reg_nr >= ARRAY_SIZE (register_names))
119 return "";
120 return register_names[reg_nr];
121}
122
123static const char *
125{
126 static const char *register_names[] = {
127 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
128 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
129 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
130 "", "",
131 "", "", "", "", "", "", "", "",
132 "", "", "", "", "", "", "", "",
133 "ssr", "spc",
134 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
135 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
136 };
137
138 if (reg_nr >= ARRAY_SIZE (register_names))
139 return "";
140 return register_names[reg_nr];
141}
142
143static const char *
145{
146 static const char *register_names[] = {
147 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
148 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
149 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
150 "fpul", "fpscr",
151 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
152 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
153 "ssr", "spc",
154 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
155 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
156 };
157 if (reg_nr >= ARRAY_SIZE (register_names))
158 return "";
159 return register_names[reg_nr];
160}
161
162static const char *
164{
165 static const char *register_names[] = {
166 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
167 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
168 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
169 "fpul", "fpscr",
170 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
171 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
172 };
173 if (reg_nr >= ARRAY_SIZE (register_names))
174 return "";
175 return register_names[reg_nr];
176}
177
178static const char *
180{
181 static const char *register_names[] = {
182 /* general registers 0-15 */
183 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
184 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
185 /* 16 - 22 */
186 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
187 /* 23, 24 */
188 "fpul", "fpscr",
189 /* floating point registers 25 - 40 */
190 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
191 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
192 /* 41, 42 */
193 "", "",
194 /* 43 - 62. Banked registers. The bank number used is determined by
195 the bank register (63). */
196 "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b",
197 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b",
198 "machb", "ivnb", "prb", "gbrb", "maclb",
199 /* 63: register bank number, not a real register but used to
200 communicate the register bank currently get/set. This register
201 is hidden to the user, who manipulates it using the pseudo
202 register called "bank" (67). See below. */
203 "",
204 /* 64 - 66 */
205 "ibcr", "ibnr", "tbr",
206 /* 67: register bank number, the user visible pseudo register. */
207 "bank",
208 /* double precision (pseudo) 68 - 75 */
209 "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
210 };
211 if (reg_nr >= ARRAY_SIZE (register_names))
212 return "";
213 return register_names[reg_nr];
214}
215
216static const char *
218{
219 static const char *register_names[] = {
220 /* general registers 0-15 */
221 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
222 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
223 /* 16 - 22 */
224 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
225 /* 23, 24 */
226 "", "",
227 /* floating point registers 25 - 40 */
228 "", "", "", "", "", "", "", "",
229 "", "", "", "", "", "", "", "",
230 /* 41, 42 */
231 "", "",
232 /* 43 - 62. Banked registers. The bank number used is determined by
233 the bank register (63). */
234 "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b",
235 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b",
236 "machb", "ivnb", "prb", "gbrb", "maclb",
237 /* 63: register bank number, not a real register but used to
238 communicate the register bank currently get/set. This register
239 is hidden to the user, who manipulates it using the pseudo
240 register called "bank" (67). See below. */
241 "",
242 /* 64 - 66 */
243 "ibcr", "ibnr", "tbr",
244 /* 67: register bank number, the user visible pseudo register. */
245 "bank",
246 /* double precision (pseudo) 68 - 75: report blank, see below. */
247 };
248 if (reg_nr >= ARRAY_SIZE (register_names))
249 return "";
250 return register_names[reg_nr];
251}
252
253static const char *
255{
256 static const char *register_names[] = {
257 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
258 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
259 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
260 "", "dsr",
261 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
262 "y0", "y1", "", "", "", "", "", "mod",
263 "", "",
264 "rs", "re",
265 };
266 if (reg_nr >= ARRAY_SIZE (register_names))
267 return "";
268 return register_names[reg_nr];
269}
270
271static const char *
273{
274 static const char *register_names[] = {
275 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
276 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
277 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
278 "", "dsr",
279 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
280 "y0", "y1", "", "", "", "", "", "mod",
281 "ssr", "spc",
282 "rs", "re", "", "", "", "", "", "",
283 "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b",
284 };
285 if (reg_nr >= ARRAY_SIZE (register_names))
286 return "";
287 return register_names[reg_nr];
288}
289
290static const char *
292{
293 static const char *register_names[] = {
294 /* general registers 0-15 */
295 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
296 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
297 /* 16 - 22 */
298 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
299 /* 23, 24 */
300 "fpul", "fpscr",
301 /* floating point registers 25 - 40 */
302 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
303 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
304 /* 41, 42 */
305 "ssr", "spc",
306 /* bank 0 43 - 50 */
307 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
308 /* bank 1 51 - 58 */
309 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
310 /* 59 - 66 */
311 "", "", "", "", "", "", "", "",
312 /* pseudo bank register. */
313 "",
314 /* double precision (pseudo) 68 - 75 */
315 "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
316 /* vectors (pseudo) 76 - 79 */
317 "fv0", "fv4", "fv8", "fv12",
318 /* FIXME: missing XF */
319 /* FIXME: missing XD */
320 };
321 if (reg_nr >= ARRAY_SIZE (register_names))
322 return "";
323 return register_names[reg_nr];
324}
325
326static const char *
328{
329 static const char *register_names[] = {
330 /* general registers 0-15 */
331 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
332 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
333 /* 16 - 22 */
334 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
335 /* 23, 24 */
336 "", "",
337 /* floating point registers 25 - 40 -- not for nofpu target */
338 "", "", "", "", "", "", "", "",
339 "", "", "", "", "", "", "", "",
340 /* 41, 42 */
341 "ssr", "spc",
342 /* bank 0 43 - 50 */
343 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
344 /* bank 1 51 - 58 */
345 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
346 /* 59 - 66 */
347 "", "", "", "", "", "", "", "",
348 /* pseudo bank register. */
349 "",
350 /* double precision (pseudo) 68 - 75 -- not for nofpu target */
351 "", "", "", "", "", "", "", "",
352 /* vectors (pseudo) 76 - 79 -- not for nofpu target: report blank
353 below. */
354 };
355 if (reg_nr >= ARRAY_SIZE (register_names))
356 return "";
357 return register_names[reg_nr];
358}
359
360static const char *
362{
363 static const char *register_names[] = {
364 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
365 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
366 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
367 "", "dsr",
368 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
369 "y0", "y1", "", "", "", "", "", "mod",
370 "ssr", "spc",
371 "rs", "re", "", "", "", "", "", "",
372 "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b",
373 };
374 if (reg_nr >= ARRAY_SIZE (register_names))
375 return "";
376 return register_names[reg_nr];
377}
378
379/* Implement the breakpoint_kind_from_pc gdbarch method. */
380
381static int
382sh_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
383{
384 return 2;
385}
386
387/* Implement the sw_breakpoint_from_kind gdbarch method. */
388
389static const gdb_byte *
391{
392 *size = kind;
393
394 /* For remote stub targets, trapa #20 is used. */
395 if (strcmp (target_shortname (), "remote") == 0)
396 {
397 static unsigned char big_remote_breakpoint[] = { 0xc3, 0x20 };
398 static unsigned char little_remote_breakpoint[] = { 0x20, 0xc3 };
399
400 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
401 return big_remote_breakpoint;
402 else
403 return little_remote_breakpoint;
404 }
405 else
406 {
407 /* 0xc3c3 is trapa #c3, and it works in big and little endian
408 modes. */
409 static unsigned char breakpoint[] = { 0xc3, 0xc3 };
410
411 return breakpoint;
412 }
413}
414
415/* Prologue looks like
416 mov.l r14,@-r15
417 sts.l pr,@-r15
418 mov.l <regs>,@-r15
419 sub <room_for_loca_vars>,r15
420 mov r15,r14
421
422 Actually it can be more complicated than this but that's it, basically. */
423
424#define GET_SOURCE_REG(x) (((x) >> 4) & 0xf)
425#define GET_TARGET_REG(x) (((x) >> 8) & 0xf)
426
427/* JSR @Rm 0100mmmm00001011 */
428#define IS_JSR(x) (((x) & 0xf0ff) == 0x400b)
429
430/* STS.L PR,@-r15 0100111100100010
431 r15-4-->r15, PR-->(r15) */
432#define IS_STS(x) ((x) == 0x4f22)
433
434/* STS.L MACL,@-r15 0100111100010010
435 r15-4-->r15, MACL-->(r15) */
436#define IS_MACL_STS(x) ((x) == 0x4f12)
437
438/* MOV.L Rm,@-r15 00101111mmmm0110
439 r15-4-->r15, Rm-->(R15) */
440#define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
441
442/* MOV r15,r14 0110111011110011
443 r15-->r14 */
444#define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
445
446/* ADD #imm,r15 01111111iiiiiiii
447 r15+imm-->r15 */
448#define IS_ADD_IMM_SP(x) (((x) & 0xff00) == 0x7f00)
449
450#define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
451#define IS_SHLL_R3(x) ((x) == 0x4300)
452
453/* ADD r3,r15 0011111100111100
454 r15+r3-->r15 */
455#define IS_ADD_R3SP(x) ((x) == 0x3f3c)
456
457/* FMOV.S FRm,@-Rn Rn-4-->Rn, FRm-->(Rn) 1111nnnnmmmm1011
458 FMOV DRm,@-Rn Rn-8-->Rn, DRm-->(Rn) 1111nnnnmmm01011
459 FMOV XDm,@-Rn Rn-8-->Rn, XDm-->(Rn) 1111nnnnmmm11011 */
460/* CV, 2003-08-28: Only suitable with Rn == SP, therefore name changed to
461 make this entirely clear. */
462/* #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b) */
463#define IS_FPUSH(x) (((x) & 0xff0f) == 0xff0b)
464
465/* MOV Rm,Rn Rm-->Rn 0110nnnnmmmm0011 4 <= m <= 7 */
466#define IS_MOV_ARG_TO_REG(x) \
467 (((x) & 0xf00f) == 0x6003 && \
468 ((x) & 0x00f0) >= 0x0040 && \
469 ((x) & 0x00f0) <= 0x0070)
470/* MOV.L Rm,@Rn 0010nnnnmmmm0010 n = 14, 4 <= m <= 7 */
471#define IS_MOV_ARG_TO_IND_R14(x) \
472 (((x) & 0xff0f) == 0x2e02 && \
473 ((x) & 0x00f0) >= 0x0040 && \
474 ((x) & 0x00f0) <= 0x0070)
475/* MOV.L Rm,@(disp*4,Rn) 00011110mmmmdddd n = 14, 4 <= m <= 7 */
476#define IS_MOV_ARG_TO_IND_R14_WITH_DISP(x) \
477 (((x) & 0xff00) == 0x1e00 && \
478 ((x) & 0x00f0) >= 0x0040 && \
479 ((x) & 0x00f0) <= 0x0070)
480
481/* MOV.W @(disp*2,PC),Rn 1001nnnndddddddd */
482#define IS_MOVW_PCREL_TO_REG(x) (((x) & 0xf000) == 0x9000)
483/* MOV.L @(disp*4,PC),Rn 1101nnnndddddddd */
484#define IS_MOVL_PCREL_TO_REG(x) (((x) & 0xf000) == 0xd000)
485/* MOVI20 #imm20,Rn 0000nnnniiii0000 */
486#define IS_MOVI20(x) (((x) & 0xf00f) == 0x0000)
487/* SUB Rn,R15 00111111nnnn1000 */
488#define IS_SUB_REG_FROM_SP(x) (((x) & 0xff0f) == 0x3f08)
489
490#define FPSCR_SZ (1 << 20)
491
492/* The following instructions are used for epilogue testing. */
493#define IS_RESTORE_FP(x) ((x) == 0x6ef6)
494#define IS_RTS(x) ((x) == 0x000b)
495#define IS_LDS(x) ((x) == 0x4f26)
496#define IS_MACL_LDS(x) ((x) == 0x4f16)
497#define IS_MOV_FP_SP(x) ((x) == 0x6fe3)
498#define IS_ADD_REG_TO_FP(x) (((x) & 0xff0f) == 0x3e0c)
499#define IS_ADD_IMM_FP(x) (((x) & 0xff00) == 0x7e00)
500
501static CORE_ADDR
503 CORE_ADDR pc, CORE_ADDR limit_pc,
504 struct sh_frame_cache *cache, ULONGEST fpscr)
505{
506 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
507 ULONGEST inst;
508 int offset;
509 int sav_offset = 0;
510 int r3_val = 0;
511 int reg, sav_reg = -1;
512
513 cache->uses_fp = 0;
514 for (; pc < limit_pc; pc += 2)
515 {
516 inst = read_memory_unsigned_integer (pc, 2, byte_order);
517 /* See where the registers will be saved to. */
518 if (IS_PUSH (inst))
519 {
520 cache->saved_regs[GET_SOURCE_REG (inst)] = cache->sp_offset;
521 cache->sp_offset += 4;
522 }
523 else if (IS_STS (inst))
524 {
525 cache->saved_regs[PR_REGNUM] = cache->sp_offset;
526 cache->sp_offset += 4;
527 }
528 else if (IS_MACL_STS (inst))
529 {
530 cache->saved_regs[MACL_REGNUM] = cache->sp_offset;
531 cache->sp_offset += 4;
532 }
533 else if (IS_MOV_R3 (inst))
534 {
535 r3_val = ((inst & 0xff) ^ 0x80) - 0x80;
536 }
537 else if (IS_SHLL_R3 (inst))
538 {
539 r3_val <<= 1;
540 }
541 else if (IS_ADD_R3SP (inst))
542 {
543 cache->sp_offset += -r3_val;
544 }
545 else if (IS_ADD_IMM_SP (inst))
546 {
547 offset = ((inst & 0xff) ^ 0x80) - 0x80;
548 cache->sp_offset -= offset;
549 }
550 else if (IS_MOVW_PCREL_TO_REG (inst))
551 {
552 if (sav_reg < 0)
553 {
554 reg = GET_TARGET_REG (inst);
555 if (reg < 14)
556 {
557 sav_reg = reg;
558 offset = (inst & 0xff) << 1;
559 sav_offset =
560 read_memory_integer ((pc + 4) + offset, 2, byte_order);
561 }
562 }
563 }
564 else if (IS_MOVL_PCREL_TO_REG (inst))
565 {
566 if (sav_reg < 0)
567 {
568 reg = GET_TARGET_REG (inst);
569 if (reg < 14)
570 {
571 sav_reg = reg;
572 offset = (inst & 0xff) << 2;
573 sav_offset =
574 read_memory_integer (((pc & 0xfffffffc) + 4) + offset,
575 4, byte_order);
576 }
577 }
578 }
579 else if (IS_MOVI20 (inst)
580 && (pc + 2 < limit_pc))
581 {
582 if (sav_reg < 0)
583 {
584 reg = GET_TARGET_REG (inst);
585 if (reg < 14)
586 {
587 sav_reg = reg;
588 sav_offset = GET_SOURCE_REG (inst) << 16;
589 /* MOVI20 is a 32 bit instruction! */
590 pc += 2;
591 sav_offset
592 |= read_memory_unsigned_integer (pc, 2, byte_order);
593 /* Now sav_offset contains an unsigned 20 bit value.
594 It must still get sign extended. */
595 if (sav_offset & 0x00080000)
596 sav_offset |= 0xfff00000;
597 }
598 }
599 }
600 else if (IS_SUB_REG_FROM_SP (inst))
601 {
602 reg = GET_SOURCE_REG (inst);
603 if (sav_reg > 0 && reg == sav_reg)
604 {
605 sav_reg = -1;
606 }
607 cache->sp_offset += sav_offset;
608 }
609 else if (IS_FPUSH (inst))
610 {
611 if (fpscr & FPSCR_SZ)
612 {
613 cache->sp_offset += 8;
614 }
615 else
616 {
617 cache->sp_offset += 4;
618 }
619 }
620 else if (IS_MOV_SP_FP (inst))
621 {
622 pc += 2;
623 /* Don't go any further than six more instructions. */
624 limit_pc = std::min (limit_pc, pc + (2 * 6));
625
626 cache->uses_fp = 1;
627 /* At this point, only allow argument register moves to other
628 registers or argument register moves to @(X,fp) which are
629 moving the register arguments onto the stack area allocated
630 by a former add somenumber to SP call. Don't allow moving
631 to an fp indirect address above fp + cache->sp_offset. */
632 for (; pc < limit_pc; pc += 2)
633 {
634 inst = read_memory_integer (pc, 2, byte_order);
635 if (IS_MOV_ARG_TO_IND_R14 (inst))
636 {
637 reg = GET_SOURCE_REG (inst);
638 if (cache->sp_offset > 0)
639 cache->saved_regs[reg] = cache->sp_offset;
640 }
641 else if (IS_MOV_ARG_TO_IND_R14_WITH_DISP (inst))
642 {
643 reg = GET_SOURCE_REG (inst);
644 offset = (inst & 0xf) * 4;
645 if (cache->sp_offset > offset)
646 cache->saved_regs[reg] = cache->sp_offset - offset;
647 }
648 else if (IS_MOV_ARG_TO_REG (inst))
649 continue;
650 else
651 break;
652 }
653 break;
654 }
655 else if (IS_JSR (inst))
656 {
657 /* We have found a jsr that has been scheduled into the prologue.
658 If we continue the scan and return a pc someplace after this,
659 then setting a breakpoint on this function will cause it to
660 appear to be called after the function it is calling via the
661 jsr, which will be very confusing. Most likely the next
662 instruction is going to be IS_MOV_SP_FP in the delay slot. If
663 so, note that before returning the current pc. */
664 if (pc + 2 < limit_pc)
665 {
666 inst = read_memory_integer (pc + 2, 2, byte_order);
667 if (IS_MOV_SP_FP (inst))
668 cache->uses_fp = 1;
669 }
670 break;
671 }
672#if 0 /* This used to just stop when it found an instruction
673 that was not considered part of the prologue. Now,
674 we just keep going looking for likely
675 instructions. */
676 else
677 break;
678#endif
679 }
680
681 return pc;
682}
683
684/* Skip any prologue before the guts of a function. */
685static CORE_ADDR
686sh_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
687{
688 CORE_ADDR post_prologue_pc, func_addr, func_end_addr, limit_pc;
689 struct sh_frame_cache cache;
690
691 /* See if we can determine the end of the prologue via the symbol table.
692 If so, then return either PC, or the PC after the prologue, whichever
693 is greater. */
694 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end_addr))
695 {
696 post_prologue_pc = skip_prologue_using_sal (gdbarch, func_addr);
697 if (post_prologue_pc != 0)
698 return std::max (pc, post_prologue_pc);
699 }
700
701 /* Can't determine prologue from the symbol table, need to examine
702 instructions. */
703
704 /* Find an upper limit on the function prologue using the debug
705 information. If the debug information could not be used to provide
706 that bound, then use an arbitrary large number as the upper bound. */
707 limit_pc = skip_prologue_using_sal (gdbarch, pc);
708 if (limit_pc == 0)
709 /* Don't go any further than 28 instructions. */
710 limit_pc = pc + (2 * 28);
711
712 /* Do not allow limit_pc to be past the function end, if we know
713 where that end is... */
714 if (func_end_addr != 0)
715 limit_pc = std::min (limit_pc, func_end_addr);
716
717 cache.sp_offset = -4;
718 post_prologue_pc = sh_analyze_prologue (gdbarch, pc, limit_pc, &cache, 0);
719 if (cache.uses_fp)
720 pc = post_prologue_pc;
721
722 return pc;
723}
724
725/* The ABI says:
726
727 Aggregate types not bigger than 8 bytes that have the same size and
728 alignment as one of the integer scalar types are returned in the
729 same registers as the integer type they match.
730
731 For example, a 2-byte aligned structure with size 2 bytes has the
732 same size and alignment as a short int, and will be returned in R0.
733 A 4-byte aligned structure with size 8 bytes has the same size and
734 alignment as a long long int, and will be returned in R0 and R1.
735
736 When an aggregate type is returned in R0 and R1, R0 contains the
737 first four bytes of the aggregate, and R1 contains the
738 remainder. If the size of the aggregate type is not a multiple of 4
739 bytes, the aggregate is tail-padded up to a multiple of 4
740 bytes. The value of the padding is undefined. For little-endian
741 targets the padding will appear at the most significant end of the
742 last element, for big-endian targets the padding appears at the
743 least significant end of the last element.
744
745 All other aggregate types are returned by address. The caller
746 function passes the address of an area large enough to hold the
747 aggregate value in R2. The called function stores the result in
748 this location.
749
750 To reiterate, structs smaller than 8 bytes could also be returned
751 in memory, if they don't pass the "same size and alignment as an
752 integer type" rule.
753
754 For example, in
755
756 struct s { char c[3]; } wibble;
757 struct s foo(void) { return wibble; }
758
759 the return value from foo() will be in memory, not
760 in R0, because there is no 3-byte integer type.
761
762 Similarly, in
763
764 struct s { char c[2]; } wibble;
765 struct s foo(void) { return wibble; }
766
767 because a struct containing two chars has alignment 1, that matches
768 type char, but size 2, that matches type short. There's no integer
769 type that has alignment 1 and size 2, so the struct is returned in
770 memory. */
771
772static int
773sh_use_struct_convention (int renesas_abi, struct type *type)
774{
775 int len = type->length ();
776 int nelem = type->num_fields ();
777
778 /* The Renesas ABI returns aggregate types always on stack. */
779 if (renesas_abi && (type->code () == TYPE_CODE_STRUCT
780 || type->code () == TYPE_CODE_UNION))
781 return 1;
782
783 /* Non-power of 2 length types and types bigger than 8 bytes (which don't
784 fit in two registers anyway) use struct convention. */
785 if (len != 1 && len != 2 && len != 4 && len != 8)
786 return 1;
787
788 /* Scalar types and aggregate types with exactly one field are aligned
789 by definition. They are returned in registers. */
790 if (nelem <= 1)
791 return 0;
792
793 /* If the first field in the aggregate has the same length as the entire
794 aggregate type, the type is returned in registers. */
795 if (type->field (0).type ()->length () == len)
796 return 0;
797
798 /* If the size of the aggregate is 8 bytes and the first field is
799 of size 4 bytes its alignment is equal to long long's alignment,
800 so it's returned in registers. */
801 if (len == 8 && type->field (0).type ()->length () == 4)
802 return 0;
803
804 /* Otherwise use struct convention. */
805 return 1;
806}
807
808static int
809sh_use_struct_convention_nofpu (int renesas_abi, struct type *type)
810{
811 /* The Renesas ABI returns long longs/doubles etc. always on stack. */
812 if (renesas_abi && type->num_fields () == 0 && type->length () >= 8)
813 return 1;
814 return sh_use_struct_convention (renesas_abi, type);
815}
816
817static CORE_ADDR
818sh_frame_align (struct gdbarch *ignore, CORE_ADDR sp)
819{
820 return sp & ~3;
821}
822
823/* Function: push_dummy_call (formerly push_arguments)
824 Setup the function arguments for calling a function in the inferior.
825
826 On the Renesas SH architecture, there are four registers (R4 to R7)
827 which are dedicated for passing function arguments. Up to the first
828 four arguments (depending on size) may go into these registers.
829 The rest go on the stack.
830
831 MVS: Except on SH variants that have floating point registers.
832 In that case, float and double arguments are passed in the same
833 manner, but using FP registers instead of GP registers.
834
835 Arguments that are smaller than 4 bytes will still take up a whole
836 register or a whole 32-bit word on the stack, and will be
837 right-justified in the register or the stack word. This includes
838 chars, shorts, and small aggregate types.
839
840 Arguments that are larger than 4 bytes may be split between two or
841 more registers. If there are not enough registers free, an argument
842 may be passed partly in a register (or registers), and partly on the
843 stack. This includes doubles, long longs, and larger aggregates.
844 As far as I know, there is no upper limit to the size of aggregates
845 that will be passed in this way; in other words, the convention of
846 passing a pointer to a large aggregate instead of a copy is not used.
847
848 MVS: The above appears to be true for the SH variants that do not
849 have an FPU, however those that have an FPU appear to copy the
850 aggregate argument onto the stack (and not place it in registers)
851 if it is larger than 16 bytes (four GP registers).
852
853 An exceptional case exists for struct arguments (and possibly other
854 aggregates such as arrays) if the size is larger than 4 bytes but
855 not a multiple of 4 bytes. In this case the argument is never split
856 between the registers and the stack, but instead is copied in its
857 entirety onto the stack, AND also copied into as many registers as
858 there is room for. In other words, space in registers permitting,
859 two copies of the same argument are passed in. As far as I can tell,
860 only the one on the stack is used, although that may be a function
861 of the level of compiler optimization. I suspect this is a compiler
862 bug. Arguments of these odd sizes are left-justified within the
863 word (as opposed to arguments smaller than 4 bytes, which are
864 right-justified).
865
866 If the function is to return an aggregate type such as a struct, it
867 is either returned in the normal return value register R0 (if its
868 size is no greater than one byte), or else the caller must allocate
869 space into which the callee will copy the return value (if the size
870 is greater than one byte). In this case, a pointer to the return
871 value location is passed into the callee in register R2, which does
872 not displace any of the other arguments passed in via registers R4
873 to R7. */
874
875/* Helper function to justify value in register according to endianness. */
876static const gdb_byte *
877sh_justify_value_in_reg (struct gdbarch *gdbarch, struct value *val, int len)
878{
879 static gdb_byte valbuf[4];
880
881 memset (valbuf, 0, sizeof (valbuf));
882 if (len < 4)
883 {
884 /* value gets right-justified in the register or stack word. */
885 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
886 memcpy (valbuf + (4 - len), val->contents ().data (), len);
887 else
888 memcpy (valbuf, val->contents ().data (), len);
889 return valbuf;
890 }
891 return val->contents ().data ();
892}
893
894/* Helper function to eval number of bytes to allocate on stack. */
895static CORE_ADDR
896sh_stack_allocsize (int nargs, struct value **args)
897{
898 int stack_alloc = 0;
899 while (nargs-- > 0)
900 stack_alloc += ((args[nargs]->type ()->length () + 3) & ~3);
901 return stack_alloc;
902}
903
904/* Helper functions for getting the float arguments right. Registers usage
905 depends on the ABI and the endianness. The comments should enlighten how
906 it's intended to work. */
907
908/* This array stores which of the float arg registers are already in use. */
910
911/* This function just resets the above array to "no reg used so far". */
912static void
914{
915 memset (flt_argreg_array, 0, sizeof flt_argreg_array);
916}
917
918/* This function returns the next register to use for float arg passing.
919 It returns either a valid value between FLOAT_ARG0_REGNUM and
920 FLOAT_ARGLAST_REGNUM if a register is available, otherwise it returns
921 FLOAT_ARGLAST_REGNUM + 1 to indicate that no register is available.
922
923 Note that register number 0 in flt_argreg_array corresponds with the
924 real float register fr4. In contrast to FLOAT_ARG0_REGNUM (value is
925 29) the parity of the register number is preserved, which is important
926 for the double register passing test (see the "argreg & 1" test below). */
927static int
929{
930 int argreg;
931
932 /* First search for the next free register. */
933 for (argreg = 0; argreg <= FLOAT_ARGLAST_REGNUM - FLOAT_ARG0_REGNUM;
934 ++argreg)
935 if (!flt_argreg_array[argreg])
936 break;
937
938 /* No register left? */
940 return FLOAT_ARGLAST_REGNUM + 1;
941
942 if (len == 8)
943 {
944 /* Doubles are always starting in a even register number. */
945 if (argreg & 1)
946 {
947 /* In gcc ABI, the skipped register is lost for further argument
948 passing now. Not so in Renesas ABI. */
950 flt_argreg_array[argreg] = 1;
951
952 ++argreg;
953
954 /* No register left? */
956 return FLOAT_ARGLAST_REGNUM + 1;
957 }
958 /* Also mark the next register as used. */
959 flt_argreg_array[argreg + 1] = 1;
960 }
961 else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE
963 {
964 /* In little endian, gcc passes floats like this: f5, f4, f7, f6, ... */
965 if (!flt_argreg_array[argreg + 1])
966 ++argreg;
967 }
968 flt_argreg_array[argreg] = 1;
969 return FLOAT_ARG0_REGNUM + argreg;
970}
971
972/* Helper function which figures out, if a type is treated like a float type.
973
974 The FPU ABIs have a special way how to treat types as float types.
975 Structures with exactly one member, which is of type float or double, are
976 treated exactly as the base types float or double:
977
978 struct sf {
979 float f;
980 };
981
982 struct sd {
983 double d;
984 };
985
986 are handled the same way as just
987
988 float f;
989
990 double d;
991
992 As a result, arguments of these struct types are pushed into floating point
993 registers exactly as floats or doubles, using the same decision algorithm.
994
995 The same is valid if these types are used as function return types. The
996 above structs are returned in fr0 resp. fr0,fr1 instead of in r0, r0,r1
997 or even using struct convention as it is for other structs. */
998
999static int
1001{
1002 /* Ordinary float types are obviously treated as float. */
1003 if (type->code () == TYPE_CODE_FLT)
1004 return 1;
1005 /* Otherwise non-struct types are not treated as float. */
1006 if (type->code () != TYPE_CODE_STRUCT)
1007 return 0;
1008 /* Otherwise structs with more than one member are not treated as float. */
1009 if (type->num_fields () != 1)
1010 return 0;
1011 /* Otherwise if the type of that member is float, the whole type is
1012 treated as float. */
1013 if (type->field (0).type ()->code () == TYPE_CODE_FLT)
1014 return 1;
1015 /* Otherwise it's not treated as float. */
1016 return 0;
1017}
1018
1019static CORE_ADDR
1021 struct value *function,
1022 struct regcache *regcache,
1023 CORE_ADDR bp_addr, int nargs,
1024 struct value **args,
1025 CORE_ADDR sp, function_call_return_method return_method,
1026 CORE_ADDR struct_addr)
1027{
1028 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1029 int stack_offset = 0;
1030 int argreg = ARG0_REGNUM;
1031 int flt_argreg = 0;
1032 int argnum;
1033 struct type *func_type = function->type ();
1034 struct type *type;
1035 CORE_ADDR regval;
1036 const gdb_byte *val;
1037 int len, reg_size = 0;
1038 int pass_on_stack = 0;
1039 int treat_as_flt;
1040 int last_reg_arg = INT_MAX;
1041
1042 /* The Renesas ABI expects all varargs arguments, plus the last
1043 non-vararg argument to be on the stack, no matter how many
1044 registers have been used so far. */
1046 && func_type->has_varargs ())
1047 last_reg_arg = func_type->num_fields () - 2;
1048
1049 /* First force sp to a 4-byte alignment. */
1050 sp = sh_frame_align (gdbarch, sp);
1051
1052 /* Make room on stack for args. */
1053 sp -= sh_stack_allocsize (nargs, args);
1054
1055 /* Initialize float argument mechanism. */
1057
1058 /* Now load as many as possible of the first arguments into
1059 registers, and push the rest onto the stack. There are 16 bytes
1060 in four registers available. Loop thru args from first to last. */
1061 for (argnum = 0; argnum < nargs; argnum++)
1062 {
1063 type = args[argnum]->type ();
1064 len = type->length ();
1065 val = sh_justify_value_in_reg (gdbarch, args[argnum], len);
1066
1067 /* Some decisions have to be made how various types are handled.
1068 This also differs in different ABIs. */
1069 pass_on_stack = 0;
1070
1071 /* Find out the next register to use for a floating point value. */
1072 treat_as_flt = sh_treat_as_flt_p (type);
1073 if (treat_as_flt)
1074 flt_argreg = sh_next_flt_argreg (gdbarch, len, func_type);
1075 /* In Renesas ABI, long longs and aggregate types are always passed
1076 on stack. */
1078 && ((type->code () == TYPE_CODE_INT && len == 8)
1079 || type->code () == TYPE_CODE_STRUCT
1080 || type->code () == TYPE_CODE_UNION))
1081 pass_on_stack = 1;
1082 /* In contrast to non-FPU CPUs, arguments are never split between
1083 registers and stack. If an argument doesn't fit in the remaining
1084 registers it's always pushed entirely on the stack. */
1085 else if (len > ((ARGLAST_REGNUM - argreg + 1) * 4))
1086 pass_on_stack = 1;
1087
1088 while (len > 0)
1089 {
1090 if ((treat_as_flt && flt_argreg > FLOAT_ARGLAST_REGNUM)
1091 || (!treat_as_flt && (argreg > ARGLAST_REGNUM
1092 || pass_on_stack))
1093 || argnum > last_reg_arg)
1094 {
1095 /* The data goes entirely on the stack, 4-byte aligned. */
1096 reg_size = (len + 3) & ~3;
1097 write_memory (sp + stack_offset, val, reg_size);
1098 stack_offset += reg_size;
1099 }
1100 else if (treat_as_flt && flt_argreg <= FLOAT_ARGLAST_REGNUM)
1101 {
1102 /* Argument goes in a float argument register. */
1103 reg_size = register_size (gdbarch, flt_argreg);
1104 regval = extract_unsigned_integer (val, reg_size, byte_order);
1105 /* In little endian mode, float types taking two registers
1106 (doubles on sh4, long doubles on sh2e, sh3e and sh4) must
1107 be stored swapped in the argument registers. The below
1108 code first writes the first 32 bits in the next but one
1109 register, increments the val and len values accordingly
1110 and then proceeds as normal by writing the second 32 bits
1111 into the next register. */
1112 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE
1113 && type->length () == 2 * reg_size)
1114 {
1116 regval);
1117 val += reg_size;
1118 len -= reg_size;
1119 regval = extract_unsigned_integer (val, reg_size,
1120 byte_order);
1121 }
1122 regcache_cooked_write_unsigned (regcache, flt_argreg++, regval);
1123 }
1124 else if (!treat_as_flt && argreg <= ARGLAST_REGNUM)
1125 {
1126 /* there's room in a register */
1127 reg_size = register_size (gdbarch, argreg);
1128 regval = extract_unsigned_integer (val, reg_size, byte_order);
1129 regcache_cooked_write_unsigned (regcache, argreg++, regval);
1130 }
1131 /* Store the value one register at a time or in one step on
1132 stack. */
1133 len -= reg_size;
1134 val += reg_size;
1135 }
1136 }
1137
1138 if (return_method == return_method_struct)
1139 {
1141 /* If the function uses the Renesas ABI, subtract another 4 bytes from
1142 the stack and store the struct return address there. */
1143 write_memory_unsigned_integer (sp -= 4, 4, byte_order, struct_addr);
1144 else
1145 /* Using the gcc ABI, the "struct return pointer" pseudo-argument has
1146 its own dedicated register. */
1148 STRUCT_RETURN_REGNUM, struct_addr);
1149 }
1150
1151 /* Store return address. */
1153
1154 /* Update stack pointer. */
1157
1158 return sp;
1159}
1160
1161static CORE_ADDR
1163 struct value *function,
1164 struct regcache *regcache,
1165 CORE_ADDR bp_addr,
1166 int nargs, struct value **args,
1167 CORE_ADDR sp,
1168 function_call_return_method return_method,
1169 CORE_ADDR struct_addr)
1170{
1171 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1172 int stack_offset = 0;
1173 int argreg = ARG0_REGNUM;
1174 int argnum;
1175 struct type *func_type = function->type ();
1176 struct type *type;
1177 CORE_ADDR regval;
1178 const gdb_byte *val;
1179 int len, reg_size = 0;
1180 int pass_on_stack = 0;
1181 int last_reg_arg = INT_MAX;
1182
1183 /* The Renesas ABI expects all varargs arguments, plus the last
1184 non-vararg argument to be on the stack, no matter how many
1185 registers have been used so far. */
1187 && func_type->has_varargs ())
1188 last_reg_arg = func_type->num_fields () - 2;
1189
1190 /* First force sp to a 4-byte alignment. */
1191 sp = sh_frame_align (gdbarch, sp);
1192
1193 /* Make room on stack for args. */
1194 sp -= sh_stack_allocsize (nargs, args);
1195
1196 /* Now load as many as possible of the first arguments into
1197 registers, and push the rest onto the stack. There are 16 bytes
1198 in four registers available. Loop thru args from first to last. */
1199 for (argnum = 0; argnum < nargs; argnum++)
1200 {
1201 type = args[argnum]->type ();
1202 len = type->length ();
1203 val = sh_justify_value_in_reg (gdbarch, args[argnum], len);
1204
1205 /* Some decisions have to be made how various types are handled.
1206 This also differs in different ABIs. */
1207 pass_on_stack = 0;
1208 /* Renesas ABI pushes doubles and long longs entirely on stack.
1209 Same goes for aggregate types. */
1211 && ((type->code () == TYPE_CODE_INT && len >= 8)
1212 || (type->code () == TYPE_CODE_FLT && len >= 8)
1213 || type->code () == TYPE_CODE_STRUCT
1214 || type->code () == TYPE_CODE_UNION))
1215 pass_on_stack = 1;
1216 while (len > 0)
1217 {
1218 if (argreg > ARGLAST_REGNUM || pass_on_stack
1219 || argnum > last_reg_arg)
1220 {
1221 /* The remainder of the data goes entirely on the stack,
1222 4-byte aligned. */
1223 reg_size = (len + 3) & ~3;
1224 write_memory (sp + stack_offset, val, reg_size);
1225 stack_offset += reg_size;
1226 }
1227 else if (argreg <= ARGLAST_REGNUM)
1228 {
1229 /* There's room in a register. */
1230 reg_size = register_size (gdbarch, argreg);
1231 regval = extract_unsigned_integer (val, reg_size, byte_order);
1232 regcache_cooked_write_unsigned (regcache, argreg++, regval);
1233 }
1234 /* Store the value reg_size bytes at a time. This means that things
1235 larger than reg_size bytes may go partly in registers and partly
1236 on the stack. */
1237 len -= reg_size;
1238 val += reg_size;
1239 }
1240 }
1241
1242 if (return_method == return_method_struct)
1243 {
1245 /* If the function uses the Renesas ABI, subtract another 4 bytes from
1246 the stack and store the struct return address there. */
1247 write_memory_unsigned_integer (sp -= 4, 4, byte_order, struct_addr);
1248 else
1249 /* Using the gcc ABI, the "struct return pointer" pseudo-argument has
1250 its own dedicated register. */
1252 STRUCT_RETURN_REGNUM, struct_addr);
1253 }
1254
1255 /* Store return address. */
1257
1258 /* Update stack pointer. */
1261
1262 return sp;
1263}
1264
1265/* Find a function's return value in the appropriate registers (in
1266 regbuf), and copy it into valbuf. Extract from an array REGBUF
1267 containing the (raw) register state a function return value of type
1268 TYPE, and copy that, in virtual format, into VALBUF. */
1269static void
1271 gdb_byte *valbuf)
1272{
1273 struct gdbarch *gdbarch = regcache->arch ();
1274 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1275 int len = type->length ();
1276
1277 if (len <= 4)
1278 {
1279 ULONGEST c;
1280
1282 store_unsigned_integer (valbuf, len, byte_order, c);
1283 }
1284 else if (len == 8)
1285 {
1286 int i, regnum = R0_REGNUM;
1287 for (i = 0; i < len; i += 4)
1288 regcache->raw_read (regnum++, valbuf + i);
1289 }
1290 else
1291 error (_("bad size for return value"));
1292}
1293
1294static void
1296 gdb_byte *valbuf)
1297{
1298 struct gdbarch *gdbarch = regcache->arch ();
1299 if (sh_treat_as_flt_p (type))
1300 {
1301 int len = type->length ();
1303 for (i = 0; i < len; i += 4)
1304 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
1306 valbuf + len - 4 - i);
1307 else
1308 regcache->raw_read (regnum++, valbuf + i);
1309 }
1310 else
1312}
1313
1314/* Write into appropriate registers a function return value
1315 of type TYPE, given in virtual format.
1316 If the architecture is sh4 or sh3e, store a function's return value
1317 in the R0 general register or in the FP0 floating point register,
1318 depending on the type of the return value. In all the other cases
1319 the result is stored in r0, left-justified. */
1320static void
1322 const gdb_byte *valbuf)
1323{
1324 struct gdbarch *gdbarch = regcache->arch ();
1325 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1326 ULONGEST val;
1327 int len = type->length ();
1328
1329 if (len <= 4)
1330 {
1331 val = extract_unsigned_integer (valbuf, len, byte_order);
1333 }
1334 else
1335 {
1336 int i, regnum = R0_REGNUM;
1337 for (i = 0; i < len; i += 4)
1338 regcache->raw_write (regnum++, valbuf + i);
1339 }
1340}
1341
1342static void
1344 const gdb_byte *valbuf)
1345{
1346 struct gdbarch *gdbarch = regcache->arch ();
1347 if (sh_treat_as_flt_p (type))
1348 {
1349 int len = type->length ();
1351 for (i = 0; i < len; i += 4)
1352 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
1354 valbuf + len - 4 - i);
1355 else
1356 regcache->raw_write (regnum++, valbuf + i);
1357 }
1358 else
1360}
1361
1362static enum return_value_convention
1363sh_return_value_nofpu (struct gdbarch *gdbarch, struct value *function,
1364 struct type *type, struct regcache *regcache,
1365 gdb_byte *readbuf, const gdb_byte *writebuf)
1366{
1367 struct type *func_type = function ? function->type () : NULL;
1368
1372 if (writebuf)
1374 else if (readbuf)
1377}
1378
1379static enum return_value_convention
1380sh_return_value_fpu (struct gdbarch *gdbarch, struct value *function,
1381 struct type *type, struct regcache *regcache,
1382 gdb_byte *readbuf, const gdb_byte *writebuf)
1383{
1384 struct type *func_type = function ? function->type () : NULL;
1385
1389 if (writebuf)
1391 else if (readbuf)
1394}
1395
1396static struct type *
1398{
1399 if ((reg_nr >= gdbarch_fp0_regnum (gdbarch)
1400 && (reg_nr <= FP_LAST_REGNUM)) || (reg_nr == FPUL_REGNUM))
1402 else if (reg_nr >= DR0_REGNUM && reg_nr <= DR_LAST_REGNUM)
1404 else
1406}
1407
1408/* Return the GDB type object for the "standard" data type
1409 of data in register N. */
1410static struct type *
1412{
1413 if ((reg_nr >= gdbarch_fp0_regnum (gdbarch)
1414 && (reg_nr <= FP_LAST_REGNUM)) || (reg_nr == FPUL_REGNUM))
1416 else
1418}
1419
1420static struct type *
1422{
1423 return lookup_array_range_type (builtin_type (gdbarch)->builtin_float,
1424 0, high);
1425}
1426
1427static struct type *
1429{
1430 if ((reg_nr >= gdbarch_fp0_regnum (gdbarch)
1431 && (reg_nr <= FP_LAST_REGNUM)) || (reg_nr == FPUL_REGNUM))
1433 else if (reg_nr >= DR0_REGNUM && reg_nr <= DR_LAST_REGNUM)
1435 else if (reg_nr >= FV0_REGNUM && reg_nr <= FV_LAST_REGNUM)
1437 else
1439}
1440
1441static struct type *
1443{
1445}
1446
1447/* Is a register in a reggroup?
1448 The default code in reggroup.c doesn't identify system registers, some
1449 float registers or any of the vector registers.
1450 TODO: sh2a and dsp registers. */
1451static int
1453 const struct reggroup *reggroup)
1454{
1455 if (*gdbarch_register_name (gdbarch, regnum) == '\0')
1456 return 0;
1457
1459 && (regnum == FPUL_REGNUM
1460 || regnum == FPSCR_REGNUM))
1461 return 1;
1462
1464 {
1466 return 1;
1468 return 0;
1469 }
1470
1471 if (regnum == VBR_REGNUM
1472 || regnum == SR_REGNUM
1473 || regnum == FPSCR_REGNUM
1474 || regnum == SSR_REGNUM
1475 || regnum == SPC_REGNUM)
1476 {
1478 return 1;
1480 return 0;
1481 }
1482
1483 /* The default code can cope with any other registers. */
1485}
1486
1487/* On the sh4, the DRi pseudo registers are problematic if the target
1488 is little endian. When the user writes one of those registers, for
1489 instance with 'set var $dr0=1', we want the double to be stored
1490 like this:
1491 fr0 = 0x00 0x00 0xf0 0x3f
1492 fr1 = 0x00 0x00 0x00 0x00
1493
1494 This corresponds to little endian byte order & big endian word
1495 order. However if we let gdb write the register w/o conversion, it
1496 will write fr0 and fr1 this way:
1497 fr0 = 0x00 0x00 0x00 0x00
1498 fr1 = 0x00 0x00 0xf0 0x3f
1499 because it will consider fr0 and fr1 as a single LE stretch of memory.
1500
1501 To achieve what we want we must force gdb to store things in
1502 floatformat_ieee_double_littlebyte_bigword (which is defined in
1503 include/floatformat.h and libiberty/floatformat.c.
1504
1505 In case the target is big endian, there is no problem, the
1506 raw bytes will look like:
1507 fr0 = 0x3f 0xf0 0x00 0x00
1508 fr1 = 0x00 0x00 0x00 0x00
1509
1510 The other pseudo registers (the FVs) also don't pose a problem
1511 because they are stored as 4 individual FP elements. */
1512
1513static struct type *
1515{
1516 sh_gdbarch_tdep *tdep = gdbarch_tdep<sh_gdbarch_tdep> (gdbarch);
1517
1518 if (tdep->sh_littlebyte_bigword_type == NULL)
1519 {
1520 type_allocator alloc (gdbarch);
1522 = init_float_type (alloc, -1, "builtin_type_sh_littlebyte_bigword",
1524 }
1525
1526 return tdep->sh_littlebyte_bigword_type;
1527}
1528
1529static void
1531 struct type *type, gdb_byte *from, gdb_byte *to)
1532{
1533 if (gdbarch_byte_order (gdbarch) != BFD_ENDIAN_LITTLE)
1534 {
1535 /* It is a no-op. */
1536 memcpy (to, from, register_size (gdbarch, regnum));
1537 return;
1538 }
1539
1542 to, type);
1543 else
1544 error
1545 ("sh_register_convert_to_virtual called with non DR register number");
1546}
1547
1548static void
1550 int regnum, const gdb_byte *from, gdb_byte *to)
1551{
1552 if (gdbarch_byte_order (gdbarch) != BFD_ENDIAN_LITTLE)
1553 {
1554 /* It is a no-op. */
1555 memcpy (to, from, register_size (gdbarch, regnum));
1556 return;
1557 }
1558
1562 else
1563 error (_("sh_register_convert_to_raw called with non DR register number"));
1564}
1565
1566/* For vectors of 4 floating point registers. */
1567static int
1568fv_reg_base_num (struct gdbarch *gdbarch, int fv_regnum)
1569{
1570 int fp_regnum;
1571
1573 + (fv_regnum - FV0_REGNUM) * 4;
1574 return fp_regnum;
1575}
1576
1577/* For double precision floating point registers, i.e 2 fp regs. */
1578static int
1579dr_reg_base_num (struct gdbarch *gdbarch, int dr_regnum)
1580{
1581 int fp_regnum;
1582
1584 + (dr_regnum - DR0_REGNUM) * 2;
1585 return fp_regnum;
1586}
1587
1588/* Concatenate PORTIONS contiguous raw registers starting at
1589 BASE_REGNUM into BUFFER. */
1590
1591static enum register_status
1594 int portions,
1595 int base_regnum, gdb_byte *buffer)
1596{
1597 int portion;
1598
1599 for (portion = 0; portion < portions; portion++)
1600 {
1601 enum register_status status;
1602 gdb_byte *b;
1603
1604 b = buffer + register_size (gdbarch, base_regnum) * portion;
1605 status = regcache->raw_read (base_regnum + portion, b);
1606 if (status != REG_VALID)
1607 return status;
1608 }
1609
1610 return REG_VALID;
1611}
1612
1613static enum register_status
1615 int reg_nr, gdb_byte *buffer)
1616{
1617 int base_regnum;
1618 enum register_status status;
1619
1620 if (reg_nr == PSEUDO_BANK_REGNUM)
1621 return regcache->raw_read (BANK_REGNUM, buffer);
1622 else if (reg_nr >= DR0_REGNUM && reg_nr <= DR_LAST_REGNUM)
1623 {
1624 /* Enough space for two float registers. */
1625 gdb_byte temp_buffer[4 * 2];
1626 base_regnum = dr_reg_base_num (gdbarch, reg_nr);
1627
1628 /* Build the value in the provided buffer. */
1629 /* Read the real regs for which this one is an alias. */
1631 2, base_regnum, temp_buffer);
1632 if (status == REG_VALID)
1633 {
1634 /* We must pay attention to the endianness. */
1636 register_type (gdbarch, reg_nr),
1637 temp_buffer, buffer);
1638 }
1639 return status;
1640 }
1641 else if (reg_nr >= FV0_REGNUM && reg_nr <= FV_LAST_REGNUM)
1642 {
1643 base_regnum = fv_reg_base_num (gdbarch, reg_nr);
1644
1645 /* Read the real regs for which this one is an alias. */
1647 4, base_regnum, buffer);
1648 }
1649 else
1650 gdb_assert_not_reached ("invalid pseudo register number");
1651}
1652
1653static void
1655 int reg_nr, const gdb_byte *buffer)
1656{
1657 int base_regnum, portion;
1658
1659 if (reg_nr == PSEUDO_BANK_REGNUM)
1660 {
1661 /* When the bank register is written to, the whole register bank
1662 is switched and all values in the bank registers must be read
1663 from the target/sim again. We're just invalidating the regcache
1664 so that a re-read happens next time it's necessary. */
1665 int bregnum;
1666
1667 regcache->raw_write (BANK_REGNUM, buffer);
1668 for (bregnum = R0_BANK0_REGNUM; bregnum < MACLB_REGNUM; ++bregnum)
1669 regcache->invalidate (bregnum);
1670 }
1671 else if (reg_nr >= DR0_REGNUM && reg_nr <= DR_LAST_REGNUM)
1672 {
1673 /* Enough space for two float registers. */
1674 gdb_byte temp_buffer[4 * 2];
1675 base_regnum = dr_reg_base_num (gdbarch, reg_nr);
1676
1677 /* We must pay attention to the endianness. */
1679 reg_nr, buffer, temp_buffer);
1680
1681 /* Write the real regs for which this one is an alias. */
1682 for (portion = 0; portion < 2; portion++)
1683 regcache->raw_write (base_regnum + portion,
1684 (temp_buffer
1686 base_regnum) * portion));
1687 }
1688 else if (reg_nr >= FV0_REGNUM && reg_nr <= FV_LAST_REGNUM)
1689 {
1690 base_regnum = fv_reg_base_num (gdbarch, reg_nr);
1691
1692 /* Write the real regs for which this one is an alias. */
1693 for (portion = 0; portion < 4; portion++)
1694 regcache->raw_write (base_regnum + portion,
1695 (buffer
1697 base_regnum) * portion));
1698 }
1699}
1700
1701static int
1703{
1704 if (legacy_register_sim_regno (gdbarch, nr) < 0)
1706 if (nr >= DSR_REGNUM && nr <= Y1_REGNUM)
1707 return nr - DSR_REGNUM + SIM_SH_DSR_REGNUM;
1708 if (nr == MOD_REGNUM)
1709 return SIM_SH_MOD_REGNUM;
1710 if (nr == RS_REGNUM)
1711 return SIM_SH_RS_REGNUM;
1712 if (nr == RE_REGNUM)
1713 return SIM_SH_RE_REGNUM;
1714 if (nr >= DSP_R0_BANK_REGNUM && nr <= DSP_R7_BANK_REGNUM)
1715 return nr - DSP_R0_BANK_REGNUM + SIM_SH_R0_BANK_REGNUM;
1716 return nr;
1717}
1718
1719static int
1721{
1722 switch (nr)
1723 {
1724 case TBR_REGNUM:
1725 return SIM_SH_TBR_REGNUM;
1726 case IBNR_REGNUM:
1727 return SIM_SH_IBNR_REGNUM;
1728 case IBCR_REGNUM:
1729 return SIM_SH_IBCR_REGNUM;
1730 case BANK_REGNUM:
1731 return SIM_SH_BANK_REGNUM;
1732 case MACLB_REGNUM:
1733 return SIM_SH_BANK_MACL_REGNUM;
1734 case GBRB_REGNUM:
1735 return SIM_SH_BANK_GBR_REGNUM;
1736 case PRB_REGNUM:
1737 return SIM_SH_BANK_PR_REGNUM;
1738 case IVNB_REGNUM:
1739 return SIM_SH_BANK_IVN_REGNUM;
1740 case MACHB_REGNUM:
1741 return SIM_SH_BANK_MACH_REGNUM;
1742 default:
1743 break;
1744 }
1746}
1747
1748/* Set up the register unwinding such that call-clobbered registers are
1749 not displayed in frames >0 because the true value is not certain.
1750 The 'undefined' registers will show up as 'not available' unless the
1751 CFI says otherwise.
1752
1753 This function is currently set up for SH4 and compatible only. */
1754
1755static void
1757 struct dwarf2_frame_state_reg *reg,
1758 frame_info_ptr this_frame)
1759{
1760 /* Mark the PC as the destination for the return address. */
1762 reg->how = DWARF2_FRAME_REG_RA;
1763
1764 /* Mark the stack pointer as the call frame address. */
1765 else if (regnum == gdbarch_sp_regnum (gdbarch))
1767
1768 /* The above was taken from the default init_reg in dwarf2-frame.c
1769 while the below is SH specific. */
1770
1771 /* Caller save registers. */
1772 else if ((regnum >= R0_REGNUM && regnum <= R0_REGNUM+7)
1773 || (regnum >= FR0_REGNUM && regnum <= FR0_REGNUM+11)
1774 || (regnum >= DR0_REGNUM && regnum <= DR0_REGNUM+5)
1775 || (regnum >= FV0_REGNUM && regnum <= FV0_REGNUM+2)
1776 || (regnum == MACH_REGNUM)
1777 || (regnum == MACL_REGNUM)
1778 || (regnum == FPUL_REGNUM)
1779 || (regnum == SR_REGNUM))
1781
1782 /* Callee save registers. */
1783 else if ((regnum >= R0_REGNUM+8 && regnum <= R0_REGNUM+15)
1784 || (regnum >= FR0_REGNUM+12 && regnum <= FR0_REGNUM+15)
1785 || (regnum >= DR0_REGNUM+6 && regnum <= DR0_REGNUM+8)
1786 || (regnum == FV0_REGNUM+3))
1788
1789 /* Other registers. These are not in the ABI and may or may not
1790 mean anything in frames >0 so don't show them. */
1791 else if ((regnum >= R0_BANK0_REGNUM && regnum <= R0_BANK0_REGNUM+15)
1792 || (regnum == GBR_REGNUM)
1793 || (regnum == VBR_REGNUM)
1794 || (regnum == FPSCR_REGNUM)
1795 || (regnum == SSR_REGNUM)
1796 || (regnum == SPC_REGNUM))
1798}
1799
1800static struct sh_frame_cache *
1802{
1803 struct sh_frame_cache *cache;
1804 int i;
1805
1806 cache = FRAME_OBSTACK_ZALLOC (struct sh_frame_cache);
1807
1808 /* Base address. */
1809 cache->base = 0;
1810 cache->saved_sp = 0;
1811 cache->sp_offset = 0;
1812 cache->pc = 0;
1813
1814 /* Frameless until proven otherwise. */
1815 cache->uses_fp = 0;
1816
1817 /* Saved registers. We initialize these to -1 since zero is a valid
1818 offset (that's where fp is supposed to be stored). */
1819 for (i = 0; i < SH_NUM_REGS; i++)
1820 {
1821 cache->saved_regs[i] = -1;
1822 }
1823
1824 return cache;
1825}
1826
1827static struct sh_frame_cache *
1828sh_frame_cache (frame_info_ptr this_frame, void **this_cache)
1829{
1830 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1831 struct sh_frame_cache *cache;
1832 CORE_ADDR current_pc;
1833 int i;
1834
1835 if (*this_cache)
1836 return (struct sh_frame_cache *) *this_cache;
1837
1838 cache = sh_alloc_frame_cache ();
1839 *this_cache = cache;
1840
1841 /* In principle, for normal frames, fp holds the frame pointer,
1842 which holds the base address for the current stack frame.
1843 However, for functions that don't need it, the frame pointer is
1844 optional. For these "frameless" functions the frame pointer is
1845 actually the frame pointer of the calling frame. */
1846 cache->base = get_frame_register_unsigned (this_frame, FP_REGNUM);
1847 if (cache->base == 0)
1848 return cache;
1849
1850 cache->pc = get_frame_func (this_frame);
1851 current_pc = get_frame_pc (this_frame);
1852 if (cache->pc != 0)
1853 {
1854 ULONGEST fpscr;
1855
1856 /* Check for the existence of the FPSCR register. If it exists,
1857 fetch its value for use in prologue analysis. Passing a zero
1858 value is the best choice for architecture variants upon which
1859 there's no FPSCR register. */
1861 fpscr = get_frame_register_unsigned (this_frame, FPSCR_REGNUM);
1862 else
1863 fpscr = 0;
1864
1865 sh_analyze_prologue (gdbarch, cache->pc, current_pc, cache, fpscr);
1866 }
1867
1868 if (!cache->uses_fp)
1869 {
1870 /* We didn't find a valid frame, which means that CACHE->base
1871 currently holds the frame pointer for our calling frame. If
1872 we're at the start of a function, or somewhere half-way its
1873 prologue, the function's frame probably hasn't been fully
1874 setup yet. Try to reconstruct the base address for the stack
1875 frame by looking at the stack pointer. For truly "frameless"
1876 functions this might work too. */
1878 (this_frame, gdbarch_sp_regnum (gdbarch));
1879 }
1880
1881 /* Now that we have the base address for the stack frame we can
1882 calculate the value of sp in the calling frame. */
1883 cache->saved_sp = cache->base + cache->sp_offset;
1884
1885 /* Adjust all the saved registers such that they contain addresses
1886 instead of offsets. */
1887 for (i = 0; i < SH_NUM_REGS; i++)
1888 if (cache->saved_regs[i] != -1)
1889 cache->saved_regs[i] = cache->saved_sp - cache->saved_regs[i] - 4;
1890
1891 return cache;
1892}
1893
1894static struct value *
1896 void **this_cache, int regnum)
1897{
1898 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1899 struct sh_frame_cache *cache = sh_frame_cache (this_frame, this_cache);
1900
1901 gdb_assert (regnum >= 0);
1902
1903 if (regnum == gdbarch_sp_regnum (gdbarch) && cache->saved_sp)
1904 return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
1905
1906 /* The PC of the previous frame is stored in the PR register of
1907 the current frame. Frob regnum so that we pull the value from
1908 the correct place. */
1910 regnum = PR_REGNUM;
1911
1912 if (regnum < SH_NUM_REGS && cache->saved_regs[regnum] != -1)
1913 return frame_unwind_got_memory (this_frame, regnum,
1914 cache->saved_regs[regnum]);
1915
1916 return frame_unwind_got_register (this_frame, regnum, regnum);
1917}
1918
1919static void
1920sh_frame_this_id (frame_info_ptr this_frame, void **this_cache,
1921 struct frame_id *this_id)
1922{
1923 struct sh_frame_cache *cache = sh_frame_cache (this_frame, this_cache);
1924
1925 /* This marks the outermost frame. */
1926 if (cache->base == 0)
1927 return;
1928
1929 *this_id = frame_id_build (cache->saved_sp, cache->pc);
1930}
1931
1932static const struct frame_unwind sh_frame_unwind = {
1933 "sh prologue",
1938 NULL,
1940};
1941
1942static CORE_ADDR
1943sh_frame_base_address (frame_info_ptr this_frame, void **this_cache)
1944{
1945 struct sh_frame_cache *cache = sh_frame_cache (this_frame, this_cache);
1946
1947 return cache->base;
1948}
1949
1956
1957static struct sh_frame_cache *
1959{
1960 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1961 struct sh_frame_cache *cache;
1962
1963 cache = sh_alloc_frame_cache ();
1964
1965 cache->saved_sp
1967
1968 return cache;
1969}
1970
1971static void
1972sh_stub_this_id (frame_info_ptr this_frame, void **this_cache,
1973 struct frame_id *this_id)
1974{
1975 struct sh_frame_cache *cache;
1976
1977 if (*this_cache == NULL)
1978 *this_cache = sh_make_stub_cache (this_frame);
1979 cache = (struct sh_frame_cache *) *this_cache;
1980
1981 *this_id = frame_id_build (cache->saved_sp, get_frame_pc (this_frame));
1982}
1983
1984static int
1986 frame_info_ptr this_frame,
1987 void **this_prologue_cache)
1988{
1989 CORE_ADDR addr_in_block;
1990
1991 addr_in_block = get_frame_address_in_block (this_frame);
1992 if (in_plt_section (addr_in_block))
1993 return 1;
1994
1995 return 0;
1996}
1997
1998static const struct frame_unwind sh_stub_unwind =
1999{
2000 "sh stub",
2005 NULL,
2007};
2008
2009/* Implement the stack_frame_destroyed_p gdbarch method.
2010
2011 The epilogue is defined here as the area at the end of a function,
2012 either on the `ret' instruction itself or after an instruction which
2013 destroys the function's stack frame. */
2014
2015static int
2017{
2018 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2019 CORE_ADDR func_addr = 0, func_end = 0;
2020
2021 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
2022 {
2023 ULONGEST inst;
2024 /* The sh epilogue is max. 14 bytes long. Give another 14 bytes
2025 for a nop and some fixed data (e.g. big offsets) which are
2026 unfortunately also treated as part of the function (which
2027 means, they are below func_end. */
2028 CORE_ADDR addr = func_end - 28;
2029 if (addr < func_addr + 4)
2030 addr = func_addr + 4;
2031 if (pc < addr)
2032 return 0;
2033
2034 /* First search forward until hitting an rts. */
2035 while (addr < func_end
2036 && !IS_RTS (read_memory_unsigned_integer (addr, 2, byte_order)))
2037 addr += 2;
2038 if (addr >= func_end)
2039 return 0;
2040
2041 /* At this point we should find a mov.l @r15+,r14 instruction,
2042 either before or after the rts. If not, then the function has
2043 probably no "normal" epilogue and we bail out here. */
2044 inst = read_memory_unsigned_integer (addr - 2, 2, byte_order);
2046 byte_order)))
2047 addr -= 2;
2048 else if (!IS_RESTORE_FP (read_memory_unsigned_integer (addr + 2, 2,
2049 byte_order)))
2050 return 0;
2051
2052 inst = read_memory_unsigned_integer (addr - 2, 2, byte_order);
2053
2054 /* Step over possible lds.l @r15+,macl. */
2055 if (IS_MACL_LDS (inst))
2056 {
2057 addr -= 2;
2058 inst = read_memory_unsigned_integer (addr - 2, 2, byte_order);
2059 }
2060
2061 /* Step over possible lds.l @r15+,pr. */
2062 if (IS_LDS (inst))
2063 {
2064 addr -= 2;
2065 inst = read_memory_unsigned_integer (addr - 2, 2, byte_order);
2066 }
2067
2068 /* Step over possible mov r14,r15. */
2069 if (IS_MOV_FP_SP (inst))
2070 {
2071 addr -= 2;
2072 inst = read_memory_unsigned_integer (addr - 2, 2, byte_order);
2073 }
2074
2075 /* Now check for FP adjustments, using add #imm,r14 or add rX, r14
2076 instructions. */
2077 while (addr > func_addr + 4
2078 && (IS_ADD_REG_TO_FP (inst) || IS_ADD_IMM_FP (inst)))
2079 {
2080 addr -= 2;
2081 inst = read_memory_unsigned_integer (addr - 2, 2, byte_order);
2082 }
2083
2084 /* On SH2a check if the previous instruction was perhaps a MOVI20.
2085 That's allowed for the epilogue. */
2086 if ((gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_sh2a
2087 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_sh2a_nofpu)
2088 && addr > func_addr + 6
2089 && IS_MOVI20 (read_memory_unsigned_integer (addr - 4, 2,
2090 byte_order)))
2091 addr -= 4;
2092
2093 if (pc >= addr)
2094 return 1;
2095 }
2096 return 0;
2097}
2098
2099
2100/* Supply register REGNUM from the buffer specified by REGS and LEN
2101 in the register set REGSET to register cache REGCACHE.
2102 REGTABLE specifies where each register can be found in REGS.
2103 If REGNUM is -1, do this for all registers in REGSET. */
2104
2105void
2107 struct regcache *regcache,
2108 int regnum, const void *regs, size_t len)
2109{
2110 struct gdbarch *gdbarch = regcache->arch ();
2111 sh_gdbarch_tdep *tdep = gdbarch_tdep<sh_gdbarch_tdep> (gdbarch);
2113 ? tdep->core_gregmap
2114 : tdep->core_fpregmap);
2115 int i;
2116
2117 for (i = 0; regmap[i].regnum != -1; i++)
2118 {
2119 if ((regnum == -1 || regnum == regmap[i].regnum)
2120 && regmap[i].offset + 4 <= len)
2122 (regmap[i].regnum, (char *) regs + regmap[i].offset);
2123 }
2124}
2125
2126/* Collect register REGNUM in the register set REGSET from register cache
2127 REGCACHE into the buffer specified by REGS and LEN.
2128 REGTABLE specifies where each register can be found in REGS.
2129 If REGNUM is -1, do this for all registers in REGSET. */
2130
2131void
2133 const struct regcache *regcache,
2134 int regnum, void *regs, size_t len)
2135{
2136 struct gdbarch *gdbarch = regcache->arch ();
2137 sh_gdbarch_tdep *tdep = gdbarch_tdep<sh_gdbarch_tdep> (gdbarch);
2139 ? tdep->core_gregmap
2140 : tdep->core_fpregmap);
2141 int i;
2142
2143 for (i = 0; regmap[i].regnum != -1; i++)
2144 {
2145 if ((regnum == -1 || regnum == regmap[i].regnum)
2146 && regmap[i].offset + 4 <= len)
2147 regcache->raw_collect (regmap[i].regnum,
2148 (char *)regs + regmap[i].offset);
2149 }
2150}
2151
2152/* The following two regsets have the same contents, so it is tempting to
2153 unify them, but they are distiguished by their address, so don't. */
2154
2156{
2157 NULL,
2160};
2161
2162static const struct regset sh_corefile_fpregset =
2163{
2164 NULL,
2167};
2168
2169static void
2172 void *cb_data,
2173 const struct regcache *regcache)
2174{
2175 sh_gdbarch_tdep *tdep = gdbarch_tdep<sh_gdbarch_tdep> (gdbarch);
2176
2177 if (tdep->core_gregmap != NULL)
2178 cb (".reg", tdep->sizeof_gregset, tdep->sizeof_gregset,
2179 &sh_corefile_gregset, NULL, cb_data);
2180
2181 if (tdep->core_fpregmap != NULL)
2182 cb (".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset,
2183 &sh_corefile_fpregset, NULL, cb_data);
2184}
2185
2186/* This is the implementation of gdbarch method
2187 return_in_first_hidden_param_p. */
2188
2189static int
2191 struct type *type)
2192{
2193 return 0;
2194}
2195
2196
2197
2198static struct gdbarch *
2200{
2201 /* If there is already a candidate, use it. */
2203 if (arches != NULL)
2204 return arches->gdbarch;
2205
2206 /* None found, create a new architecture from the information
2207 provided. */
2210
2211 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
2212 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2213 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2214 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2215
2216 set_gdbarch_wchar_bit (gdbarch, 2 * TARGET_CHAR_BIT);
2218
2219 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2220 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2221 set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2222 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2223
2229
2232
2235
2237
2239
2242
2246
2248
2251
2253
2255
2258
2259 switch (info.bfd_arch_info->mach)
2260 {
2261 case bfd_mach_sh:
2263 break;
2264
2265 case bfd_mach_sh2:
2267 break;
2268
2269 case bfd_mach_sh2e:
2270 /* doubles on sh2e and sh3e are actually 4 byte. */
2271 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2273
2279 break;
2280
2281 case bfd_mach_sh2a:
2285
2292 break;
2293
2294 case bfd_mach_sh2a_nofpu:
2297
2301 break;
2302
2303 case bfd_mach_sh_dsp:
2306 break;
2307
2308 case bfd_mach_sh3:
2309 case bfd_mach_sh3_nommu:
2310 case bfd_mach_sh2a_nofpu_or_sh3_nommu:
2312 break;
2313
2314 case bfd_mach_sh3e:
2315 case bfd_mach_sh2a_or_sh3e:
2316 /* doubles on sh2e and sh3e are actually 4 byte. */
2317 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2319
2325 break;
2326
2327 case bfd_mach_sh3_dsp:
2330 break;
2331
2332 case bfd_mach_sh4:
2333 case bfd_mach_sh4a:
2334 case bfd_mach_sh2a_or_sh4:
2343 break;
2344
2345 case bfd_mach_sh4_nofpu:
2346 case bfd_mach_sh4a_nofpu:
2347 case bfd_mach_sh4_nommu_nofpu:
2348 case bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu:
2350 break;
2351
2352 case bfd_mach_sh4al_dsp:
2355 break;
2356
2357 default:
2359 break;
2360 }
2361
2362 /* Hook in ABI-specific overrides, if they have been registered. */
2364
2368
2369 return gdbarch;
2370}
2371
2372void _initialize_sh_tdep ();
2373void
2375{
2376 gdbarch_register (bfd_arch_sh, sh_gdbarch_init, NULL);
2377
2379 _("SH specific commands."),
2380 _("SH specific commands."),
2382 &setlist, &showlist);
2383
2384 add_setshow_enum_cmd ("calling-convention", class_vars, sh_cc_enum,
2386 _("Set calling convention used when calling target "
2387 "functions from GDB."),
2388 _("Show calling convention used when calling target "
2389 "functions from GDB."),
2390 _("gcc - Use GCC calling convention (default).\n"
2391 "renesas - Enforce Renesas calling convention."),
2392 NULL, NULL,
2394}
static void pass_on_stack(struct aarch64_call_info *info, struct type *type, struct value *arg)
int regnum
void gdbarch_register(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init, gdbarch_dump_tdep_ftype *dump_tdep, gdbarch_supports_arch_info_ftype *supports_arch_info)
static std::vector< const char * > arches
Definition arch-utils.c:685
int legacy_register_sim_regno(struct gdbarch *gdbarch, int regnum)
Definition arch-utils.c:71
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
Definition arch-utils.c:177
struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
bool find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr, const struct block **block)
Definition blockframe.c:373
enum register_status raw_read(int regnum, gdb_byte *buf)
Definition regcache.c:611
gdbarch * arch() const
Definition regcache.c:231
void invalidate(int regnum)
Definition regcache.c:312
void raw_collect(int regnum, void *buf) const override
Definition regcache.c:1127
void raw_supply(int regnum, const void *buf) override
Definition regcache.c:1062
void raw_write(int regnum, const gdb_byte *buf)
Definition regcache.c:833
struct cmd_list_element * showlist
Definition cli-cmds.c:127
struct cmd_list_element * setlist
Definition cli-cmds.c:119
set_show_commands add_setshow_enum_cmd(const char *name, enum command_class theclass, const char *const *enumlist, const char **var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
Definition cli-decode.c:688
set_show_commands add_setshow_prefix_cmd(const char *name, command_class theclass, const char *set_doc, const char *show_doc, cmd_list_element **set_subcommands_list, cmd_list_element **show_subcommands_list, cmd_list_element **set_list, cmd_list_element **show_list)
Definition cli-decode.c:428
@ class_vars
Definition command.h:55
@ no_class
Definition command.h:53
void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
Definition corefile.c:347
ULONGEST read_memory_unsigned_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
Definition corefile.c:306
void write_memory_unsigned_integer(CORE_ADDR addr, int len, enum bfd_endian byte_order, ULONGEST value)
Definition corefile.c:380
LONGEST read_memory_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
Definition corefile.c:296
@ SPC_REGNUM
Definition cris-tdep.c:124
static void store_unsigned_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, ULONGEST val)
Definition defs.h:515
static ULONGEST extract_unsigned_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
Definition defs.h:480
return_value_convention
Definition defs.h:257
@ RETURN_VALUE_REGISTER_CONVENTION
Definition defs.h:260
@ RETURN_VALUE_STRUCT_CONVENTION
Definition defs.h:267
void dwarf2_append_unwinders(struct gdbarch *gdbarch)
Definition frame.c:1369
void dwarf2_frame_set_init_reg(struct gdbarch *gdbarch, void(*init_reg)(struct gdbarch *, int, struct dwarf2_frame_state_reg *, frame_info_ptr))
Definition frame.c:666
@ DWARF2_FRAME_REG_RA
Definition frame.h:61
@ DWARF2_FRAME_REG_SAME_VALUE
Definition frame.h:52
@ DWARF2_FRAME_REG_UNDEFINED
Definition frame.h:48
@ DWARF2_FRAME_REG_CFA
Definition frame.h:63
void frame_base_set_default(struct gdbarch *gdbarch, const struct frame_base *default_base)
Definition frame-base.c:93
int default_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
struct value * frame_unwind_got_memory(frame_info_ptr frame, int regnum, CORE_ADDR addr)
struct value * frame_unwind_got_register(frame_info_ptr frame, int regnum, int new_regnum)
enum unwind_stop_reason default_frame_unwind_stop_reason(frame_info_ptr this_frame, void **this_cache)
struct value * frame_unwind_got_constant(frame_info_ptr frame, int regnum, ULONGEST val)
void frame_unwind_append_unwinder(struct gdbarch *gdbarch, const struct frame_unwind *unwinder)
ULONGEST get_frame_register_unsigned(frame_info_ptr frame, int regnum)
Definition frame.c:1399
CORE_ADDR get_frame_pc(frame_info_ptr frame)
Definition frame.c:2712
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
Definition frame.c:736
struct gdbarch * get_frame_arch(frame_info_ptr this_frame)
Definition frame.c:3027
CORE_ADDR get_frame_func(frame_info_ptr this_frame)
Definition frame.c:1098
CORE_ADDR get_frame_address_in_block(frame_info_ptr this_frame)
Definition frame.c:2742
@ NORMAL_FRAME
Definition frame.h:187
#define FRAME_OBSTACK_ZALLOC(TYPE)
Definition frame.h:825
@ fp_regnum
Definition frv-tdep.h:36
void set_gdbarch_long_long_bit(struct gdbarch *gdbarch, int long_long_bit)
Definition gdbarch.c:1493
int gdbarch_pc_regnum(struct gdbarch *gdbarch)
Definition gdbarch.c:2054
enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
Definition gdbarch.c:1396
void set_gdbarch_breakpoint_kind_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_kind_from_pc_ftype *breakpoint_kind_from_pc)
void set_gdbarch_register_sim_regno(struct gdbarch *gdbarch, gdbarch_register_sim_regno_ftype *register_sim_regno)
const char * gdbarch_register_name(struct gdbarch *gdbarch, int regnr)
Definition gdbarch.c:2173
void set_gdbarch_frame_align(struct gdbarch *gdbarch, gdbarch_frame_align_ftype *frame_align)
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype *skip_prologue)
void set_gdbarch_wchar_bit(struct gdbarch *gdbarch, int wchar_bit)
Definition gdbarch.c:1680
void set_gdbarch_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype *register_name)
void set_gdbarch_int_bit(struct gdbarch *gdbarch, int int_bit)
Definition gdbarch.c:1459
void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype *return_value)
void set_gdbarch_return_in_first_hidden_param_p(struct gdbarch *gdbarch, gdbarch_return_in_first_hidden_param_p_ftype *return_in_first_hidden_param_p)
void set_gdbarch_believe_pcc_promotion(struct gdbarch *gdbarch, int believe_pcc_promotion)
Definition gdbarch.c:2470
void set_gdbarch_wchar_signed(struct gdbarch *gdbarch, int wchar_signed)
Definition gdbarch.c:1698
void set_gdbarch_fp0_regnum(struct gdbarch *gdbarch, int fp0_regnum)
Definition gdbarch.c:2098
void set_gdbarch_double_bit(struct gdbarch *gdbarch, int double_bit)
Definition gdbarch.c:1612
void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype *inner_than)
void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
Definition gdbarch.c:2047
void set_gdbarch_register_reggroup_p(struct gdbarch *gdbarch, gdbarch_register_reggroup_p_ftype *register_reggroup_p)
int gdbarch_sp_regnum(struct gdbarch *gdbarch)
Definition gdbarch.c:2037
void set_gdbarch_pc_regnum(struct gdbarch *gdbarch, int pc_regnum)
Definition gdbarch.c:2064
void set_gdbarch_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype *register_type)
void set_gdbarch_float_bit(struct gdbarch *gdbarch, int float_bit)
Definition gdbarch.c:1578
void set_gdbarch_stack_frame_destroyed_p(struct gdbarch *gdbarch, gdbarch_stack_frame_destroyed_p_ftype *stack_frame_destroyed_p)
void set_gdbarch_short_bit(struct gdbarch *gdbarch, int short_bit)
Definition gdbarch.c:1442
void set_gdbarch_pseudo_register_write(struct gdbarch *gdbarch, gdbarch_pseudo_register_write_ftype *pseudo_register_write)
void set_gdbarch_num_pseudo_regs(struct gdbarch *gdbarch, int num_pseudo_regs)
Definition gdbarch.c:1958
void set_gdbarch_long_bit(struct gdbarch *gdbarch, int long_bit)
Definition gdbarch.c:1476
void set_gdbarch_ptr_bit(struct gdbarch *gdbarch, int ptr_bit)
Definition gdbarch.c:1732
int gdbarch_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *reggroup)
Definition gdbarch.c:3670
int gdbarch_fp0_regnum(struct gdbarch *gdbarch)
Definition gdbarch.c:2088
void set_gdbarch_pseudo_register_read(struct gdbarch *gdbarch, gdbarch_pseudo_register_read_ftype *pseudo_register_read)
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
Definition gdbarch.c:1941
const struct bfd_arch_info * gdbarch_bfd_arch_info(struct gdbarch *gdbarch)
Definition gdbarch.c:1387
void set_gdbarch_long_double_bit(struct gdbarch *gdbarch, int long_double_bit)
Definition gdbarch.c:1646
void set_gdbarch_sw_breakpoint_from_kind(struct gdbarch *gdbarch, gdbarch_sw_breakpoint_from_kind_ftype *sw_breakpoint_from_kind)
void set_gdbarch_double_format(struct gdbarch *gdbarch, const struct floatformat **double_format)
Definition gdbarch.c:1629
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype *push_dummy_call)
void set_gdbarch_iterate_over_regset_sections(struct gdbarch *gdbarch, gdbarch_iterate_over_regset_sections_ftype *iterate_over_regset_sections)
struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, gdbarch_tdep_up tdep)
Definition gdbarch.c:266
std::unique_ptr< gdbarch_tdep_base > gdbarch_tdep_up
Definition gdbarch.h:73
void iterate_over_regset_sections_cb(const char *sect_name, int supply_size, int collect_size, const struct regset *regset, const char *human_name, void *cb_data)
Definition gdbarch.h:104
function_call_return_method
Definition gdbarch.h:114
@ return_method_struct
Definition gdbarch.h:126
struct type * lookup_array_range_type(struct type *element_type, LONGEST low_bound, LONGEST high_bound)
Definition gdbtypes.c:1397
const struct floatformat * floatformats_ieee_double_littlebyte_bigword[BFD_ENDIAN_UNKNOWN]
Definition gdbtypes.c:97
const struct floatformat * floatformats_ieee_single[BFD_ENDIAN_UNKNOWN]
Definition gdbtypes.c:85
struct type * init_float_type(type_allocator &alloc, int bit, const char *name, const struct floatformat **floatformats, enum bfd_endian byte_order)
Definition gdbtypes.c:3408
const struct builtin_type * builtin_type(struct gdbarch *gdbarch)
Definition gdbtypes.c:6168
struct type * check_typedef(struct type *type)
Definition gdbtypes.c:2966
#define TYPE_CALLING_CONVENTION(thistype)
Definition gdbtypes.h:1943
mach_port_t mach_port_t name mach_port_t mach_port_t name kern_return_t int status
Definition gnu-nat.c:1790
size_t size
Definition go32-nat.c:239
static int regmap[]
@ R0_REGNUM
Definition m32r-tdep.h:34
info(Component c)
Definition gdbarch.py:41
static int in_plt_section(CORE_ADDR pc)
Definition objfiles.h:972
void gdbarch_init_osabi(struct gdbarch_info info, struct gdbarch *gdbarch)
Definition osabi.c:382
int register_size(struct gdbarch *gdbarch, int regnum)
Definition regcache.c:170
enum register_status regcache_cooked_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
Definition regcache.c:796
void regcache_cooked_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
Definition regcache.c:825
struct type * register_type(struct gdbarch *gdbarch, int regnum)
Definition regcache.c:158
const reggroup *const general_reggroup
Definition reggroups.c:251
int default_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *group)
Definition reggroups.c:147
const reggroup *const system_reggroup
Definition reggroups.c:253
const reggroup *const float_reggroup
Definition reggroups.c:252
const reggroup *const all_reggroup
Definition reggroups.c:255
const reggroup *const vector_reggroup
Definition reggroups.c:254
enum var_types type
Definition scm-param.c:142
#define IS_RTS(x)
Definition sh-tdep.c:494
static const char sh_cc_gcc[]
Definition sh-tdep.c:59
#define FPSCR_SZ
Definition sh-tdep.c:490
static const char * sh_sh_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition sh-tdep.c:110
static struct type * sh_sh4_build_float_register_type(struct gdbarch *gdbarch, int high)
Definition sh-tdep.c:1421
static int sh_use_struct_convention(int renesas_abi, struct type *type)
Definition sh-tdep.c:773
#define GET_SOURCE_REG(x)
Definition sh-tdep.c:424
static const struct frame_unwind sh_frame_unwind
Definition sh-tdep.c:1932
static enum return_value_convention sh_return_value_nofpu(struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
Definition sh-tdep.c:1363
#define IS_SHLL_R3(x)
Definition sh-tdep.c:451
#define IS_MOV_ARG_TO_IND_R14_WITH_DISP(x)
Definition sh-tdep.c:476
static const char * sh_active_calling_convention
Definition sh-tdep.c:67
static CORE_ADDR sh_frame_base_address(frame_info_ptr this_frame, void **this_cache)
Definition sh-tdep.c:1943
static const char * sh_sh3_dsp_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition sh-tdep.c:272
#define IS_ADD_R3SP(x)
Definition sh-tdep.c:455
#define IS_ADD_REG_TO_FP(x)
Definition sh-tdep.c:498
static void sh_extract_return_value_fpu(struct type *type, struct regcache *regcache, gdb_byte *valbuf)
Definition sh-tdep.c:1295
#define IS_ADD_IMM_SP(x)
Definition sh-tdep.c:448
static int sh_stack_frame_destroyed_p(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition sh-tdep.c:2016
#define IS_SUB_REG_FROM_SP(x)
Definition sh-tdep.c:488
static CORE_ADDR sh_push_dummy_call_nofpu(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
Definition sh-tdep.c:1162
static int sh_return_in_first_hidden_param_p(struct gdbarch *gdbarch, struct type *type)
Definition sh-tdep.c:2190
static CORE_ADDR sh_skip_prologue(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition sh-tdep.c:686
static void sh_register_convert_to_virtual(struct gdbarch *gdbarch, int regnum, struct type *type, gdb_byte *from, gdb_byte *to)
Definition sh-tdep.c:1530
static int dr_reg_base_num(struct gdbarch *gdbarch, int dr_regnum)
Definition sh-tdep.c:1579
static const char * sh_sh3e_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition sh-tdep.c:144
static const char sh_cc_renesas[]
Definition sh-tdep.c:60
static void sh_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
Definition sh-tdep.c:1920
static const char * sh_sh2a_nofpu_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition sh-tdep.c:217
static CORE_ADDR sh_push_dummy_call_fpu(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
Definition sh-tdep.c:1020
static const gdb_byte * sh_justify_value_in_reg(struct gdbarch *gdbarch, struct value *val, int len)
Definition sh-tdep.c:877
#define IS_MOVL_PCREL_TO_REG(x)
Definition sh-tdep.c:484
#define GET_TARGET_REG(x)
Definition sh-tdep.c:425
#define IS_PUSH(x)
Definition sh-tdep.c:440
static struct sh_frame_cache * sh_frame_cache(frame_info_ptr this_frame, void **this_cache)
Definition sh-tdep.c:1828
#define IS_MACL_LDS(x)
Definition sh-tdep.c:496
static void sh_store_return_value_fpu(struct type *type, struct regcache *regcache, const gdb_byte *valbuf)
Definition sh-tdep.c:1343
static const char * sh_sh4_nofpu_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition sh-tdep.c:327
static CORE_ADDR sh_frame_align(struct gdbarch *ignore, CORE_ADDR sp)
Definition sh-tdep.c:818
#define IS_MOV_ARG_TO_IND_R14(x)
Definition sh-tdep.c:471
static struct type * sh_littlebyte_bigword_type(struct gdbarch *gdbarch)
Definition sh-tdep.c:1514
#define IS_MOVW_PCREL_TO_REG(x)
Definition sh-tdep.c:482
static CORE_ADDR sh_stack_allocsize(int nargs, struct value **args)
Definition sh-tdep.c:896
static int sh_is_renesas_calling_convention(struct type *func_type)
Definition sh-tdep.c:87
static const char * sh_sh3_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition sh-tdep.c:124
#define IS_MOV_SP_FP(x)
Definition sh-tdep.c:444
static const gdb_byte * sh_sw_breakpoint_from_kind(struct gdbarch *gdbarch, int kind, int *size)
Definition sh-tdep.c:390
#define IS_LDS(x)
Definition sh-tdep.c:495
static void sh_stub_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
Definition sh-tdep.c:1972
static struct type * sh_sh4_register_type(struct gdbarch *gdbarch, int reg_nr)
Definition sh-tdep.c:1428
#define IS_MOV_R3(x)
Definition sh-tdep.c:450
static int sh_dsp_register_sim_regno(struct gdbarch *gdbarch, int nr)
Definition sh-tdep.c:1702
static struct gdbarch * sh_gdbarch_init(struct gdbarch_info info, struct gdbarch_list *arches)
Definition sh-tdep.c:2199
static int sh_sh2a_register_sim_regno(struct gdbarch *gdbarch, int nr)
Definition sh-tdep.c:1720
#define IS_STS(x)
Definition sh-tdep.c:432
static const char * sh_sh_dsp_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition sh-tdep.c:254
static int fv_reg_base_num(struct gdbarch *gdbarch, int fv_regnum)
Definition sh-tdep.c:1568
static enum return_value_convention sh_return_value_fpu(struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
Definition sh-tdep.c:1380
static int sh_breakpoint_kind_from_pc(struct gdbarch *gdbarch, CORE_ADDR *pcptr)
Definition sh-tdep.c:382
static struct type * sh_sh3e_register_type(struct gdbarch *gdbarch, int reg_nr)
Definition sh-tdep.c:1411
static int sh_treat_as_flt_p(struct type *type)
Definition sh-tdep.c:1000
static struct sh_frame_cache * sh_alloc_frame_cache(void)
Definition sh-tdep.c:1801
static const struct frame_unwind sh_stub_unwind
Definition sh-tdep.c:1998
static void sh_init_flt_argreg(void)
Definition sh-tdep.c:913
#define IS_JSR(x)
Definition sh-tdep.c:428
static const char * sh_sh2e_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition sh-tdep.c:163
static CORE_ADDR sh_analyze_prologue(struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR limit_pc, struct sh_frame_cache *cache, ULONGEST fpscr)
Definition sh-tdep.c:502
static void sh_register_convert_to_raw(struct gdbarch *gdbarch, struct type *type, int regnum, const gdb_byte *from, gdb_byte *to)
Definition sh-tdep.c:1549
static int sh_next_flt_argreg(struct gdbarch *gdbarch, int len, struct type *func_type)
Definition sh-tdep.c:928
void _initialize_sh_tdep()
Definition sh-tdep.c:2374
static struct type * sh_sh2a_register_type(struct gdbarch *gdbarch, int reg_nr)
Definition sh-tdep.c:1397
#define IS_RESTORE_FP(x)
Definition sh-tdep.c:493
static const struct regset sh_corefile_fpregset
Definition sh-tdep.c:2162
static enum register_status sh_pseudo_register_read(struct gdbarch *gdbarch, readable_regcache *regcache, int reg_nr, gdb_byte *buffer)
Definition sh-tdep.c:1614
void sh_corefile_supply_regset(const struct regset *regset, struct regcache *regcache, int regnum, const void *regs, size_t len)
Definition sh-tdep.c:2106
void sh_corefile_collect_regset(const struct regset *regset, const struct regcache *regcache, int regnum, void *regs, size_t len)
Definition sh-tdep.c:2132
static struct sh_frame_cache * sh_make_stub_cache(frame_info_ptr this_frame)
Definition sh-tdep.c:1958
#define IS_FPUSH(x)
Definition sh-tdep.c:463
static struct type * sh_default_register_type(struct gdbarch *gdbarch, int reg_nr)
Definition sh-tdep.c:1442
static int sh_use_struct_convention_nofpu(int renesas_abi, struct type *type)
Definition sh-tdep.c:809
static void sh_store_return_value_nofpu(struct type *type, struct regcache *regcache, const gdb_byte *valbuf)
Definition sh-tdep.c:1321
static int sh_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *reggroup)
Definition sh-tdep.c:1452
static struct cmd_list_element * showshcmdlist
Definition sh-tdep.c:57
static int sh_stub_unwind_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
Definition sh-tdep.c:1985
static const char * sh_sh4_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition sh-tdep.c:291
#define IS_MOVI20(x)
Definition sh-tdep.c:486
#define IS_MOV_ARG_TO_REG(x)
Definition sh-tdep.c:466
#define IS_MACL_STS(x)
Definition sh-tdep.c:436
static const char * sh_sh2a_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition sh-tdep.c:179
static void sh_extract_return_value_nofpu(struct type *type, struct regcache *regcache, gdb_byte *valbuf)
Definition sh-tdep.c:1270
static const struct frame_base sh_frame_base
Definition sh-tdep.c:1950
const struct regset sh_corefile_gregset
Definition sh-tdep.c:2155
static int flt_argreg_array[FLOAT_ARGLAST_REGNUM - FLOAT_ARG0_REGNUM+1]
Definition sh-tdep.c:909
#define IS_MOV_FP_SP(x)
Definition sh-tdep.c:497
static void sh_iterate_over_regset_sections(struct gdbarch *gdbarch, iterate_over_regset_sections_cb *cb, void *cb_data, const struct regcache *regcache)
Definition sh-tdep.c:2170
static struct cmd_list_element * setshcmdlist
Definition sh-tdep.c:56
static void sh_dwarf2_frame_init_reg(struct gdbarch *gdbarch, int regnum, struct dwarf2_frame_state_reg *reg, frame_info_ptr this_frame)
Definition sh-tdep.c:1756
static void sh_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int reg_nr, const gdb_byte *buffer)
Definition sh-tdep.c:1654
#define SH_NUM_REGS
Definition sh-tdep.c:69
static const char *const sh_cc_enum[]
Definition sh-tdep.c:61
static struct value * sh_frame_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
Definition sh-tdep.c:1895
static const char * sh_sh4al_dsp_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition sh-tdep.c:361
#define IS_ADD_IMM_FP(x)
Definition sh-tdep.c:499
static enum register_status pseudo_register_read_portions(struct gdbarch *gdbarch, readable_regcache *regcache, int portions, int base_regnum, gdb_byte *buffer)
Definition sh-tdep.c:1592
@ ARG0_REGNUM
Definition sh-tdep.h:31
@ GBRB_REGNUM
Definition sh-tdep.h:73
@ FP_LAST_REGNUM
Definition sh-tdep.h:47
@ FR0_REGNUM
Definition sh-tdep.h:44
@ IVNB_REGNUM
Definition sh-tdep.h:71
@ MACL_REGNUM
Definition sh-tdep.h:39
@ TBR_REGNUM
Definition sh-tdep.h:78
@ FLOAT_ARG0_REGNUM
Definition sh-tdep.h:45
@ FLOAT_ARGLAST_REGNUM
Definition sh-tdep.h:46
@ FV_LAST_REGNUM
Definition sh-tdep.h:84
@ SR_REGNUM
Definition sh-tdep.h:40
@ MOD_REGNUM
Definition sh-tdep.h:63
@ DR0_REGNUM
Definition sh-tdep.h:81
@ RE_REGNUM
Definition sh-tdep.h:65
@ IBCR_REGNUM
Definition sh-tdep.h:76
@ DSR_REGNUM
Definition sh-tdep.h:52
@ R0_BANK0_REGNUM
Definition sh-tdep.h:69
@ IBNR_REGNUM
Definition sh-tdep.h:77
@ DSP_R7_BANK_REGNUM
Definition sh-tdep.h:67
@ RS_REGNUM
Definition sh-tdep.h:64
@ PRB_REGNUM
Definition sh-tdep.h:72
@ PR_REGNUM
Definition sh-tdep.h:35
@ DSP_R0_BANK_REGNUM
Definition sh-tdep.h:66
@ MACLB_REGNUM
Definition sh-tdep.h:74
@ Y1_REGNUM
Definition sh-tdep.h:62
@ STRUCT_RETURN_REGNUM
Definition sh-tdep.h:30
@ FV0_REGNUM
Definition sh-tdep.h:83
@ MACHB_REGNUM
Definition sh-tdep.h:70
@ FP_REGNUM
Definition sh-tdep.h:33
@ PSEUDO_BANK_REGNUM
Definition sh-tdep.h:79
@ VBR_REGNUM
Definition sh-tdep.h:37
@ DR_LAST_REGNUM
Definition sh-tdep.h:82
@ FPSCR_REGNUM
Definition sh-tdep.h:43
@ ARGLAST_REGNUM
Definition sh-tdep.h:32
@ GBR_REGNUM
Definition sh-tdep.h:36
@ MACH_REGNUM
Definition sh-tdep.h:38
@ BANK_REGNUM
Definition sh-tdep.h:75
@ SSR_REGNUM
Definition sh-tdep.h:49
@ FPUL_REGNUM
Definition sh-tdep.h:41
struct type * builtin_double
Definition gdbtypes.h:2090
struct type * builtin_int
Definition gdbtypes.h:2080
struct type * builtin_float
Definition gdbtypes.h:2089
enum dwarf2_frame_reg_rule how
Definition frame.h:86
struct type * type() const
Definition gdbtypes.h:547
CORE_ADDR base
Definition sh-tdep.c:74
CORE_ADDR saved_sp
Definition sh-tdep.c:83
CORE_ADDR saved_regs[SH_NUM_REGS]
Definition sh-tdep.c:82
CORE_ADDR pc
Definition sh-tdep.c:76
LONGEST sp_offset
Definition sh-tdep.c:75
int sizeof_fpregset
Definition sh-tdep.h:105
struct sh_corefile_regmap * core_fpregmap
Definition sh-tdep.h:104
struct sh_corefile_regmap * core_gregmap
Definition sh-tdep.h:99
struct type * sh_littlebyte_bigword_type
Definition sh-tdep.h:107
type_code code() const
Definition gdbtypes.h:956
ULONGEST length() const
Definition gdbtypes.h:983
struct field & field(int idx) const
Definition gdbtypes.h:1012
unsigned int num_fields() const
Definition gdbtypes.h:994
Definition value.h:130
gdb::array_view< const gdb_byte > contents()
Definition value.c:1262
struct type * type() const
Definition value.h:180
CORE_ADDR skip_prologue_using_sal(struct gdbarch *gdbarch, CORE_ADDR func_addr)
Definition symtab.c:3963
void target_float_convert(const gdb_byte *from, const struct type *from_type, gdb_byte *to, const struct type *to_type)
const char * target_shortname()
Definition target.c:216