41#include "opcode/mips.h"
72 CORE_ADDR addr,
int mustbe32);
74 CORE_ADDR addr,
int mustbe32);
81#define ST0_FR (1 << 26)
168#define R(n) { "r" #n, n }
169 R(0),
R(1),
R(2),
R(3),
R(4),
R(5),
R(6),
R(7),
170 R(8),
R(9),
R(10),
R(11),
R(12),
R(13),
R(14),
R(15),
171 R(16),
R(17),
R(18),
R(19),
R(20),
R(21),
R(22),
R(23),
172 R(24),
R(25),
R(26),
R(27),
R(28),
R(29),
R(30),
R(31),
191#define R(n) { #n, n }
192 R(0),
R(1),
R(2),
R(3),
R(4),
R(5),
R(6),
R(7),
193 R(8),
R(9),
R(10),
R(11),
R(12),
R(13),
R(14),
R(15),
194 R(16),
R(17),
R(18),
R(19),
R(20),
R(21),
R(22),
R(23),
195 R(24),
R(25),
R(26),
R(27),
R(28),
R(29),
R(30),
R(31),
199#ifndef MIPS_DEFAULT_FPU_TYPE
200#define MIPS_DEFAULT_FPU_TYPE MIPS_FPU_DOUBLE
209#define PROPERTY_GP32 "internal: transfers-32bit-registers"
210#define PROPERTY_GP64 "internal: transfers-64bit-registers"
278 return tdep->mips_fpu_type;
286 return tdep->mips_abi;
304#define MAX_MIPS_ABI_REGSIZE 8
324 internal_error (_(
"bad switch"));
388 return ((addr) & ~(CORE_ADDR) 1);
396 return ((addr) | (CORE_ADDR) 1);
426 elf_symbol_type *elfsym = (elf_symbol_type *) sym;
427 unsigned char st_other;
429 if ((sym->flags & BSF_SYNTHETIC) == 0)
430 st_other = elfsym->internal_elf_sym.st_other;
431 else if ((sym->flags & BSF_FUNCTION) != 0)
432 st_other = sym->udata.i;
436 if (ELF_ST_IS_MICROMIPS (st_other))
442 else if (ELF_ST_IS_MIPS16 (st_other))
492 CORE_ADDR compact_block_start;
511 int reg_num,
int length,
512 enum bfd_endian endian, gdb_byte *in,
513 const gdb_byte *out,
int buf_offset)
525 case BFD_ENDIAN_LITTLE:
528 case BFD_ENDIAN_UNKNOWN:
532 internal_error (_(
"bad switch"));
536 "xfer $%d, reg offset %d, buf offset %d, length %d, ",
542 for (i = 0; i < length; i++)
553 for (i = 0; i < length; i++)
586#define VM_MIN_ADDRESS (CORE_ADDR)0x400000
605 "sr",
"lo",
"hi",
"bad",
"cause",
"pc",
606 "f0",
"f1",
"f2",
"f3",
"f4",
"f5",
"f6",
"f7",
607 "f8",
"f9",
"f10",
"f11",
"f12",
"f13",
"f14",
"f15",
608 "f16",
"f17",
"f18",
"f19",
"f20",
"f21",
"f22",
"f23",
609 "f24",
"f25",
"f26",
"f27",
"f28",
"f29",
"f30",
"f31",
616 "sr",
"lo",
"hi",
"bad",
"cause",
"pc",
617 "",
"",
"",
"",
"",
"",
"",
"",
618 "",
"",
"",
"",
"",
"",
"",
"",
619 "",
"",
"",
"",
"",
"",
"",
"",
620 "",
"",
"",
"",
"",
"",
"",
"",
622 "",
"",
"",
"",
"",
"",
"",
"",
623 "",
"",
"config",
"cache",
"debug",
"depc",
"epc",
628 "sr",
"lo",
"hi",
"bad",
"cause",
"pc",
629 "f0",
"f1",
"f2",
"f3",
"f4",
"f5",
"f6",
"f7",
630 "f8",
"f9",
"f10",
"f11",
"f12",
"f13",
"f14",
"f15",
631 "f16",
"f17",
"f18",
"f19",
"f20",
"f21",
"f22",
"f23",
632 "f24",
"f25",
"f26",
"f27",
"f28",
"f29",
"f30",
"f31",
643 static const char *mips_gpr_names[] = {
644 "zero",
"at",
"v0",
"v1",
"a0",
"a1",
"a2",
"a3",
645 "t0",
"t1",
"t2",
"t3",
"t4",
"t5",
"t6",
"t7",
646 "s0",
"s1",
"s2",
"s3",
"s4",
"s5",
"s6",
"s7",
647 "t8",
"t9",
"k0",
"k1",
"gp",
"sp",
"s8",
"ra",
651 static const char *mips_n32_n64_gpr_names[] = {
652 "zero",
"at",
"v0",
"v1",
"a0",
"a1",
"a2",
"a3",
653 "a4",
"a5",
"a6",
"a7",
"t0",
"t1",
"t2",
"t3",
654 "s0",
"s1",
"s2",
"s3",
"s4",
"s5",
"s6",
"s7",
655 "t8",
"t9",
"k0",
"k1",
"gp",
"sp",
"s8",
"ra"
678 if (0 <= rawnum && rawnum < 32)
681 return mips_n32_n64_gpr_names[rawnum];
683 return mips_gpr_names[rawnum];
695 internal_error (_(
"mips_register_name: bad register number %d"), rawnum);
719 return float_p && pseudo;
721 return vector_p && pseudo;
723 return (!vector_p && !float_p) && pseudo;
728 return raw_p && pseudo;
731 return raw_p && pseudo;
768static enum register_status
770 int cookednum, gdb_byte *buf)
788 enum register_status
status;
797 internal_error (_(
"bad register size"));
828 internal_error (_(
"bad register size"));
858 = gdbarch_tdep<mips_gdbarch_tdep> (
gdbarch);
871 internal_error (_(
"bad register size"));
902 error (_(
"32-bit compatibility mode not supported"));
947 int *optimizedp,
int *unavailablep)
957 optimizedp, unavailablep))
961 optimizedp, unavailablep))
963 *optimizedp = *unavailablep = 0;
973 optimizedp, unavailablep))
976 *optimizedp = *unavailablep = 0;
981 internal_error (_(
"mips_register_to_value: unrecognized case"));
987 struct type *
type,
const gdb_byte *from)
1018 if (from[len-1] & 0x80)
1028 internal_error (_(
"mips_value_to_register: unrecognized case"));
1097 int rawnum =
regnum % num_regs;
1098 struct type *rawtype;
1100 gdb_assert (
regnum >= num_regs &&
regnum < 2 * num_regs);
1104 if (rawtype->
length () == 0)
1174 internal_error (_(
"mips_mask_address_p: bad switch"));
1183 const char *additional_text =
"";
1187 additional_text = _(
" (current architecture is not MIPS)");
1194 additional_text = _(
" (currently \"on\")");
1196 additional_text = _(
" (currently \"off\")");
1200 gdb_printf (file, _(
"Zeroing of upper 32 bits of 64-bit addresses is \"%s\"%s.\n"),
1201 value, additional_text);
1344 static CORE_ADDR adj_pc;
1345 static CORE_ADDR pc;
1348 pc = rel ? pc + addr : addr;
1350 addr = rel ? isa_pc - adj_pc : isa_pc;
1373 CORE_ADDR start_addr;
1465 enum mips_isa isa, CORE_ADDR addr,
int *errp)
1483 internal_error (_(
"invalid ISA"));
1499#define mips32_op(x) (x >> 26)
1500#define itype_op(x) (x >> 26)
1501#define itype_rs(x) ((x >> 21) & 0x1f)
1502#define itype_rt(x) ((x >> 16) & 0x1f)
1503#define itype_immediate(x) (x & 0xffff)
1505#define jtype_op(x) (x >> 26)
1506#define jtype_target(x) (x & 0x03ffffff)
1508#define rtype_op(x) (x >> 26)
1509#define rtype_rs(x) ((x >> 21) & 0x1f)
1510#define rtype_rt(x) ((x >> 16) & 0x1f)
1511#define rtype_rd(x) ((x >> 11) & 0x1f)
1512#define rtype_shamt(x) ((x >> 6) & 0x1f)
1513#define rtype_funct(x) (x & 0x3f)
1516#define micromips_op(x) ((x) >> 10)
1520#define b0s4_imm(x) ((x) & 0xf)
1521#define b0s5_imm(x) ((x) & 0x1f)
1522#define b0s5_reg(x) ((x) & 0x1f)
1523#define b0s7_imm(x) ((x) & 0x7f)
1524#define b0s10_imm(x) ((x) & 0x3ff)
1525#define b1s4_imm(x) (((x) >> 1) & 0xf)
1526#define b1s9_imm(x) (((x) >> 1) & 0x1ff)
1527#define b2s3_cc(x) (((x) >> 2) & 0x7)
1528#define b4s2_regl(x) (((x) >> 4) & 0x3)
1529#define b5s5_op(x) (((x) >> 5) & 0x1f)
1530#define b5s5_reg(x) (((x) >> 5) & 0x1f)
1531#define b6s4_op(x) (((x) >> 6) & 0xf)
1532#define b7s3_reg(x) (((x) >> 7) & 0x7)
1536#define b0s6_op(x) ((x) & 0x3f)
1537#define b0s11_op(x) ((x) & 0x7ff)
1538#define b0s12_imm(x) ((x) & 0xfff)
1539#define b0s16_imm(x) ((x) & 0xffff)
1540#define b0s26_imm(x) ((x) & 0x3ffffff)
1541#define b6s10_ext(x) (((x) >> 6) & 0x3ff)
1542#define b11s5_reg(x) (((x) >> 11) & 0x1f)
1543#define b12s4_op(x) (((x) >> 12) & 0xf)
1560 if ((insn & 0xf800) == 0xf000)
1567 internal_error (_(
"invalid ISA"));
1582 ULONGEST inst, CORE_ADDR pc,
int count)
1585 int cnum = (
itype_rt (inst) >> 2) & (count - 1);
1587 int mask = (1 << count) - 1;
1595 fcs = regcache_raw_get_unsigned (
regcache, fcsr);
1596 cond = ((fcs >> 24) & 0xfe) | ((fcs >> 23) & 0x01);
1598 if (((cond >> cnum) & mask) != mask * !tf)
1613 return (info->mach == bfd_mach_mips_octeon
1614 || info->mach == bfd_mach_mips_octeonp
1615 || info->mach == bfd_mach_mips_octeon2);
1629 if (op == 50 || op == 54 || op == 58 || op == 62)
1646 if ((inst & 0xe0000000) != 0)
1661 goto greater_branch;
1666 else if (op == 17 &&
itype_rs (inst) == 8)
1669 else if (op == 17 &&
itype_rs (inst) == 9
1673 else if (op == 17 &&
itype_rs (inst) == 10
1685 pc = ((pc + 4) & ~(CORE_ADDR) 0x0fffffff) + reg + 1;
1691 branch_if = op == 58 || op == 62;
1695 if (op == 54 || op == 62)
1727 = gdbarch_tdep<mips_gdbarch_tdep> (
gdbarch);
1769 unsigned int pos = (op & 2) ? 64 : 32;
1776 if ((regcache_raw_get_unsigned (
regcache,
1777 dspctl) & 0x7f) >= pos)
1795 pc = reg + ((pc + 4) & ~(CORE_ADDR) 0x0fffffff);
1839 return ((
b0s7_imm (insn) ^ 0x40) - 0x40) << 1;
1848 return ((
b0s10_imm (insn) ^ 0x200) - 0x200) << 1;
1857 return ((
b0s16_imm (insn) ^ 0x8000) - 0x8000) << 1;
1878 ULONGEST insn, CORE_ADDR pc,
int count)
1881 int cnum =
b2s3_cc (insn >> 16) & (count - 1);
1882 int tf =
b5s5_op (insn >> 16) & 1;
1883 int mask = (1 << count) - 1;
1891 fcs = regcache_raw_get_unsigned (
regcache, fcsr);
1892 cond = ((fcs >> 24) & 0xfe) | ((fcs >> 23) & 0x01);
1894 if (((cond >> cnum) & mask) != mask * !tf)
1938 = gdbarch_tdep<mips_gdbarch_tdep> (
gdbarch);
2002 if (((insn >> 16) & 0x3) == 0x0)
2010 unsigned int pos = (
b5s5_op (insn >> 16) & 1) ? 32 : 64;
2017 if ((regcache_raw_get_unsigned (
regcache,
2018 dspctl) & 0x7f) >= pos)
2029 if (((insn >> 16) & 0x2) == 0x0)
2031 ((insn >> 16) & 0x1) + 1);
2036 if (((insn >> 16) & 0x3) == 0x1)
2045 pc = ((pc | 0x7fffffe) ^ 0x7fffffe) | (
b0s26_imm (insn) << 1);
2065 pc = ((pc | 0xfffffff) ^ 0xfffffff) | (
b0s26_imm (insn) << 2);
2075 if ((
b5s5_op (insn) & 0x1c) == 0xc)
2078 else if (
b5s5_op (insn) == 0x18)
2167 value = (extension >> 16) & 0x1f;
2169 value |= (extension >> 21) & 0x3f;
2171 value |= extension & 0x1f;
2196 unsigned int extension,
2203 switch (insn_format)
2215 value = inst & 0x7ff;
2236 value = inst & 0xff;
2240 regx = (inst >> 8) & 0x07;
2246 unsigned long value;
2247 unsigned int nexthalf;
2248 value = ((inst & 0x1f) << 5) | ((inst >> 5) & 0x1f);
2259 internal_error (_(
"bad switch"));
2273 return pc + (offset << 1) + 2;
2278 unsigned int extension,
unsigned int insn)
2281 int op = (insn >> 11);
2296 pc = ((pc + 2) & (~(CORE_ADDR) 0x0fffffff)) | (upk.
offset << 2);
2297 if ((insn >> 10) & 0x01)
2335 if (((upk.
regx == 0) && (reg == 0))
2336 || ((upk.
regx == 1) && (reg != 0)))
2350 upk.
regx = (insn >> 8) & 0x07;
2351 upk.
regy = (insn >> 5) & 0x07;
2352 if ((upk.
regy & 1) == 0)
2413 switch (insn & 0xf800)
2416 return (insn & 0x009f) == 0x80;
2418 return (insn & 0x0600) == 0;
2437 return (
b5s5_op (insn) == 0x18
2442 return (
b5s5_op (insn) & 0x1d) == 0x5;
2468 int regnum, CORE_ADDR offset)
2470 if (this_cache != NULL
2489 unsigned short inst,
2496 if ((prev_inst & 0xf800) == 0xf000)
2498 offset = ((prev_inst & 0x1f) << 11) | (prev_inst & 0x7e0);
2499 if (offset & 0x8000)
2500 offset = 0 - (0x10000 - (offset & 0xffff));
2501 return offset | (inst & 0x1f);
2505 int max_imm = 1 << nbits;
2506 int mask = max_imm - 1;
2507 int sign_bit = max_imm >> 1;
2509 offset = inst & mask;
2510 if (is_signed && (offset & sign_bit))
2511 offset = 0 - (max_imm - offset);
2512 return offset * scale;
2523 CORE_ADDR start_pc, CORE_ADDR limit_pc,
2527 int prev_non_prologue_insn = 0;
2528 int this_non_prologue_insn;
2529 int non_prologue_insns = 0;
2532 CORE_ADDR frame_addr = 0;
2534 long frame_offset = 0;
2535 long frame_adjust = 0;
2537 unsigned short prev_inst = 0;
2539 unsigned entry_inst = 0;
2540 unsigned save_inst = 0;
2541 int prev_delay_slot = 0;
2545 int extend_bytes = 0;
2546 int prev_extend_bytes = 0;
2547 CORE_ADDR end_prologue_addr;
2551 if (this_frame != NULL)
2558 if (limit_pc > start_pc + 200)
2559 limit_pc = start_pc + 200;
2567 this_non_prologue_insn = 0;
2583 if ((inst & 0xf800) == 0xf000)
2589 prev_extend_bytes = extend_bytes;
2592 if ((inst & 0xff00) == 0x6300
2593 || (inst & 0xff00) == 0xfb00)
2597 frame_offset -= offset;
2604 else if ((inst & 0xf800) == 0xd000)
2610 else if ((inst & 0xff00) == 0xf900)
2616 else if ((inst & 0xff00) == 0x6200)
2621 else if ((inst & 0xff00) == 0xfa00)
2626 else if (inst == 0x673d)
2631 else if ((inst & 0xff00) == 0x0100)
2634 frame_addr = sp + offset;
2636 frame_adjust = offset;
2638 else if ((inst & 0xFF00) == 0xd900)
2644 else if ((inst & 0xFF00) == 0x7900)
2650 else if ((inst & 0xf81f) == 0xe809
2651 && (inst & 0x700) != 0x700)
2653 else if ((inst & 0xff80) == 0x6480)
2656 if (prev_extend_bytes)
2657 save_inst |= prev_inst << 16;
2659 else if ((inst & 0xff1c) == 0x6704)
2679 this_non_prologue_insn = 1;
2682 non_prologue_insns += this_non_prologue_insn;
2686 if (prev_delay_slot || non_prologue_insns > 1
2690 prev_non_prologue_insn = this_non_prologue_insn;
2691 prev_delay_slot = in_delay_slot;
2692 prev_pc = cur_pc - prev_extend_bytes;
2701 if (entry_inst != 0)
2703 int areg_count = (entry_inst >> 8) & 7;
2704 int sreg_count = (entry_inst >> 6) & 3;
2714 for (reg = 4, offset = 0; reg < areg_count + 4; reg++)
2722 if (entry_inst & 0x20)
2729 for (reg = 16; reg < sreg_count + 16; reg++)
2744 static int args_table[16] = {
2745 0, 0, 0, 0, 1, 1, 1, 1,
2746 2, 2, 2, 0, 3, 3, 4, -1,
2748 static int astatic_table[16] = {
2749 0, 1, 2, 3, 0, 1, 2, 3,
2750 0, 1, 2, 4, 0, 1, 0, -1,
2752 int aregs = (save_inst >> 16) & 0xf;
2753 int xsregs = (save_inst >> 24) & 0x7;
2754 int args = args_table[aregs];
2755 int astatic = astatic_table[aregs];
2760 warning (_(
"Invalid number of argument registers encoded in SAVE."));
2765 warning (_(
"Invalid number of static registers encoded in SAVE."));
2770 frame_size = ((save_inst >> 16) & 0xf0) | (save_inst & 0xf);
2771 if (frame_size == 0 && (save_inst >> 16) == 0)
2774 frame_offset += frame_size;
2790 if (save_inst & 0x40)
2804 for (reg = 18 + xsregs - 1; reg > 18 - 1; reg--)
2811 if (save_inst & 0x10)
2817 if (save_inst & 0x20)
2831 if (this_cache != NULL)
2836 + frame_offset - frame_adjust);
2849 end_prologue_addr = (prev_non_prologue_insn || prev_delay_slot
2850 ? prev_pc : cur_pc - prev_extend_bytes);
2852 return end_prologue_addr;
2865 if ((*this_cache) != NULL)
2868 (*this_cache) = cache;
2874 CORE_ADDR start_addr;
2877 if (start_addr == 0)
2881 if (start_addr == 0)
2902 if (info->base == 0)
2907static struct value *
2909 void **this_cache,
int regnum)
2929 "mips insn16 prologue",
2973 imm = (imm ^ 0x100) - 0x100;
2974 if (imm > -3 && imm < 2)
2984 CORE_ADDR start_pc, CORE_ADDR limit_pc,
2988 CORE_ADDR end_prologue_addr;
2989 int prev_non_prologue_insn = 0;
2991 int this_non_prologue_insn;
2992 int non_prologue_insns = 0;
2993 long frame_offset = 0;
2994 long frame_adjust = 0;
2995 int prev_delay_slot = 0;
3016 if (this_frame != NULL)
3023 if (limit_pc > start_pc + 200)
3024 limit_pc = start_pc + 200;
3030 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc +=
loc)
3032 this_non_prologue_insn = 0;
3063 else if (op != 0x150
3067 this_non_prologue_insn = 1;
3073 reglist = sreg =
b5s5_reg (insn >> 16);
3074 offset = (
b0s12_imm (insn) ^ 0x800) - 0x800;
3075 if ((op == 0x9 || op == 0xc)
3081 s = 4 << ((
b12s4_op (insn) & 0x4) == 0x4);
3085 sreg + 1, sp + offset + s);
3087 else if ((op == 0xd || op == 0xf)
3092 && ((reglist >= 1 && reglist <= 9)
3093 || (reglist >= 16 && reglist <= 25)))
3095 int sreglist = std::min(reglist & 0xf, 8);
3097 s = 4 << ((
b12s4_op (insn) & 0x2) == 0x2);
3098 for (i = 0; i < sreglist; i++)
3100 if ((reglist & 0xf) > 8)
3102 if ((reglist & 0x10) == 0x10)
3107 this_non_prologue_insn = 1;
3116 offset = (
b0s16_imm (insn) ^ 0x8000) - 0x8000;
3123 frame_adjust = offset;
3126 else if (sreg != 28 || dreg != 28)
3128 this_non_prologue_insn = 1;
3134 if (
b5s5_op (insn >> 16) == 0xd
3138 v1_off = ((
b0s16_imm (insn) << 16) ^ 0x80000000) - 0x80000000;
3139 else if (
b5s5_op (insn >> 16) != 0xd
3143 this_non_prologue_insn = 1;
3150 if (sreg == 3 && dreg == 3)
3154 this_non_prologue_insn = 1;
3162 this_non_prologue_insn = 1;
3169 offset = (
b0s16_imm (insn) ^ 0x8000) - 0x8000;
3174 this_non_prologue_insn = 1;
3183 this_non_prologue_insn = 1;
3199 else if ((sreg & 0x1c) != 0x4)
3201 this_non_prologue_insn = 1;
3208 offset = ((
b0s4_imm (insn) << 2) ^ 0x20) - 0x20;
3210 for (i = 0; i <= reglist; i++)
3216 this_non_prologue_insn = 1;
3220 if ((insn & 0x1) == 0x1)
3226 sp_adj = (
b1s4_imm (insn) ^ 8) - 8;
3228 this_non_prologue_insn = 1;
3243 this_non_prologue_insn = 1;
3249 frame_offset -= sp_adj;
3251 non_prologue_insns += this_non_prologue_insn;
3256 if (prev_delay_slot || non_prologue_insns > 1 || sp_adj > 0
3260 prev_non_prologue_insn = this_non_prologue_insn;
3261 prev_delay_slot = in_delay_slot;
3265 if (this_cache != NULL)
3270 + frame_offset - frame_adjust);
3284 = prev_non_prologue_insn || prev_delay_slot ? prev_pc : cur_pc;
3286 return end_prologue_addr;
3299 if ((*this_cache) != NULL)
3303 (*this_cache) = cache;
3309 CORE_ADDR start_addr;
3312 if (start_addr == 0)
3316 if (start_addr == 0)
3337 if (info->base == 0)
3342static struct value *
3344 void **this_cache,
int regnum)
3365 "mips micro prologue",
3409 if (this_cache == NULL || this_cache->
saved_regs == NULL)
3418 for (i = 0; i < num_regs; i++)
3429 CORE_ADDR start_pc, CORE_ADDR limit_pc,
3433 int prev_non_prologue_insn;
3434 int this_non_prologue_insn;
3435 int non_prologue_insns;
3436 CORE_ADDR frame_addr = 0;
3438 int prev_delay_slot;
3445 CORE_ADDR end_prologue_addr;
3446 int seen_sp_adjust = 0;
3447 int load_immediate_bytes = 0;
3453 if (this_frame != NULL)
3460 if (limit_pc > start_pc + 200)
3461 limit_pc = start_pc + 200;
3464 prev_non_prologue_insn = 0;
3465 non_prologue_insns = 0;
3466 prev_delay_slot = 0;
3475 unsigned long inst, high_word;
3479 this_non_prologue_insn = 0;
3487 high_word = (inst >> 16) & 0xffff;
3488 offset = ((inst & 0xffff) ^ 0x8000) - 0x8000;
3489 reg = high_word & 0x1f;
3491 if (high_word == 0x27bd
3492 || high_word == 0x23bd
3493 || high_word == 0x67bd)
3496 frame_offset -= offset;
3504 else if (((high_word & 0xFFE0) == 0xafa0)
3505 && !regsize_is_64_bits)
3509 else if (((high_word & 0xFFE0) == 0xffa0)
3510 && regsize_is_64_bits)
3515 else if (high_word == 0x27be)
3518 if (offset != frame_offset)
3519 frame_addr = sp + offset;
3522 unsigned alloca_adjust;
3529 alloca_adjust = (unsigned) (frame_addr - (sp + offset));
3530 if (alloca_adjust > 0)
3535 sp += alloca_adjust;
3548 else if (inst == 0x03A0F021 || inst == 0x03a0f025 || inst == 0x03a0f02d)
3553 unsigned alloca_adjust;
3559 alloca_adjust = (unsigned) (frame_addr - sp);
3560 if (alloca_adjust > 0)
3575 else if ((high_word & 0xFFE0) == 0xafc0
3576 && !regsize_is_64_bits)
3580 else if ((high_word & 0xFFE0) == 0xE7A0
3581 || (high_word & 0xF3E0) == 0xA3C0
3582 || (inst & 0xFF9F07FF) == 0x00800021
3583 || high_word == 0x3c1c
3584 || high_word == 0x279c
3585 || high_word == 0x679c
3586 || inst == 0x0399e021
3587 || inst == 0x033ce021
3588 || inst == 0x0399e02d
3589 || inst == 0x033ce02d
3600 else if (!seen_sp_adjust
3602 && (high_word == 0x3c01
3603 || high_word == 0x3c08
3604 || high_word == 0x3421
3605 || high_word == 0x3508
3606 || high_word == 0x3401
3607 || high_word == 0x3408
3623 this_non_prologue_insn = 1;
3626 non_prologue_insns += this_non_prologue_insn;
3630 if (prev_delay_slot || non_prologue_insns > 1)
3633 prev_non_prologue_insn = this_non_prologue_insn;
3634 prev_delay_slot = in_delay_slot;
3638 if (this_cache != NULL)
3658 = prev_non_prologue_insn || prev_delay_slot ? prev_pc : cur_pc;
3663 if (load_immediate_bytes && !seen_sp_adjust)
3664 end_prologue_addr -= load_immediate_bytes;
3666 return end_prologue_addr;
3680 if ((*this_cache) != NULL)
3684 (*this_cache) = cache;
3690 CORE_ADDR start_addr;
3693 if (start_addr == 0)
3697 if (start_addr == 0)
3718 if (info->base == 0)
3723static struct value *
3725 void **this_cache,
int regnum)
3744 "mips insn32 prologue",
3784 CORE_ADDR start_addr;
3785 CORE_ADDR stack_addr;
3790 if ((*this_cache) != NULL)
3793 (*this_cache) = this_trad_cache;
3812 return this_trad_cache;
3824static struct value *
3826 void **this_cache,
int regnum)
3919 return addr &= 0xffffffffUL;
3932#define LL_OPCODE 0x30
3933#define LLD_OPCODE 0x34
3934#define SC_OPCODE 0x38
3935#define SCD_OPCODE 0x3c
3937static std::vector<CORE_ADDR>
3940 CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
3942 CORE_ADDR branch_bp;
3946 int last_breakpoint = 0;
3947 const int atomic_sequence_length = 16;
3956 for (insn_count = 0; insn_count < atomic_sequence_length; ++insn_count)
4003 if (last_breakpoint >= 1)
4006 breaks[1] = branch_bp;
4025 if (last_breakpoint && pc <= breaks[1] && breaks[1] <= breaks[0])
4026 last_breakpoint = 0;
4028 std::vector<CORE_ADDR> next_pcs;
4031 for (index = 0; index <= last_breakpoint; index++)
4032 next_pcs.push_back (breaks[index]);
4037static std::vector<CORE_ADDR>
4041 const int atomic_sequence_length = 16;
4042 int last_breakpoint = 0;
4043 CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
4044 CORE_ADDR branch_bp = 0;
4059 if ((
b12s4_op (insn) & 0xb) != 0x3)
4066 for (insn_count = 0;
4067 !sc_found && insn_count < atomic_sequence_length;
4085 if ((
b5s5_op (insn) & 0x18) != 0x0
4088 && (
b5s5_op (insn) & 0x1d) != 0x11
4090 && ((
b5s5_op (insn) & 0x1e) != 0x14
4091 || (insn & 0x3) != 0x0)
4093 && (
b5s5_op (insn) & 0x1e) != 0x1a
4095 && ((
b5s5_op (insn) & 0x1e) != 0x1c
4096 || (insn & 0x3) != 0x0)
4098 && ((
b5s5_op (insn) & 0x1c) != 0x1c
4099 || (insn & 0x3) != 0x1))
4133 if ((
b12s4_op (insn) & 0xb) == 0xb)
4152 if ((
b5s5_op (insn) & 0x1c) != 0xc
4166 if (last_breakpoint >= 1)
4169 breaks[1] = branch_bp;
4181 if (last_breakpoint && pc <= breaks[1] && breaks[1] <= breaks[0])
4182 last_breakpoint = 0;
4184 std::vector<CORE_ADDR> next_pcs;
4187 for (index = 0; index <= last_breakpoint; index++)
4188 next_pcs.push_back (breaks[index]);
4193static std::vector<CORE_ADDR>
4209std::vector<CORE_ADDR>
4213 CORE_ADDR pc, next_pc;
4218 if (!next_pcs.empty ())
4241 return (insn & ~hint) == 0x3e00008;
4272 for (start_pc -= instlen;; start_pc -= instlen)
4273 if (start_pc < fence)
4281 static int blurb_printed = 0;
4283 warning (_(
"GDB can't find the start of the function at %s."),
4295 GDB is unable to find the start of the function at %s\n\
4296and thus can't determine the size of that function's stack frame.\n\
4297This means that GDB may be unable to access that stack frame, or\n\
4298the frames below it.\n\
4299 This problem is most likely caused by an invalid program counter or\n\
4301 However, if you think GDB should simply search farther back\n\
4302from %s for code which looks like the beginning of a\n\
4303function, you can increase the range of the search using the `set\n\
4304heuristic-fence-post' command.\n",
4314 unsigned short inst;
4325 if ((inst & 0xff80) == 0x6480)
4327 if (start_pc - instlen >= fence)
4330 start_pc - instlen, NULL);
4331 if ((inst & 0xf800) == 0xf000)
4332 start_pc -= instlen;
4336 else if (((inst & 0xf81f) == 0xe809
4337 && (inst & 0x700) != 0x700)
4338 || (inst & 0xff80) == 0x6380
4339 || (inst & 0xff80) == 0xfb80
4340 || ((inst & 0xf810) == 0xf010 && seen_adjsp))
4342 else if ((inst & 0xff00) == 0x6300
4343 || (inst & 0xff00) == 0xfb00)
4371 offset = (
b0s16_imm (insn) ^ 0x8000) - 0x8000;
4387 if ((insn & 0x1) == 0x1)
4399 offset = (
b1s4_imm (insn) ^ 8) - 8;
4433 struct type *arg_type)
4435 return ((typecode == TYPE_CODE_FLT
4437 && (typecode == TYPE_CODE_STRUCT
4438 || typecode == TYPE_CODE_UNION)
4453 if (typecode == TYPE_CODE_FLT &&
type->
length () == 8)
4455 else if (typecode == TYPE_CODE_STRUCT)
4461 else if (typecode == TYPE_CODE_UNION)
4466 for (i = 0; i < n; i++)
4479 return align_down (addr, 16);
4486 CORE_ADDR funaddr,
struct value **args,
4487 int nargs,
struct type *value_type,
4488 CORE_ADDR *real_pc, CORE_ADDR *bp_addr,
4491 static gdb_byte nop_insn[] = { 0, 0, 0, 0 };
4496 bp_slot = sp -
sizeof (nop_insn);
4511 nop_addr = bp_slot -
sizeof (nop_insn);
4524 int nargs,
struct value **args, CORE_ADDR sp,
4526 CORE_ADDR struct_addr)
4532 int stack_offset = 0;
4551 sp = align_down (sp, 16);
4552 struct_addr = align_down (struct_addr, 16);
4557 for (argnum = 0; argnum < nargs; argnum++)
4558 arg_space += align_up (args[argnum]->
type ()->length (),
4560 sp -= align_up (arg_space, 16);
4564 "mips_eabi_push_dummy_call: sp=%s allocated %ld\n",
4566 (
long) align_up (arg_space, 16));
4577 "mips_eabi_push_dummy_call: "
4578 "struct_return reg=%d %s\n",
4586 for (argnum = 0; argnum < nargs; argnum++)
4588 const gdb_byte *val;
4592 struct value *arg = args[argnum];
4594 int len = arg_type->
length ();
4599 "mips_eabi_push_dummy_call: %d len=%d type=%d",
4600 argnum + 1, len, (
int) typecode);
4604 if (len > abi_regsize
4605 && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION))
4607 gdb_assert (abi_regsize <= ARRAY_SIZE (ref_valbuf));
4610 typecode = TYPE_CODE_PTR;
4626 if ((float_argreg & 1))
4653 == BFD_ENDIAN_BIG ? 4 : 0;
4661 float_argreg, phex (regval, 4));
4669 float_argreg, phex (regval, 4));
4681 float_argreg, phex (regval, len));
4695 int odd_sized_struct = (len > abi_regsize && len % abi_regsize != 0);
4702 int stack_used_p = 0;
4703 int partial_len = (len < abi_regsize ? len : abi_regsize);
4716 int longword_offset = 0;
4721 if (abi_regsize == 8
4722 && (typecode == TYPE_CODE_INT
4723 || typecode == TYPE_CODE_PTR
4724 || typecode == TYPE_CODE_FLT) && len <= 4)
4725 longword_offset = abi_regsize - len;
4726 else if ((typecode == TYPE_CODE_STRUCT
4727 || typecode == TYPE_CODE_UNION)
4728 && arg_type->
length () < abi_regsize)
4729 longword_offset = abi_regsize - len;
4740 addr = sp + stack_offset + longword_offset;
4747 for (i = 0; i < partial_len; i++)
4770 phex (regval, abi_regsize));
4785 stack_offset += align_up (partial_len, abi_regsize);
4803 gdb_byte *readbuf,
const gdb_byte *writebuf)
4806 int fp_return_type = 0;
4807 int offset,
regnum, xfer;
4815 if (
type->
code () == TYPE_CODE_FLT)
4819 if ((
type->
code () == TYPE_CODE_STRUCT
4820 ||
type->
code () == TYPE_CODE_UNION)
4874 if (arg_type->
code () != TYPE_CODE_STRUCT)
4883 for (i = 0; i < arg_type->
num_fields (); i++)
4886 struct type *field_type;
4902 if (pos + field_type->
length () <= offset)
4906 if (field_type->
code () == TYPE_CODE_FLT
4921 int nargs,
struct value **args, CORE_ADDR sp,
4923 CORE_ADDR struct_addr)
4929 int stack_offset = 0;
4947 sp = align_down (sp, 16);
4948 struct_addr = align_down (struct_addr, 16);
4951 for (argnum = 0; argnum < nargs; argnum++)
4952 arg_space += align_up (args[argnum]->
type ()->
length (),
4954 sp -= align_up (arg_space, 16);
4958 "mips_n32n64_push_dummy_call: sp=%s allocated %ld\n",
4960 (
long) align_up (arg_space, 16));
4971 "mips_n32n64_push_dummy_call: "
4972 "struct_return reg=%d %s\n",
4980 for (argnum = 0; argnum < nargs; argnum++)
4982 const gdb_byte *val;
4983 struct value *arg = args[argnum];
4985 int len = arg_type->
length ();
4990 "mips_n32n64_push_dummy_call: %d len=%d type=%d",
4991 argnum + 1, len, (
int) typecode);
4999 && (float_argreg & 1))
5014 float_argreg, phex (regval, reglen));
5019 argreg, phex (regval, reglen));
5026 reglen, byte_order);
5029 float_argreg, phex (regval, reglen));
5034 argreg, phex (regval, reglen));
5058 int stack_used_p = 0;
5073 int longword_offset = 0;
5078 if ((typecode == TYPE_CODE_INT
5079 || typecode == TYPE_CODE_PTR)
5092 addr = sp + stack_offset + longword_offset;
5099 for (i = 0; i < partial_len; i++)
5120 if ((partial_len == 4
5121 && (typecode == TYPE_CODE_PTR
5122 || typecode == TYPE_CODE_INT))
5124 && typecode == TYPE_CODE_INT
5143 && (typecode == TYPE_CODE_STRUCT
5144 || typecode == TYPE_CODE_UNION))
5155 arg_type->
length () - len))
5195 gdb_byte *readbuf,
const gdb_byte *writebuf)
5234 else if ((
type->
code () == TYPE_CODE_COMPLEX
5249 readbuf, writebuf, 0);
5254 readbuf ? readbuf +
type->
length () / 2 : readbuf,
5256 ? writebuf +
type->
length () / 2 : writebuf), 0);
5259 else if (
type->
code () == TYPE_CODE_FLT
5270 readbuf, writebuf, 0);
5273 else if (
type->
code () == TYPE_CODE_STRUCT
5283 == TYPE_CODE_FLT))))
5307 readbuf, writebuf, offset);
5312 readbuf, writebuf, offset + 8);
5319 readbuf, writebuf, offset);
5323 else if (
type->
code () == TYPE_CODE_STRUCT
5324 ||
type->
code () == TYPE_CODE_UNION
5325 ||
type->
code () == TYPE_CODE_ARRAY)
5344 xfer, BFD_ENDIAN_UNKNOWN, readbuf, writebuf,
5368 readbuf, writebuf, offset);
5393 int nargs,
struct value **args, CORE_ADDR sp,
5395 CORE_ADDR struct_addr)
5401 int stack_offset = 0;
5419 sp = align_down (sp, 16);
5420 struct_addr = align_down (struct_addr, 16);
5423 for (argnum = 0; argnum < nargs; argnum++)
5433 sp -= align_up (arg_space, 16);
5437 "mips_o32_push_dummy_call: sp=%s allocated %ld\n",
5439 (
long) align_up (arg_space, 16));
5450 "mips_o32_push_dummy_call: "
5451 "struct_return reg=%d %s\n",
5460 for (argnum = 0; argnum < nargs; argnum++)
5462 const gdb_byte *val;
5463 struct value *arg = args[argnum];
5465 int len = arg_type->
length ();
5470 "mips_o32_push_dummy_call: %d len=%d type=%d",
5471 argnum + 1, len, (
int) typecode);
5482 if ((float_argreg & 1))
5503 == BFD_ENDIAN_BIG ? 1 : 0;
5504 unsigned long regval;
5510 float_argreg + freg_offset,
5513 float_argreg++ + freg_offset,
5517 argreg, phex (regval, 4));
5524 float_argreg - freg_offset,
5527 float_argreg++ - freg_offset,
5531 argreg, phex (regval, 4));
5543 float_argreg, phex (regval, len));
5545 float_argreg++, regval);
5551 argreg, phex (regval, len));
5589 || odd_sized_struct)
5593 int longword_offset = 0;
5604 addr = sp + stack_offset + longword_offset;
5611 for (i = 0; i < partial_len; i++)
5658 && (typecode == TYPE_CODE_STRUCT
5659 || typecode == TYPE_CODE_UNION))
5702 gdb_byte *readbuf,
const gdb_byte *writebuf)
5710 if (
type->
code () == TYPE_CODE_STRUCT
5711 ||
type->
code () == TYPE_CODE_UNION
5712 ||
type->
code () == TYPE_CODE_ARRAY)
5714 else if (
type->
code () == TYPE_CODE_FLT
5722 gdb_assert (function || !readbuf);
5742 readbuf, writebuf, 0);
5748 readbuf, writebuf, 0);
5751 else if (
type->
code () == TYPE_CODE_FLT
5760 gdb_assert (function || !readbuf);
5772 "Return float in $fp1/$fp0 and $2/$3\n");
5781 case BFD_ENDIAN_LITTLE:
5786 readbuf, writebuf, 0);
5791 readbuf, writebuf, 4);
5793 case BFD_ENDIAN_BIG:
5798 readbuf, writebuf, 0);
5803 readbuf, writebuf, 4);
5806 internal_error (_(
"bad switch"));
5816 readbuf, writebuf, 0);
5820 readbuf, writebuf, 4);
5825 else if (
type->
code () == TYPE_CODE_STRUCT
5854 readbuf, writebuf, offset);
5860 else if (
type->
code () == TYPE_CODE_STRUCT
5861 ||
type->
code () == TYPE_CODE_UNION)
5880 BFD_ENDIAN_UNKNOWN, readbuf, writebuf, offset);
5905 readbuf, writebuf, offset);
5918 struct value **args, CORE_ADDR sp,
5925 int stack_offset = 0;
5943 sp = align_down (sp, 16);
5944 struct_addr = align_down (struct_addr, 16);
5947 for (argnum = 0; argnum < nargs; argnum++)
5954 sp -= align_up (arg_space, 16);
5958 "mips_o64_push_dummy_call: sp=%s allocated %ld\n",
5960 (
long) align_up (arg_space, 16));
5971 "mips_o64_push_dummy_call: "
5972 "struct_return reg=%d %s\n",
5981 for (argnum = 0; argnum < nargs; argnum++)
5983 const gdb_byte *val;
5984 struct value *arg = args[argnum];
5986 int len = arg_type->
length ();
5991 "mips_o64_push_dummy_call: %d len=%d type=%d",
5992 argnum + 1, len, (
int) typecode);
6012 float_argreg, phex (regval, len));
6016 argreg, phex (regval, len));
6043 || odd_sized_struct)
6047 int longword_offset = 0;
6051 if ((typecode == TYPE_CODE_INT
6052 || typecode == TYPE_CODE_PTR
6053 || typecode == TYPE_CODE_FLT)
6066 addr = sp + stack_offset + longword_offset;
6073 for (i = 0; i < partial_len; i++)
6104 && (typecode == TYPE_CODE_STRUCT
6105 || typecode == TYPE_CODE_UNION))
6148 gdb_byte *readbuf,
const gdb_byte *writebuf)
6155 if (
type->
code () == TYPE_CODE_STRUCT
6156 ||
type->
code () == TYPE_CODE_UNION
6157 ||
type->
code () == TYPE_CODE_ARRAY)
6166 gdb_assert (function || !readbuf);
6186 readbuf, writebuf, 0);
6192 readbuf, writebuf, 0);
6214 readbuf, writebuf, offset);
6255 gdb_byte *rare_buffer)
6259 gdb_byte *raw_buffer = (gdb_byte *) alloca (raw_size);
6262 error (_(
"can't read register %d (%s)"),
6275 memcpy (rare_buffer, raw_buffer + offset, 4);
6279 memcpy (rare_buffer, raw_buffer, 4);
6289 gdb_byte *rare_buffer)
6299 error (_(
"can't read register %d (%s)"),
6307 internal_error (_(
"mips_read_fp_register_double: bad access to "
6308 "odd-numbered FP register"));
6330 gdb_byte *raw_buffer;
6331 std::string flt_str, dbl_str;
6359 gdb_printf (file,
" flt: %s", flt_str.c_str ());
6366 gdb_printf (file,
" dbl: %s", dbl_str.c_str ());
6385 gdb_printf (file,
" flt: %s", flt_str.c_str ());
6386 gdb_printf (file,
" dbl: %s", dbl_str.c_str ());
6426 if (
flags & (1 << 0))
6428 if (
flags & (1 << 1))
6430 if (
flags & (1 << 2))
6432 if (
flags & (1 << 3))
6434 if (
flags & (1 << 4))
6436 if (
flags & (1 << 5))
6468 if (fcs & (1 << 23))
6470 for (i = 1; i <= 7; i++)
6471 if (fcs & (1 << (24 + i)))
6477 fputs (
"mask :", stdout);
6479 fputs (
"flags :", stdout);
6485 case 0:
gdb_puts (
"nearest\n", file);
break;
6486 case 1:
gdb_puts (
"zero\n", file);
break;
6487 case 2:
gdb_puts (
"+inf\n", file);
break;
6488 case 3:
gdb_puts (
"-inf\n", file);
break;
6492 if (fcs & (1 << 21))
6494 if (fcs & (1 << 22))
6496 if (fcs & (1 << 24))
6498 if ((fcs & (0xb << 21)) == 0)
6502 gdb_printf (file,
"nan2008 : %s\n", fcs & (1 << 18) ?
"yes" :
"no");
6503 gdb_printf (file,
"abs2008 : %s\n", fcs & (1 << 19) ?
"yes" :
"no");
6531 const gdb_byte *raw_buffer;
6539 for (col = 0,
regnum = start_regnum;
6577 for (col = 0,
regnum = start_regnum;
6596 :
"<unavailable>"));
6635 error (_(
"Not a valid register for the current processor type"));
6699 CORE_ADDR func_addr;
6706 CORE_ADDR post_prologue_pc
6708 if (post_prologue_pc != 0)
6709 return std::max (pc, post_prologue_pc);
6720 limit_pc = pc + 100;
6736 CORE_ADDR func_addr = 0, func_end = 0;
6741 CORE_ADDR addr = func_end - 12;
6743 if (addr < func_addr + 4)
6744 addr = func_addr + 4;
6750 unsigned long high_word;
6754 high_word = (inst >> 16) & 0xffff;
6756 if (high_word != 0x27bd
6757 && high_word != 0x67bd
6758 && inst != 0x03e00008
6759 && inst != 0x00000000)
6775 CORE_ADDR func_addr = 0;
6776 CORE_ADDR func_end = 0;
6788 addr = func_end - 12;
6790 if (addr < func_addr + 2)
6791 addr = func_addr + 2;
6795 for (; pc < func_end; pc +=
loc)
6833 if (sreg == 0 && dreg == 0)
6850 if ((insn & 0x1) == 0x1
6871 CORE_ADDR func_addr = 0, func_end = 0;
6876 CORE_ADDR addr = func_end - 12;
6878 if (addr < func_addr + 4)
6879 addr = func_addr + 4;
6885 unsigned short inst;
6889 if ((inst & 0xf800) == 0xf000)
6932 (
"The MIPS floating-point coprocessor is unknown "
6933 "because the current architecture is not MIPS.\n");
6940 fpu =
"single-precision";
6943 fpu =
"double-precision";
6946 fpu =
"absent (none)";
6949 internal_error (_(
"bad switch"));
6952 gdb_printf (
"The MIPS floating-point coprocessor "
6953 "is set automatically (currently %s)\n",
6957 (
"The MIPS floating-point coprocessor is assumed to be %s\n", fpu);
6971 internal_error (_(
"set mipsfpu failed"));
6984 internal_error (_(
"set mipsfpu failed"));
6997 internal_error (_(
"set mipsfpu failed"));
7028 info->mach = bfd_mach_mips16;
7030 info->mach = bfd_mach_mips_micromips;
7033 memaddr &= (
info->mach == bfd_mach_mips16
7034 ||
info->mach == bfd_mach_mips_micromips) ? ~1 : ~3;
7044 CORE_ADDR pc = *pcptr;
7069static const gdb_byte *
7078 static gdb_byte mips16_big_breakpoint[] = { 0xe8, 0xa5 };
7079 static gdb_byte mips16_little_breakpoint[] = { 0xa5, 0xe8 };
7082 if (byte_order_for_code == BFD_ENDIAN_BIG)
7083 return mips16_big_breakpoint;
7085 return mips16_little_breakpoint;
7089 static gdb_byte micromips16_big_breakpoint[] = { 0x46, 0x85 };
7090 static gdb_byte micromips16_little_breakpoint[] = { 0x85, 0x46 };
7094 if (byte_order_for_code == BFD_ENDIAN_BIG)
7095 return micromips16_big_breakpoint;
7097 return micromips16_little_breakpoint;
7101 static gdb_byte micromips32_big_breakpoint[] = { 0, 0x5, 0, 0x7 };
7102 static gdb_byte micromips32_little_breakpoint[] = { 0x5, 0, 0x7, 0 };
7105 if (byte_order_for_code == BFD_ENDIAN_BIG)
7106 return micromips32_big_breakpoint;
7108 return micromips32_little_breakpoint;
7116 if (byte_order_for_code == BFD_ENDIAN_BIG)
7122 gdb_assert_not_reached (
"unexpected mips breakpoint kind");
7138 if ((inst & 0xe0000000) != 0)
7148 || (rs == 9 && (rt & 0x2) == 0)
7150 || (rs == 10 && (rt & 0x2) == 0))));
7164 return ((rt & 0xc) == 0
7167 || ((rt & 0x1e) == 0x1c && rs == 0));
7201 ULONGEST major = insn >> 16;
7214 || (
b5s5_op (major) & 0x1e) == 0xe)));
7225 return ((
b5s5_op (major) & 0x1c) == 0x0
7227 || (
b5s5_op (major) & 0x1d) == 0x4
7229 || (
b5s5_op (major) & 0x1d) == 0x11
7231 || ((
b5s5_op (major) & 0x1e) == 0x14
7232 && (major & 0x3) == 0x0)
7234 || (
b5s5_op (major) & 0x1e) == 0x1a
7236 || ((
b5s5_op (major) & 0x1e) == 0x1c
7237 && (major & 0x3) == 0x0)
7239 || ((
b5s5_op (major) & 0x1c) == 0x1c
7240 && (major & 0x3) == 0x1));
7243 return (
b0s6_op (insn) == 0x3c
7259 CORE_ADDR addr,
int mustbe32)
7288 if ((inst & 0xf89f) == 0xe800)
7290 return (inst & 0xf800) == 0x1800;
7299 CORE_ADDR addr,
int mustbe32)
7301 unsigned short insn;
7317 CORE_ADDR mask = CORE_ADDR_MAX;
7320 if (
sizeof (CORE_ADDR) == 8)
7324 switch (bpaddr >> ((
sizeof (CORE_ADDR) << 3) - 2) & 3)
7327 if (bpaddr == (bfd_signed_vma) (int32_t) bpaddr)
7339 else if (bpaddr & 0x80000000)
7344 return bpaddr & mask;
7353 CORE_ADDR prev_addr;
7355 CORE_ADDR func_addr;
7391 && func_addr > boundary && func_addr <= bpaddr)
7392 boundary = func_addr;
7396 if (bpaddr == boundary)
7401 prev_addr = bpaddr - 4;
7407 int (*insn_at_pc_has_delay_slot) (
struct gdbarch *, CORE_ADDR, int);
7408 CORE_ADDR addr, jmpaddr;
7427 for (i = 1; i < 4; i++)
7432 if (i == 1 && insn_at_pc_has_delay_slot (
gdbarch, addr, 0))
7437 else if (i > 1 && insn_at_pc_has_delay_slot (
gdbarch, addr, 1))
7490 return zero && suffix[1] ==
'\0';
7492 return suffix[1] ==
'\0' || (suffix[1] ==
'0' && suffix[2] ==
'\0');
7497 return suffix[1] ==
'\0';
7509 return ((mode[0] ==
's' || mode[0] ==
'd')
7510 && (mode[1] ==
'f' || mode[1] ==
'c'));
7571 CORE_ADDR start_pc = pc;
7572 CORE_ADDR target_pc = 0;
7579 status == 0 && target_pc == 0 && i < 20;
7598 else if (rs == addrreg)
7617 target_pc += ((pc + 4) & ~(CORE_ADDR) 0x0fffffff);
7628 else if (rt == addrreg)
7653 memset (buf, 0,
sizeof (buf));
7692 CORE_ADDR start_addr;
7705 &&
name[prefixlen + 2] ==
'\0')
7725 &&
name[prefixlen + 2] ==
'_'
7728 if (pc == start_addr)
7748 if (pc == start_addr)
7769 CORE_ADDR start_addr;
7780 if (pc != start_addr
7783 &&
name[prefixlen + 2] ==
'_'
7790 if (pc != start_addr
7806 &&
name[prefixlen + 2] ==
'\0')
7823 gdb_byte stub_code[16];
7824 int32_t stub_words[4];
7845 for (i = 0; i < 4; i++)
7857 if ((stub_words[0] & 0xffff0000U) == 0x3c190000
7858 && (stub_words[1] & 0xfc000000U) == 0x08000000
7859 && (stub_words[2] & 0xffff0000U) == 0x27390000
7860 && stub_words[3] == 0x00000000)
7861 return ((((stub_words[0] & 0x0000ffff) << 16)
7862 + (stub_words[2] & 0x0000ffff)) ^ 0x8000) - 0x8000;
7872 CORE_ADDR requested_pc = pc;
7873 CORE_ADDR target_pc;
7892 while (pc != target_pc);
7894 return pc != requested_pc ? pc : 0;
7904 if (num >= 0 && num < 32)
7906 else if (num >= 38 && num < 70)
7927 if (num >= 0 && num < 32)
7929 else if (num >= 32 && num < 64)
7963 struct type *
type,
const gdb_byte *buf)
7976 CORE_ADDR pc,
int *reg, LONGEST *offset)
7986 const char *
name = bfd_section_name (sect);
7991 if (!startswith (
name,
".mdebug."))
7994 if (strcmp (
name,
".mdebug.abi32") == 0)
7996 else if (strcmp (
name,
".mdebug.abiN32") == 0)
7998 else if (strcmp (
name,
".mdebug.abi64") == 0)
8000 else if (strcmp (
name,
".mdebug.abiO64") == 0)
8002 else if (strcmp (
name,
".mdebug.eabi32") == 0)
8004 else if (strcmp (
name,
".mdebug.eabi64") == 0)
8007 warning (_(
"unsupported ABI %s."),
name + 8);
8013 int *lbp = (
int *) obj;
8014 const char *
name = bfd_section_name (sect);
8016 if (startswith (
name,
".gcc_compiled_long32"))
8018 else if (startswith (
name,
".gcc_compiled_long64"))
8020 else if (startswith (
name,
".gcc_compiled_long"))
8021 warning (_(
"unrecognized .gcc_compiled_longXX"));
8033 internal_error (_(
"unknown ABI string"));
8050 internal_error (_(
"unknown compressed ISA string"));
8070static struct value *
8073 const int *reg_p = (
const int *) baton;
8085 int elf_fpu_type = Val_GNU_MIPS_ABI_FP_ANY;
8086 const char *
const *reg_names;
8093 if (info.abfd && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
8094 elf_flags = elf_elfheader (info.abfd)->e_flags;
8098 = gdbarch_tdep<mips_gdbarch_tdep> (
arches->gdbarch);
8105 "mips_gdbarch_init: elf_flags = 0x%08x\n", elf_flags);
8108 switch ((elf_flags & EF_MIPS_ABI))
8110 case E_MIPS_ABI_O32:
8113 case E_MIPS_ABI_O64:
8116 case E_MIPS_ABI_EABI32:
8119 case E_MIPS_ABI_EABI64:
8123 if ((elf_flags & EF_MIPS_ABI2))
8139 = gdbarch_tdep<mips_gdbarch_tdep> (
arches->gdbarch);
8140 found_abi = tdep->found_abi;
8145 && info.bfd_arch_info != NULL
8146 && info.bfd_arch_info->arch == bfd_arch_mips)
8148 switch (info.bfd_arch_info->mach)
8150 case bfd_mach_mips3900:
8153 case bfd_mach_mips4100:
8154 case bfd_mach_mips5000:
8157 case bfd_mach_mips8000:
8158 case bfd_mach_mips10000:
8162 if (info.abfd != NULL
8163 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour
8164 && elf_elfheader (info.abfd)->e_ident[EI_CLASS] == ELFCLASS64)
8174 && info.abfd != NULL
8175 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour
8176 && elf_elfheader (info.abfd)->e_ident[EI_CLASS] == ELFCLASS64)
8204 && info.bfd_arch_info != NULL
8205 && info.bfd_arch_info->arch == bfd_arch_mips
8206 && info.bfd_arch_info->bits_per_word < 64)
8207 info.bfd_arch_info = bfd_lookup_arch (bfd_arch_mips, bfd_mach_mips4000);
8210 if ((elf_flags & EF_MIPS_ARCH_ASE_MICROMIPS) != 0
8211 && (elf_flags & EF_MIPS_ARCH_ASE_M16) == 0)
8213 else if ((elf_flags & EF_MIPS_ARCH_ASE_M16) != 0
8214 && (elf_flags & EF_MIPS_ARCH_ASE_MICROMIPS) == 0)
8223 "mips_gdbarch_init: "
8224 "mips64_transfers_32bit_regs_p = %d\n",
8230 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
8231 elf_fpu_type = bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
8232 Tag_GNU_MIPS_ABI_FP);
8237 else if (elf_fpu_type != Val_GNU_MIPS_ABI_FP_ANY)
8239 switch (elf_fpu_type)
8241 case Val_GNU_MIPS_ABI_FP_DOUBLE:
8244 case Val_GNU_MIPS_ABI_FP_SINGLE:
8247 case Val_GNU_MIPS_ABI_FP_SOFT:
8254 else if (info.bfd_arch_info != NULL
8255 && info.bfd_arch_info->arch == bfd_arch_mips)
8256 switch (info.bfd_arch_info->mach)
8258 case bfd_mach_mips3900:
8259 case bfd_mach_mips4100:
8260 case bfd_mach_mips4111:
8261 case bfd_mach_mips4120:
8264 case bfd_mach_mips4650:
8277 "mips_gdbarch_init: fpu_type = %d\n", fpu_type);
8283 if (info.target_desc
8320 if (info.bfd_arch_info != NULL
8321 && info.bfd_arch_info->mach == bfd_mach_mips3900)
8330 static const char *
const mips_gprs[] = {
8331 "r0",
"r1",
"r2",
"r3",
"r4",
"r5",
"r6",
"r7",
8332 "r8",
"r9",
"r10",
"r11",
"r12",
"r13",
"r14",
"r15",
8333 "r16",
"r17",
"r18",
"r19",
"r20",
"r21",
"r22",
"r23",
8334 "r24",
"r25",
"r26",
"r27",
"r28",
"r29",
"r30",
"r31"
8336 static const char *
const mips_fprs[] = {
8337 "f0",
"f1",
"f2",
"f3",
"f4",
"f5",
"f6",
"f7",
8338 "f8",
"f9",
"f10",
"f11",
"f12",
"f13",
"f14",
"f15",
8339 "f16",
"f17",
"f18",
"f19",
"f20",
"f21",
"f22",
"f23",
8340 "f24",
"f25",
"f26",
"f27",
"f28",
"f29",
"f30",
"f31",
8343 const struct tdesc_feature *feature;
8347 "org.gnu.gdb.mips.cpu");
8348 if (feature == NULL)
8370 "org.gnu.gdb.mips.cp0");
8371 if (feature == NULL)
8388 "org.gnu.gdb.mips.fpu");
8389 if (feature == NULL)
8393 for (i = 0; i < 32; i++)
8413 "org.gnu.gdb.mips.dsp");
8415 if (feature != NULL)
8420 dspacc + i++,
"hi1");
8422 dspacc + i++,
"lo1");
8424 dspacc + i++,
"hi2");
8426 dspacc + i++,
"lo2");
8428 dspacc + i++,
"hi3");
8430 dspacc + i++,
"lo3");
8456 = gdbarch_tdep<mips_gdbarch_tdep> (
arches->gdbarch);
8485 tdep->found_abi = found_abi;
8488 tdep->mips_fpu_type = fpu_type;
8492 if (info.target_desc)
8605 internal_error (_(
"unknown ABI in switch"));
8634 if (info.abfd != NULL)
8654 internal_error (_(
"unknown ABI in switch"));
8742 disassembler_options_mips ());
8851 const char *ignored_value)
8856 "The MIPS ABI is unknown because the current architecture "
8867 "The MIPS ABI is set automatically (currently \"%s\").\n",
8869 else if (global_abi == actual_abi)
8872 "The MIPS ABI is assumed to be \"%s\" (due to user setting).\n",
8878 "The (auto detected) MIPS ABI \"%s\" is in use "
8879 "even though the user setting was \"%s\".\n",
8891 gdb_printf (file, _(
"The compressed ISA encoding used is %s.\n"),
8920 int ef_mips_32bitmode;
8941 ef_mips_32bitmode = (tdep->
elf_flags & EF_MIPS_32BITMODE);
8943 "mips_dump_tdep: tdep->elf_flags = 0x%x\n",
8946 "mips_dump_tdep: ef_mips_32bitmode = %d\n",
8949 "mips_dump_tdep: ef_mips_arch = %d\n",
8952 "mips_dump_tdep: tdep->mips_abi = %d (%s)\n",
8956 "mips_mask_address_p() %d (default %d)\n",
8961 "mips_dump_tdep: MIPS_DEFAULT_FPU_TYPE = %d (%s)\n",
8964 gdb_printf (file,
"mips_dump_tdep: MIPS_EABI = %d\n",
8967 "mips_dump_tdep: MIPS_FPU_TYPE = %d (%s)\n",
8981 internal_error (_(
"mips_abi_strings out of sync"));
8995 _(
"Various MIPS specific commands."),
8996 _(
"Various MIPS specific commands."),
9003Set the MIPS ABI used by this program."), _(
"\
9004Show the MIPS ABI used by this program."), _(
"\
9005This option can be set to one of:\n\
9006 auto - the default ABI associated with the current binary\n\
9023Set the compressed ISA encoding used by MIPS code."), _(
"\
9024Show the compressed ISA encoding used by MIPS code."), _(
"\
9025Select the compressed ISA encoding used in functions that have no symbol\n\
9026information available. The encoding can be set to either of:\n\
9029and is updated automatically from ELF file flags if available."),
9038 _(
"Set use of MIPS floating-point coprocessor."),
9041 _(
"Select single-precision MIPS floating-point coprocessor."),
9045 _(
"Select double-precision MIPS floating-point coprocessor."),
9053 _(
"Select no MIPS floating-point coprocessor."), &mipsfpulist);
9058 _(
"Select MIPS floating-point coprocessor automatically."),
9061 _(
"Show current use of MIPS floating-point coprocessor target."),
9069Set the distance searched for the start of a function."), _(
"\
9070Show the distance searched for the start of a function."), _(
"\
9071If you are debugging a stripped executable, GDB needs to search through the\n\
9072program for the start of a function. This command sets the distance of the\n\
9073search. The only need to set it is when debugging a stripped executable."),
9083Set zeroing of upper 32 bits of 64-bit addresses."), _(
"\
9084Show zeroing of upper 32 bits of 64-bit addresses."), _(
"\
9085Use \"on\" to enable the masking, \"off\" to disable it and \"auto\" to\n\
9086allow GDB to determine the correct value."),
9094Set compatibility with 64-bit MIPS target that transfers 32-bit quantities."),
9096Show compatibility with 64-bit MIPS target that transfers 32-bit quantities."),
9098Use \"on\" to enable backward compatibility with older MIPS 64 GDB+target\n\
9099that would transfer 32 bits for some registers (e.g. SR, FSR) and\n\
910064 bits for others. Use \"off\" to disable compatibility mode"),
9110Set mips debugging."), _(
"\
9111Show mips debugging."), _(
"\
9112When non-zero, mips specific debugging is enabled."),
void gdbarch_register(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init, gdbarch_dump_tdep_ftype *dump_tdep, gdbarch_supports_arch_info_ftype *supports_arch_info)
unsigned int gdbarch_debug
int default_print_insn(bfd_vma memaddr, disassemble_info *info)
int gdbarch_update_p(struct gdbarch_info info)
struct gdbarch * target_gdbarch(void)
static std::vector< const char * > arches
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
void ax_reg_mask(struct agent_expr *ax, int reg)
void ax_simple(struct agent_expr *x, enum agent_op op)
void ax_const_l(struct agent_expr *x, LONGEST l)
void ax_reg(struct agent_expr *x, int reg)
bool find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr, const struct block **block)
enum breakpoint_here breakpoint_here_p(const address_space *aspace, CORE_ADDR pc)
enum register_status raw_read(int regnum, gdb_byte *buf)
enum register_status cooked_read_part(int regnum, int offset, int len, gdb_byte *buf)
enum register_status raw_read_part(int regnum, int offset, int len, gdb_byte *buf)
enum register_status cooked_read(int regnum, gdb_byte *buf)
void raw_write_part(int regnum, int offset, int len, const gdb_byte *buf)
void cooked_write_part(int regnum, int offset, int len, const gdb_byte *buf)
void raw_write(int regnum, const gdb_byte *buf)
struct cmd_list_element * showlist
struct cmd_list_element * setlist
struct cmd_list_element * showdebuglist
struct cmd_list_element * setdebuglist
struct cmd_list_element * add_alias_cmd(const char *name, cmd_list_element *target, enum command_class theclass, int abbrev_flag, struct cmd_list_element **list)
set_show_commands add_setshow_zinteger_cmd(const char *name, enum command_class theclass, int *var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
struct cmd_list_element * add_cmd(const char *name, enum command_class theclass, const char *doc, struct cmd_list_element **list)
set_show_commands add_setshow_enum_cmd(const char *name, enum command_class theclass, const char *const *enumlist, const char **var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
set_show_commands add_setshow_prefix_cmd(const char *name, command_class theclass, const char *set_doc, const char *show_doc, cmd_list_element **set_subcommands_list, cmd_list_element **show_subcommands_list, cmd_list_element **set_list, cmd_list_element **show_list)
set_show_commands add_setshow_boolean_cmd(const char *name, enum command_class theclass, bool *var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
set_show_commands add_setshow_auto_boolean_cmd(const char *name, enum command_class theclass, enum auto_boolean *var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
struct cmd_list_element * add_basic_prefix_cmd(const char *name, enum command_class theclass, const char *doc, struct cmd_list_element **subcommands, int allow_unknown, struct cmd_list_element **list)
set_show_commands add_setshow_zuinteger_cmd(const char *name, enum command_class theclass, unsigned int *var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
void memory_error(enum target_xfer_status err, CORE_ADDR memaddr)
static void store_signed_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, LONGEST val)
static void store_unsigned_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, ULONGEST val)
static LONGEST extract_signed_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
static ULONGEST extract_unsigned_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
@ RETURN_VALUE_REGISTER_CONVENTION
@ RETURN_VALUE_STRUCT_CONVENTION
void dwarf2_append_unwinders(struct gdbarch *gdbarch)
const struct frame_base * dwarf2_frame_base_sniffer(frame_info_ptr this_frame)
void address_to_signed_pointer(struct gdbarch *gdbarch, struct type *type, gdb_byte *buf, CORE_ADDR addr)
struct value * value_of_register(int regnum, frame_info_ptr frame)
CORE_ADDR signed_pointer_to_address(struct gdbarch *gdbarch, struct type *type, const gdb_byte *buf)
void frame_base_append_sniffer(struct gdbarch *gdbarch, frame_base_sniffer_ftype *sniffer)
enum unwind_stop_reason default_frame_unwind_stop_reason(frame_info_ptr this_frame, void **this_cache)
void frame_unwind_append_unwinder(struct gdbarch *gdbarch, const struct frame_unwind *unwinder)
int frame_relative_level(frame_info_ptr fi)
struct value * get_frame_register_value(frame_info_ptr frame, int regnum)
ULONGEST get_frame_register_unsigned(frame_info_ptr frame, int regnum)
LONGEST get_frame_register_signed(frame_info_ptr frame, int regnum)
CORE_ADDR get_frame_pc(frame_info_ptr frame)
bool read_frame_register_unsigned(frame_info_ptr frame, int regnum, ULONGEST *val)
void reinit_frame_cache(void)
const address_space * get_frame_address_space(frame_info_ptr frame)
LONGEST frame_unwind_register_signed(frame_info_ptr next_frame, int regnum)
void get_frame_register(frame_info_ptr frame, int regnum, gdb_byte *buf)
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
struct gdbarch * get_frame_arch(frame_info_ptr this_frame)
CORE_ADDR get_frame_func(frame_info_ptr this_frame)
void put_frame_register_bytes(frame_info_ptr frame, int regnum, CORE_ADDR offset, gdb::array_view< const gdb_byte > buffer)
bool get_frame_register_bytes(frame_info_ptr frame, int regnum, CORE_ADDR offset, gdb::array_view< gdb_byte > buffer, int *optimizedp, int *unavailablep)
bool deprecated_frame_register_read(frame_info_ptr frame, int regnum, gdb_byte *myaddr)
frame_info_ptr get_current_frame(void)
CORE_ADDR get_frame_address_in_block(frame_info_ptr this_frame)
void put_frame_register(frame_info_ptr frame, int regnum, const gdb_byte *buf)
#define FRAME_OBSTACK_ZALLOC(TYPE)
void set_gdbarch_long_long_bit(struct gdbarch *gdbarch, int long_long_bit)
void set_gdbarch_stab_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_stab_reg_to_regnum_ftype *stab_reg_to_regnum)
void set_gdbarch_address_to_pointer(struct gdbarch *gdbarch, gdbarch_address_to_pointer_ftype *address_to_pointer)
int gdbarch_pc_regnum(struct gdbarch *gdbarch)
void set_gdbarch_unwind_pc(struct gdbarch *gdbarch, gdbarch_unwind_pc_ftype *unwind_pc)
void set_gdbarch_register_to_value(struct gdbarch *gdbarch, gdbarch_register_to_value_ftype *register_to_value)
void set_gdbarch_disassembler_options(struct gdbarch *gdbarch, char **disassembler_options)
enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
void set_gdbarch_value_to_register(struct gdbarch *gdbarch, gdbarch_value_to_register_ftype *value_to_register)
void set_gdbarch_disassembler_options_implicit(struct gdbarch *gdbarch, const char *disassembler_options_implicit)
void set_gdbarch_ecoff_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_ecoff_reg_to_regnum_ftype *ecoff_reg_to_regnum)
void set_gdbarch_breakpoint_kind_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_kind_from_pc_ftype *breakpoint_kind_from_pc)
void set_gdbarch_register_sim_regno(struct gdbarch *gdbarch, gdbarch_register_sim_regno_ftype *register_sim_regno)
const char * gdbarch_register_name(struct gdbarch *gdbarch, int regnr)
void set_gdbarch_valid_disassembler_options(struct gdbarch *gdbarch, const disasm_options_and_args_t *valid_disassembler_options)
void set_gdbarch_frame_align(struct gdbarch *gdbarch, gdbarch_frame_align_ftype *frame_align)
void set_gdbarch_write_pc(struct gdbarch *gdbarch, gdbarch_write_pc_ftype *write_pc)
void set_gdbarch_integer_to_address(struct gdbarch *gdbarch, gdbarch_integer_to_address_ftype *integer_to_address)
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype *skip_prologue)
void set_gdbarch_addr_bits_remove(struct gdbarch *gdbarch, gdbarch_addr_bits_remove_ftype *addr_bits_remove)
void set_gdbarch_elf_make_msymbol_special(struct gdbarch *gdbarch, gdbarch_elf_make_msymbol_special_ftype *elf_make_msymbol_special)
void set_gdbarch_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype *register_name)
void set_gdbarch_push_dummy_code(struct gdbarch *gdbarch, gdbarch_push_dummy_code_ftype *push_dummy_code)
struct type * gdbarch_register_type(struct gdbarch *gdbarch, int reg_nr)
void set_gdbarch_int_bit(struct gdbarch *gdbarch, int int_bit)
void set_gdbarch_skip_trampoline_code(struct gdbarch *gdbarch, gdbarch_skip_trampoline_code_ftype *skip_trampoline_code)
void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype *return_value)
void set_gdbarch_single_step_through_delay(struct gdbarch *gdbarch, gdbarch_single_step_through_delay_ftype *single_step_through_delay)
void set_gdbarch_have_nonsteppable_watchpoint(struct gdbarch *gdbarch, int have_nonsteppable_watchpoint)
void set_gdbarch_print_registers_info(struct gdbarch *gdbarch, gdbarch_print_registers_info_ftype *print_registers_info)
int gdbarch_num_regs(struct gdbarch *gdbarch)
void set_gdbarch_make_symbol_special(struct gdbarch *gdbarch, gdbarch_make_symbol_special_ftype *make_symbol_special)
void set_gdbarch_fp0_regnum(struct gdbarch *gdbarch, int fp0_regnum)
void set_gdbarch_double_bit(struct gdbarch *gdbarch, int double_bit)
void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype *inner_than)
enum bfd_endian gdbarch_byte_order_for_code(struct gdbarch *gdbarch)
void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
void set_gdbarch_register_reggroup_p(struct gdbarch *gdbarch, gdbarch_register_reggroup_p_ftype *register_reggroup_p)
void set_gdbarch_ax_pseudo_register_collect(struct gdbarch *gdbarch, gdbarch_ax_pseudo_register_collect_ftype *ax_pseudo_register_collect)
void set_gdbarch_long_double_format(struct gdbarch *gdbarch, const struct floatformat **long_double_format)
void set_gdbarch_pc_regnum(struct gdbarch *gdbarch, int pc_regnum)
void set_gdbarch_adjust_breakpoint_address(struct gdbarch *gdbarch, gdbarch_adjust_breakpoint_address_ftype *adjust_breakpoint_address)
void set_gdbarch_call_dummy_location(struct gdbarch *gdbarch, enum call_dummy_location_type call_dummy_location)
void set_gdbarch_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype *register_type)
void set_gdbarch_virtual_frame_pointer(struct gdbarch *gdbarch, gdbarch_virtual_frame_pointer_ftype *virtual_frame_pointer)
void set_gdbarch_adjust_dwarf2_addr(struct gdbarch *gdbarch, gdbarch_adjust_dwarf2_addr_ftype *adjust_dwarf2_addr)
void set_gdbarch_print_insn(struct gdbarch *gdbarch, gdbarch_print_insn_ftype *print_insn)
const struct target_desc * gdbarch_target_desc(struct gdbarch *gdbarch)
void set_gdbarch_float_bit(struct gdbarch *gdbarch, int float_bit)
void set_gdbarch_stack_frame_destroyed_p(struct gdbarch *gdbarch, gdbarch_stack_frame_destroyed_p_ftype *stack_frame_destroyed_p)
void set_gdbarch_short_bit(struct gdbarch *gdbarch, int short_bit)
void set_gdbarch_adjust_dwarf2_line(struct gdbarch *gdbarch, gdbarch_adjust_dwarf2_line_ftype *adjust_dwarf2_line)
void set_gdbarch_pseudo_register_write(struct gdbarch *gdbarch, gdbarch_pseudo_register_write_ftype *pseudo_register_write)
void set_gdbarch_num_pseudo_regs(struct gdbarch *gdbarch, int num_pseudo_regs)
void set_gdbarch_dwarf2_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_dwarf2_reg_to_regnum_ftype *dwarf2_reg_to_regnum)
void set_gdbarch_long_bit(struct gdbarch *gdbarch, int long_bit)
void set_gdbarch_ptr_bit(struct gdbarch *gdbarch, int ptr_bit)
CORE_ADDR gdbarch_addr_bits_remove(struct gdbarch *gdbarch, CORE_ADDR addr)
void set_gdbarch_convert_register_p(struct gdbarch *gdbarch, gdbarch_convert_register_p_ftype *convert_register_p)
void set_gdbarch_pseudo_register_read(struct gdbarch *gdbarch, gdbarch_pseudo_register_read_ftype *pseudo_register_read)
void set_gdbarch_ax_pseudo_register_push_stack(struct gdbarch *gdbarch, gdbarch_ax_pseudo_register_push_stack_ftype *ax_pseudo_register_push_stack)
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
const struct bfd_arch_info * gdbarch_bfd_arch_info(struct gdbarch *gdbarch)
void set_gdbarch_long_double_bit(struct gdbarch *gdbarch, int long_double_bit)
void set_gdbarch_sw_breakpoint_from_kind(struct gdbarch *gdbarch, gdbarch_sw_breakpoint_from_kind_ftype *sw_breakpoint_from_kind)
void set_gdbarch_dummy_id(struct gdbarch *gdbarch, gdbarch_dummy_id_ftype *dummy_id)
enum gdb_osabi gdbarch_osabi(struct gdbarch *gdbarch)
void set_gdbarch_read_pc(struct gdbarch *gdbarch, gdbarch_read_pc_ftype *read_pc)
void set_gdbarch_unwind_sp(struct gdbarch *gdbarch, gdbarch_unwind_sp_ftype *unwind_sp)
void set_gdbarch_print_float_info(struct gdbarch *gdbarch, gdbarch_print_float_info_ftype *print_float_info)
void set_gdbarch_pointer_to_address(struct gdbarch *gdbarch, gdbarch_pointer_to_address_ftype *pointer_to_address)
void set_gdbarch_in_solib_return_trampoline(struct gdbarch *gdbarch, gdbarch_in_solib_return_trampoline_ftype *in_solib_return_trampoline)
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype *push_dummy_call)
void set_gdbarch_vbit_in_delta(struct gdbarch *gdbarch, int vbit_in_delta)
struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, gdbarch_tdep_up tdep)
std::unique_ptr< gdbarch_tdep_base > gdbarch_tdep_up
#define GDBARCH_OBSTACK_ZALLOC(GDBARCH, TYPE)
static int gdbarch_num_cooked_regs(gdbarch *arch)
function_call_return_method
const struct floatformat * floatformats_ibm_long_double[BFD_ENDIAN_UNKNOWN]
const struct builtin_type * builtin_type(struct gdbarch *gdbarch)
struct type * check_typedef(struct type *type)
void print_scalar_formatted(const gdb_byte *, struct type *, const struct value_print_options *, int, struct ui_file *)
mach_port_t mach_port_t name mach_port_t mach_port_t name kern_return_t err
mach_port_t kern_return_t mach_port_t mach_msg_type_name_t msgportsPoly mach_port_t kern_return_t pid_t pid mach_port_t kern_return_t mach_port_t task mach_port_t kern_return_t int flags
mach_port_t mach_port_t name mach_port_t mach_port_t name kern_return_t int status
static int is_branch(unsigned long inst)
CORE_ADDR find_function_addr(struct value *function, struct type **retval_type, struct type **function_type)
void default_print_float_info(struct gdbarch *gdbarch, struct ui_file *file, frame_info_ptr frame, const char *args)
struct inferior * current_inferior(void)
CORE_ADDR find_solib_trampoline_target(frame_info_ptr frame, CORE_ADDR pc)
struct bound_minimal_symbol lookup_minimal_symbol_by_pc(CORE_ADDR pc)
static struct value * mips_insn32_frame_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
static CORE_ADDR mips_read_pc(readable_regcache *regcache)
static void set_mipsfpu_single_command(const char *args, int from_tty)
static const char mips_disassembler_options_o32[]
static void show_mips_compression(struct ui_file *file, int from_tty, struct cmd_list_element *c, const char *value)
static void set_mips64_transfers_32bit_regs(const char *args, int from_tty, struct cmd_list_element *c)
static CORE_ADDR mips_adjust_breakpoint_address(struct gdbarch *gdbarch, CORE_ADDR bpaddr)
static const struct frame_unwind mips_micro_frame_unwind
static CORE_ADDR mips_skip_prologue(struct gdbarch *gdbarch, CORE_ADDR pc)
#define MAX_MIPS_ABI_REGSIZE
static struct value * mips_micro_frame_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
@ MIPS_FPU_DOUBLE_REGSIZE
@ MIPS_FPU_SINGLE_REGSIZE
static void reset_saved_regs(struct gdbarch *gdbarch, struct mips_frame_cache *this_cache)
static CORE_ADDR mips_adjust_dwarf2_addr(CORE_ADDR pc)
static int mips32_instruction_has_delay_slot(struct gdbarch *gdbarch, ULONGEST inst)
static int mips16_stack_frame_destroyed_p(struct gdbarch *gdbarch, CORE_ADDR pc)
static CORE_ADDR mips32_next_pc(struct regcache *regcache, CORE_ADDR pc)
static CORE_ADDR mips_get_mips16_fn_stub_pc(frame_info_ptr frame, CORE_ADDR pc)
static int mips16_insn_at_pc_has_delay_slot(struct gdbarch *gdbarch, CORE_ADDR addr, int mustbe32)
static int mips_last_fp_arg_regnum(gdbarch *arch)
static void mips_print_registers_info(struct gdbarch *gdbarch, struct ui_file *file, frame_info_ptr frame, int regnum, int all)
int mips_pc_is_mips(CORE_ADDR memaddr)
static int mips_convert_register_float_case_p(struct gdbarch *gdbarch, int regnum, struct type *type)
static void print_fpu_flags(struct ui_file *file, int flags)
static enum mips_fpu_type mips_fpu_type
static CORE_ADDR heuristic_proc_start(struct gdbarch *, CORE_ADDR)
static const char mips_str_mips16_call_stub[]
static int mips_stub_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_cache)
static CORE_ADDR mips16_next_pc(struct regcache *regcache, CORE_ADDR pc)
static void set_mipsfpu_auto_command(const char *args, int from_tty)
static int mips_mask_address_p(mips_gdbarch_tdep *tdep)
static int mips_in_frame_stub(CORE_ADDR pc)
static int mips_ax_pseudo_register_push_stack(struct gdbarch *gdbarch, struct agent_expr *ax, int reg)
static void mips_xfer_register(struct gdbarch *gdbarch, struct regcache *regcache, int reg_num, int length, enum bfd_endian endian, gdb_byte *in, const gdb_byte *out, int buf_offset)
static ULONGEST mips_fetch_instruction(struct gdbarch *gdbarch, enum mips_isa isa, CORE_ADDR addr, int *errp)
static CORE_ADDR mips_stub_frame_base_address(frame_info_ptr this_frame, void **this_cache)
static const struct frame_base mips_stub_frame_base
static CORE_ADDR mips_addr_bits_remove(struct gdbarch *gdbarch, CORE_ADDR addr)
static void unpack_mips16(struct gdbarch *gdbarch, CORE_ADDR pc, unsigned int extension, unsigned int inst, enum mips16_inst_fmts insn_format, struct upk_mips16 *upk)
static LONGEST micromips_relative_offset10(ULONGEST insn)
static int mips_convert_register_p(struct gdbarch *gdbarch, int regnum, struct type *type)
static int mips_fpu_type_auto
static int mips_type_needs_double_align(struct type *type)
static int is_mips16_addr(struct gdbarch *gdbarch, CORE_ADDR addr)
static int msymbol_is_mips16(struct minimal_symbol *msym)
static const char *const mips_abi_strings[]
static struct trad_frame_cache * mips_stub_frame_cache(frame_info_ptr this_frame, void **this_cache)
static void set_mipsfpu_double_command(const char *args, int from_tty)
static int mips_about_to_return(struct gdbarch *gdbarch, CORE_ADDR pc)
static int mips_insn32_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_cache)
static int mips_in_return_stub(struct gdbarch *gdbarch, CORE_ADDR pc, const char *name)
static void show_mask_address(struct ui_file *file, int from_tty, struct cmd_list_element *c, const char *value)
static const char mips_str_fn_stub[]
static const char *const mips_generic_reg_names[NUM_MIPS_PROCESSOR_REGS]
static int mips_register_to_value(frame_info_ptr frame, int regnum, struct type *type, gdb_byte *to, int *optimizedp, int *unavailablep)
struct target_desc * mips_tdesc_gp64
static int mips16_get_imm(unsigned short prev_inst, unsigned short inst, int nbits, int scale, int is_signed)
static int fp_register_arg_p(struct gdbarch *gdbarch, enum type_code typecode, struct type *arg_type)
static int is_octeon_bbit_op(int op, struct gdbarch *gdbarch)
static enum return_value_convention mips_eabi_return_value(struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
static CORE_ADDR mips_unwind_sp(struct gdbarch *gdbarch, frame_info_ptr next_frame)
static int is_mips16_isa(struct gdbarch *gdbarch)
static CORE_ADDR make_compact_addr(CORE_ADDR addr)
static struct type * mips_register_type(struct gdbarch *gdbarch, int regnum)
static LONGEST micromips_relative_offset7(ULONGEST insn)
static const char * mips_abi_string
static CORE_ADDR mips32_scan_prologue(struct gdbarch *gdbarch, CORE_ADDR start_pc, CORE_ADDR limit_pc, frame_info_ptr this_frame, struct mips_frame_cache *this_cache)
static struct cmd_list_element * showmipscmdlist
static void mips_micro_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
static int gdb_print_insn_mips(bfd_vma memaddr, struct disassemble_info *info)
static const struct frame_unwind mips_insn16_frame_unwind
static int micromips_pc_insn_size(struct gdbarch *gdbarch, CORE_ADDR pc)
static enum return_value_convention mips_o64_return_value(struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
static void mips_print_float_info(struct gdbarch *, struct ui_file *, frame_info_ptr, const char *)
static const char * mips_compression_string
@ MIPS_BP_KIND_MICROMIPS16
@ MIPS_BP_KIND_MICROMIPS32
static LONGEST mips32_relative_offset(ULONGEST inst)
static CORE_ADDR mips_skip_pic_trampoline_code(frame_info_ptr frame, CORE_ADDR pc)
static const signed char mips_reg3_to_reg[8]
static enum mips_abi global_mips_abi(void)
static void mips_make_symbol_special(struct symbol *sym, struct objfile *objfile)
static struct value * mips_insn16_frame_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
static void mips_insn16_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
static CORE_ADDR mips_frame_align(struct gdbarch *gdbarch, CORE_ADDR addr)
static int mips_is_stub_mode(const char *mode)
static int mips2_fp_compat(frame_info_ptr frame)
static const char * mips_register_name(struct gdbarch *gdbarch, int regno)
const struct register_alias mips_n32_n64_aliases[]
static unsigned int fetch_mips_16(struct gdbarch *gdbarch, CORE_ADDR pc)
static CORE_ADDR mips_segment_boundary(CORE_ADDR bpaddr)
static void mips_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int cookednum, const gdb_byte *buf)
static CORE_ADDR mips_insn16_frame_base_address(frame_info_ptr this_frame, void **this_cache)
static CORE_ADDR mips16_scan_prologue(struct gdbarch *gdbarch, CORE_ADDR start_pc, CORE_ADDR limit_pc, frame_info_ptr this_frame, struct mips_frame_cache *this_cache)
static int msymbol_is_micromips(struct minimal_symbol *msym)
static CORE_ADDR mips_n32n64_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
void mips_write_pc(struct regcache *regcache, CORE_ADDR pc)
int mips_pc_is_mips16(struct gdbarch *gdbarch, CORE_ADDR memaddr)
static struct type * mips_pseudo_register_type(struct gdbarch *gdbarch, int regnum)
static bool mips64_transfers_32bit_regs_p
static struct value * value_of_mips_user_reg(frame_info_ptr frame, const void *baton)
struct target_desc * mips_tdesc_gp32
static CORE_ADDR mips_integer_to_address(struct gdbarch *gdbarch, struct type *type, const gdb_byte *buf)
#define MIPS_DEFAULT_FPU_TYPE
static CORE_ADDR micromips_bc1_pc(struct gdbarch *gdbarch, struct regcache *regcache, ULONGEST insn, CORE_ADDR pc, int count)
static CORE_ADDR mips_skip_mips16_trampoline_code(frame_info_ptr frame, CORE_ADDR pc)
static const char *const mips_compression_strings[]
static int msymbol_is_mips(struct minimal_symbol *msym)
static enum return_value_convention mips_n32n64_return_value(struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
static void mips_elf_make_msymbol_special(asymbol *sym, struct minimal_symbol *msym)
static CORE_ADDR mips_o32_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
static CORE_ADDR mips_eabi_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
static int mips_stack_frame_destroyed_p(struct gdbarch *gdbarch, CORE_ADDR pc)
static int mips_single_step_through_delay(struct gdbarch *gdbarch, frame_info_ptr frame)
static int mips_last_arg_regnum(gdbarch *arch)
@ NUM_MIPS_PROCESSOR_REGS
static int micromips_instruction_is_compact_branch(unsigned short insn)
static const gdb_byte * mips_sw_breakpoint_from_kind(struct gdbarch *gdbarch, int kind, int *size)
static void mips_virtual_frame_pointer(struct gdbarch *gdbarch, CORE_ADDR pc, int *reg, LONGEST *offset)
#define itype_immediate(x)
std::vector< CORE_ADDR > mips_software_single_step(struct regcache *regcache)
static void set_reg_offset(struct gdbarch *gdbarch, struct mips_frame_cache *this_cache, int regnum, CORE_ADDR offset)
static int micromips_stack_frame_destroyed_p(struct gdbarch *gdbarch, CORE_ADDR pc)
static void mips_print_fp_register(struct ui_file *file, frame_info_ptr frame, int regnum)
static const char mips_str_mips16_ret_stub[]
static CORE_ADDR mips_adjust_dwarf2_line(CORE_ADDR addr, int rel)
static int micromips_insn_at_pc_has_delay_slot(struct gdbarch *gdbarch, CORE_ADDR addr, int mustbe32)
static const struct frame_unwind mips_insn32_frame_unwind
static void mips_abi_update(const char *ignore_args, int from_tty, struct cmd_list_element *c)
static const char mips_str_call_stub[]
static CORE_ADDR micromips_scan_prologue(struct gdbarch *gdbarch, CORE_ADDR start_pc, CORE_ADDR limit_pc, frame_info_ptr this_frame, struct mips_frame_cache *this_cache)
static const struct frame_base * mips_stub_frame_base_sniffer(frame_info_ptr this_frame)
static void mips_read_fp_register_double(frame_info_ptr frame, int regno, gdb_byte *rare_buffer)
static struct frame_id mips_dummy_id(struct gdbarch *gdbarch, frame_info_ptr this_frame)
static void mips_register_g_packet_guesses(struct gdbarch *gdbarch)
static int is_compact_addr(CORE_ADDR addr)
static int print_gp_register_row(struct ui_file *file, frame_info_ptr frame, int start_regnum)
static unsigned int mips_debug
static int mips_n32n64_fp_arg_chunk_p(struct gdbarch *gdbarch, struct type *arg_type, int offset)
static void mips_print_register(struct ui_file *file, frame_info_ptr frame, int regnum)
static enum mips_isa global_mips_compression(void)
static void mips_dump_tdep(struct gdbarch *gdbarch, struct ui_file *file)
static int is_octeon(struct gdbarch *gdbarch)
const struct register_alias mips_register_aliases[]
static struct gdbarch * mips_gdbarch_init(struct gdbarch_info info, struct gdbarch_list *arches)
const struct mips_regnum * mips_regnum(struct gdbarch *gdbarch)
static struct cmd_list_element * setmipscmdlist
static void show_mipsfpu_command(const char *args, int from_tty)
static void mips_insn32_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
static CORE_ADDR mips_o64_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
static CORE_ADDR unmake_compact_addr(CORE_ADDR addr)
static enum mips_isa mips_pc_isa(struct gdbarch *gdbarch, CORE_ADDR memaddr)
static CORE_ADDR mips_unwind_pc(struct gdbarch *gdbarch, frame_info_ptr next_frame)
static int mips_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *reggroup)
int mips_pc_is_micromips(struct gdbarch *gdbarch, CORE_ADDR memaddr)
static const struct frame_base * mips_insn16_frame_base_sniffer(frame_info_ptr this_frame)
static CORE_ADDR extended_mips16_next_pc(regcache *regcache, CORE_ADDR pc, unsigned int extension, unsigned int insn)
static const struct frame_base mips_insn32_frame_base
static const char *const mips_linux_reg_names[NUM_MIPS_PROCESSOR_REGS]
static void mips_stub_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
static int mips16_instruction_has_delay_slot(unsigned short inst, int mustbe32)
static std::vector< CORE_ADDR > mips_deal_with_atomic_sequence(struct gdbarch *gdbarch, CORE_ADDR pc)
static CORE_ADDR mips_next_pc(struct regcache *regcache, CORE_ADDR pc)
static int mips_micro_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_cache)
static struct value * mips_stub_frame_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
static void show_mips_abi(struct ui_file *file, int from_tty, struct cmd_list_element *ignored_cmd, const char *ignored_value)
const struct register_alias mips_o32_aliases[]
static char * mips_disassembler_options
static int mips_convert_register_gpreg_case_p(struct gdbarch *gdbarch, int regnum, struct type *type)
static int mips_insn16_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_cache)
static CORE_ADDR mips_insn32_frame_base_address(frame_info_ptr this_frame, void **this_cache)
static const struct frame_base mips_micro_frame_base
void _initialize_mips_tdep()
static int heuristic_fence_post
static void mips_find_abi_section(bfd *abfd, asection *sect, void *obj)
static void mips_find_long_section(bfd *abfd, asection *sect, void *obj)
static int mips_breakpoint_kind_from_pc(struct gdbarch *gdbarch, CORE_ADDR *pcptr)
unsigned int mips_abi_regsize(struct gdbarch *gdbarch)
static CORE_ADDR add_offset_16(CORE_ADDR pc, int offset)
static int micromips_instruction_has_delay_slot(ULONGEST insn, int mustbe32)
static CORE_ADDR mips_skip_trampoline_code(frame_info_ptr frame, CORE_ADDR pc)
static const struct frame_base * mips_insn32_frame_base_sniffer(frame_info_ptr this_frame)
static void mips_value_to_register(frame_info_ptr frame, int regnum, struct type *type, const gdb_byte *from)
static struct mips_frame_cache * mips_insn32_frame_cache(frame_info_ptr this_frame, void **this_cache)
static const struct frame_base mips_insn16_frame_base
CORE_ADDR mips_unmake_compact_addr(CORE_ADDR addr)
static const char mips_disassembler_options_n32[]
static const char mips_disassembler_options_n64[]
static struct mips_frame_cache * mips_insn16_frame_cache(frame_info_ptr this_frame, void **this_cache)
static CORE_ADDR mips_micro_frame_base_address(frame_info_ptr this_frame, void **this_cache)
static CORE_ADDR mips32_bc1_pc(struct gdbarch *gdbarch, struct regcache *regcache, ULONGEST inst, CORE_ADDR pc, int count)
static int micromips_decode_imm9(int imm)
static int mips16_instruction_is_compact_branch(unsigned short insn)
static int mips_is_stub_suffix(const char *suffix, int zero)
static const struct frame_base * mips_micro_frame_base_sniffer(frame_info_ptr this_frame)
static bool mips_eabi(gdbarch *arch)
static int mips_fpa0_regnum(struct gdbarch *gdbarch)
static CORE_ADDR extended_offset(unsigned int extension)
static int mips_float_register_p(struct gdbarch *gdbarch, int regnum)
static const char * mips_fpu_type_str(enum mips_fpu_type fpu_type)
static int mips_stab_reg_to_regnum(struct gdbarch *gdbarch, int num)
static const struct frame_unwind mips_stub_frame_unwind
static std::vector< CORE_ADDR > micromips_deal_with_atomic_sequence(struct gdbarch *gdbarch, CORE_ADDR pc)
static int mips_register_sim_regno(struct gdbarch *gdbarch, int regnum)
static CORE_ADDR micromips_next_pc(struct regcache *regcache, CORE_ADDR pc)
const struct register_alias mips_numeric_register_aliases[]
static int mips_insn_size(enum mips_isa isa, ULONGEST insn)
static std::vector< CORE_ADDR > deal_with_atomic_sequence(struct gdbarch *gdbarch, CORE_ADDR pc)
static void reinit_frame_cache_sfunc(const char *args, int from_tty, struct cmd_list_element *c)
static const char *const mips_tx39_reg_names[NUM_MIPS_PROCESSOR_REGS]
static const char mips_str_pic[]
static int is_micromips_isa(struct gdbarch *gdbarch)
static int mips_ax_pseudo_register_collect(struct gdbarch *gdbarch, struct agent_expr *ax, int reg)
static void set_mipsfpu_none_command(const char *args, int from_tty)
static void mips_read_fp_register_single(frame_info_ptr frame, int regno, gdb_byte *rare_buffer)
static int is_micromips_addr(struct gdbarch *gdbarch, CORE_ADDR addr)
static enum return_value_convention mips_o32_return_value(struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
static CORE_ADDR mips_push_dummy_code(struct gdbarch *gdbarch, CORE_ADDR sp, CORE_ADDR funaddr, struct value **args, int nargs, struct type *value_type, CORE_ADDR *real_pc, CORE_ADDR *bp_addr, struct regcache *regcache)
static const char mips_compression_micromips[]
static LONGEST micromips_relative_offset16(ULONGEST insn)
static enum auto_boolean mask_address_var
static int mips_tdesc_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *reggroup)
static int print_fp_register_row(struct ui_file *file, frame_info_ptr frame, int regnum)
static enum mips_fpu_type mips_get_fpu_type(gdbarch *arch)
static int mips_dwarf_dwarf2_ecoff_reg_to_regnum(struct gdbarch *gdbarch, int num)
static struct mips_frame_cache * mips_micro_frame_cache(frame_info_ptr this_frame, void **this_cache)
static const char mips_compression_mips16[]
static int mips32_stack_frame_destroyed_p(struct gdbarch *gdbarch, CORE_ADDR pc)
static int mips32_insn_at_pc_has_delay_slot(struct gdbarch *gdbarch, CORE_ADDR addr)
static enum register_status mips_pseudo_register_read(struct gdbarch *gdbarch, readable_regcache *regcache, int cookednum, gdb_byte *buf)
int mips_isa_regsize(struct gdbarch *gdbarch)
static int is_mips_addr(CORE_ADDR addr)
static const char mips_str_call_fp_stub[]
#define SET_MSYMBOL_TARGET_FLAG_MICROMIPS(sym)
#define MSYMBOL_TARGET_FLAG_MIPS16(sym)
@ MIPS_FIRST_EMBED_REGNUM
@ MIPS_EMBED_CAUSE_REGNUM
@ MIPS_EMBED_BADVADDR_REGNUM
static int in_mips_stubs_section(CORE_ADDR pc)
#define MSYMBOL_TARGET_FLAG_MICROMIPS(sym)
#define SET_MSYMBOL_TARGET_FLAG_MIPS16(sym)
static int in_plt_section(CORE_ADDR pc)
void gdbarch_init_osabi(struct gdbarch_info info, struct gdbarch *gdbarch)
CORE_ADDR regcache_read_pc(struct regcache *regcache)
void regcache_raw_write_signed(struct regcache *regcache, int regnum, LONGEST val)
int register_size(struct gdbarch *gdbarch, int regnum)
void regcache_cooked_write_signed(struct regcache *regcache, int regnum, LONGEST val)
LONGEST regcache_raw_get_signed(struct regcache *regcache, int regnum)
void regcache_cooked_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
struct type * register_type(struct gdbarch *gdbarch, int regnum)
const reggroup *const general_reggroup
const reggroup *const float_reggroup
const reggroup *const save_reggroup
const reggroup *const all_reggroup
const reggroup *const restore_reggroup
const reggroup *const vector_reggroup
void register_remote_g_packet_guess(struct gdbarch *gdbarch, int bytes, const struct target_desc *tdesc)
constexpr gdb_byte little_breakpoint[]
constexpr gdb_byte big_breakpoint[]
@ LEGACY_SIM_REGNO_IGNORE
void set_start(CORE_ADDR start)
CORE_ADDR value_address() const
struct minimal_symbol * minsym
struct type * builtin_double
struct type * builtin_func_ptr
struct type * builtin_data_ptr
struct type * builtin_int64
struct type * builtin_int32
struct type * builtin_float
LONGEST loc_bitpos() const
struct type * type() const
void set_unrelocated_address(unrelocated_addr addr)
const char * linkage_name() const
unsigned long size() const
unrelocated_addr unrelocated_address() const
trad_frame_saved_reg * saved_regs
int default_mask_address_p
CORE_ADDR(* syscall_next_pc)(frame_info_ptr frame)
int register_size_valid_p
const struct mips_regnum * regnum
int mips64_transfers_32bit_regs_p
int mips_last_fp_arg_regnum
const char *const * mips_processor_reg_names
int fp_implementation_revision
const block * value_block() const
address_class aclass() const
frame_info_ptr this_frame
void set_realreg(int realreg)
void set_addr(LONGEST addr)
void set_value(LONGEST val)
struct field & field(int idx) const
unsigned int num_fields() const
struct field * fields() const
gdb::array_view< const gdb_byte > contents_all()
struct gdbarch * arch() const
gdb::array_view< const gdb_byte > contents()
bool entirely_available()
struct type * type() const
CORE_ADDR skip_prologue_using_sal(struct gdbarch *gdbarch, CORE_ADDR func_addr)
tdesc_arch_data_up tdesc_data_alloc(void)
const struct tdesc_feature * tdesc_find_feature(const struct target_desc *target_desc, const char *name)
int tdesc_numbered_register(const struct tdesc_feature *feature, struct tdesc_arch_data *data, int regno, const char *name)
static const registry< gdbarch >::key< tdesc_arch_data > tdesc_data
void tdesc_use_registers(struct gdbarch *gdbarch, const struct target_desc *target_desc, tdesc_arch_data_up &&early_data, tdesc_unknown_register_ftype unk_reg_cb)
int tdesc_has_registers(const struct target_desc *target_desc)
void set_tdesc_pseudo_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype *pseudo_type)
target_desc_up allocate_target_description(void)
const char * tdesc_register_name(struct gdbarch *gdbarch, int regno)
int tdesc_register_in_reggroup_p(struct gdbarch *gdbarch, int regno, const struct reggroup *reggroup)
const char * tdesc_property(const struct target_desc *target_desc, const char *key)
void set_tdesc_property(struct target_desc *target_desc, const char *key, const char *value)
std::unique_ptr< tdesc_arch_data, tdesc_arch_data_deleter > tdesc_arch_data_up
std::string target_float_to_string(const gdb_byte *addr, const struct type *type, const char *format)
int target_read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
trad_frame_saved_reg * trad_frame_alloc_saved_regs(struct gdbarch *gdbarch)
void trad_frame_set_reg_realreg(struct trad_frame_cache *this_trad_cache, int regnum, int realreg)
struct value * trad_frame_get_prev_register(frame_info_ptr this_frame, trad_frame_saved_reg this_saved_regs[], int regnum)
struct trad_frame_cache * trad_frame_cache_zalloc(frame_info_ptr this_frame)
void trad_frame_get_id(struct trad_frame_cache *this_trad_cache, struct frame_id *this_id)
void trad_frame_set_id(struct trad_frame_cache *this_trad_cache, struct frame_id this_id)
CORE_ADDR trad_frame_get_this_base(struct trad_frame_cache *this_trad_cache)
void trad_frame_set_this_base(struct trad_frame_cache *this_trad_cache, CORE_ADDR this_base)
struct value * trad_frame_get_register(struct trad_frame_cache *this_trad_cache, frame_info_ptr this_frame, int regnum)
void user_reg_add(struct gdbarch *gdbarch, const char *name, user_reg_read_ftype *xread, const void *baton)
const char * paddress(struct gdbarch *gdbarch, CORE_ADDR addr)
void gdb_printf(struct ui_file *stream, const char *format,...)
void gdb_puts(const char *linebuffer, struct ui_file *stream)
void get_formatted_print_options(struct value_print_options *opts, char format)
void value_print_scalar_formatted(struct value *val, const struct value_print_options *options, int size, struct ui_file *stream)