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riscv-fbsd-tdep.c
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1/* Target-dependent code for FreeBSD on RISC-V processors.
2 Copyright (C) 2018-2023 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
18
19#include "defs.h"
20#include "fbsd-tdep.h"
21#include "osabi.h"
22#include "riscv-tdep.h"
23#include "riscv-fbsd-tdep.h"
24#include "solib-svr4.h"
25#include "target.h"
26#include "trad-frame.h"
27#include "tramp-frame.h"
28#include "gdbarch.h"
29#include "inferior.h"
30
31/* Register maps. */
32
34 {
35 { 1, RISCV_RA_REGNUM, 0 },
36 { 1, RISCV_SP_REGNUM, 0 },
37 { 1, RISCV_GP_REGNUM, 0 },
38 { 1, RISCV_TP_REGNUM, 0 },
39 { 3, 5, 0 }, /* t0 - t2 */
40 { 4, 28, 0 }, /* t3 - t6 */
41 { 2, RISCV_FP_REGNUM, 0 }, /* s0 - s1 */
42 { 10, 18, 0 }, /* s2 - s11 */
43 { 8, RISCV_A0_REGNUM, 0 }, /* a0 - a7 */
44 { 1, RISCV_PC_REGNUM, 0 },
45 { 1, RISCV_CSR_SSTATUS_REGNUM, 0 },
46 { 0 }
47 };
48
50 {
51 { 32, RISCV_FIRST_FP_REGNUM, 16 },
52 { 1, RISCV_CSR_FCSR_REGNUM, 8 },
53 { 0 }
54 };
55
56/* Register set definitions. */
57
62
67
68/* Implement the "iterate_over_regset_sections" gdbarch method. */
69
70static void
82
83/* In a signal frame, sp points to a 'struct sigframe' which is
84 defined as:
85
86 struct sigframe {
87 siginfo_t sf_si;
88 ucontext_t sf_uc;
89 };
90
91 ucontext_t is defined as:
92
93 struct __ucontext {
94 sigset_t uc_sigmask;
95 mcontext_t uc_mcontext;
96 ...
97 };
98
99 The mcontext_t contains the general purpose register set followed
100 by the floating point register set. The floating point register
101 set is only valid if the _MC_FP_VALID flag is set in mc_flags. */
102
103#define RISCV_SIGFRAME_UCONTEXT_OFFSET 80
104#define RISCV_UCONTEXT_MCONTEXT_OFFSET 16
105#define RISCV_MCONTEXT_FLAG_FP_VALID 0x1
106
107/* Implement the "init" method of struct tramp_frame. */
108
109static void
111 frame_info_ptr this_frame,
112 struct trad_frame_cache *this_cache,
113 CORE_ADDR func)
114{
115 struct gdbarch *gdbarch = get_frame_arch (this_frame);
116 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
117 CORE_ADDR sp = get_frame_register_unsigned (this_frame, RISCV_SP_REGNUM);
118 CORE_ADDR mcontext_addr
119 = (sp
122 gdb_byte buf[4];
123
124 trad_frame_set_reg_regmap (this_cache, riscv_fbsd_gregmap, mcontext_addr,
126
127 CORE_ADDR fpregs_addr
128 = mcontext_addr + RISCV_FBSD_NUM_GREGS * riscv_isa_xlen (gdbarch);
129 CORE_ADDR fp_flags_addr
130 = fpregs_addr + RISCV_FBSD_SIZEOF_FPREGSET;
131 if (target_read_memory (fp_flags_addr, buf, 4) == 0
132 && (extract_unsigned_integer (buf, 4, byte_order)
134 trad_frame_set_reg_regmap (this_cache, riscv_fbsd_fpregmap, fpregs_addr,
136
137 trad_frame_set_id (this_cache, frame_id_build (sp, func));
138}
139
140/* RISC-V supports 16-bit instructions ("C") as well as 32-bit
141 instructions. The signal trampoline on FreeBSD uses a mix of
142 these, but tramp_frame assumes a fixed instruction size. To cope,
143 claim that all instructions are 16 bits and use two "slots" for
144 32-bit instructions. */
145
146static const struct tramp_frame riscv_fbsd_sigframe =
147{
149 2,
150 {
151 {0x850a, ULONGEST_MAX}, /* mov a0, sp */
152 {0x0513, ULONGEST_MAX}, /* addi a0, a0, #SF_UC */
153 {0x0505, ULONGEST_MAX},
154 {0x0293, ULONGEST_MAX}, /* li t0, #SYS_sigreturn */
155 {0x1a10, ULONGEST_MAX},
156 {0x0073, ULONGEST_MAX}, /* ecall */
157 {0x0000, ULONGEST_MAX},
158 {TRAMP_SENTINEL_INSN, ULONGEST_MAX}
159 },
161};
162
163/* Implement the "get_thread_local_address" gdbarch method. */
164
165static CORE_ADDR
167 CORE_ADDR lm_addr, CORE_ADDR offset)
168{
169 struct regcache *regcache;
170
171 regcache = get_thread_arch_regcache (current_inferior ()->process_target (),
172 ptid, gdbarch);
173
175
176 ULONGEST tp;
177 if (regcache->cooked_read (RISCV_TP_REGNUM, &tp) != REG_VALID)
178 error (_("Unable to fetch %%tp"));
179
180 /* %tp points to the end of the TCB which contains two pointers.
181 The first pointer in the TCB points to the DTV array. */
182 CORE_ADDR dtv_addr = tp - (gdbarch_ptr_bit (gdbarch) / 8) * 2;
183 return fbsd_get_thread_local_address (gdbarch, dtv_addr, lm_addr, offset);
184}
185
186/* Implement the 'init_osabi' method of struct gdb_osabi_handler. */
187
188static void
211
213void
enum register_status cooked_read(int regnum, gdb_byte *buf)
Definition regcache.c:698
friend class regcache
Definition regcache.h:269
ptid_t ptid() const
Definition regcache.h:408
static ULONGEST extract_unsigned_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
Definition defs.h:480
CORE_ADDR fbsd_get_thread_local_address(struct gdbarch *gdbarch, CORE_ADDR dtv_addr, CORE_ADDR lm_addr, CORE_ADDR offset)
Definition fbsd-tdep.c:2027
void fbsd_init_abi(struct gdbarch_info info, struct gdbarch *gdbarch)
Definition fbsd-tdep.c:2380
ULONGEST get_frame_register_unsigned(frame_info_ptr frame, int regnum)
Definition frame.c:1399
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
Definition frame.c:736
struct gdbarch * get_frame_arch(frame_info_ptr this_frame)
Definition frame.c:3027
@ SIGTRAMP_FRAME
Definition frame.h:198
enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
Definition gdbarch.c:1396
void set_gdbarch_software_single_step(struct gdbarch *gdbarch, gdbarch_software_single_step_ftype *software_single_step)
void set_gdbarch_get_thread_local_address(struct gdbarch *gdbarch, gdbarch_get_thread_local_address_ftype *get_thread_local_address)
void set_gdbarch_fetch_tls_load_module_address(struct gdbarch *gdbarch, gdbarch_fetch_tls_load_module_address_ftype *fetch_tls_load_module_address)
int gdbarch_ptr_bit(struct gdbarch *gdbarch)
Definition gdbarch.c:1722
void set_gdbarch_iterate_over_regset_sections(struct gdbarch *gdbarch, gdbarch_iterate_over_regset_sections_ftype *iterate_over_regset_sections)
void iterate_over_regset_sections_cb(const char *sect_name, int supply_size, int collect_size, const struct regset *regset, const char *human_name, void *cb_data)
Definition gdbarch.h:104
struct inferior * current_inferior(void)
Definition inferior.c:55
static CORE_ADDR lm_addr(struct so_list *so)
Definition nto-tdep.c:246
void gdbarch_register_osabi(enum bfd_architecture arch, unsigned long machine, enum gdb_osabi osabi, void(*init_osabi)(struct gdbarch_info, struct gdbarch *))
Definition osabi.c:146
@ GDB_OSABI_FREEBSD
Definition osabi.h:33
void regcache_collect_regset(const struct regset *regset, const struct regcache *regcache, int regnum, void *buf, size_t size)
Definition regcache.c:1273
struct regcache * get_thread_arch_regcache(process_stratum_target *target, ptid_t ptid, struct gdbarch *gdbarch)
Definition regcache.c:384
void(* func)(remote_target *remote, char *)
static void riscv_fbsd_init_abi(struct gdbarch_info info, struct gdbarch *gdbarch)
#define RISCV_MCONTEXT_FLAG_FP_VALID
const struct regset riscv_fbsd_fpregset
const struct regset riscv_fbsd_gregset
static void riscv_fbsd_sigframe_init(const struct tramp_frame *self, frame_info_ptr this_frame, struct trad_frame_cache *this_cache, CORE_ADDR func)
static const struct regcache_map_entry riscv_fbsd_fpregmap[]
void _initialize_riscv_fbsd_tdep()
static const struct regcache_map_entry riscv_fbsd_gregmap[]
static CORE_ADDR riscv_fbsd_get_thread_local_address(struct gdbarch *gdbarch, ptid_t ptid, CORE_ADDR lm_addr, CORE_ADDR offset)
static void riscv_fbsd_iterate_over_regset_sections(struct gdbarch *gdbarch, iterate_over_regset_sections_cb *cb, void *cb_data, const struct regcache *regcache)
#define RISCV_SIGFRAME_UCONTEXT_OFFSET
#define RISCV_UCONTEXT_MCONTEXT_OFFSET
static const struct tramp_frame riscv_fbsd_sigframe
#define RISCV_FBSD_SIZEOF_FPREGSET
#define RISCV_FBSD_NUM_GREGS
void riscv_supply_regset(const struct regset *regset, struct regcache *regcache, int regnum, const void *regs, size_t len)
int riscv_isa_xlen(struct gdbarch *gdbarch)
Definition riscv-tdep.c:765
std::vector< CORE_ADDR > riscv_software_single_step(struct regcache *regcache)
@ RISCV_GP_REGNUM
Definition riscv-tdep.h:33
@ RISCV_TP_REGNUM
Definition riscv-tdep.h:34
@ RISCV_RA_REGNUM
Definition riscv-tdep.h:31
@ RISCV_FIRST_FP_REGNUM
Definition riscv-tdep.h:43
@ RISCV_FP_REGNUM
Definition riscv-tdep.h:35
@ RISCV_SP_REGNUM
Definition riscv-tdep.h:32
@ RISCV_A0_REGNUM
Definition riscv-tdep.h:36
@ RISCV_PC_REGNUM
Definition riscv-tdep.h:39
void set_solib_svr4_fetch_link_map_offsets(struct gdbarch *gdbarch, struct link_map_offsets *(*flmo)(void))
struct link_map_offsets * svr4_lp64_fetch_link_map_offsets(void)
CORE_ADDR svr4_fetch_objfile_link_map(struct objfile *objfile)
struct link_map_offsets * svr4_ilp32_fetch_link_map_offsets(void)
Definition regcache.h:111
void target_fetch_registers(struct regcache *regcache, int regno)
Definition target.c:3928
int target_read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition target.c:1785
void trad_frame_set_reg_regmap(struct trad_frame_cache *this_trad_cache, const struct regcache_map_entry *regmap, CORE_ADDR addr, size_t size)
Definition trad-frame.c:117
void trad_frame_set_id(struct trad_frame_cache *this_trad_cache, struct frame_id this_id)
Definition trad-frame.c:220
void tramp_frame_prepend_unwinder(struct gdbarch *gdbarch, const struct tramp_frame *tramp_frame)
#define TRAMP_SENTINEL_INSN
Definition tramp-frame.h:44