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ia64-tdep.c
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1/* Target-dependent code for the IA-64 for GDB, the GNU debugger.
2
3 Copyright (C) 1999-2023 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20#include "defs.h"
21#include "inferior.h"
22#include "gdbcore.h"
23#include "arch-utils.h"
24#include "floatformat.h"
25#include "gdbtypes.h"
26#include "regcache.h"
27#include "reggroups.h"
28#include "frame.h"
29#include "frame-base.h"
30#include "frame-unwind.h"
31#include "target-float.h"
32#include "value.h"
33#include "objfiles.h"
34#include "elf/common.h"
35#include "elf-bfd.h"
36#include "dis-asm.h"
37#include "infcall.h"
38#include "osabi.h"
39#include "ia64-tdep.h"
40#include "cp-abi.h"
41
42#ifdef HAVE_LIBUNWIND_IA64_H
43#include "elf/ia64.h"
44#include "ia64-libunwind-tdep.h"
45
46/* Note: KERNEL_START is supposed to be an address which is not going
47 to ever contain any valid unwind info. For ia64 linux, the choice
48 of 0xc000000000000000 is fairly safe since that's uncached space.
49
50 We use KERNEL_START as follows: after obtaining the kernel's
51 unwind table via getunwind(), we project its unwind data into
52 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
53 when ia64_access_mem() sees a memory access to this
54 address-range, we redirect it to ktab instead.
55
56 None of this hackery is needed with a modern kernel/libcs
57 which uses the kernel virtual DSO to provide access to the
58 kernel's unwind info. In that case, ktab_size remains 0 and
59 hence the value of KERNEL_START doesn't matter. */
60
61#define KERNEL_START 0xc000000000000000ULL
62
63static size_t ktab_size = 0;
64struct ia64_table_entry
65 {
66 uint64_t start_offset;
67 uint64_t end_offset;
68 uint64_t info_offset;
69 };
70
71static struct ia64_table_entry *ktab = NULL;
72static gdb::optional<gdb::byte_vector> ktab_buf;
73
74#endif
75
76/* An enumeration of the different IA-64 instruction types. */
77
79{
80 A, /* Integer ALU ; I-unit or M-unit */
81 I, /* Non-ALU integer; I-unit */
82 M, /* Memory ; M-unit */
83 F, /* Floating-point ; F-unit */
84 B, /* Branch ; B-unit */
85 L, /* Extended (L+X) ; I-unit */
86 X, /* Extended (L+X) ; I-unit */
87 undefined /* undefined or reserved */
88};
89
90/* We represent IA-64 PC addresses as the value of the instruction
91 pointer or'd with some bit combination in the low nibble which
92 represents the slot number in the bundle addressed by the
93 instruction pointer. The problem is that the Linux kernel
94 multiplies its slot numbers (for exceptions) by one while the
95 disassembler multiplies its slot numbers by 6. In addition, I've
96 heard it said that the simulator uses 1 as the multiplier.
97
98 I've fixed the disassembler so that the bytes_per_line field will
99 be the slot multiplier. If bytes_per_line comes in as zero, it
100 is set to six (which is how it was set up initially). -- objdump
101 displays pretty disassembly dumps with this value. For our purposes,
102 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
103 never want to also display the raw bytes the way objdump does. */
104
105#define SLOT_MULTIPLIER 1
106
107/* Length in bytes of an instruction bundle. */
108
109#define BUNDLE_LEN 16
110
111/* See the saved memory layout comment for ia64_memory_insert_breakpoint. */
112
113#if BREAKPOINT_MAX < BUNDLE_LEN - 2
114# error "BREAKPOINT_MAX < BUNDLE_LEN - 2"
115#endif
116
118
123static struct type *is_float_or_hfa_type (struct type *t);
124static CORE_ADDR ia64_find_global_pointer (struct gdbarch *gdbarch,
125 CORE_ADDR faddr);
126
127#define NUM_IA64_RAW_REGS 462
128
129/* Big enough to hold a FP register in bytes. */
130#define IA64_FP_REGISTER_SIZE 16
131
133
134/* NOTE: we treat the register stack registers r32-r127 as
135 pseudo-registers because they may not be accessible via the ptrace
136 register get/set interfaces. */
137
143
144/* Array of register names; There should be ia64_num_regs strings in
145 the initializer. */
146
147static const char * const ia64_register_names[] =
148{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
149 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
150 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
151 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
156 "", "", "", "", "", "", "", "",
157 "", "", "", "", "", "", "", "",
158 "", "", "", "", "", "", "", "",
159 "", "", "", "", "", "", "", "",
160 "", "", "", "", "", "", "", "",
161 "", "", "", "", "", "", "", "",
162 "", "", "", "", "", "", "", "",
163 "", "", "", "", "", "", "", "",
164
165 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
166 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
167 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
168 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
169 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
170 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
171 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
172 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
173 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
174 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
175 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
176 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
177 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
178 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
179 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
180 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
181
182 "", "", "", "", "", "", "", "",
183 "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "",
188 "", "", "", "", "", "", "", "",
189 "", "", "", "", "", "", "", "",
190
191 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
192
193 "vfp", "vrap",
194
195 "pr", "ip", "psr", "cfm",
196
197 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
198 "", "", "", "", "", "", "", "",
199 "rsc", "bsp", "bspstore", "rnat",
200 "", "fcr", "", "",
201 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
202 "ccv", "", "", "", "unat", "", "", "",
203 "fpsr", "", "", "", "itc",
204 "", "", "", "", "", "", "", "", "", "",
205 "", "", "", "", "", "", "", "", "",
206 "pfs", "lc", "ec",
207 "", "", "", "", "", "", "", "", "", "",
208 "", "", "", "", "", "", "", "", "", "",
209 "", "", "", "", "", "", "", "", "", "",
210 "", "", "", "", "", "", "", "", "", "",
211 "", "", "", "", "", "", "", "", "", "",
212 "", "", "", "", "", "", "", "", "", "",
213 "",
214 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
215 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
216 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
217 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
218 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
219 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
220 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
221 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
222 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
223 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
224 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
225 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
226 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
227 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
228 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
229 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
230
231 "bof",
232
233 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
234 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
235 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
236 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
237 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
238 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
239 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
240 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
241 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
242 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
243 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
244 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
245
246 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
247 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
248 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
249 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
250 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
251 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
252 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
253 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
254};
255
257{
258 CORE_ADDR base; /* frame pointer base for frame */
259 CORE_ADDR pc; /* function start pc for frame */
260 CORE_ADDR saved_sp; /* stack pointer for frame */
261 CORE_ADDR bsp; /* points at r32 for the current frame */
262 CORE_ADDR cfm; /* cfm value for current frame */
263 CORE_ADDR prev_cfm; /* cfm value for previous frame */
265 int sof; /* Size of frame (decoded from cfm value). */
266 int sol; /* Size of locals (decoded from cfm value). */
267 int sor; /* Number of rotating registers (decoded from
268 cfm value). */
269 CORE_ADDR after_prologue;
270 /* Address of first instruction after the last
271 prologue instruction; Note that there may
272 be instructions from the function's body
273 intermingled with the prologue. */
275 /* Size of the memory stack frame (may be zero),
276 or -1 if it has not been determined yet. */
277 int fp_reg; /* Register number (if any) used a frame pointer
278 for this frame. 0 if no register is being used
279 as the frame pointer. */
280
281 /* Saved registers. */
283
284};
285
286static int
287floatformat_valid (const struct floatformat *fmt, const void *from)
288{
289 return 1;
290}
291
292static const struct floatformat floatformat_ia64_ext_little =
293{
294 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
295 floatformat_intbit_yes, "floatformat_ia64_ext_little", floatformat_valid, NULL
296};
297
298static const struct floatformat floatformat_ia64_ext_big =
299{
300 floatformat_big, 82, 46, 47, 17, 65535, 0x1ffff, 64, 64,
301 floatformat_intbit_yes, "floatformat_ia64_ext_big", floatformat_valid
302};
303
304static const struct floatformat *floatformats_ia64_ext[2] =
305{
308};
309
310static struct type *
312{
313 ia64_gdbarch_tdep *tdep = gdbarch_tdep<ia64_gdbarch_tdep> (gdbarch);
314
315 if (!tdep->ia64_ext_type)
316 {
317 type_allocator alloc (gdbarch);
318 tdep->ia64_ext_type
319 = init_float_type (alloc, 128, "builtin_type_ia64_ext",
321 }
322
323 return tdep->ia64_ext_type;
324}
325
326static int
328 const struct reggroup *group)
329{
330 int vector_p;
331 int float_p;
332 int raw_p;
333 if (group == all_reggroup)
334 return 1;
335 vector_p = register_type (gdbarch, regnum)->is_vector ();
336 float_p = register_type (gdbarch, regnum)->code () == TYPE_CODE_FLT;
337 raw_p = regnum < NUM_IA64_RAW_REGS;
338 if (group == float_reggroup)
339 return float_p;
340 if (group == vector_reggroup)
341 return vector_p;
342 if (group == general_reggroup)
343 return (!vector_p && !float_p);
344 if (group == save_reggroup || group == restore_reggroup)
345 return raw_p;
346 return 0;
347}
348
349static const char *
351{
352 return ia64_register_names[reg];
353}
354
355struct type *
357{
358 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
359 return ia64_ext_type (arch);
360 else
362}
363
364static int
366{
367 if (reg >= IA64_GR32_REGNUM && reg <= IA64_GR127_REGNUM)
368 return V32_REGNUM + (reg - IA64_GR32_REGNUM);
369 return reg;
370}
371
372
373/* Extract ``len'' bits from an instruction bundle starting at
374 bit ``from''. */
375
376static long long
377extract_bit_field (const gdb_byte *bundle, int from, int len)
378{
379 long long result = 0LL;
380 int to = from + len;
381 int from_byte = from / 8;
382 int to_byte = to / 8;
383 unsigned char *b = (unsigned char *) bundle;
384 unsigned char c;
385 int lshift;
386 int i;
387
388 c = b[from_byte];
389 if (from_byte == to_byte)
390 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
391 result = c >> (from % 8);
392 lshift = 8 - (from % 8);
393
394 for (i = from_byte+1; i < to_byte; i++)
395 {
396 result |= ((long long) b[i]) << lshift;
397 lshift += 8;
398 }
399
400 if (from_byte < to_byte && (to % 8 != 0))
401 {
402 c = b[to_byte];
403 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
404 result |= ((long long) c) << lshift;
405 }
406
407 return result;
408}
409
410/* Replace the specified bits in an instruction bundle. */
411
412static void
413replace_bit_field (gdb_byte *bundle, long long val, int from, int len)
414{
415 int to = from + len;
416 int from_byte = from / 8;
417 int to_byte = to / 8;
418 unsigned char *b = (unsigned char *) bundle;
419 unsigned char c;
420
421 if (from_byte == to_byte)
422 {
423 unsigned char left, right;
424 c = b[from_byte];
425 left = (c >> (to % 8)) << (to % 8);
426 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
427 c = (unsigned char) (val & 0xff);
428 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
429 c |= right | left;
430 b[from_byte] = c;
431 }
432 else
433 {
434 int i;
435 c = b[from_byte];
436 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
437 c = c | (val << (from % 8));
438 b[from_byte] = c;
439 val >>= 8 - from % 8;
440
441 for (i = from_byte+1; i < to_byte; i++)
442 {
443 c = val & 0xff;
444 val >>= 8;
445 b[i] = c;
446 }
447
448 if (to % 8 != 0)
449 {
450 unsigned char cv = (unsigned char) val;
451 c = b[to_byte];
452 c = c >> (to % 8) << (to % 8);
453 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
454 b[to_byte] = c;
455 }
456 }
457}
458
459/* Return the contents of slot N (for N = 0, 1, or 2) in
460 and instruction bundle. */
461
462static long long
463slotN_contents (gdb_byte *bundle, int slotnum)
464{
465 return extract_bit_field (bundle, 5+41*slotnum, 41);
466}
467
468/* Store an instruction in an instruction bundle. */
469
470static void
471replace_slotN_contents (gdb_byte *bundle, long long instr, int slotnum)
472{
473 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
474}
475
477{
478 { M, I, I }, /* 00 */
479 { M, I, I }, /* 01 */
480 { M, I, I }, /* 02 */
481 { M, I, I }, /* 03 */
482 { M, L, X }, /* 04 */
483 { M, L, X }, /* 05 */
484 { undefined, undefined, undefined }, /* 06 */
485 { undefined, undefined, undefined }, /* 07 */
486 { M, M, I }, /* 08 */
487 { M, M, I }, /* 09 */
488 { M, M, I }, /* 0A */
489 { M, M, I }, /* 0B */
490 { M, F, I }, /* 0C */
491 { M, F, I }, /* 0D */
492 { M, M, F }, /* 0E */
493 { M, M, F }, /* 0F */
494 { M, I, B }, /* 10 */
495 { M, I, B }, /* 11 */
496 { M, B, B }, /* 12 */
497 { M, B, B }, /* 13 */
498 { undefined, undefined, undefined }, /* 14 */
499 { undefined, undefined, undefined }, /* 15 */
500 { B, B, B }, /* 16 */
501 { B, B, B }, /* 17 */
502 { M, M, B }, /* 18 */
503 { M, M, B }, /* 19 */
504 { undefined, undefined, undefined }, /* 1A */
505 { undefined, undefined, undefined }, /* 1B */
506 { M, F, B }, /* 1C */
507 { M, F, B }, /* 1D */
508 { undefined, undefined, undefined }, /* 1E */
509 { undefined, undefined, undefined }, /* 1F */
510};
511
512/* Fetch and (partially) decode an instruction at ADDR and return the
513 address of the next instruction to fetch. */
514
515static CORE_ADDR
516fetch_instruction (CORE_ADDR addr, ia64_instruction_type *it, long long *instr)
517{
518 gdb_byte bundle[BUNDLE_LEN];
519 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
520 long long templ;
521 int val;
522
523 /* Warn about slot numbers greater than 2. We used to generate
524 an error here on the assumption that the user entered an invalid
525 address. But, sometimes GDB itself requests an invalid address.
526 This can (easily) happen when execution stops in a function for
527 which there are no symbols. The prologue scanner will attempt to
528 find the beginning of the function - if the nearest symbol
529 happens to not be aligned on a bundle boundary (16 bytes), the
530 resulting starting address will cause GDB to think that the slot
531 number is too large.
532
533 So we warn about it and set the slot number to zero. It is
534 not necessarily a fatal condition, particularly if debugging
535 at the assembly language level. */
536 if (slotnum > 2)
537 {
538 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
539 "Using slot 0 instead"));
540 slotnum = 0;
541 }
542
543 addr &= ~0x0f;
544
545 val = target_read_memory (addr, bundle, BUNDLE_LEN);
546
547 if (val != 0)
548 return 0;
549
550 *instr = slotN_contents (bundle, slotnum);
551 templ = extract_bit_field (bundle, 0, 5);
552 *it = template_encoding_table[(int)templ][slotnum];
553
554 if (slotnum == 2 || (slotnum == 1 && *it == L))
555 addr += 16;
556 else
557 addr += (slotnum + 1) * SLOT_MULTIPLIER;
558
559 return addr;
560}
561
562/* There are 5 different break instructions (break.i, break.b,
563 break.m, break.f, and break.x), but they all have the same
564 encoding. (The five bit template in the low five bits of the
565 instruction bundle distinguishes one from another.)
566
567 The runtime architecture manual specifies that break instructions
568 used for debugging purposes must have the upper two bits of the 21
569 bit immediate set to a 0 and a 1 respectively. A breakpoint
570 instruction encodes the most significant bit of its 21 bit
571 immediate at bit 36 of the 41 bit instruction. The penultimate msb
572 is at bit 25 which leads to the pattern below.
573
574 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
575 it turns out that 0x80000 was used as the syscall break in the early
576 simulators. So I changed the pattern slightly to do "break.i 0x080001"
577 instead. But that didn't work either (I later found out that this
578 pattern was used by the simulator that I was using.) So I ended up
579 using the pattern seen below.
580
581 SHADOW_CONTENTS has byte-based addressing (PLACED_ADDRESS and SHADOW_LEN)
582 while we need bit-based addressing as the instructions length is 41 bits and
583 we must not modify/corrupt the adjacent slots in the same bundle.
584 Fortunately we may store larger memory incl. the adjacent bits with the
585 original memory content (not the possibly already stored breakpoints there).
586 We need to be careful in ia64_memory_remove_breakpoint to always restore
587 only the specific bits of this instruction ignoring any adjacent stored
588 bits.
589
590 We use the original addressing with the low nibble in the range <0..2> which
591 gets incorrectly interpreted by generic non-ia64 breakpoint_restore_shadows
592 as the direct byte offset of SHADOW_CONTENTS. We store whole BUNDLE_LEN
593 bytes just without these two possibly skipped bytes to not to exceed to the
594 next bundle.
595
596 If we would like to store the whole bundle to SHADOW_CONTENTS we would have
597 to store already the base address (`address & ~0x0f') into PLACED_ADDRESS.
598 In such case there is no other place where to store
599 SLOTNUM (`adress & 0x0f', value in the range <0..2>). We need to know
600 SLOTNUM in ia64_memory_remove_breakpoint.
601
602 There is one special case where we need to be extra careful:
603 L-X instructions, which are instructions that occupy 2 slots
604 (The L part is always in slot 1, and the X part is always in
605 slot 2). We must refuse to insert breakpoints for an address
606 that points at slot 2 of a bundle where an L-X instruction is
607 present, since there is logically no instruction at that address.
608 However, to make things more interesting, the opcode of L-X
609 instructions is located in slot 2. This means that, to insert
610 a breakpoint at an address that points to slot 1, we actually
611 need to write the breakpoint in slot 2! Slot 1 is actually
612 the extended operand, so writing the breakpoint there would not
613 have the desired effect. Another side-effect of this issue
614 is that we need to make sure that the shadow contents buffer
615 does save byte 15 of our instruction bundle (this is the tail
616 end of slot 2, which wouldn't be saved if we were to insert
617 the breakpoint in slot 1).
618
619 ia64 16-byte bundle layout:
620 | 5 bits | slot 0 with 41 bits | slot 1 with 41 bits | slot 2 with 41 bits |
621
622 The current addressing used by the code below:
623 original PC placed_address placed_size required covered
624 == bp_tgt->shadow_len reqd \subset covered
625 0xABCDE0 0xABCDE0 0x10 <0x0...0x5> <0x0..0xF>
626 0xABCDE1 0xABCDE1 0xF <0x5...0xA> <0x1..0xF>
627 0xABCDE2 0xABCDE2 0xE <0xA...0xF> <0x2..0xF>
628
629 L-X instructions are treated a little specially, as explained above:
630 0xABCDE1 0xABCDE1 0xF <0xA...0xF> <0x1..0xF>
631
632 `objdump -d' and some other tools show a bit unjustified offsets:
633 original PC byte where starts the instruction objdump offset
634 0xABCDE0 0xABCDE0 0xABCDE0
635 0xABCDE1 0xABCDE5 0xABCDE6
636 0xABCDE2 0xABCDEA 0xABCDEC
637 */
638
639#define IA64_BREAKPOINT 0x00003333300LL
640
641static int
643 struct bp_target_info *bp_tgt)
644{
645 CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address;
646 gdb_byte bundle[BUNDLE_LEN];
647 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER, shadow_slotnum;
648 long long instr_breakpoint;
649 int val;
650 int templ;
651
652 if (slotnum > 2)
653 error (_("Can't insert breakpoint for slot numbers greater than 2."));
654
655 addr &= ~0x0f;
656
657 /* Enable the automatic memory restoration from breakpoints while
658 we read our instruction bundle for the purpose of SHADOW_CONTENTS.
659 Otherwise, we could possibly store into the shadow parts of the adjacent
660 placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
661 breakpoint instruction bits region. */
662 scoped_restore restore_memory_0
664 val = target_read_memory (addr, bundle, BUNDLE_LEN);
665 if (val != 0)
666 return val;
667
668 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
669 for addressing the SHADOW_CONTENTS placement. */
670 shadow_slotnum = slotnum;
671
672 /* Always cover the last byte of the bundle in case we are inserting
673 a breakpoint on an L-X instruction. */
674 bp_tgt->shadow_len = BUNDLE_LEN - shadow_slotnum;
675
676 templ = extract_bit_field (bundle, 0, 5);
677 if (template_encoding_table[templ][slotnum] == X)
678 {
679 /* X unit types can only be used in slot 2, and are actually
680 part of a 2-slot L-X instruction. We cannot break at this
681 address, as this is the second half of an instruction that
682 lives in slot 1 of that bundle. */
683 gdb_assert (slotnum == 2);
684 error (_("Can't insert breakpoint for non-existing slot X"));
685 }
686 if (template_encoding_table[templ][slotnum] == L)
687 {
688 /* L unit types can only be used in slot 1. But the associated
689 opcode for that instruction is in slot 2, so bump the slot number
690 accordingly. */
691 gdb_assert (slotnum == 1);
692 slotnum = 2;
693 }
694
695 /* Store the whole bundle, except for the initial skipped bytes by the slot
696 number interpreted as bytes offset in PLACED_ADDRESS. */
697 memcpy (bp_tgt->shadow_contents, bundle + shadow_slotnum,
698 bp_tgt->shadow_len);
699
700 /* Re-read the same bundle as above except that, this time, read it in order
701 to compute the new bundle inside which we will be inserting the
702 breakpoint. Therefore, disable the automatic memory restoration from
703 breakpoints while we read our instruction bundle. Otherwise, the general
704 restoration mechanism kicks in and we would possibly remove parts of the
705 adjacent placed breakpoints. It is due to our SHADOW_CONTENTS overlapping
706 the real breakpoint instruction bits region. */
707 scoped_restore restore_memory_1
709 val = target_read_memory (addr, bundle, BUNDLE_LEN);
710 if (val != 0)
711 return val;
712
713 /* Breakpoints already present in the code will get detected and not get
714 reinserted by bp_loc_is_permanent. Multiple breakpoints at the same
715 location cannot induce the internal error as they are optimized into
716 a single instance by update_global_location_list. */
717 instr_breakpoint = slotN_contents (bundle, slotnum);
718 if (instr_breakpoint == IA64_BREAKPOINT)
719 internal_error (_("Address %s already contains a breakpoint."),
720 paddress (gdbarch, bp_tgt->placed_address));
721 replace_slotN_contents (bundle, IA64_BREAKPOINT, slotnum);
722
723 val = target_write_memory (addr + shadow_slotnum, bundle + shadow_slotnum,
724 bp_tgt->shadow_len);
725
726 return val;
727}
728
729static int
731 struct bp_target_info *bp_tgt)
732{
733 CORE_ADDR addr = bp_tgt->placed_address;
734 gdb_byte bundle_mem[BUNDLE_LEN], bundle_saved[BUNDLE_LEN];
735 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER, shadow_slotnum;
736 long long instr_breakpoint, instr_saved;
737 int val;
738 int templ;
739
740 addr &= ~0x0f;
741
742 /* Disable the automatic memory restoration from breakpoints while
743 we read our instruction bundle. Otherwise, the general restoration
744 mechanism kicks in and we would possibly remove parts of the adjacent
745 placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
746 breakpoint instruction bits region. */
747 scoped_restore restore_memory_1
749 val = target_read_memory (addr, bundle_mem, BUNDLE_LEN);
750 if (val != 0)
751 return val;
752
753 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
754 for addressing the SHADOW_CONTENTS placement. */
755 shadow_slotnum = slotnum;
756
757 templ = extract_bit_field (bundle_mem, 0, 5);
758 if (template_encoding_table[templ][slotnum] == X)
759 {
760 /* X unit types can only be used in slot 2, and are actually
761 part of a 2-slot L-X instruction. We refuse to insert
762 breakpoints at this address, so there should be no reason
763 for us attempting to remove one there, except if the program's
764 code somehow got modified in memory. */
765 gdb_assert (slotnum == 2);
766 warning (_("Cannot remove breakpoint at address %s from non-existing "
767 "X-type slot, memory has changed underneath"),
768 paddress (gdbarch, bp_tgt->placed_address));
769 return -1;
770 }
771 if (template_encoding_table[templ][slotnum] == L)
772 {
773 /* L unit types can only be used in slot 1. But the breakpoint
774 was actually saved using slot 2, so update the slot number
775 accordingly. */
776 gdb_assert (slotnum == 1);
777 slotnum = 2;
778 }
779
780 gdb_assert (bp_tgt->shadow_len == BUNDLE_LEN - shadow_slotnum);
781
782 instr_breakpoint = slotN_contents (bundle_mem, slotnum);
783 if (instr_breakpoint != IA64_BREAKPOINT)
784 {
785 warning (_("Cannot remove breakpoint at address %s, "
786 "no break instruction at such address."),
787 paddress (gdbarch, bp_tgt->placed_address));
788 return -1;
789 }
790
791 /* Extract the original saved instruction from SLOTNUM normalizing its
792 bit-shift for INSTR_SAVED. */
793 memcpy (bundle_saved, bundle_mem, BUNDLE_LEN);
794 memcpy (bundle_saved + shadow_slotnum, bp_tgt->shadow_contents,
795 bp_tgt->shadow_len);
796 instr_saved = slotN_contents (bundle_saved, slotnum);
797
798 /* In BUNDLE_MEM, be careful to modify only the bits belonging to SLOTNUM
799 and not any of the other ones that are stored in SHADOW_CONTENTS. */
800 replace_slotN_contents (bundle_mem, instr_saved, slotnum);
801 val = target_write_raw_memory (addr, bundle_mem, BUNDLE_LEN);
802
803 return val;
804}
805
806/* Implement the breakpoint_kind_from_pc gdbarch method. */
807
808static int
810{
811 /* A place holder of gdbarch method breakpoint_kind_from_pc. */
812 return 0;
813}
814
815/* As gdbarch_breakpoint_from_pc ranges have byte granularity and ia64
816 instruction slots ranges are bit-granular (41 bits) we have to provide an
817 extended range as described for ia64_memory_insert_breakpoint. We also take
818 care of preserving the `break' instruction 21-bit (or 62-bit) parameter to
819 make a match for permanent breakpoints. */
820
821static const gdb_byte *
823 CORE_ADDR *pcptr, int *lenptr)
824{
825 CORE_ADDR addr = *pcptr;
826 static gdb_byte bundle[BUNDLE_LEN];
827 int slotnum = (int) (*pcptr & 0x0f) / SLOT_MULTIPLIER, shadow_slotnum;
828 long long instr_fetched;
829 int val;
830 int templ;
831
832 if (slotnum > 2)
833 error (_("Can't insert breakpoint for slot numbers greater than 2."));
834
835 addr &= ~0x0f;
836
837 /* Enable the automatic memory restoration from breakpoints while
838 we read our instruction bundle to match bp_loc_is_permanent. */
839 {
840 scoped_restore restore_memory_0
842 val = target_read_memory (addr, bundle, BUNDLE_LEN);
843 }
844
845 /* The memory might be unreachable. This can happen, for instance,
846 when the user inserts a breakpoint at an invalid address. */
847 if (val != 0)
848 return NULL;
849
850 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
851 for addressing the SHADOW_CONTENTS placement. */
852 shadow_slotnum = slotnum;
853
854 /* Cover always the last byte of the bundle for the L-X slot case. */
855 *lenptr = BUNDLE_LEN - shadow_slotnum;
856
857 /* Check for L type instruction in slot 1, if present then bump up the slot
858 number to the slot 2. */
859 templ = extract_bit_field (bundle, 0, 5);
860 if (template_encoding_table[templ][slotnum] == X)
861 {
862 gdb_assert (slotnum == 2);
863 error (_("Can't insert breakpoint for non-existing slot X"));
864 }
865 if (template_encoding_table[templ][slotnum] == L)
866 {
867 gdb_assert (slotnum == 1);
868 slotnum = 2;
869 }
870
871 /* A break instruction has its all its opcode bits cleared except for
872 the parameter value. For L+X slot pair we are at the X slot (slot 2) so
873 we should not touch the L slot - the upper 41 bits of the parameter. */
874 instr_fetched = slotN_contents (bundle, slotnum);
875 instr_fetched &= 0x1003ffffc0LL;
876 replace_slotN_contents (bundle, instr_fetched, slotnum);
877
878 return bundle + shadow_slotnum;
879}
880
881static CORE_ADDR
883{
884 ULONGEST psr_value, pc_value;
885 int slot_num;
886
887 regcache->cooked_read (IA64_PSR_REGNUM, &psr_value);
888 regcache->cooked_read (IA64_IP_REGNUM, &pc_value);
889 slot_num = (psr_value >> 41) & 3;
890
891 return pc_value | (slot_num * SLOT_MULTIPLIER);
892}
893
894void
895ia64_write_pc (struct regcache *regcache, CORE_ADDR new_pc)
896{
897 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
898 ULONGEST psr_value;
899
901 psr_value &= ~(3LL << 41);
902 psr_value |= (ULONGEST)(slot_num & 0x3) << 41;
903
904 new_pc &= ~0xfLL;
905
908}
909
910#define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
911
912/* Returns the address of the slot that's NSLOTS slots away from
913 the address ADDR. NSLOTS may be positive or negative. */
914static CORE_ADDR
915rse_address_add(CORE_ADDR addr, int nslots)
916{
917 CORE_ADDR new_addr;
918 int mandatory_nat_slots = nslots / 63;
919 int direction = nslots < 0 ? -1 : 1;
920
921 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
922
923 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
924 new_addr += 8 * direction;
925
926 if (IS_NaT_COLLECTION_ADDR(new_addr))
927 new_addr += 8 * direction;
928
929 return new_addr;
930}
931
932static enum register_status
934 int regnum, gdb_byte *buf)
935{
936 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
937 enum register_status status;
938
939 if (regnum >= V32_REGNUM && regnum <= V127_REGNUM)
940 {
941#ifdef HAVE_LIBUNWIND_IA64_H
942 /* First try and use the libunwind special reg accessor,
943 otherwise fallback to standard logic. */
946#endif
947 {
948 /* The fallback position is to assume that r32-r127 are
949 found sequentially in memory starting at $bof. This
950 isn't always true, but without libunwind, this is the
951 best we can do. */
952 ULONGEST cfm;
953 ULONGEST bsp;
954 CORE_ADDR reg;
955
957 if (status != REG_VALID)
958 return status;
959
961 if (status != REG_VALID)
962 return status;
963
964 /* The bsp points at the end of the register frame so we
965 subtract the size of frame from it to get start of
966 register frame. */
967 bsp = rse_address_add (bsp, -(cfm & 0x7f));
968
969 if ((cfm & 0x7f) > regnum - V32_REGNUM)
970 {
971 ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
972 reg = read_memory_integer ((CORE_ADDR)reg_addr, 8, byte_order);
974 byte_order, reg);
975 }
976 else
978 byte_order, 0);
979 }
980 }
982 {
983 ULONGEST unatN_val;
984 ULONGEST unat;
985
987 if (status != REG_VALID)
988 return status;
989 unatN_val = (unat & (1LL << (regnum - IA64_NAT0_REGNUM))) != 0;
991 byte_order, unatN_val);
992 }
994 {
995 ULONGEST natN_val = 0;
996 ULONGEST bsp;
997 ULONGEST cfm;
998 CORE_ADDR gr_addr = 0;
999
1001 if (status != REG_VALID)
1002 return status;
1003
1005 if (status != REG_VALID)
1006 return status;
1007
1008 /* The bsp points at the end of the register frame so we
1009 subtract the size of frame from it to get start of register frame. */
1010 bsp = rse_address_add (bsp, -(cfm & 0x7f));
1011
1012 if ((cfm & 0x7f) > regnum - V32_REGNUM)
1013 gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
1014
1015 if (gr_addr != 0)
1016 {
1017 /* Compute address of nat collection bits. */
1018 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1019 ULONGEST nat_collection;
1020 int nat_bit;
1021 /* If our nat collection address is bigger than bsp, we have to get
1022 the nat collection from rnat. Otherwise, we fetch the nat
1023 collection from the computed address. */
1024 if (nat_addr >= bsp)
1025 regcache->cooked_read (IA64_RNAT_REGNUM, &nat_collection);
1026 else
1027 nat_collection = read_memory_integer (nat_addr, 8, byte_order);
1028 nat_bit = (gr_addr >> 3) & 0x3f;
1029 natN_val = (nat_collection >> nat_bit) & 1;
1030 }
1031
1033 byte_order, natN_val);
1034 }
1035 else if (regnum == VBOF_REGNUM)
1036 {
1037 /* A virtual register frame start is provided for user convenience.
1038 It can be calculated as the bsp - sof (sizeof frame). */
1039 ULONGEST bsp, vbsp;
1040 ULONGEST cfm;
1041
1043 if (status != REG_VALID)
1044 return status;
1046 if (status != REG_VALID)
1047 return status;
1048
1049 /* The bsp points at the end of the register frame so we
1050 subtract the size of frame from it to get beginning of frame. */
1051 vbsp = rse_address_add (bsp, -(cfm & 0x7f));
1053 byte_order, vbsp);
1054 }
1055 else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
1056 {
1057 ULONGEST pr;
1058 ULONGEST cfm;
1059 ULONGEST prN_val;
1060
1062 if (status != REG_VALID)
1063 return status;
1065 if (status != REG_VALID)
1066 return status;
1067
1068 if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
1069 {
1070 /* Fetch predicate register rename base from current frame
1071 marker for this frame. */
1072 int rrb_pr = (cfm >> 32) & 0x3f;
1073
1074 /* Adjust the register number to account for register rotation. */
1076 + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
1077 }
1078 prN_val = (pr & (1LL << (regnum - VP0_REGNUM))) != 0;
1080 byte_order, prN_val);
1081 }
1082 else
1083 memset (buf, 0, register_size (gdbarch, regnum));
1084
1085 return REG_VALID;
1086}
1087
1088static void
1090 int regnum, const gdb_byte *buf)
1091{
1092 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1093
1094 if (regnum >= V32_REGNUM && regnum <= V127_REGNUM)
1095 {
1096 ULONGEST bsp;
1097 ULONGEST cfm;
1100
1101 bsp = rse_address_add (bsp, -(cfm & 0x7f));
1102
1103 if ((cfm & 0x7f) > regnum - V32_REGNUM)
1104 {
1105 ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
1106 write_memory (reg_addr, buf, 8);
1107 }
1108 }
1110 {
1111 ULONGEST unatN_val, unat, unatN_mask;
1114 regnum),
1115 byte_order);
1116 unatN_mask = (1LL << (regnum - IA64_NAT0_REGNUM));
1117 if (unatN_val == 0)
1118 unat &= ~unatN_mask;
1119 else if (unatN_val == 1)
1120 unat |= unatN_mask;
1122 }
1124 {
1125 ULONGEST natN_val;
1126 ULONGEST bsp;
1127 ULONGEST cfm;
1128 CORE_ADDR gr_addr = 0;
1131
1132 /* The bsp points at the end of the register frame so we
1133 subtract the size of frame from it to get start of register frame. */
1134 bsp = rse_address_add (bsp, -(cfm & 0x7f));
1135
1136 if ((cfm & 0x7f) > regnum - V32_REGNUM)
1137 gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
1138
1140 regnum),
1141 byte_order);
1142
1143 if (gr_addr != 0 && (natN_val == 0 || natN_val == 1))
1144 {
1145 /* Compute address of nat collection bits. */
1146 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1147 CORE_ADDR nat_collection;
1148 int natN_bit = (gr_addr >> 3) & 0x3f;
1149 ULONGEST natN_mask = (1LL << natN_bit);
1150 /* If our nat collection address is bigger than bsp, we have to get
1151 the nat collection from rnat. Otherwise, we fetch the nat
1152 collection from the computed address. */
1153 if (nat_addr >= bsp)
1154 {
1157 &nat_collection);
1158 if (natN_val)
1159 nat_collection |= natN_mask;
1160 else
1161 nat_collection &= ~natN_mask;
1163 nat_collection);
1164 }
1165 else
1166 {
1167 gdb_byte nat_buf[8];
1168 nat_collection = read_memory_integer (nat_addr, 8, byte_order);
1169 if (natN_val)
1170 nat_collection |= natN_mask;
1171 else
1172 nat_collection &= ~natN_mask;
1174 byte_order, nat_collection);
1175 write_memory (nat_addr, nat_buf, 8);
1176 }
1177 }
1178 }
1179 else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
1180 {
1181 ULONGEST pr;
1182 ULONGEST cfm;
1183 ULONGEST prN_val;
1184 ULONGEST prN_mask;
1185
1188
1189 if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
1190 {
1191 /* Fetch predicate register rename base from current frame
1192 marker for this frame. */
1193 int rrb_pr = (cfm >> 32) & 0x3f;
1194
1195 /* Adjust the register number to account for register rotation. */
1197 + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
1198 }
1200 byte_order);
1201 prN_mask = (1LL << (regnum - VP0_REGNUM));
1202 if (prN_val == 0)
1203 pr &= ~prN_mask;
1204 else if (prN_val == 1)
1205 pr |= prN_mask;
1207 }
1208}
1209
1210/* The ia64 needs to convert between various ieee floating-point formats
1211 and the special ia64 floating point register format. */
1212
1213static int
1214ia64_convert_register_p (struct gdbarch *gdbarch, int regno, struct type *type)
1215{
1216 return (regno >= IA64_FR0_REGNUM && regno <= IA64_FR127_REGNUM
1217 && type->code () == TYPE_CODE_FLT
1218 && type != ia64_ext_type (gdbarch));
1219}
1220
1221static int
1223 struct type *valtype, gdb_byte *out,
1224 int *optimizedp, int *unavailablep)
1225{
1226 struct gdbarch *gdbarch = get_frame_arch (frame);
1227 gdb_byte in[IA64_FP_REGISTER_SIZE];
1228
1229 /* Convert to TYPE. */
1230 if (!get_frame_register_bytes (frame, regnum, 0,
1231 gdb::make_array_view (in,
1233 regnum)),
1234 optimizedp, unavailablep))
1235 return 0;
1236
1237 target_float_convert (in, ia64_ext_type (gdbarch), out, valtype);
1238 *optimizedp = *unavailablep = 0;
1239 return 1;
1240}
1241
1242static void
1244 struct type *valtype, const gdb_byte *in)
1245{
1246 struct gdbarch *gdbarch = get_frame_arch (frame);
1247 gdb_byte out[IA64_FP_REGISTER_SIZE];
1248 target_float_convert (in, valtype, out, ia64_ext_type (gdbarch));
1249 put_frame_register (frame, regnum, out);
1250}
1251
1252
1253/* Limit the number of skipped non-prologue instructions since examining
1254 of the prologue is expensive. */
1256
1257/* Given PC representing the starting address of a function, and
1258 LIM_PC which is the (sloppy) limit to which to scan when looking
1259 for a prologue, attempt to further refine this limit by using
1260 the line data in the symbol table. If successful, a better guess
1261 on where the prologue ends is returned, otherwise the previous
1262 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
1263 which will be set to indicate whether the returned limit may be
1264 used with no further scanning in the event that the function is
1265 frameless. */
1266
1267/* FIXME: cagney/2004-02-14: This function and logic have largely been
1268 superseded by skip_prologue_using_sal. */
1269
1270static CORE_ADDR
1271refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit)
1272{
1273 struct symtab_and_line prologue_sal;
1274 CORE_ADDR start_pc = pc;
1275 CORE_ADDR end_pc;
1276
1277 /* The prologue can not possibly go past the function end itself,
1278 so we can already adjust LIM_PC accordingly. */
1279 if (find_pc_partial_function (pc, NULL, NULL, &end_pc) && end_pc < lim_pc)
1280 lim_pc = end_pc;
1281
1282 /* Start off not trusting the limit. */
1283 *trust_limit = 0;
1284
1285 prologue_sal = find_pc_line (pc, 0);
1286 if (prologue_sal.line != 0)
1287 {
1288 int i;
1289 CORE_ADDR addr = prologue_sal.end;
1290
1291 /* Handle the case in which compiler's optimizer/scheduler
1292 has moved instructions into the prologue. We scan ahead
1293 in the function looking for address ranges whose corresponding
1294 line number is less than or equal to the first one that we
1295 found for the function. (It can be less than when the
1296 scheduler puts a body instruction before the first prologue
1297 instruction.) */
1298 for (i = 2 * max_skip_non_prologue_insns;
1299 i > 0 && (lim_pc == 0 || addr < lim_pc);
1300 i--)
1301 {
1302 struct symtab_and_line sal;
1303
1304 sal = find_pc_line (addr, 0);
1305 if (sal.line == 0)
1306 break;
1307 if (sal.line <= prologue_sal.line
1308 && sal.symtab == prologue_sal.symtab)
1309 {
1310 prologue_sal = sal;
1311 }
1312 addr = sal.end;
1313 }
1314
1315 if (lim_pc == 0 || prologue_sal.end < lim_pc)
1316 {
1317 lim_pc = prologue_sal.end;
1318 if (start_pc == get_pc_function_start (lim_pc))
1319 *trust_limit = 1;
1320 }
1321 }
1322 return lim_pc;
1323}
1324
1325#define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1326 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1327 || (14 <= (_regnum_) && (_regnum_) <= 31))
1328#define imm9(_instr_) \
1329 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1330 | (((_instr_) & 0x00008000000LL) >> 20) \
1331 | (((_instr_) & 0x00000001fc0LL) >> 6))
1332
1333/* Allocate and initialize a frame cache. */
1334
1335static struct ia64_frame_cache *
1337{
1338 struct ia64_frame_cache *cache;
1339 int i;
1340
1341 cache = FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache);
1342
1343 /* Base address. */
1344 cache->base = 0;
1345 cache->pc = 0;
1346 cache->cfm = 0;
1347 cache->prev_cfm = 0;
1348 cache->sof = 0;
1349 cache->sol = 0;
1350 cache->sor = 0;
1351 cache->bsp = 0;
1352 cache->fp_reg = 0;
1353 cache->frameless = 1;
1354
1355 for (i = 0; i < NUM_IA64_RAW_REGS; i++)
1356 cache->saved_regs[i] = 0;
1357
1358 return cache;
1359}
1360
1361static CORE_ADDR
1362examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc,
1363 frame_info_ptr this_frame,
1364 struct ia64_frame_cache *cache)
1365{
1366 CORE_ADDR next_pc;
1367 CORE_ADDR last_prologue_pc = pc;
1369 long long instr;
1370 int cfm_reg = 0;
1371 int ret_reg = 0;
1372 int fp_reg = 0;
1373 int unat_save_reg = 0;
1374 int pr_save_reg = 0;
1375 int mem_stack_frame_size = 0;
1376 int spill_reg = 0;
1377 CORE_ADDR spill_addr = 0;
1378 char instores[8];
1379 char infpstores[8];
1380 char reg_contents[256];
1381 int trust_limit;
1382 int frameless = 1;
1383 int i;
1384 CORE_ADDR addr;
1385 gdb_byte buf[8];
1386 CORE_ADDR bof, sor, sol, sof, cfm, rrb_gr;
1387
1388 memset (instores, 0, sizeof instores);
1389 memset (infpstores, 0, sizeof infpstores);
1390 memset (reg_contents, 0, sizeof reg_contents);
1391
1392 if (cache->after_prologue != 0
1393 && cache->after_prologue <= lim_pc)
1394 return cache->after_prologue;
1395
1396 lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit);
1397 next_pc = fetch_instruction (pc, &it, &instr);
1398
1399 /* We want to check if we have a recognizable function start before we
1400 look ahead for a prologue. */
1401 if (pc < lim_pc && next_pc
1402 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
1403 {
1404 /* alloc - start of a regular function. */
1405 int sol_bits = (int) ((instr & 0x00007f00000LL) >> 20);
1406 int sof_bits = (int) ((instr & 0x000000fe000LL) >> 13);
1407 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1408
1409 /* Verify that the current cfm matches what we think is the
1410 function start. If we have somehow jumped within a function,
1411 we do not want to interpret the prologue and calculate the
1412 addresses of various registers such as the return address.
1413 We will instead treat the frame as frameless. */
1414 if (!this_frame ||
1415 (sof_bits == (cache->cfm & 0x7f) &&
1416 sol_bits == ((cache->cfm >> 7) & 0x7f)))
1417 frameless = 0;
1418
1419 cfm_reg = rN;
1420 last_prologue_pc = next_pc;
1421 pc = next_pc;
1422 }
1423 else
1424 {
1425 /* Look for a leaf routine. */
1426 if (pc < lim_pc && next_pc
1427 && (it == I || it == M)
1428 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
1429 {
1430 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1431 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
1432 | ((instr & 0x001f8000000LL) >> 20)
1433 | ((instr & 0x000000fe000LL) >> 13));
1434 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
1435 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1436 int qp = (int) (instr & 0x0000000003fLL);
1437 if (qp == 0 && rN == 2 && imm == 0 && rM == 12 && fp_reg == 0)
1438 {
1439 /* mov r2, r12 - beginning of leaf routine. */
1440 fp_reg = rN;
1441 last_prologue_pc = next_pc;
1442 }
1443 }
1444
1445 /* If we don't recognize a regular function or leaf routine, we are
1446 done. */
1447 if (!fp_reg)
1448 {
1449 pc = lim_pc;
1450 if (trust_limit)
1451 last_prologue_pc = lim_pc;
1452 }
1453 }
1454
1455 /* Loop, looking for prologue instructions, keeping track of
1456 where preserved registers were spilled. */
1457 while (pc < lim_pc)
1458 {
1459 next_pc = fetch_instruction (pc, &it, &instr);
1460 if (next_pc == 0)
1461 break;
1462
1463 if (it == B && ((instr & 0x1e1f800003fLL) != 0x04000000000LL))
1464 {
1465 /* Exit loop upon hitting a non-nop branch instruction. */
1466 if (trust_limit)
1467 lim_pc = pc;
1468 break;
1469 }
1470 else if (((instr & 0x3fLL) != 0LL) &&
1471 (frameless || ret_reg != 0))
1472 {
1473 /* Exit loop upon hitting a predicated instruction if
1474 we already have the return register or if we are frameless. */
1475 if (trust_limit)
1476 lim_pc = pc;
1477 break;
1478 }
1479 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
1480 {
1481 /* Move from BR */
1482 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
1483 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1484 int qp = (int) (instr & 0x0000000003f);
1485
1486 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
1487 {
1488 ret_reg = rN;
1489 last_prologue_pc = next_pc;
1490 }
1491 }
1492 else if ((it == I || it == M)
1493 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
1494 {
1495 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1496 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
1497 | ((instr & 0x001f8000000LL) >> 20)
1498 | ((instr & 0x000000fe000LL) >> 13));
1499 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
1500 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1501 int qp = (int) (instr & 0x0000000003fLL);
1502
1503 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
1504 {
1505 /* mov rN, r12 */
1506 fp_reg = rN;
1507 last_prologue_pc = next_pc;
1508 }
1509 else if (qp == 0 && rN == 12 && rM == 12)
1510 {
1511 /* adds r12, -mem_stack_frame_size, r12 */
1512 mem_stack_frame_size -= imm;
1513 last_prologue_pc = next_pc;
1514 }
1515 else if (qp == 0 && rN == 2
1516 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
1517 {
1518 CORE_ADDR saved_sp = 0;
1519 /* adds r2, spilloffset, rFramePointer
1520 or
1521 adds r2, spilloffset, r12
1522
1523 Get ready for stf.spill or st8.spill instructions.
1524 The address to start spilling at is loaded into r2.
1525 FIXME: Why r2? That's what gcc currently uses; it
1526 could well be different for other compilers. */
1527
1528 /* Hmm... whether or not this will work will depend on
1529 where the pc is. If it's still early in the prologue
1530 this'll be wrong. FIXME */
1531 if (this_frame)
1533 sp_regnum);
1534 spill_addr = saved_sp
1535 + (rM == 12 ? 0 : mem_stack_frame_size)
1536 + imm;
1537 spill_reg = rN;
1538 last_prologue_pc = next_pc;
1539 }
1540 else if (qp == 0 && rM >= 32 && rM < 40 && !instores[rM-32] &&
1541 rN < 256 && imm == 0)
1542 {
1543 /* mov rN, rM where rM is an input register. */
1544 reg_contents[rN] = rM;
1545 last_prologue_pc = next_pc;
1546 }
1547 else if (frameless && qp == 0 && rN == fp_reg && imm == 0 &&
1548 rM == 2)
1549 {
1550 /* mov r12, r2 */
1551 last_prologue_pc = next_pc;
1552 break;
1553 }
1554 }
1555 else if (it == M
1556 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
1557 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
1558 {
1559 /* stf.spill [rN] = fM, imm9
1560 or
1561 stf.spill [rN] = fM */
1562
1563 int imm = imm9(instr);
1564 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1565 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1566 int qp = (int) (instr & 0x0000000003fLL);
1567 if (qp == 0 && rN == spill_reg && spill_addr != 0
1568 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
1569 {
1570 cache->saved_regs[IA64_FR0_REGNUM + fM] = spill_addr;
1571
1572 if ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
1573 spill_addr += imm;
1574 else
1575 spill_addr = 0; /* last one; must be done. */
1576 last_prologue_pc = next_pc;
1577 }
1578 }
1579 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
1580 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
1581 {
1582 /* mov.m rN = arM
1583 or
1584 mov.i rN = arM */
1585
1586 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
1587 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1588 int qp = (int) (instr & 0x0000000003fLL);
1589 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
1590 {
1591 /* We have something like "mov.m r3 = ar.unat". Remember the
1592 r3 (or whatever) and watch for a store of this register... */
1593 unat_save_reg = rN;
1594 last_prologue_pc = next_pc;
1595 }
1596 }
1597 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
1598 {
1599 /* mov rN = pr */
1600 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1601 int qp = (int) (instr & 0x0000000003fLL);
1602 if (qp == 0 && isScratch (rN))
1603 {
1604 pr_save_reg = rN;
1605 last_prologue_pc = next_pc;
1606 }
1607 }
1608 else if (it == M
1609 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
1610 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
1611 {
1612 /* st8 [rN] = rM
1613 or
1614 st8 [rN] = rM, imm9 */
1615 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1616 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1617 int qp = (int) (instr & 0x0000000003fLL);
1618 int indirect = rM < 256 ? reg_contents[rM] : 0;
1619 if (qp == 0 && rN == spill_reg && spill_addr != 0
1620 && (rM == unat_save_reg || rM == pr_save_reg))
1621 {
1622 /* We've found a spill of either the UNAT register or the PR
1623 register. (Well, not exactly; what we've actually found is
1624 a spill of the register that UNAT or PR was moved to).
1625 Record that fact and move on... */
1626 if (rM == unat_save_reg)
1627 {
1628 /* Track UNAT register. */
1629 cache->saved_regs[IA64_UNAT_REGNUM] = spill_addr;
1630 unat_save_reg = 0;
1631 }
1632 else
1633 {
1634 /* Track PR register. */
1635 cache->saved_regs[IA64_PR_REGNUM] = spill_addr;
1636 pr_save_reg = 0;
1637 }
1638 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
1639 /* st8 [rN] = rM, imm9 */
1640 spill_addr += imm9(instr);
1641 else
1642 spill_addr = 0; /* Must be done spilling. */
1643 last_prologue_pc = next_pc;
1644 }
1645 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1646 {
1647 /* Allow up to one store of each input register. */
1648 instores[rM-32] = 1;
1649 last_prologue_pc = next_pc;
1650 }
1651 else if (qp == 0 && 32 <= indirect && indirect < 40 &&
1652 !instores[indirect-32])
1653 {
1654 /* Allow an indirect store of an input register. */
1655 instores[indirect-32] = 1;
1656 last_prologue_pc = next_pc;
1657 }
1658 }
1659 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
1660 {
1661 /* One of
1662 st1 [rN] = rM
1663 st2 [rN] = rM
1664 st4 [rN] = rM
1665 st8 [rN] = rM
1666 Note that the st8 case is handled in the clause above.
1667
1668 Advance over stores of input registers. One store per input
1669 register is permitted. */
1670 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1671 int qp = (int) (instr & 0x0000000003fLL);
1672 int indirect = rM < 256 ? reg_contents[rM] : 0;
1673 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1674 {
1675 instores[rM-32] = 1;
1676 last_prologue_pc = next_pc;
1677 }
1678 else if (qp == 0 && 32 <= indirect && indirect < 40 &&
1679 !instores[indirect-32])
1680 {
1681 /* Allow an indirect store of an input register. */
1682 instores[indirect-32] = 1;
1683 last_prologue_pc = next_pc;
1684 }
1685 }
1686 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
1687 {
1688 /* Either
1689 stfs [rN] = fM
1690 or
1691 stfd [rN] = fM
1692
1693 Advance over stores of floating point input registers. Again
1694 one store per register is permitted. */
1695 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1696 int qp = (int) (instr & 0x0000000003fLL);
1697 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
1698 {
1699 infpstores[fM-8] = 1;
1700 last_prologue_pc = next_pc;
1701 }
1702 }
1703 else if (it == M
1704 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
1705 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
1706 {
1707 /* st8.spill [rN] = rM
1708 or
1709 st8.spill [rN] = rM, imm9 */
1710 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1711 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1712 int qp = (int) (instr & 0x0000000003fLL);
1713 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
1714 {
1715 /* We've found a spill of one of the preserved general purpose
1716 regs. Record the spill address and advance the spill
1717 register if appropriate. */
1718 cache->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr;
1719 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
1720 /* st8.spill [rN] = rM, imm9 */
1721 spill_addr += imm9(instr);
1722 else
1723 spill_addr = 0; /* Done spilling. */
1724 last_prologue_pc = next_pc;
1725 }
1726 }
1727
1728 pc = next_pc;
1729 }
1730
1731 /* If not frameless and we aren't called by skip_prologue, then we need
1732 to calculate registers for the previous frame which will be needed
1733 later. */
1734
1735 if (!frameless && this_frame)
1736 {
1737 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1738 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1739
1740 /* Extract the size of the rotating portion of the stack
1741 frame and the register rename base from the current
1742 frame marker. */
1743 cfm = cache->cfm;
1744 sor = cache->sor;
1745 sof = cache->sof;
1746 sol = cache->sol;
1747 rrb_gr = (cfm >> 18) & 0x7f;
1748
1749 /* Find the bof (beginning of frame). */
1750 bof = rse_address_add (cache->bsp, -sof);
1751
1752 for (i = 0, addr = bof;
1753 i < sof;
1754 i++, addr += 8)
1755 {
1756 if (IS_NaT_COLLECTION_ADDR (addr))
1757 {
1758 addr += 8;
1759 }
1760 if (i+32 == cfm_reg)
1761 cache->saved_regs[IA64_CFM_REGNUM] = addr;
1762 if (i+32 == ret_reg)
1763 cache->saved_regs[IA64_VRAP_REGNUM] = addr;
1764 if (i+32 == fp_reg)
1765 cache->saved_regs[IA64_VFP_REGNUM] = addr;
1766 }
1767
1768 /* For the previous argument registers we require the previous bof.
1769 If we can't find the previous cfm, then we can do nothing. */
1770 cfm = 0;
1771 if (cache->saved_regs[IA64_CFM_REGNUM] != 0)
1772 {
1774 8, byte_order);
1775 }
1776 else if (cfm_reg != 0)
1777 {
1778 get_frame_register (this_frame, cfm_reg, buf);
1779 cfm = extract_unsigned_integer (buf, 8, byte_order);
1780 }
1781 cache->prev_cfm = cfm;
1782
1783 if (cfm != 0)
1784 {
1785 sor = ((cfm >> 14) & 0xf) * 8;
1786 sof = (cfm & 0x7f);
1787 sol = (cfm >> 7) & 0x7f;
1788 rrb_gr = (cfm >> 18) & 0x7f;
1789
1790 /* The previous bof only requires subtraction of the sol (size of
1791 locals) due to the overlap between output and input of
1792 subsequent frames. */
1793 bof = rse_address_add (bof, -sol);
1794
1795 for (i = 0, addr = bof;
1796 i < sof;
1797 i++, addr += 8)
1798 {
1799 if (IS_NaT_COLLECTION_ADDR (addr))
1800 {
1801 addr += 8;
1802 }
1803 if (i < sor)
1805 + ((i + (sor - rrb_gr)) % sor)]
1806 = addr;
1807 else
1808 cache->saved_regs[IA64_GR32_REGNUM + i] = addr;
1809 }
1810
1811 }
1812 }
1813
1814 /* Try and trust the lim_pc value whenever possible. */
1815 if (trust_limit && lim_pc >= last_prologue_pc)
1816 last_prologue_pc = lim_pc;
1817
1818 cache->frameless = frameless;
1819 cache->after_prologue = last_prologue_pc;
1820 cache->mem_stack_frame_size = mem_stack_frame_size;
1821 cache->fp_reg = fp_reg;
1822
1823 return last_prologue_pc;
1824}
1825
1826CORE_ADDR
1827ia64_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1828{
1829 struct ia64_frame_cache cache;
1830 cache.base = 0;
1831 cache.after_prologue = 0;
1832 cache.cfm = 0;
1833 cache.bsp = 0;
1834
1835 /* Call examine_prologue with - as third argument since we don't
1836 have a next frame pointer to send. */
1837 return examine_prologue (pc, pc+1024, 0, &cache);
1838}
1839
1840
1841/* Normal frames. */
1842
1843static struct ia64_frame_cache *
1844ia64_frame_cache (frame_info_ptr this_frame, void **this_cache)
1845{
1846 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1847 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1848 struct ia64_frame_cache *cache;
1849 gdb_byte buf[8];
1850 CORE_ADDR cfm;
1851
1852 if (*this_cache)
1853 return (struct ia64_frame_cache *) *this_cache;
1854
1855 cache = ia64_alloc_frame_cache ();
1856 *this_cache = cache;
1857
1858 get_frame_register (this_frame, sp_regnum, buf);
1859 cache->saved_sp = extract_unsigned_integer (buf, 8, byte_order);
1860
1861 /* We always want the bsp to point to the end of frame.
1862 This way, we can always get the beginning of frame (bof)
1863 by subtracting frame size. */
1864 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
1865 cache->bsp = extract_unsigned_integer (buf, 8, byte_order);
1866
1867 get_frame_register (this_frame, IA64_PSR_REGNUM, buf);
1868
1869 get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
1870 cfm = extract_unsigned_integer (buf, 8, byte_order);
1871
1872 cache->sof = (cfm & 0x7f);
1873 cache->sol = (cfm >> 7) & 0x7f;
1874 cache->sor = ((cfm >> 14) & 0xf) * 8;
1875
1876 cache->cfm = cfm;
1877
1878 cache->pc = get_frame_func (this_frame);
1879
1880 if (cache->pc != 0)
1881 examine_prologue (cache->pc, get_frame_pc (this_frame), this_frame, cache);
1882
1883 cache->base = cache->saved_sp + cache->mem_stack_frame_size;
1884
1885 return cache;
1886}
1887
1888static void
1889ia64_frame_this_id (frame_info_ptr this_frame, void **this_cache,
1890 struct frame_id *this_id)
1891{
1892 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1893 struct ia64_frame_cache *cache =
1894 ia64_frame_cache (this_frame, this_cache);
1895
1896 /* If outermost frame, mark with null frame id. */
1897 if (cache->base != 0)
1898 (*this_id) = frame_id_build_special (cache->base, cache->pc, cache->bsp);
1899 if (gdbarch_debug >= 1)
1901 "regular frame id: code %s, stack %s, "
1902 "special %s, this_frame %s\n",
1903 paddress (gdbarch, this_id->code_addr),
1904 paddress (gdbarch, this_id->stack_addr),
1905 paddress (gdbarch, cache->bsp),
1906 host_address_to_string (this_frame.get ()));
1907}
1908
1909static struct value *
1910ia64_frame_prev_register (frame_info_ptr this_frame, void **this_cache,
1911 int regnum)
1912{
1913 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1914 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1915 struct ia64_frame_cache *cache = ia64_frame_cache (this_frame, this_cache);
1916 gdb_byte buf[8];
1917
1918 gdb_assert (regnum >= 0);
1919
1920 if (!target_has_registers ())
1921 error (_("No registers."));
1922
1924 return frame_unwind_got_constant (this_frame, regnum, cache->base);
1925
1926 else if (regnum == IA64_BSP_REGNUM)
1927 {
1928 struct value *val;
1929 CORE_ADDR prev_cfm, bsp, prev_bsp;
1930
1931 /* We want to calculate the previous bsp as the end of the previous
1932 register stack frame. This corresponds to what the hardware bsp
1933 register will be if we pop the frame back which is why we might
1934 have been called. We know the beginning of the current frame is
1935 cache->bsp - cache->sof. This value in the previous frame points
1936 to the start of the output registers. We can calculate the end of
1937 that frame by adding the size of output:
1938 (sof (size of frame) - sol (size of locals)). */
1939 val = ia64_frame_prev_register (this_frame, this_cache, IA64_CFM_REGNUM);
1940 prev_cfm = extract_unsigned_integer (val->contents_all ().data (),
1941 8, byte_order);
1942 bsp = rse_address_add (cache->bsp, -(cache->sof));
1943 prev_bsp =
1944 rse_address_add (bsp, (prev_cfm & 0x7f) - ((prev_cfm >> 7) & 0x7f));
1945
1946 return frame_unwind_got_constant (this_frame, regnum, prev_bsp);
1947 }
1948
1949 else if (regnum == IA64_CFM_REGNUM)
1950 {
1951 CORE_ADDR addr = cache->saved_regs[IA64_CFM_REGNUM];
1952
1953 if (addr != 0)
1954 return frame_unwind_got_memory (this_frame, regnum, addr);
1955
1956 if (cache->prev_cfm)
1957 return frame_unwind_got_constant (this_frame, regnum, cache->prev_cfm);
1958
1959 if (cache->frameless)
1960 return frame_unwind_got_register (this_frame, IA64_PFS_REGNUM,
1962 return frame_unwind_got_register (this_frame, regnum, 0);
1963 }
1964
1965 else if (regnum == IA64_VFP_REGNUM)
1966 {
1967 /* If the function in question uses an automatic register (r32-r127)
1968 for the frame pointer, it'll be found by ia64_find_saved_register()
1969 above. If the function lacks one of these frame pointers, we can
1970 still provide a value since we know the size of the frame. */
1971 return frame_unwind_got_constant (this_frame, regnum, cache->base);
1972 }
1973
1974 else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
1975 {
1976 struct value *pr_val;
1977 ULONGEST prN;
1978
1979 pr_val = ia64_frame_prev_register (this_frame, this_cache,
1981 if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
1982 {
1983 /* Fetch predicate register rename base from current frame
1984 marker for this frame. */
1985 int rrb_pr = (cache->cfm >> 32) & 0x3f;
1986
1987 /* Adjust the register number to account for register rotation. */
1988 regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
1989 }
1990 prN = extract_bit_field (pr_val->contents_all ().data (),
1991 regnum - VP0_REGNUM, 1);
1992 return frame_unwind_got_constant (this_frame, regnum, prN);
1993 }
1994
1996 {
1997 struct value *unat_val;
1998 ULONGEST unatN;
1999 unat_val = ia64_frame_prev_register (this_frame, this_cache,
2001 unatN = extract_bit_field (unat_val->contents_all ().data (),
2003 return frame_unwind_got_constant (this_frame, regnum, unatN);
2004 }
2005
2007 {
2008 int natval = 0;
2009 /* Find address of general register corresponding to nat bit we're
2010 interested in. */
2011 CORE_ADDR gr_addr;
2012
2013 gr_addr = cache->saved_regs[regnum - IA64_NAT0_REGNUM + IA64_GR0_REGNUM];
2014
2015 if (gr_addr != 0)
2016 {
2017 /* Compute address of nat collection bits. */
2018 CORE_ADDR nat_addr = gr_addr | 0x1f8;
2019 CORE_ADDR bsp;
2020 CORE_ADDR nat_collection;
2021 int nat_bit;
2022
2023 /* If our nat collection address is bigger than bsp, we have to get
2024 the nat collection from rnat. Otherwise, we fetch the nat
2025 collection from the computed address. */
2026 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
2027 bsp = extract_unsigned_integer (buf, 8, byte_order);
2028 if (nat_addr >= bsp)
2029 {
2030 get_frame_register (this_frame, IA64_RNAT_REGNUM, buf);
2031 nat_collection = extract_unsigned_integer (buf, 8, byte_order);
2032 }
2033 else
2034 nat_collection = read_memory_integer (nat_addr, 8, byte_order);
2035 nat_bit = (gr_addr >> 3) & 0x3f;
2036 natval = (nat_collection >> nat_bit) & 1;
2037 }
2038
2039 return frame_unwind_got_constant (this_frame, regnum, natval);
2040 }
2041
2042 else if (regnum == IA64_IP_REGNUM)
2043 {
2044 CORE_ADDR pc = 0;
2045 CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM];
2046
2047 if (addr != 0)
2048 {
2050 pc = extract_unsigned_integer (buf, 8, byte_order);
2051 }
2052 else if (cache->frameless)
2053 {
2054 get_frame_register (this_frame, IA64_BR0_REGNUM, buf);
2055 pc = extract_unsigned_integer (buf, 8, byte_order);
2056 }
2057 pc &= ~0xf;
2058 return frame_unwind_got_constant (this_frame, regnum, pc);
2059 }
2060
2061 else if (regnum == IA64_PSR_REGNUM)
2062 {
2063 /* We don't know how to get the complete previous PSR, but we need it
2064 for the slot information when we unwind the pc (pc is formed of IP
2065 register plus slot information from PSR). To get the previous
2066 slot information, we mask it off the return address. */
2067 ULONGEST slot_num = 0;
2068 CORE_ADDR pc = 0;
2069 CORE_ADDR psr = 0;
2070 CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM];
2071
2072 get_frame_register (this_frame, IA64_PSR_REGNUM, buf);
2073 psr = extract_unsigned_integer (buf, 8, byte_order);
2074
2075 if (addr != 0)
2076 {
2078 pc = extract_unsigned_integer (buf, 8, byte_order);
2079 }
2080 else if (cache->frameless)
2081 {
2082 get_frame_register (this_frame, IA64_BR0_REGNUM, buf);
2083 pc = extract_unsigned_integer (buf, 8, byte_order);
2084 }
2085 psr &= ~(3LL << 41);
2086 slot_num = pc & 0x3LL;
2087 psr |= (CORE_ADDR)slot_num << 41;
2088 return frame_unwind_got_constant (this_frame, regnum, psr);
2089 }
2090
2091 else if (regnum == IA64_BR0_REGNUM)
2092 {
2093 CORE_ADDR addr = cache->saved_regs[IA64_BR0_REGNUM];
2094
2095 if (addr != 0)
2096 return frame_unwind_got_memory (this_frame, regnum, addr);
2097
2098 return frame_unwind_got_constant (this_frame, regnum, 0);
2099 }
2100
2102 || (regnum >= V32_REGNUM && regnum <= V127_REGNUM))
2103 {
2104 CORE_ADDR addr = 0;
2105
2106 if (regnum >= V32_REGNUM)
2108 addr = cache->saved_regs[regnum];
2109 if (addr != 0)
2110 return frame_unwind_got_memory (this_frame, regnum, addr);
2111
2112 if (cache->frameless)
2113 {
2114 struct value *reg_val;
2115 CORE_ADDR prev_cfm, prev_bsp, prev_bof;
2116
2117 /* FIXME: brobecker/2008-05-01: Doesn't this seem redundant
2118 with the same code above? */
2119 if (regnum >= V32_REGNUM)
2121 reg_val = ia64_frame_prev_register (this_frame, this_cache,
2123 prev_cfm = extract_unsigned_integer
2124 (reg_val->contents_all ().data (), 8, byte_order);
2125 reg_val = ia64_frame_prev_register (this_frame, this_cache,
2127 prev_bsp = extract_unsigned_integer
2128 (reg_val->contents_all ().data (), 8, byte_order);
2129 prev_bof = rse_address_add (prev_bsp, -(prev_cfm & 0x7f));
2130
2131 addr = rse_address_add (prev_bof, (regnum - IA64_GR32_REGNUM));
2132 return frame_unwind_got_memory (this_frame, regnum, addr);
2133 }
2134
2135 return frame_unwind_got_constant (this_frame, regnum, 0);
2136 }
2137
2138 else /* All other registers. */
2139 {
2140 CORE_ADDR addr = 0;
2141
2143 {
2144 /* Fetch floating point register rename base from current
2145 frame marker for this frame. */
2146 int rrb_fr = (cache->cfm >> 25) & 0x7f;
2147
2148 /* Adjust the floating point register number to account for
2149 register rotation. */
2151 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
2152 }
2153
2154 /* If we have stored a memory address, access the register. */
2155 addr = cache->saved_regs[regnum];
2156 if (addr != 0)
2157 return frame_unwind_got_memory (this_frame, regnum, addr);
2158 /* Otherwise, punt and get the current value of the register. */
2159 else
2160 return frame_unwind_got_register (this_frame, regnum, regnum);
2161 }
2162}
2163
2164static const struct frame_unwind ia64_frame_unwind =
2165{
2166 "ia64 prologue",
2171 NULL,
2173};
2174
2175/* Signal trampolines. */
2176
2177static void
2179 struct ia64_frame_cache *cache)
2180{
2181 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2182 ia64_gdbarch_tdep *tdep = gdbarch_tdep<ia64_gdbarch_tdep> (gdbarch);
2183
2185 {
2186 int regno;
2187
2189 = tdep->sigcontext_register_address (gdbarch, cache->base,
2192 = tdep->sigcontext_register_address (gdbarch, cache->base,
2195 = tdep->sigcontext_register_address (gdbarch, cache->base,
2198 = tdep->sigcontext_register_address (gdbarch, cache->base,
2201 = tdep->sigcontext_register_address (gdbarch, cache->base,
2204 = tdep->sigcontext_register_address (gdbarch, cache->base,
2207 = tdep->sigcontext_register_address (gdbarch, cache->base,
2210 = tdep->sigcontext_register_address (gdbarch, cache->base,
2213 = tdep->sigcontext_register_address (gdbarch, cache->base,
2216 = tdep->sigcontext_register_address (gdbarch, cache->base,
2218
2219 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
2220 cache->saved_regs[regno] =
2221 tdep->sigcontext_register_address (gdbarch, cache->base, regno);
2222 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
2223 cache->saved_regs[regno] =
2224 tdep->sigcontext_register_address (gdbarch, cache->base, regno);
2225 for (regno = IA64_FR2_REGNUM; regno <= IA64_FR31_REGNUM; regno++)
2226 cache->saved_regs[regno] =
2227 tdep->sigcontext_register_address (gdbarch, cache->base, regno);
2228 }
2229}
2230
2231static struct ia64_frame_cache *
2232ia64_sigtramp_frame_cache (frame_info_ptr this_frame, void **this_cache)
2233{
2234 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2235 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2236 struct ia64_frame_cache *cache;
2237 gdb_byte buf[8];
2238
2239 if (*this_cache)
2240 return (struct ia64_frame_cache *) *this_cache;
2241
2242 cache = ia64_alloc_frame_cache ();
2243
2244 get_frame_register (this_frame, sp_regnum, buf);
2245 /* Note that frame size is hard-coded below. We cannot calculate it
2246 via prologue examination. */
2247 cache->base = extract_unsigned_integer (buf, 8, byte_order) + 16;
2248
2249 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
2250 cache->bsp = extract_unsigned_integer (buf, 8, byte_order);
2251
2252 get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
2253 cache->cfm = extract_unsigned_integer (buf, 8, byte_order);
2254 cache->sof = cache->cfm & 0x7f;
2255
2256 ia64_sigtramp_frame_init_saved_regs (this_frame, cache);
2257
2258 *this_cache = cache;
2259 return cache;
2260}
2261
2262static void
2264 void **this_cache, struct frame_id *this_id)
2265{
2266 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2267 struct ia64_frame_cache *cache =
2268 ia64_sigtramp_frame_cache (this_frame, this_cache);
2269
2270 (*this_id) = frame_id_build_special (cache->base,
2271 get_frame_pc (this_frame),
2272 cache->bsp);
2273 if (gdbarch_debug >= 1)
2275 "sigtramp frame id: code %s, stack %s, "
2276 "special %s, this_frame %s\n",
2277 paddress (gdbarch, this_id->code_addr),
2278 paddress (gdbarch, this_id->stack_addr),
2279 paddress (gdbarch, cache->bsp),
2280 host_address_to_string (this_frame.get ()));
2281}
2282
2283static struct value *
2285 void **this_cache, int regnum)
2286{
2287 struct ia64_frame_cache *cache =
2288 ia64_sigtramp_frame_cache (this_frame, this_cache);
2289
2290 gdb_assert (regnum >= 0);
2291
2292 if (!target_has_registers ())
2293 error (_("No registers."));
2294
2295 if (regnum == IA64_IP_REGNUM)
2296 {
2297 CORE_ADDR pc = 0;
2298 CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM];
2299
2300 if (addr != 0)
2301 {
2302 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2303 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2304 pc = read_memory_unsigned_integer (addr, 8, byte_order);
2305 }
2306 pc &= ~0xf;
2307 return frame_unwind_got_constant (this_frame, regnum, pc);
2308 }
2309
2311 || (regnum >= V32_REGNUM && regnum <= V127_REGNUM))
2312 {
2313 CORE_ADDR addr = 0;
2314
2315 if (regnum >= V32_REGNUM)
2317 addr = cache->saved_regs[regnum];
2318 if (addr != 0)
2319 return frame_unwind_got_memory (this_frame, regnum, addr);
2320
2321 return frame_unwind_got_constant (this_frame, regnum, 0);
2322 }
2323
2324 else /* All other registers not listed above. */
2325 {
2326 CORE_ADDR addr = cache->saved_regs[regnum];
2327
2328 if (addr != 0)
2329 return frame_unwind_got_memory (this_frame, regnum, addr);
2330
2331 return frame_unwind_got_constant (this_frame, regnum, 0);
2332 }
2333}
2334
2335static int
2337 frame_info_ptr this_frame,
2338 void **this_cache)
2339{
2340 gdbarch *arch = get_frame_arch (this_frame);
2341 ia64_gdbarch_tdep *tdep = gdbarch_tdep<ia64_gdbarch_tdep> (arch);
2342 if (tdep->pc_in_sigtramp)
2343 {
2344 CORE_ADDR pc = get_frame_pc (this_frame);
2345
2346 if (tdep->pc_in_sigtramp (pc))
2347 return 1;
2348 }
2349
2350 return 0;
2351}
2352
2363
2364
2365
2366static CORE_ADDR
2367ia64_frame_base_address (frame_info_ptr this_frame, void **this_cache)
2368{
2369 struct ia64_frame_cache *cache = ia64_frame_cache (this_frame, this_cache);
2370
2371 return cache->base;
2372}
2373
2381
2382#ifdef HAVE_LIBUNWIND_IA64_H
2383
2384struct ia64_unwind_table_entry
2385 {
2386 unw_word_t start_offset;
2387 unw_word_t end_offset;
2388 unw_word_t info_offset;
2389 };
2390
2391static __inline__ uint64_t
2392ia64_rse_slot_num (uint64_t addr)
2393{
2394 return (addr >> 3) & 0x3f;
2395}
2396
2397/* Skip over a designated number of registers in the backing
2398 store, remembering every 64th position is for NAT. */
2399static __inline__ uint64_t
2400ia64_rse_skip_regs (uint64_t addr, long num_regs)
2401{
2402 long delta = ia64_rse_slot_num(addr) + num_regs;
2403
2404 if (num_regs < 0)
2405 delta -= 0x3e;
2406 return addr + ((num_regs + delta/0x3f) << 3);
2407}
2408
2409/* Gdb ia64-libunwind-tdep callback function to convert from an ia64 gdb
2410 register number to a libunwind register number. */
2411static int
2412ia64_gdb2uw_regnum (int regnum)
2413{
2414 if (regnum == sp_regnum)
2415 return UNW_IA64_SP;
2416 else if (regnum == IA64_BSP_REGNUM)
2417 return UNW_IA64_BSP;
2418 else if ((unsigned) (regnum - IA64_GR0_REGNUM) < 128)
2419 return UNW_IA64_GR + (regnum - IA64_GR0_REGNUM);
2420 else if ((unsigned) (regnum - V32_REGNUM) < 95)
2421 return UNW_IA64_GR + 32 + (regnum - V32_REGNUM);
2422 else if ((unsigned) (regnum - IA64_FR0_REGNUM) < 128)
2423 return UNW_IA64_FR + (regnum - IA64_FR0_REGNUM);
2424 else if ((unsigned) (regnum - IA64_PR0_REGNUM) < 64)
2425 return -1;
2426 else if ((unsigned) (regnum - IA64_BR0_REGNUM) < 8)
2427 return UNW_IA64_BR + (regnum - IA64_BR0_REGNUM);
2428 else if (regnum == IA64_PR_REGNUM)
2429 return UNW_IA64_PR;
2430 else if (regnum == IA64_IP_REGNUM)
2431 return UNW_REG_IP;
2432 else if (regnum == IA64_CFM_REGNUM)
2433 return UNW_IA64_CFM;
2434 else if ((unsigned) (regnum - IA64_AR0_REGNUM) < 128)
2435 return UNW_IA64_AR + (regnum - IA64_AR0_REGNUM);
2436 else if ((unsigned) (regnum - IA64_NAT0_REGNUM) < 128)
2437 return UNW_IA64_NAT + (regnum - IA64_NAT0_REGNUM);
2438 else
2439 return -1;
2440}
2441
2442/* Gdb ia64-libunwind-tdep callback function to convert from a libunwind
2443 register number to a ia64 gdb register number. */
2444static int
2445ia64_uw2gdb_regnum (int uw_regnum)
2446{
2447 if (uw_regnum == UNW_IA64_SP)
2448 return sp_regnum;
2449 else if (uw_regnum == UNW_IA64_BSP)
2450 return IA64_BSP_REGNUM;
2451 else if ((unsigned) (uw_regnum - UNW_IA64_GR) < 32)
2452 return IA64_GR0_REGNUM + (uw_regnum - UNW_IA64_GR);
2453 else if ((unsigned) (uw_regnum - UNW_IA64_GR) < 128)
2454 return V32_REGNUM + (uw_regnum - (IA64_GR0_REGNUM + 32));
2455 else if ((unsigned) (uw_regnum - UNW_IA64_FR) < 128)
2456 return IA64_FR0_REGNUM + (uw_regnum - UNW_IA64_FR);
2457 else if ((unsigned) (uw_regnum - UNW_IA64_BR) < 8)
2458 return IA64_BR0_REGNUM + (uw_regnum - UNW_IA64_BR);
2459 else if (uw_regnum == UNW_IA64_PR)
2460 return IA64_PR_REGNUM;
2461 else if (uw_regnum == UNW_REG_IP)
2462 return IA64_IP_REGNUM;
2463 else if (uw_regnum == UNW_IA64_CFM)
2464 return IA64_CFM_REGNUM;
2465 else if ((unsigned) (uw_regnum - UNW_IA64_AR) < 128)
2466 return IA64_AR0_REGNUM + (uw_regnum - UNW_IA64_AR);
2467 else if ((unsigned) (uw_regnum - UNW_IA64_NAT) < 128)
2468 return IA64_NAT0_REGNUM + (uw_regnum - UNW_IA64_NAT);
2469 else
2470 return -1;
2471}
2472
2473/* Gdb ia64-libunwind-tdep callback function to reveal if register is
2474 a float register or not. */
2475static int
2476ia64_is_fpreg (int uw_regnum)
2477{
2478 return unw_is_fpreg (uw_regnum);
2479}
2480
2481/* Libunwind callback accessor function for general registers. */
2482static int
2483ia64_access_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val,
2484 int write, void *arg)
2485{
2486 int regnum = ia64_uw2gdb_regnum (uw_regnum);
2487 unw_word_t bsp, sof, cfm, psr, ip;
2488 struct frame_info *this_frame = (frame_info *) arg;
2489 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2490 ia64_gdbarch_tdep *tdep = gdbarch_tdep<ia64_gdbarch_tdep> (gdbarch);
2491
2492 /* We never call any libunwind routines that need to write registers. */
2493 gdb_assert (!write);
2494
2495 switch (uw_regnum)
2496 {
2497 case UNW_REG_IP:
2498 /* Libunwind expects to see the pc value which means the slot number
2499 from the psr must be merged with the ip word address. */
2501 psr = get_frame_register_unsigned (this_frame, IA64_PSR_REGNUM);
2502 *val = ip | ((psr >> 41) & 0x3);
2503 break;
2504
2505 case UNW_IA64_AR_BSP:
2506 /* Libunwind expects to see the beginning of the current
2507 register frame so we must account for the fact that
2508 ptrace() will return a value for bsp that points *after*
2509 the current register frame. */
2510 bsp = get_frame_register_unsigned (this_frame, IA64_BSP_REGNUM);
2511 cfm = get_frame_register_unsigned (this_frame, IA64_CFM_REGNUM);
2512 sof = tdep->size_of_register_frame (this_frame, cfm);
2513 *val = ia64_rse_skip_regs (bsp, -sof);
2514 break;
2515
2516 case UNW_IA64_AR_BSPSTORE:
2517 /* Libunwind wants bspstore to be after the current register frame.
2518 This is what ptrace() and gdb treats as the regular bsp value. */
2519 *val = get_frame_register_unsigned (this_frame, IA64_BSP_REGNUM);
2520 break;
2521
2522 default:
2523 /* For all other registers, just unwind the value directly. */
2524 *val = get_frame_register_unsigned (this_frame, regnum);
2525 break;
2526 }
2527
2528 if (gdbarch_debug >= 1)
2530 " access_reg: from cache: %4s=%s\n",
2531 (((unsigned) regnum <= IA64_NAT127_REGNUM)
2532 ? ia64_register_names[regnum] : "r??"),
2533 paddress (gdbarch, *val));
2534 return 0;
2535}
2536
2537/* Libunwind callback accessor function for floating-point registers. */
2538static int
2539ia64_access_fpreg (unw_addr_space_t as, unw_regnum_t uw_regnum,
2540 unw_fpreg_t *val, int write, void *arg)
2541{
2542 int regnum = ia64_uw2gdb_regnum (uw_regnum);
2543 frame_info_ptr this_frame = (frame_info_ptr) arg;
2544
2545 /* We never call any libunwind routines that need to write registers. */
2546 gdb_assert (!write);
2547
2548 get_frame_register (this_frame, regnum, (gdb_byte *) val);
2549
2550 return 0;
2551}
2552
2553/* Libunwind callback accessor function for top-level rse registers. */
2554static int
2555ia64_access_rse_reg (unw_addr_space_t as, unw_regnum_t uw_regnum,
2556 unw_word_t *val, int write, void *arg)
2557{
2558 int regnum = ia64_uw2gdb_regnum (uw_regnum);
2559 unw_word_t bsp, sof, cfm, psr, ip;
2560 struct regcache *regcache = (struct regcache *) arg;
2561 struct gdbarch *gdbarch = regcache->arch ();
2562
2563 /* We never call any libunwind routines that need to write registers. */
2564 gdb_assert (!write);
2565
2566 switch (uw_regnum)
2567 {
2568 case UNW_REG_IP:
2569 /* Libunwind expects to see the pc value which means the slot number
2570 from the psr must be merged with the ip word address. */
2573 *val = ip | ((psr >> 41) & 0x3);
2574 break;
2575
2576 case UNW_IA64_AR_BSP:
2577 /* Libunwind expects to see the beginning of the current
2578 register frame so we must account for the fact that
2579 ptrace() will return a value for bsp that points *after*
2580 the current register frame. */
2583 sof = (cfm & 0x7f);
2584 *val = ia64_rse_skip_regs (bsp, -sof);
2585 break;
2586
2587 case UNW_IA64_AR_BSPSTORE:
2588 /* Libunwind wants bspstore to be after the current register frame.
2589 This is what ptrace() and gdb treats as the regular bsp value. */
2591 break;
2592
2593 default:
2594 /* For all other registers, just unwind the value directly. */
2596 break;
2597 }
2598
2599 if (gdbarch_debug >= 1)
2601 " access_rse_reg: from cache: %4s=%s\n",
2602 (((unsigned) regnum <= IA64_NAT127_REGNUM)
2603 ? ia64_register_names[regnum] : "r??"),
2604 paddress (gdbarch, *val));
2605
2606 return 0;
2607}
2608
2609/* Libunwind callback accessor function for top-level fp registers. */
2610static int
2611ia64_access_rse_fpreg (unw_addr_space_t as, unw_regnum_t uw_regnum,
2612 unw_fpreg_t *val, int write, void *arg)
2613{
2614 int regnum = ia64_uw2gdb_regnum (uw_regnum);
2615 struct regcache *regcache = (struct regcache *) arg;
2616
2617 /* We never call any libunwind routines that need to write registers. */
2618 gdb_assert (!write);
2619
2620 regcache->cooked_read (regnum, (gdb_byte *) val);
2621
2622 return 0;
2623}
2624
2625/* Libunwind callback accessor function for accessing memory. */
2626static int
2627ia64_access_mem (unw_addr_space_t as,
2628 unw_word_t addr, unw_word_t *val,
2629 int write, void *arg)
2630{
2631 if (addr - KERNEL_START < ktab_size)
2632 {
2633 unw_word_t *laddr = (unw_word_t*) ((char *) ktab
2634 + (addr - KERNEL_START));
2635
2636 if (write)
2637 *laddr = *val;
2638 else
2639 *val = *laddr;
2640 return 0;
2641 }
2642
2643 /* XXX do we need to normalize byte-order here? */
2644 if (write)
2645 return target_write_memory (addr, (gdb_byte *) val, sizeof (unw_word_t));
2646 else
2647 return target_read_memory (addr, (gdb_byte *) val, sizeof (unw_word_t));
2648}
2649
2650/* Call low-level function to access the kernel unwind table. */
2651static gdb::optional<gdb::byte_vector>
2652getunwind_table ()
2653{
2654 /* FIXME drow/2005-09-10: This code used to call
2655 ia64_linux_xfer_unwind_table directly to fetch the unwind table
2656 for the currently running ia64-linux kernel. That data should
2657 come from the core file and be accessed via the auxv vector; if
2658 we want to preserve fall back to the running kernel's table, then
2659 we should find a way to override the corefile layer's
2660 xfer_partial method. */
2661
2662 return target_read_alloc (current_inferior ()->top_target (),
2664}
2665
2666/* Get the kernel unwind table. */
2667static int
2668get_kernel_table (unw_word_t ip, unw_dyn_info_t *di)
2669{
2670 static struct ia64_table_entry *etab;
2671
2672 if (!ktab)
2673 {
2674 ktab_buf = getunwind_table ();
2675 if (!ktab_buf)
2676 return -UNW_ENOINFO;
2677
2678 ktab = (struct ia64_table_entry *) ktab_buf->data ();
2679 ktab_size = ktab_buf->size ();
2680
2681 for (etab = ktab; etab->start_offset; ++etab)
2682 etab->info_offset += KERNEL_START;
2683 }
2684
2685 if (ip < ktab[0].start_offset || ip >= etab[-1].end_offset)
2686 return -UNW_ENOINFO;
2687
2688 di->format = UNW_INFO_FORMAT_TABLE;
2689 di->gp = 0;
2690 di->start_ip = ktab[0].start_offset;
2691 di->end_ip = etab[-1].end_offset;
2692 di->u.ti.name_ptr = (unw_word_t) "<kernel>";
2693 di->u.ti.segbase = 0;
2694 di->u.ti.table_len = ((char *) etab - (char *) ktab) / sizeof (unw_word_t);
2695 di->u.ti.table_data = (unw_word_t *) ktab;
2696
2697 if (gdbarch_debug >= 1)
2698 gdb_printf (gdb_stdlog, "get_kernel_table: found table `%s': "
2699 "segbase=%s, length=%s, gp=%s\n",
2700 (char *) di->u.ti.name_ptr,
2701 hex_string (di->u.ti.segbase),
2702 pulongest (di->u.ti.table_len),
2703 hex_string (di->gp));
2704 return 0;
2705}
2706
2707/* Find the unwind table entry for a specified address. */
2708static int
2709ia64_find_unwind_table (struct objfile *objfile, unw_word_t ip,
2710 unw_dyn_info_t *dip, void **buf)
2711{
2712 Elf_Internal_Phdr *phdr, *p_text = NULL, *p_unwind = NULL;
2713 Elf_Internal_Ehdr *ehdr;
2714 unw_word_t segbase = 0;
2715 CORE_ADDR load_base;
2716 bfd *bfd;
2717 int i;
2718
2719 bfd = objfile->obfd;
2720
2721 ehdr = elf_tdata (bfd)->elf_header;
2722 phdr = elf_tdata (bfd)->phdr;
2723
2724 load_base = objfile->text_section_offset ();
2725
2726 for (i = 0; i < ehdr->e_phnum; ++i)
2727 {
2728 switch (phdr[i].p_type)
2729 {
2730 case PT_LOAD:
2731 if ((unw_word_t) (ip - load_base - phdr[i].p_vaddr)
2732 < phdr[i].p_memsz)
2733 p_text = phdr + i;
2734 break;
2735
2736 case PT_IA_64_UNWIND:
2737 p_unwind = phdr + i;
2738 break;
2739
2740 default:
2741 break;
2742 }
2743 }
2744
2745 if (!p_text || !p_unwind)
2746 return -UNW_ENOINFO;
2747
2748 /* Verify that the segment that contains the IP also contains
2749 the static unwind table. If not, we may be in the Linux kernel's
2750 DSO gate page in which case the unwind table is another segment.
2751 Otherwise, we are dealing with runtime-generated code, for which we
2752 have no info here. */
2753 segbase = p_text->p_vaddr + load_base;
2754
2755 if ((p_unwind->p_vaddr - p_text->p_vaddr) >= p_text->p_memsz)
2756 {
2757 int ok = 0;
2758 for (i = 0; i < ehdr->e_phnum; ++i)
2759 {
2760 if (phdr[i].p_type == PT_LOAD
2761 && (p_unwind->p_vaddr - phdr[i].p_vaddr) < phdr[i].p_memsz)
2762 {
2763 ok = 1;
2764 /* Get the segbase from the section containing the
2765 libunwind table. */
2766 segbase = phdr[i].p_vaddr + load_base;
2767 }
2768 }
2769 if (!ok)
2770 return -UNW_ENOINFO;
2771 }
2772
2773 dip->start_ip = p_text->p_vaddr + load_base;
2774 dip->end_ip = dip->start_ip + p_text->p_memsz;
2775 dip->gp = ia64_find_global_pointer (objfile->arch (), ip);
2776 dip->format = UNW_INFO_FORMAT_REMOTE_TABLE;
2777 dip->u.rti.name_ptr = (unw_word_t) bfd_get_filename (bfd);
2778 dip->u.rti.segbase = segbase;
2779 dip->u.rti.table_len = p_unwind->p_memsz / sizeof (unw_word_t);
2780 dip->u.rti.table_data = p_unwind->p_vaddr + load_base;
2781
2782 return 0;
2783}
2784
2785/* Libunwind callback accessor function to acquire procedure unwind-info. */
2786static int
2787ia64_find_proc_info_x (unw_addr_space_t as, unw_word_t ip, unw_proc_info_t *pi,
2788 int need_unwind_info, void *arg)
2789{
2790 struct obj_section *sec = find_pc_section (ip);
2791 unw_dyn_info_t di;
2792 int ret;
2793 void *buf = NULL;
2794
2795 if (!sec)
2796 {
2797 /* XXX This only works if the host and the target architecture are
2798 both ia64 and if the have (more or less) the same kernel
2799 version. */
2800 if (get_kernel_table (ip, &di) < 0)
2801 return -UNW_ENOINFO;
2802
2803 if (gdbarch_debug >= 1)
2804 gdb_printf (gdb_stdlog, "ia64_find_proc_info_x: %s -> "
2805 "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s,"
2806 "length=%s,data=%s)\n",
2807 hex_string (ip), (char *)di.u.ti.name_ptr,
2808 hex_string (di.u.ti.segbase),
2809 hex_string (di.start_ip), hex_string (di.end_ip),
2810 hex_string (di.gp),
2811 pulongest (di.u.ti.table_len),
2812 hex_string ((CORE_ADDR)di.u.ti.table_data));
2813 }
2814 else
2815 {
2816 ret = ia64_find_unwind_table (sec->objfile, ip, &di, &buf);
2817 if (ret < 0)
2818 return ret;
2819
2820 if (gdbarch_debug >= 1)
2821 gdb_printf (gdb_stdlog, "ia64_find_proc_info_x: %s -> "
2822 "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s,"
2823 "length=%s,data=%s)\n",
2824 hex_string (ip), (char *)di.u.rti.name_ptr,
2825 hex_string (di.u.rti.segbase),
2826 hex_string (di.start_ip), hex_string (di.end_ip),
2827 hex_string (di.gp),
2828 pulongest (di.u.rti.table_len),
2829 hex_string (di.u.rti.table_data));
2830 }
2831
2832 ret = libunwind_search_unwind_table (&as, ip, &di, pi, need_unwind_info,
2833 arg);
2834
2835 /* We no longer need the dyn info storage so free it. */
2836 xfree (buf);
2837
2838 return ret;
2839}
2840
2841/* Libunwind callback accessor function for cleanup. */
2842static void
2843ia64_put_unwind_info (unw_addr_space_t as,
2844 unw_proc_info_t *pip, void *arg)
2845{
2846 /* Nothing required for now. */
2847}
2848
2849/* Libunwind callback accessor function to get head of the dynamic
2850 unwind-info registration list. */
2851static int
2852ia64_get_dyn_info_list (unw_addr_space_t as,
2853 unw_word_t *dilap, void *arg)
2854{
2855 struct obj_section *text_sec;
2856 unw_word_t ip, addr;
2857 unw_dyn_info_t di;
2858 int ret;
2859
2861 return -UNW_ENOINFO;
2862
2864 {
2865 void *buf = NULL;
2866
2867 text_sec = objfile->sections + SECT_OFF_TEXT (objfile);
2868 ip = text_sec->addr ();
2869 ret = ia64_find_unwind_table (objfile, ip, &di, &buf);
2870 if (ret >= 0)
2871 {
2872 addr = libunwind_find_dyn_list (as, &di, arg);
2873 /* We no longer need the dyn info storage so free it. */
2874 xfree (buf);
2875
2876 if (addr)
2877 {
2878 if (gdbarch_debug >= 1)
2880 "dynamic unwind table in objfile %s "
2881 "at %s (gp=%s)\n",
2882 bfd_get_filename (objfile->obfd),
2883 hex_string (addr), hex_string (di.gp));
2884 *dilap = addr;
2885 return 0;
2886 }
2887 }
2888 }
2889 return -UNW_ENOINFO;
2890}
2891
2892
2893/* Frame interface functions for libunwind. */
2894
2895static void
2896ia64_libunwind_frame_this_id (frame_info_ptr this_frame, void **this_cache,
2897 struct frame_id *this_id)
2898{
2899 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2900 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2901 struct frame_id id = outer_frame_id;
2902 gdb_byte buf[8];
2903 CORE_ADDR bsp;
2904
2905 libunwind_frame_this_id (this_frame, this_cache, &id);
2906 if (id == outer_frame_id)
2907 {
2908 (*this_id) = outer_frame_id;
2909 return;
2910 }
2911
2912 /* We must add the bsp as the special address for frame comparison
2913 purposes. */
2914 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
2915 bsp = extract_unsigned_integer (buf, 8, byte_order);
2916
2917 (*this_id) = frame_id_build_special (id.stack_addr, id.code_addr, bsp);
2918
2919 if (gdbarch_debug >= 1)
2921 "libunwind frame id: code %s, stack %s, "
2922 "special %s, this_frame %s\n",
2925 paddress (gdbarch, bsp),
2926 host_address_to_string (this_frame));
2927}
2928
2929static struct value *
2930ia64_libunwind_frame_prev_register (frame_info_ptr this_frame,
2931 void **this_cache, int regnum)
2932{
2933 int reg = regnum;
2934 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2935 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2936 struct value *val;
2937
2938 if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
2942
2943 /* Let libunwind do most of the work. */
2944 val = libunwind_frame_prev_register (this_frame, this_cache, reg);
2945
2946 if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
2947 {
2948 ULONGEST prN_val;
2949
2950 if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
2951 {
2952 int rrb_pr = 0;
2953 ULONGEST cfm;
2954
2955 /* Fetch predicate register rename base from current frame
2956 marker for this frame. */
2957 cfm = get_frame_register_unsigned (this_frame, IA64_CFM_REGNUM);
2958 rrb_pr = (cfm >> 32) & 0x3f;
2959
2960 /* Adjust the register number to account for register rotation. */
2961 regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
2962 }
2963 prN_val = extract_bit_field (val->contents_all ().data (),
2964 regnum - VP0_REGNUM, 1);
2965 return frame_unwind_got_constant (this_frame, regnum, prN_val);
2966 }
2967
2969 {
2970 ULONGEST unatN_val;
2971
2972 unatN_val = extract_bit_field (val->contents_all ().data (),
2974 return frame_unwind_got_constant (this_frame, regnum, unatN_val);
2975 }
2976
2977 else if (regnum == IA64_BSP_REGNUM)
2978 {
2979 struct value *cfm_val;
2980 CORE_ADDR prev_bsp, prev_cfm;
2981
2982 /* We want to calculate the previous bsp as the end of the previous
2983 register stack frame. This corresponds to what the hardware bsp
2984 register will be if we pop the frame back which is why we might
2985 have been called. We know that libunwind will pass us back the
2986 beginning of the current frame so we should just add sof to it. */
2987 prev_bsp = extract_unsigned_integer (val->contents_all ().data (),
2988 8, byte_order);
2989 cfm_val = libunwind_frame_prev_register (this_frame, this_cache,
2991 prev_cfm = extract_unsigned_integer (cfm_val->contents_all ().data (),
2992 8, byte_order);
2993 prev_bsp = rse_address_add (prev_bsp, (prev_cfm & 0x7f));
2994
2995 return frame_unwind_got_constant (this_frame, regnum, prev_bsp);
2996 }
2997 else
2998 return val;
2999}
3000
3001static int
3002ia64_libunwind_frame_sniffer (const struct frame_unwind *self,
3003 frame_info_ptr this_frame,
3004 void **this_cache)
3005{
3007 && libunwind_frame_sniffer (self, this_frame, this_cache))
3008 return 1;
3009
3010 return 0;
3011}
3012
3013static const struct frame_unwind ia64_libunwind_frame_unwind =
3014{
3015 "ia64 libunwind",
3018 ia64_libunwind_frame_this_id,
3019 ia64_libunwind_frame_prev_register,
3020 NULL,
3021 ia64_libunwind_frame_sniffer,
3023};
3024
3025static void
3026ia64_libunwind_sigtramp_frame_this_id (frame_info_ptr this_frame,
3027 void **this_cache,
3028 struct frame_id *this_id)
3029{
3030 struct gdbarch *gdbarch = get_frame_arch (this_frame);
3031 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3032 gdb_byte buf[8];
3033 CORE_ADDR bsp;
3034 struct frame_id id = outer_frame_id;
3035
3036 libunwind_frame_this_id (this_frame, this_cache, &id);
3037 if (id == outer_frame_id)
3038 {
3039 (*this_id) = outer_frame_id;
3040 return;
3041 }
3042
3043 /* We must add the bsp as the special address for frame comparison
3044 purposes. */
3045 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
3046 bsp = extract_unsigned_integer (buf, 8, byte_order);
3047
3048 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
3049 (*this_id) = frame_id_build_special (id.stack_addr, id.code_addr, bsp);
3050
3051 if (gdbarch_debug >= 1)
3053 "libunwind sigtramp frame id: code %s, "
3054 "stack %s, special %s, this_frame %s\n",
3057 paddress (gdbarch, bsp),
3058 host_address_to_string (this_frame));
3059}
3060
3061static struct value *
3062ia64_libunwind_sigtramp_frame_prev_register (frame_info_ptr this_frame,
3063 void **this_cache, int regnum)
3064{
3065 struct gdbarch *gdbarch = get_frame_arch (this_frame);
3066 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3067 struct value *prev_ip_val;
3068 CORE_ADDR prev_ip;
3069
3070 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
3071 method of getting previous registers. */
3072 prev_ip_val = libunwind_frame_prev_register (this_frame, this_cache,
3074 prev_ip = extract_unsigned_integer (prev_ip_val->contents_all ().data (),
3075 8, byte_order);
3076
3077 if (prev_ip == 0)
3078 {
3079 void *tmp_cache = NULL;
3080 return ia64_sigtramp_frame_prev_register (this_frame, &tmp_cache,
3081 regnum);
3082 }
3083 else
3084 return ia64_libunwind_frame_prev_register (this_frame, this_cache, regnum);
3085}
3086
3087static int
3088ia64_libunwind_sigtramp_frame_sniffer (const struct frame_unwind *self,
3089 frame_info_ptr this_frame,
3090 void **this_cache)
3091{
3093 {
3094 if (libunwind_sigtramp_frame_sniffer (self, this_frame, this_cache))
3095 return 1;
3096 return 0;
3097 }
3098 else
3099 return ia64_sigtramp_frame_sniffer (self, this_frame, this_cache);
3100}
3101
3102static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind =
3103{
3104 "ia64 libunwind sigtramp",
3107 ia64_libunwind_sigtramp_frame_this_id,
3108 ia64_libunwind_sigtramp_frame_prev_register,
3109 NULL,
3110 ia64_libunwind_sigtramp_frame_sniffer
3111};
3112
3113/* Set of libunwind callback acccessor functions. */
3114unw_accessors_t ia64_unw_accessors =
3115{
3116 ia64_find_proc_info_x,
3117 ia64_put_unwind_info,
3118 ia64_get_dyn_info_list,
3119 ia64_access_mem,
3120 ia64_access_reg,
3121 ia64_access_fpreg,
3122 /* resume */
3123 /* get_proc_name */
3124};
3125
3126/* Set of special libunwind callback acccessor functions specific for accessing
3127 the rse registers. At the top of the stack, we want libunwind to figure out
3128 how to read r32 - r127. Though usually they are found sequentially in
3129 memory starting from $bof, this is not always true. */
3130unw_accessors_t ia64_unw_rse_accessors =
3131{
3132 ia64_find_proc_info_x,
3133 ia64_put_unwind_info,
3134 ia64_get_dyn_info_list,
3135 ia64_access_mem,
3136 ia64_access_rse_reg,
3137 ia64_access_rse_fpreg,
3138 /* resume */
3139 /* get_proc_name */
3140};
3141
3142/* Set of ia64-libunwind-tdep gdb callbacks and data for generic
3143 ia64-libunwind-tdep code to use. */
3144struct libunwind_descr ia64_libunwind_descr =
3145{
3146 ia64_gdb2uw_regnum,
3147 ia64_uw2gdb_regnum,
3148 ia64_is_fpreg,
3149 &ia64_unw_accessors,
3150 &ia64_unw_rse_accessors,
3151};
3152
3153#endif /* HAVE_LIBUNWIND_IA64_H */
3154
3155static int
3157{
3158 struct type *float_elt_type;
3159
3160 /* Don't use the struct convention for anything but structure,
3161 union, or array types. */
3162 if (!(type->code () == TYPE_CODE_STRUCT
3163 || type->code () == TYPE_CODE_UNION
3164 || type->code () == TYPE_CODE_ARRAY))
3165 return 0;
3166
3167 /* HFAs are structures (or arrays) consisting entirely of floating
3168 point values of the same length. Up to 8 of these are returned
3169 in registers. Don't use the struct convention when this is the
3170 case. */
3171 float_elt_type = is_float_or_hfa_type (type);
3172 if (float_elt_type != NULL
3173 && type->length () / float_elt_type->length () <= 8)
3174 return 0;
3175
3176 /* Other structs of length 32 or less are returned in r8-r11.
3177 Don't use the struct convention for those either. */
3178 return type->length () > 32;
3179}
3180
3181/* Return non-zero if TYPE is a structure or union type. */
3182
3183static int
3185{
3186 return (type->code () == TYPE_CODE_STRUCT
3187 || type->code () == TYPE_CODE_UNION);
3188}
3189
3190static void
3192 gdb_byte *valbuf)
3193{
3194 struct gdbarch *gdbarch = regcache->arch ();
3195 struct type *float_elt_type;
3196
3197 float_elt_type = is_float_or_hfa_type (type);
3198 if (float_elt_type != NULL)
3199 {
3200 gdb_byte from[IA64_FP_REGISTER_SIZE];
3201 int offset = 0;
3202 int regnum = IA64_FR8_REGNUM;
3203 int n = type->length () / float_elt_type->length ();
3204
3205 while (n-- > 0)
3206 {
3207 regcache->cooked_read (regnum, from);
3209 valbuf + offset, float_elt_type);
3210 offset += float_elt_type->length ();
3211 regnum++;
3212 }
3213 }
3214 else if (!ia64_struct_type_p (type) && type->length () < 8)
3215 {
3216 /* This is an integral value, and its size is less than 8 bytes.
3217 These values are LSB-aligned, so extract the relevant bytes,
3218 and copy them into VALBUF. */
3219 /* brobecker/2005-12-30: Actually, all integral values are LSB aligned,
3220 so I suppose we should also add handling here for integral values
3221 whose size is greater than 8. But I wasn't able to create such
3222 a type, neither in C nor in Ada, so not worrying about these yet. */
3223 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3224 ULONGEST val;
3225
3227 store_unsigned_integer (valbuf, type->length (), byte_order, val);
3228 }
3229 else
3230 {
3231 ULONGEST val;
3232 int offset = 0;
3233 int regnum = IA64_GR8_REGNUM;
3234 int reglen = register_type (gdbarch, IA64_GR8_REGNUM)->length ();
3235 int n = type->length () / reglen;
3236 int m = type->length () % reglen;
3237
3238 while (n-- > 0)
3239 {
3240 ULONGEST regval;
3242 memcpy ((char *)valbuf + offset, &regval, reglen);
3243 offset += reglen;
3244 regnum++;
3245 }
3246
3247 if (m)
3248 {
3250 memcpy ((char *)valbuf + offset, &val, m);
3251 }
3252 }
3253}
3254
3255static void
3257 const gdb_byte *valbuf)
3258{
3259 struct gdbarch *gdbarch = regcache->arch ();
3260 struct type *float_elt_type;
3261
3262 float_elt_type = is_float_or_hfa_type (type);
3263 if (float_elt_type != NULL)
3264 {
3265 gdb_byte to[IA64_FP_REGISTER_SIZE];
3266 int offset = 0;
3267 int regnum = IA64_FR8_REGNUM;
3268 int n = type->length () / float_elt_type->length ();
3269
3270 while (n-- > 0)
3271 {
3272 target_float_convert (valbuf + offset, float_elt_type,
3273 to, ia64_ext_type (gdbarch));
3275 offset += float_elt_type->length ();
3276 regnum++;
3277 }
3278 }
3279 else
3280 {
3281 int offset = 0;
3282 int regnum = IA64_GR8_REGNUM;
3283 int reglen = register_type (gdbarch, IA64_GR8_REGNUM)->length ();
3284 int n = type->length () / reglen;
3285 int m = type->length () % reglen;
3286
3287 while (n-- > 0)
3288 {
3289 ULONGEST val;
3290 memcpy (&val, (char *)valbuf + offset, reglen);
3292 offset += reglen;
3293 regnum++;
3294 }
3295
3296 if (m)
3297 {
3298 ULONGEST val;
3299 memcpy (&val, (char *)valbuf + offset, m);
3301 }
3302 }
3303}
3304
3305static enum return_value_convention
3306ia64_return_value (struct gdbarch *gdbarch, struct value *function,
3307 struct type *valtype, struct regcache *regcache,
3308 gdb_byte *readbuf, const gdb_byte *writebuf)
3309{
3311
3312 if (writebuf != NULL)
3313 {
3314 gdb_assert (!struct_return);
3315 ia64_store_return_value (valtype, regcache, writebuf);
3316 }
3317
3318 if (readbuf != NULL)
3319 {
3320 gdb_assert (!struct_return);
3321 ia64_extract_return_value (valtype, regcache, readbuf);
3322 }
3323
3324 if (struct_return)
3326 else
3328}
3329
3330static int
3331is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
3332{
3333 switch (t->code ())
3334 {
3335 case TYPE_CODE_FLT:
3336 if (*etp)
3337 return (*etp)->length () == t->length ();
3338 else
3339 {
3340 *etp = t;
3341 return 1;
3342 }
3343 break;
3344 case TYPE_CODE_ARRAY:
3345 return
3347 etp);
3348 break;
3349 case TYPE_CODE_STRUCT:
3350 {
3351 int i;
3352
3353 for (i = 0; i < t->num_fields (); i++)
3355 (check_typedef (t->field (i).type ()), etp))
3356 return 0;
3357 return 1;
3358 }
3359 break;
3360 default:
3361 break;
3362 }
3363
3364 return 0;
3365}
3366
3367/* Determine if the given type is one of the floating point types or
3368 and HFA (which is a struct, array, or combination thereof whose
3369 bottom-most elements are all of the same floating point type). */
3370
3371static struct type *
3373{
3374 struct type *et = 0;
3375
3376 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
3377}
3378
3379
3380/* Return 1 if the alignment of T is such that the next even slot
3381 should be used. Return 0, if the next available slot should
3382 be used. (See section 8.5.1 of the IA-64 Software Conventions
3383 and Runtime manual). */
3384
3385static int
3387{
3388 switch (t->code ())
3389 {
3390 case TYPE_CODE_INT:
3391 case TYPE_CODE_FLT:
3392 if (t->length () > 8)
3393 return 1;
3394 else
3395 return 0;
3396 case TYPE_CODE_ARRAY:
3397 return
3399 case TYPE_CODE_STRUCT:
3400 {
3401 int i;
3402
3403 for (i = 0; i < t->num_fields (); i++)
3405 (check_typedef (t->field (i).type ())))
3406 return 1;
3407 return 0;
3408 }
3409 default:
3410 return 0;
3411 }
3412}
3413
3414/* Attempt to find (and return) the global pointer for the given
3415 function.
3416
3417 This is a rather nasty bit of code searchs for the .dynamic section
3418 in the objfile corresponding to the pc of the function we're trying
3419 to call. Once it finds the addresses at which the .dynamic section
3420 lives in the child process, it scans the Elf64_Dyn entries for a
3421 DT_PLTGOT tag. If it finds one of these, the corresponding
3422 d_un.d_ptr value is the global pointer. */
3423
3424static CORE_ADDR
3426 CORE_ADDR faddr)
3427{
3428 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3429 struct obj_section *faddr_sect;
3430
3431 faddr_sect = find_pc_section (faddr);
3432 if (faddr_sect != NULL)
3433 {
3434 for (obj_section *osect : faddr_sect->objfile->sections ())
3435 {
3436 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
3437 {
3438 CORE_ADDR addr = osect->addr ();
3439 CORE_ADDR endaddr = osect->endaddr ();
3440
3441 while (addr < endaddr)
3442 {
3443 int status;
3444 LONGEST tag;
3445 gdb_byte buf[8];
3446
3447 status = target_read_memory (addr, buf, sizeof (buf));
3448 if (status != 0)
3449 break;
3450 tag = extract_signed_integer (buf, byte_order);
3451
3452 if (tag == DT_PLTGOT)
3453 {
3454 CORE_ADDR global_pointer;
3455
3456 status = target_read_memory (addr + 8, buf,
3457 sizeof (buf));
3458 if (status != 0)
3459 break;
3460 global_pointer
3461 = extract_unsigned_integer (buf, sizeof (buf),
3462 byte_order);
3463
3464 /* The payoff... */
3465 return global_pointer;
3466 }
3467
3468 if (tag == DT_NULL)
3469 break;
3470
3471 addr += 16;
3472 }
3473
3474 break;
3475 }
3476 }
3477 }
3478 return 0;
3479}
3480
3481/* Attempt to find (and return) the global pointer for the given
3482 function. We first try the find_global_pointer_from_solib routine
3483 from the gdbarch tdep vector, if provided. And if that does not
3484 work, then we try ia64_find_global_pointer_from_dynamic_section. */
3485
3486static CORE_ADDR
3487ia64_find_global_pointer (struct gdbarch *gdbarch, CORE_ADDR faddr)
3488{
3489 ia64_gdbarch_tdep *tdep = gdbarch_tdep<ia64_gdbarch_tdep> (gdbarch);
3490 CORE_ADDR addr = 0;
3491
3494 if (addr == 0)
3496 return addr;
3497}
3498
3499/* Given a function's address, attempt to find (and return) the
3500 corresponding (canonical) function descriptor. Return 0 if
3501 not found. */
3502static CORE_ADDR
3503find_extant_func_descr (struct gdbarch *gdbarch, CORE_ADDR faddr)
3504{
3505 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3506 struct obj_section *faddr_sect;
3507
3508 /* Return early if faddr is already a function descriptor. */
3509 faddr_sect = find_pc_section (faddr);
3510 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
3511 return faddr;
3512
3513 if (faddr_sect != NULL)
3514 {
3515 for (obj_section *osect : faddr_sect->objfile->sections ())
3516 {
3517 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
3518 {
3519 CORE_ADDR addr = osect->addr ();
3520 CORE_ADDR endaddr = osect->endaddr ();
3521
3522 while (addr < endaddr)
3523 {
3524 int status;
3525 LONGEST faddr2;
3526 gdb_byte buf[8];
3527
3528 status = target_read_memory (addr, buf, sizeof (buf));
3529 if (status != 0)
3530 break;
3531 faddr2 = extract_signed_integer (buf, byte_order);
3532
3533 if (faddr == faddr2)
3534 return addr;
3535
3536 addr += 16;
3537 }
3538
3539 break;
3540 }
3541 }
3542 }
3543 return 0;
3544}
3545
3546/* Attempt to find a function descriptor corresponding to the
3547 given address. If none is found, construct one on the
3548 stack using the address at fdaptr. */
3549
3550static CORE_ADDR
3551find_func_descr (struct regcache *regcache, CORE_ADDR faddr, CORE_ADDR *fdaptr)
3552{
3553 struct gdbarch *gdbarch = regcache->arch ();
3554 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3555 CORE_ADDR fdesc;
3556
3557 fdesc = find_extant_func_descr (gdbarch, faddr);
3558
3559 if (fdesc == 0)
3560 {
3561 ULONGEST global_pointer;
3562 gdb_byte buf[16];
3563
3564 fdesc = *fdaptr;
3565 *fdaptr += 16;
3566
3567 global_pointer = ia64_find_global_pointer (gdbarch, faddr);
3568
3569 if (global_pointer == 0)
3571 IA64_GR1_REGNUM, &global_pointer);
3572
3573 store_unsigned_integer (buf, 8, byte_order, faddr);
3574 store_unsigned_integer (buf + 8, 8, byte_order, global_pointer);
3575
3576 write_memory (fdesc, buf, 16);
3577 }
3578
3579 return fdesc;
3580}
3581
3582/* Use the following routine when printing out function pointers
3583 so the user can see the function address rather than just the
3584 function descriptor. */
3585static CORE_ADDR
3587 struct target_ops *targ)
3588{
3589 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3590 struct obj_section *s;
3591 gdb_byte buf[8];
3592
3593 s = find_pc_section (addr);
3594
3595 /* check if ADDR points to a function descriptor. */
3596 if (s && strcmp (s->the_bfd_section->name, ".opd") == 0)
3597 return read_memory_unsigned_integer (addr, 8, byte_order);
3598
3599 /* Normally, functions live inside a section that is executable.
3600 So, if ADDR points to a non-executable section, then treat it
3601 as a function descriptor and return the target address iff
3602 the target address itself points to a section that is executable.
3603 Check first the memory of the whole length of 8 bytes is readable. */
3604 if (s && (s->the_bfd_section->flags & SEC_CODE) == 0
3605 && target_read_memory (addr, buf, 8) == 0)
3606 {
3607 CORE_ADDR pc = extract_unsigned_integer (buf, 8, byte_order);
3608 struct obj_section *pc_section = find_pc_section (pc);
3609
3610 if (pc_section && (pc_section->the_bfd_section->flags & SEC_CODE))
3611 return pc;
3612 }
3613
3614 /* There are also descriptors embedded in vtables. */
3615 if (s)
3616 {
3618
3620
3621 if (minsym.minsym
3622 && is_vtable_name (minsym.minsym->linkage_name ()))
3623 return read_memory_unsigned_integer (addr, 8, byte_order);
3624 }
3625
3626 return addr;
3627}
3628
3629static CORE_ADDR
3630ia64_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
3631{
3632 return sp & ~0xfLL;
3633}
3634
3635/* The default "allocate_new_rse_frame" ia64_infcall_ops routine for ia64. */
3636
3637static void
3638ia64_allocate_new_rse_frame (struct regcache *regcache, ULONGEST bsp, int sof)
3639{
3640 ULONGEST cfm, pfs, new_bsp;
3641
3643
3644 new_bsp = rse_address_add (bsp, sof);
3646
3648 pfs &= 0xc000000000000000LL;
3649 pfs |= (cfm & 0xffffffffffffLL);
3651
3652 cfm &= 0xc000000000000000LL;
3653 cfm |= sof;
3655}
3656
3657/* The default "store_argument_in_slot" ia64_infcall_ops routine for
3658 ia64. */
3659
3660static void
3662 int slotnum, gdb_byte *buf)
3663{
3664 write_memory (rse_address_add (bsp, slotnum), buf, 8);
3665}
3666
3667/* The default "set_function_addr" ia64_infcall_ops routine for ia64. */
3668
3669static void
3670ia64_set_function_addr (struct regcache *regcache, CORE_ADDR func_addr)
3671{
3672 /* Nothing needed. */
3673}
3674
3675static CORE_ADDR
3676ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
3677 struct regcache *regcache, CORE_ADDR bp_addr,
3678 int nargs, struct value **args, CORE_ADDR sp,
3679 function_call_return_method return_method,
3680 CORE_ADDR struct_addr)
3681{
3682 ia64_gdbarch_tdep *tdep = gdbarch_tdep<ia64_gdbarch_tdep> (gdbarch);
3683 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3684 int argno;
3685 struct value *arg;
3686 struct type *type;
3687 int len, argoffset;
3688 int nslots, rseslots, memslots, slotnum, nfuncargs;
3689 int floatreg;
3690 ULONGEST bsp;
3691 CORE_ADDR funcdescaddr, global_pointer;
3692 CORE_ADDR func_addr = find_function_addr (function, NULL);
3693
3694 nslots = 0;
3695 nfuncargs = 0;
3696 /* Count the number of slots needed for the arguments. */
3697 for (argno = 0; argno < nargs; argno++)
3698 {
3699 arg = args[argno];
3700 type = check_typedef (arg->type ());
3701 len = type->length ();
3702
3703 if ((nslots & 1) && slot_alignment_is_next_even (type))
3704 nslots++;
3705
3706 if (type->code () == TYPE_CODE_FUNC)
3707 nfuncargs++;
3708
3709 nslots += (len + 7) / 8;
3710 }
3711
3712 /* Divvy up the slots between the RSE and the memory stack. */
3713 rseslots = (nslots > 8) ? 8 : nslots;
3714 memslots = nslots - rseslots;
3715
3716 /* Allocate a new RSE frame. */
3718 tdep->infcall_ops.allocate_new_rse_frame (regcache, bsp, rseslots);
3719
3720 /* We will attempt to find function descriptors in the .opd segment,
3721 but if we can't we'll construct them ourselves. That being the
3722 case, we'll need to reserve space on the stack for them. */
3723 funcdescaddr = sp - nfuncargs * 16;
3724 funcdescaddr &= ~0xfLL;
3725
3726 /* Adjust the stack pointer to it's new value. The calling conventions
3727 require us to have 16 bytes of scratch, plus whatever space is
3728 necessary for the memory slots and our function descriptors. */
3729 sp = sp - 16 - (memslots + nfuncargs) * 8;
3730 sp &= ~0xfLL; /* Maintain 16 byte alignment. */
3731
3732 /* Place the arguments where they belong. The arguments will be
3733 either placed in the RSE backing store or on the memory stack.
3734 In addition, floating point arguments or HFAs are placed in
3735 floating point registers. */
3736 slotnum = 0;
3737 floatreg = IA64_FR8_REGNUM;
3738 for (argno = 0; argno < nargs; argno++)
3739 {
3740 struct type *float_elt_type;
3741
3742 arg = args[argno];
3743 type = check_typedef (arg->type ());
3744 len = type->length ();
3745
3746 /* Special handling for function parameters. */
3747 if (len == 8
3748 && type->code () == TYPE_CODE_PTR
3749 && type->target_type ()->code () == TYPE_CODE_FUNC)
3750 {
3751 gdb_byte val_buf[8];
3752 ULONGEST faddr = extract_unsigned_integer
3753 (arg->contents ().data (), 8, byte_order);
3754 store_unsigned_integer (val_buf, 8, byte_order,
3755 find_func_descr (regcache, faddr,
3756 &funcdescaddr));
3757 if (slotnum < rseslots)
3758 tdep->infcall_ops.store_argument_in_slot (regcache, bsp,
3759 slotnum, val_buf);
3760 else
3761 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
3762 slotnum++;
3763 continue;
3764 }
3765
3766 /* Normal slots. */
3767
3768 /* Skip odd slot if necessary... */
3769 if ((slotnum & 1) && slot_alignment_is_next_even (type))
3770 slotnum++;
3771
3772 argoffset = 0;
3773 while (len > 0)
3774 {
3775 gdb_byte val_buf[8];
3776
3777 memset (val_buf, 0, 8);
3778 if (!ia64_struct_type_p (type) && len < 8)
3779 {
3780 /* Integral types are LSB-aligned, so we have to be careful
3781 to insert the argument on the correct side of the buffer.
3782 This is why we use store_unsigned_integer. */
3784 (val_buf, 8, byte_order,
3785 extract_unsigned_integer (arg->contents ().data (), len,
3786 byte_order));
3787 }
3788 else
3789 {
3790 /* This is either an 8bit integral type, or an aggregate.
3791 For 8bit integral type, there is no problem, we just
3792 copy the value over.
3793
3794 For aggregates, the only potentially tricky portion
3795 is to write the last one if it is less than 8 bytes.
3796 In this case, the data is Byte0-aligned. Happy news,
3797 this means that we don't need to differentiate the
3798 handling of 8byte blocks and less-than-8bytes blocks. */
3799 memcpy (val_buf, arg->contents ().data () + argoffset,
3800 (len > 8) ? 8 : len);
3801 }
3802
3803 if (slotnum < rseslots)
3804 tdep->infcall_ops.store_argument_in_slot (regcache, bsp,
3805 slotnum, val_buf);
3806 else
3807 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
3808
3809 argoffset += 8;
3810 len -= 8;
3811 slotnum++;
3812 }
3813
3814 /* Handle floating point types (including HFAs). */
3815 float_elt_type = is_float_or_hfa_type (type);
3816 if (float_elt_type != NULL)
3817 {
3818 argoffset = 0;
3819 len = type->length ();
3820 while (len > 0 && floatreg < IA64_FR16_REGNUM)
3821 {
3822 gdb_byte to[IA64_FP_REGISTER_SIZE];
3823 target_float_convert (arg->contents ().data () + argoffset,
3824 float_elt_type, to,
3826 regcache->cooked_write (floatreg, to);
3827 floatreg++;
3828 argoffset += float_elt_type->length ();
3829 len -= float_elt_type->length ();
3830 }
3831 }
3832 }
3833
3834 /* Store the struct return value in r8 if necessary. */
3835 if (return_method == return_method_struct)
3837 (ULONGEST) struct_addr);
3838
3839 global_pointer = ia64_find_global_pointer (gdbarch, func_addr);
3840
3841 if (global_pointer != 0)
3843
3844 /* The following is not necessary on HP-UX, because we're using
3845 a dummy code sequence pushed on the stack to make the call, and
3846 this sequence doesn't need b0 to be set in order for our dummy
3847 breakpoint to be hit. Nonetheless, this doesn't interfere, and
3848 it's needed for other OSes, so we do this unconditionaly. */
3850
3852
3853 tdep->infcall_ops.set_function_addr (regcache, func_addr);
3854
3855 return sp;
3856}
3857
3864
3865static struct frame_id
3867{
3868 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3869 gdb_byte buf[8];
3870 CORE_ADDR sp, bsp;
3871
3872 get_frame_register (this_frame, sp_regnum, buf);
3873 sp = extract_unsigned_integer (buf, 8, byte_order);
3874
3875 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
3876 bsp = extract_unsigned_integer (buf, 8, byte_order);
3877
3878 if (gdbarch_debug >= 1)
3880 "dummy frame id: code %s, stack %s, special %s\n",
3881 paddress (gdbarch, get_frame_pc (this_frame)),
3882 paddress (gdbarch, sp), paddress (gdbarch, bsp));
3883
3884 return frame_id_build_special (sp, get_frame_pc (this_frame), bsp);
3885}
3886
3887static CORE_ADDR
3889{
3890 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3891 gdb_byte buf[8];
3892 CORE_ADDR ip, psr, pc;
3893
3894 frame_unwind_register (next_frame, IA64_IP_REGNUM, buf);
3895 ip = extract_unsigned_integer (buf, 8, byte_order);
3896 frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf);
3897 psr = extract_unsigned_integer (buf, 8, byte_order);
3898
3899 pc = (ip & ~0xf) | ((psr >> 41) & 3);
3900 return pc;
3901}
3902
3903static int
3904ia64_print_insn (bfd_vma memaddr, struct disassemble_info *info)
3905{
3906 info->bytes_per_line = SLOT_MULTIPLIER;
3907 return default_print_insn (memaddr, info);
3908}
3909
3910/* The default "size_of_register_frame" gdbarch_tdep routine for ia64. */
3911
3912static int
3914{
3915 return (cfm & 0x7f);
3916}
3917
3918static struct gdbarch *
3920{
3921 /* If there is already a candidate, use it. */
3923 if (arches != NULL)
3924 return arches->gdbarch;
3925
3928 ia64_gdbarch_tdep *tdep = gdbarch_tdep<ia64_gdbarch_tdep> (gdbarch);
3929
3931
3932 /* According to the ia64 specs, instructions that store long double
3933 floats in memory use a long-double format different than that
3934 used in the floating registers. The memory format matches the
3935 x86 extended float format which is 80 bits. An OS may choose to
3936 use this format (e.g. GNU/Linux) or choose to use a different
3937 format for storing long doubles (e.g. HPUX). In the latter case,
3938 the setting of the format may be moved/overridden in an
3939 OS-specific tdep file. */
3941
3950
3956
3959
3967
3969
3971
3980
3981 /* Settings for calling functions in the inferior. */
3986
3988#ifdef HAVE_LIBUNWIND_IA64_H
3990 &ia64_libunwind_sigtramp_frame_unwind);
3991 frame_unwind_append_unwinder (gdbarch, &ia64_libunwind_frame_unwind);
3993 libunwind_frame_set_descr (gdbarch, &ia64_libunwind_descr);
3994#else
3996#endif
3999
4000 /* Settings that should be unnecessary. */
4002
4006
4007 /* The virtual table contains 16-byte descriptors, not pointers to
4008 descriptors. */
4010
4011 /* Hook in ABI-specific overrides, if they have been registered. */
4013
4014 return gdbarch;
4015}
4016
4017void _initialize_ia64_tdep ();
4018void
4020{
4021 gdbarch_register (bfd_arch_ia64, ia64_gdbarch_init, NULL);
4022}
int regnum
void xfree(void *)
void gdbarch_register(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init, gdbarch_dump_tdep_ftype *dump_tdep, gdbarch_supports_arch_info_ftype *supports_arch_info)
unsigned int gdbarch_debug
int default_print_insn(bfd_vma memaddr, disassemble_info *info)
static std::vector< const char * > arches
Definition arch-utils.c:685
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
Definition arch-utils.c:177
struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
struct_return
Definition arm-tdep.h:84
bool find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr, const struct block **block)
Definition blockframe.c:373
CORE_ADDR get_pc_function_start(CORE_ADDR pc)
Definition blockframe.c:86
frame_info * get() const
Definition frame.h:294
enum register_status cooked_read(int regnum, gdb_byte *buf)
Definition regcache.c:698
gdbarch * arch() const
Definition regcache.c:231
void cooked_write(int regnum, const gdb_byte *buf)
Definition regcache.c:870
void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
Definition corefile.c:347
ULONGEST read_memory_unsigned_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
Definition corefile.c:306
void read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition corefile.c:238
LONGEST read_memory_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
Definition corefile.c:296
int is_vtable_name(const char *name)
Definition cp-abi.c:53
static void store_unsigned_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, ULONGEST val)
Definition defs.h:515
static LONGEST extract_signed_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
Definition defs.h:465
static ULONGEST extract_unsigned_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
Definition defs.h:480
return_value_convention
Definition defs.h:257
@ RETURN_VALUE_REGISTER_CONVENTION
Definition defs.h:260
@ RETURN_VALUE_STRUCT_CONVENTION
Definition defs.h:267
#define LL
void frame_base_set_default(struct gdbarch *gdbarch, const struct frame_base *default_base)
Definition frame-base.c:93
const struct frame_id outer_frame_id
Definition frame.c:689
int default_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
struct value * frame_unwind_got_memory(frame_info_ptr frame, int regnum, CORE_ADDR addr)
struct value * frame_unwind_got_register(frame_info_ptr frame, int regnum, int new_regnum)
enum unwind_stop_reason default_frame_unwind_stop_reason(frame_info_ptr this_frame, void **this_cache)
struct value * frame_unwind_got_constant(frame_info_ptr frame, int regnum, ULONGEST val)
void frame_unwind_append_unwinder(struct gdbarch *gdbarch, const struct frame_unwind *unwinder)
ULONGEST get_frame_register_unsigned(frame_info_ptr frame, int regnum)
Definition frame.c:1399
CORE_ADDR get_frame_pc(frame_info_ptr frame)
Definition frame.c:2712
struct frame_id frame_id_build_special(CORE_ADDR stack_addr, CORE_ADDR code_addr, CORE_ADDR special_addr)
Definition frame.c:692
void get_frame_register(frame_info_ptr frame, int regnum, gdb_byte *buf)
Definition frame.c:1263
struct gdbarch * get_frame_arch(frame_info_ptr this_frame)
Definition frame.c:3027
void frame_unwind_register(frame_info_ptr next_frame, int regnum, gdb_byte *buf)
Definition frame.c:1243
CORE_ADDR get_frame_func(frame_info_ptr this_frame)
Definition frame.c:1098
bool get_frame_register_bytes(frame_info_ptr frame, int regnum, CORE_ADDR offset, gdb::array_view< gdb_byte > buffer, int *optimizedp, int *unavailablep)
Definition frame.c:1480
void put_frame_register(frame_info_ptr frame, int regnum, const gdb_byte *buf)
Definition frame.c:1426
@ SIGTRAMP_FRAME
Definition frame.h:198
@ NORMAL_FRAME
Definition frame.h:187
#define FRAME_OBSTACK_ZALLOC(TYPE)
Definition frame.h:825
void set_gdbarch_long_long_bit(struct gdbarch *gdbarch, int long_long_bit)
Definition gdbarch.c:1493
void set_gdbarch_unwind_pc(struct gdbarch *gdbarch, gdbarch_unwind_pc_ftype *unwind_pc)
void set_gdbarch_convert_from_func_ptr_addr(struct gdbarch *gdbarch, gdbarch_convert_from_func_ptr_addr_ftype *convert_from_func_ptr_addr)
void set_gdbarch_register_to_value(struct gdbarch *gdbarch, gdbarch_register_to_value_ftype *register_to_value)
enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
Definition gdbarch.c:1396
void set_gdbarch_value_to_register(struct gdbarch *gdbarch, gdbarch_value_to_register_ftype *value_to_register)
void set_gdbarch_breakpoint_kind_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_kind_from_pc_ftype *breakpoint_kind_from_pc)
void set_gdbarch_frame_align(struct gdbarch *gdbarch, gdbarch_frame_align_ftype *frame_align)
void set_gdbarch_vtable_function_descriptors(struct gdbarch *gdbarch, int vtable_function_descriptors)
Definition gdbarch.c:4034
void set_gdbarch_write_pc(struct gdbarch *gdbarch, gdbarch_write_pc_ftype *write_pc)
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype *skip_prologue)
void set_gdbarch_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype *register_name)
void set_gdbarch_int_bit(struct gdbarch *gdbarch, int int_bit)
Definition gdbarch.c:1459
void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype *return_value)
CORE_ADDR gdbarch_skip_prologue_ftype(struct gdbarch *gdbarch, CORE_ADDR ip)
void set_gdbarch_fp0_regnum(struct gdbarch *gdbarch, int fp0_regnum)
Definition gdbarch.c:2098
void set_gdbarch_double_bit(struct gdbarch *gdbarch, int double_bit)
Definition gdbarch.c:1612
void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype *inner_than)
void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
Definition gdbarch.c:2047
void set_gdbarch_register_reggroup_p(struct gdbarch *gdbarch, gdbarch_register_reggroup_p_ftype *register_reggroup_p)
struct type * gdbarch_register_type_ftype(struct gdbarch *gdbarch, int reg_nr)
int gdbarch_sp_regnum(struct gdbarch *gdbarch)
Definition gdbarch.c:2037
void set_gdbarch_long_double_format(struct gdbarch *gdbarch, const struct floatformat **long_double_format)
Definition gdbarch.c:1663
void set_gdbarch_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype *register_type)
void set_gdbarch_print_insn(struct gdbarch *gdbarch, gdbarch_print_insn_ftype *print_insn)
void set_gdbarch_float_bit(struct gdbarch *gdbarch, int float_bit)
Definition gdbarch.c:1578
void set_gdbarch_short_bit(struct gdbarch *gdbarch, int short_bit)
Definition gdbarch.c:1442
void set_gdbarch_pseudo_register_write(struct gdbarch *gdbarch, gdbarch_pseudo_register_write_ftype *pseudo_register_write)
void set_gdbarch_num_pseudo_regs(struct gdbarch *gdbarch, int num_pseudo_regs)
Definition gdbarch.c:1958
void set_gdbarch_dwarf2_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_dwarf2_reg_to_regnum_ftype *dwarf2_reg_to_regnum)
const gdb_byte * gdbarch_breakpoint_from_pc_ftype(struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr)
void set_gdbarch_long_bit(struct gdbarch *gdbarch, int long_bit)
Definition gdbarch.c:1476
void set_gdbarch_ptr_bit(struct gdbarch *gdbarch, int ptr_bit)
Definition gdbarch.c:1732
void set_gdbarch_convert_register_p(struct gdbarch *gdbarch, gdbarch_convert_register_p_ftype *convert_register_p)
void set_gdbarch_pseudo_register_read(struct gdbarch *gdbarch, gdbarch_pseudo_register_read_ftype *pseudo_register_read)
void set_gdbarch_memory_remove_breakpoint(struct gdbarch *gdbarch, gdbarch_memory_remove_breakpoint_ftype *memory_remove_breakpoint)
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
Definition gdbarch.c:1941
void set_gdbarch_long_double_bit(struct gdbarch *gdbarch, int long_double_bit)
Definition gdbarch.c:1646
const char * gdbarch_register_name_ftype(struct gdbarch *gdbarch, int regnr)
void set_gdbarch_dummy_id(struct gdbarch *gdbarch, gdbarch_dummy_id_ftype *dummy_id)
void set_gdbarch_read_pc(struct gdbarch *gdbarch, gdbarch_read_pc_ftype *read_pc)
void set_gdbarch_breakpoint_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_from_pc_ftype *breakpoint_from_pc)
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype *push_dummy_call)
void set_gdbarch_memory_insert_breakpoint(struct gdbarch *gdbarch, gdbarch_memory_insert_breakpoint_ftype *memory_insert_breakpoint)
struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, gdbarch_tdep_up tdep)
Definition gdbarch.c:266
std::unique_ptr< gdbarch_tdep_base > gdbarch_tdep_up
Definition gdbarch.h:73
struct gdbarch * gdbarch_init_ftype(struct gdbarch_info info, struct gdbarch_list *arches)
Definition gdbarch.h:271
function_call_return_method
Definition gdbarch.h:114
@ return_method_struct
Definition gdbarch.h:126
struct type * init_float_type(type_allocator &alloc, int bit, const char *name, const struct floatformat **floatformats, enum bfd_endian byte_order)
Definition gdbtypes.c:3408
const struct builtin_type * builtin_type(struct gdbarch *gdbarch)
Definition gdbtypes.c:6168
const struct floatformat * floatformats_i387_ext[BFD_ENDIAN_UNKNOWN]
Definition gdbtypes.c:101
struct type * check_typedef(struct type *type)
Definition gdbtypes.c:2966
mach_port_t mach_port_t name mach_port_t mach_port_t name kern_return_t int status
Definition gnu-nat.c:1790
struct value * libunwind_frame_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
unw_word_t libunwind_find_dyn_list(unw_addr_space_t as, unw_dyn_info_t *di, void *arg)
int libunwind_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_cache)
void libunwind_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
int libunwind_search_unwind_table(void *as, long ip, void *di, void *pi, int need_unwind_info, void *args)
int libunwind_get_reg_special(struct gdbarch *gdbarch, readable_regcache *regcache, int regnum, void *buf)
int libunwind_sigtramp_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_cache)
void libunwind_frame_dealloc_cache(frame_info_ptr self, void *this_cache)
int libunwind_is_initialized(void)
void libunwind_frame_set_descr(struct gdbarch *gdbarch, struct libunwind_descr *descr)
static int ia64_struct_type_p(const struct type *type)
Definition ia64-tdep.c:3184
#define SLOT_MULTIPLIER
Definition ia64-tdep.c:105
#define NUM_IA64_RAW_REGS
Definition ia64-tdep.c:127
#define IS_NaT_COLLECTION_ADDR(addr)
Definition ia64-tdep.c:910
static int ia64_sigtramp_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_cache)
Definition ia64-tdep.c:2336
static int ia64_memory_insert_breakpoint(struct gdbarch *gdbarch, struct bp_target_info *bp_tgt)
Definition ia64-tdep.c:642
static void ia64_allocate_new_rse_frame(struct regcache *regcache, ULONGEST bsp, int sof)
Definition ia64-tdep.c:3638
static CORE_ADDR ia64_find_global_pointer_from_dynamic_section(struct gdbarch *gdbarch, CORE_ADDR faddr)
Definition ia64-tdep.c:3425
static long long extract_bit_field(const gdb_byte *bundle, int from, int len)
Definition ia64-tdep.c:377
static long long slotN_contents(gdb_byte *bundle, int slotnum)
Definition ia64-tdep.c:463
static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
Definition ia64-tdep.c:121
static void ia64_store_return_value(struct type *type, struct regcache *regcache, const gdb_byte *valbuf)
Definition ia64-tdep.c:3256
#define imm9(_instr_)
Definition ia64-tdep.c:1328
static CORE_ADDR find_extant_func_descr(struct gdbarch *gdbarch, CORE_ADDR faddr)
Definition ia64-tdep.c:3503
static void ia64_extract_return_value(struct type *type, struct regcache *regcache, gdb_byte *valbuf)
Definition ia64-tdep.c:3191
static void ia64_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
Definition ia64-tdep.c:1889
static const struct floatformat * floatformats_ia64_ext[2]
Definition ia64-tdep.c:304
static CORE_ADDR ia64_find_global_pointer(struct gdbarch *gdbarch, CORE_ADDR faddr)
Definition ia64-tdep.c:3487
static struct type * ia64_ext_type(struct gdbarch *gdbarch)
Definition ia64-tdep.c:311
static int floatformat_valid(const struct floatformat *fmt, const void *from)
Definition ia64-tdep.c:287
static gdbarch_init_ftype ia64_gdbarch_init
Definition ia64-tdep.c:117
static void ia64_sigtramp_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
Definition ia64-tdep.c:2263
static enum ia64_instruction_type template_encoding_table[32][3]
Definition ia64-tdep.c:476
static struct ia64_frame_cache * ia64_sigtramp_frame_cache(frame_info_ptr this_frame, void **this_cache)
Definition ia64-tdep.c:2232
ia64_instruction_type
Definition ia64-tdep.c:79
@ B
Definition ia64-tdep.c:84
@ A
Definition ia64-tdep.c:80
@ M
Definition ia64-tdep.c:82
@ X
Definition ia64-tdep.c:86
@ I
Definition ia64-tdep.c:81
@ L
Definition ia64-tdep.c:85
@ undefined
Definition ia64-tdep.c:87
@ F
Definition ia64-tdep.c:83
static CORE_ADDR refine_prologue_limit(CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit)
Definition ia64-tdep.c:1271
static enum register_status ia64_pseudo_register_read(struct gdbarch *gdbarch, readable_regcache *regcache, int regnum, gdb_byte *buf)
Definition ia64-tdep.c:933
static void ia64_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int regnum, const gdb_byte *buf)
Definition ia64-tdep.c:1089
static struct ia64_frame_cache * ia64_alloc_frame_cache(void)
Definition ia64-tdep.c:1336
static const struct frame_base ia64_frame_base
Definition ia64-tdep.c:2374
static struct ia64_frame_cache * ia64_frame_cache(frame_info_ptr this_frame, void **this_cache)
Definition ia64-tdep.c:1844
static int ia64_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *group)
Definition ia64-tdep.c:327
static enum return_value_convention ia64_return_value(struct gdbarch *gdbarch, struct value *function, struct type *valtype, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
Definition ia64-tdep.c:3306
static CORE_ADDR ia64_unwind_pc(struct gdbarch *gdbarch, frame_info_ptr next_frame)
Definition ia64-tdep.c:3888
static int ia64_memory_remove_breakpoint(struct gdbarch *gdbarch, struct bp_target_info *bp_tgt)
Definition ia64-tdep.c:730
static struct value * ia64_frame_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
Definition ia64-tdep.c:1910
static int sp_regnum
Definition ia64-tdep.c:132
static CORE_ADDR ia64_read_pc(readable_regcache *regcache)
Definition ia64-tdep.c:882
static const struct ia64_infcall_ops ia64_infcall_ops
Definition ia64-tdep.c:3858
static int is_float_or_hfa_type_recurse(struct type *t, struct type **etp)
Definition ia64-tdep.c:3331
static CORE_ADDR rse_address_add(CORE_ADDR addr, int nslots)
Definition ia64-tdep.c:915
static gdbarch_register_name_ftype ia64_register_name
Definition ia64-tdep.c:119
static void ia64_value_to_register(frame_info_ptr frame, int regnum, struct type *valtype, const gdb_byte *in)
Definition ia64-tdep.c:1243
static CORE_ADDR ia64_frame_align(struct gdbarch *gdbarch, CORE_ADDR sp)
Definition ia64-tdep.c:3630
static gdbarch_skip_prologue_ftype ia64_skip_prologue
Definition ia64-tdep.c:122
static void ia64_store_argument_in_slot(struct regcache *regcache, CORE_ADDR bsp, int slotnum, gdb_byte *buf)
Definition ia64-tdep.c:3661
static const char *const ia64_register_names[]
Definition ia64-tdep.c:147
static int ia64_dwarf_reg_to_regnum(struct gdbarch *gdbarch, int reg)
Definition ia64-tdep.c:365
pseudo_regs
Definition ia64-tdep.c:138
@ VP0_REGNUM
Definition ia64-tdep.c:141
@ VBOF_REGNUM
Definition ia64-tdep.c:139
@ VP63_REGNUM
Definition ia64-tdep.c:142
@ VP16_REGNUM
Definition ia64-tdep.c:141
@ V32_REGNUM
Definition ia64-tdep.c:139
@ V127_REGNUM
Definition ia64-tdep.c:140
@ LAST_PSEUDO_REGNUM
Definition ia64-tdep.c:142
@ FIRST_PSEUDO_REGNUM
Definition ia64-tdep.c:138
static struct value * ia64_sigtramp_frame_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
Definition ia64-tdep.c:2284
static int max_skip_non_prologue_insns
Definition ia64-tdep.c:1255
#define BUNDLE_LEN
Definition ia64-tdep.c:109
static void ia64_sigtramp_frame_init_saved_regs(frame_info_ptr this_frame, struct ia64_frame_cache *cache)
Definition ia64-tdep.c:2178
static CORE_ADDR fetch_instruction(CORE_ADDR addr, ia64_instruction_type *it, long long *instr)
Definition ia64-tdep.c:516
static int slot_alignment_is_next_even(struct type *t)
Definition ia64-tdep.c:3386
static int ia64_use_struct_convention(struct type *type)
Definition ia64-tdep.c:3156
static CORE_ADDR ia64_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
Definition ia64-tdep.c:3676
#define IA64_FP_REGISTER_SIZE
Definition ia64-tdep.c:130
static CORE_ADDR find_func_descr(struct regcache *regcache, CORE_ADDR faddr, CORE_ADDR *fdaptr)
Definition ia64-tdep.c:3551
static int ia64_register_to_value(frame_info_ptr frame, int regnum, struct type *valtype, gdb_byte *out, int *optimizedp, int *unavailablep)
Definition ia64-tdep.c:1222
static struct type * is_float_or_hfa_type(struct type *t)
Definition ia64-tdep.c:3372
static CORE_ADDR ia64_frame_base_address(frame_info_ptr this_frame, void **this_cache)
Definition ia64-tdep.c:2367
static int ia64_convert_register_p(struct gdbarch *gdbarch, int regno, struct type *type)
Definition ia64-tdep.c:1214
static int ia64_size_of_register_frame(frame_info_ptr this_frame, ULONGEST cfm)
Definition ia64-tdep.c:3913
static CORE_ADDR ia64_convert_from_func_ptr_addr(struct gdbarch *gdbarch, CORE_ADDR addr, struct target_ops *targ)
Definition ia64-tdep.c:3586
static const struct frame_unwind ia64_sigtramp_frame_unwind
Definition ia64-tdep.c:2353
static CORE_ADDR examine_prologue(CORE_ADDR pc, CORE_ADDR lim_pc, frame_info_ptr this_frame, struct ia64_frame_cache *cache)
Definition ia64-tdep.c:1362
static void ia64_set_function_addr(struct regcache *regcache, CORE_ADDR func_addr)
Definition ia64-tdep.c:3670
#define IA64_BREAKPOINT
Definition ia64-tdep.c:639
void _initialize_ia64_tdep()
Definition ia64-tdep.c:4019
void ia64_write_pc(struct regcache *regcache, CORE_ADDR new_pc)
Definition ia64-tdep.c:895
static struct frame_id ia64_dummy_id(struct gdbarch *gdbarch, frame_info_ptr this_frame)
Definition ia64-tdep.c:3866
#define isScratch(_regnum_)
Definition ia64-tdep.c:1325
static const struct floatformat floatformat_ia64_ext_little
Definition ia64-tdep.c:292
static int ia64_breakpoint_kind_from_pc(struct gdbarch *gdbarch, CORE_ADDR *pcptr)
Definition ia64-tdep.c:809
static void replace_bit_field(gdb_byte *bundle, long long val, int from, int len)
Definition ia64-tdep.c:413
static gdbarch_register_type_ftype ia64_register_type
Definition ia64-tdep.c:120
static const struct frame_unwind ia64_frame_unwind
Definition ia64-tdep.c:2164
static int ia64_print_insn(bfd_vma memaddr, struct disassemble_info *info)
Definition ia64-tdep.c:3904
static const struct floatformat floatformat_ia64_ext_big
Definition ia64-tdep.c:298
static void replace_slotN_contents(gdb_byte *bundle, long long instr, int slotnum)
Definition ia64-tdep.c:471
#define IA64_GR127_REGNUM
Definition ia64-tdep.h:49
#define IA64_GR31_REGNUM
Definition ia64-tdep.h:47
#define IA64_GR1_REGNUM
Definition ia64-tdep.h:35
#define IA64_RNAT_REGNUM
Definition ia64-tdep.h:180
#define IA64_CCV_REGNUM
Definition ia64-tdep.h:189
#define IA64_BR7_REGNUM
Definition ia64-tdep.h:146
#define IA64_FR16_REGNUM
Definition ia64-tdep.h:63
#define IA64_GR32_REGNUM
Definition ia64-tdep.h:48
#define IA64_PR0_REGNUM
Definition ia64-tdep.h:73
#define IA64_PR_REGNUM
Definition ia64-tdep.h:160
#define IA64_FPSR_REGNUM
Definition ia64-tdep.h:191
#define IA64_GR12_REGNUM
Definition ia64-tdep.h:46
#define IA64_GR8_REGNUM
Definition ia64-tdep.h:42
#define IA64_PSR_REGNUM
Definition ia64-tdep.h:166
#define IA64_CFM_REGNUM
Definition ia64-tdep.h:169
#define IA64_FR31_REGNUM
Definition ia64-tdep.h:64
#define IA64_FR32_REGNUM
Definition ia64-tdep.h:65
#define IA64_NAT127_REGNUM
Definition ia64-tdep.h:202
#define IA64_FR2_REGNUM
Definition ia64-tdep.h:54
#define IA64_AR0_REGNUM
Definition ia64-tdep.h:173
#define IA64_PFS_REGNUM
Definition ia64-tdep.h:193
#define IA64_NAT0_REGNUM
Definition ia64-tdep.h:199
#define IA64_VFP_REGNUM
Definition ia64-tdep.h:150
#define IA64_BR0_REGNUM
Definition ia64-tdep.h:139
#define IA64_BSP_REGNUM
Definition ia64-tdep.h:178
#define IA64_NAT32_REGNUM
Definition ia64-tdep.h:201
#define IA64_IP_REGNUM
Definition ia64-tdep.h:163
#define IA64_FR8_REGNUM
Definition ia64-tdep.h:55
#define IA64_GR0_REGNUM
Definition ia64-tdep.h:34
#define IA64_VRAP_REGNUM
Definition ia64-tdep.h:154
#define IA64_NAT31_REGNUM
Definition ia64-tdep.h:200
#define IA64_FR127_REGNUM
Definition ia64-tdep.h:66
#define IA64_LC_REGNUM
Definition ia64-tdep.h:194
#define IA64_UNAT_REGNUM
Definition ia64-tdep.h:190
#define IA64_FR0_REGNUM
Definition ia64-tdep.h:52
CORE_ADDR find_function_addr(struct value *function, struct type **retval_type, struct type **function_type)
Definition infcall.c:278
struct inferior * current_inferior(void)
Definition inferior.c:55
struct bound_minimal_symbol lookup_minimal_symbol_by_pc(CORE_ADDR pc)
Definition minsyms.c:996
objfiles()
Definition __init__.py:216
info(Component c)
Definition gdbarch.py:41
struct obj_section * find_pc_section(CORE_ADDR pc)
Definition objfiles.c:1128
#define SECT_OFF_TEXT(objfile)
Definition objfiles.h:139
void gdbarch_init_osabi(struct gdbarch_info info, struct gdbarch *gdbarch)
Definition osabi.c:382
struct program_space * current_program_space
Definition progspace.c:40
int register_size(struct gdbarch *gdbarch, int regnum)
Definition regcache.c:170
enum register_status regcache_cooked_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
Definition regcache.c:796
void regcache_cooked_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
Definition regcache.c:825
struct type * register_type(struct gdbarch *gdbarch, int regnum)
Definition regcache.c:158
const reggroup *const general_reggroup
Definition reggroups.c:251
const reggroup *const float_reggroup
Definition reggroups.c:252
const reggroup *const save_reggroup
Definition reggroups.c:256
const reggroup *const all_reggroup
Definition reggroups.c:255
const reggroup *const restore_reggroup
Definition reggroups.c:257
const reggroup *const vector_reggroup
Definition reggroups.c:254
enum var_types type
Definition scm-param.c:142
struct minimal_symbol * minsym
Definition minsyms.h:49
gdb_byte shadow_contents[BREAKPOINT_MAX]
Definition breakpoint.h:279
CORE_ADDR placed_address
Definition breakpoint.h:266
CORE_ADDR reqstd_address
Definition breakpoint.h:269
struct type * builtin_long
Definition gdbtypes.h:2081
struct type * type() const
Definition gdbtypes.h:547
CORE_ADDR stack_addr
Definition frame-id.h:68
CORE_ADDR code_addr
Definition frame-id.h:83
frame_this_id_ftype * this_id
const char * linkage_name() const
Definition symtab.h:460
CORE_ADDR saved_sp
Definition ia64-tdep.c:260
CORE_ADDR saved_regs[NUM_IA64_RAW_REGS]
Definition ia64-tdep.c:282
CORE_ADDR bsp
Definition ia64-tdep.c:261
CORE_ADDR base
Definition ia64-tdep.c:258
CORE_ADDR after_prologue
Definition ia64-tdep.c:269
CORE_ADDR prev_cfm
Definition ia64-tdep.c:263
CORE_ADDR cfm
Definition ia64-tdep.c:262
int(* pc_in_sigtramp)(CORE_ADDR)
Definition ia64-tdep.h:236
CORE_ADDR(* find_global_pointer_from_solib)(struct gdbarch *gdbarch, CORE_ADDR faddr)
Definition ia64-tdep.h:251
CORE_ADDR(* sigcontext_register_address)(struct gdbarch *, CORE_ADDR, int)
Definition ia64-tdep.h:234
struct type * ia64_ext_type
Definition ia64-tdep.h:255
int(* size_of_register_frame)(frame_info_ptr this_frame, ULONGEST cfm)
Definition ia64-tdep.h:243
CORE_ADDR addr() const
Definition objfiles.h:385
CORE_ADDR endaddr() const
Definition objfiles.h:392
struct objfile * objfile
Definition objfiles.h:401
struct bfd_section * the_bfd_section
Definition objfiles.h:398
iterator_range< section_iterator > sections()
Definition objfiles.h:685
struct gdbarch * arch() const
Definition objfiles.h:507
gdb_bfd_ref_ptr obfd
Definition objfiles.h:740
CORE_ADDR text_section_offset() const
Definition objfiles.h:482
struct symtab * symtab
Definition symtab.h:2328
CORE_ADDR pc
Definition symtab.h:2337
CORE_ADDR end
Definition symtab.h:2338
struct type * target_type() const
Definition gdbtypes.h:1037
type_code code() const
Definition gdbtypes.h:956
ULONGEST length() const
Definition gdbtypes.h:983
struct field & field(int idx) const
Definition gdbtypes.h:1012
bool is_vector() const
Definition gdbtypes.h:1186
unsigned int num_fields() const
Definition gdbtypes.h:994
gdbarch * arch() const
Definition gdbtypes.c:273
Definition value.h:130
gdb::array_view< const gdb_byte > contents_all()
Definition value.c:1119
gdb::array_view< const gdb_byte > contents()
Definition value.c:1262
struct type * type() const
Definition value.h:180
struct value::@203::@204 reg
struct symtab_and_line find_pc_line(CORE_ADDR pc, int notcurrent)
Definition symtab.c:3295
void target_float_convert(const gdb_byte *from, const struct type *from_type, gdb_byte *to, const struct type *to_type)
scoped_restore_tmpl< int > make_scoped_restore_show_memory_breakpoints(int show)
Definition target.c:1667
int target_write_memory(CORE_ADDR memaddr, const gdb_byte *myaddr, ssize_t len)
Definition target.c:1861
int target_has_registers()
Definition target.c:189
gdb::optional< gdb::byte_vector > target_read_alloc(struct target_ops *ops, enum target_object object, const char *annex)
Definition target.c:2312
int target_read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition target.c:1785
int target_write_raw_memory(CORE_ADDR memaddr, const gdb_byte *myaddr, ssize_t len)
Definition target.c:1878
@ TARGET_OBJECT_UNWIND_TABLE
Definition target.h:160
const char * paddress(struct gdbarch *gdbarch, CORE_ADDR addr)
Definition utils.c:3166
void gdb_printf(struct ui_file *stream, const char *format,...)
Definition utils.c:1886
#define gdb_stdlog
Definition utils.h:190